Automatic Benchmark Profiling Through Advanced Trace Analysis Alexis Martin, Vania Marangozova-Martin
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Arxiv:2006.14147V2 [Cs.CR] 26 Mar 2021
FastSpec: Scalable Generation and Detection of Spectre Gadgets Using Neural Embeddings M. Caner Tol Berk Gulmezoglu Koray Yurtseven Berk Sunar Worcester Polytechnic Institute Iowa State University Worcester Polytechnic Institute Worcester Polytechnic Institute [email protected] [email protected] [email protected] [email protected] Abstract—Several techniques have been proposed to detect [4] are implemented against the SGX environment and vulnerable Spectre gadgets in widely deployed commercial even remotely over the network [5]. These attacks show software. Unfortunately, detection techniques proposed so the applicability of Spectre attacks in the wild. far rely on hand-written rules which fall short in covering Unfortunately, chip vendors try to patch the leakages subtle variations of known Spectre gadgets as well as demand one-by-one with microcode updates rather than fixing a huge amount of time to analyze each conditional branch the flaws by changing their hardware designs. Therefore, in software. Moreover, detection tool evaluations are based developers rely on automated malware analysis tools to only on a handful of these gadgets, as it requires arduous eliminate mistakenly placed Spectre gadgets in their pro- effort to craft new gadgets manually. grams. The proposed detection tools mostly implement In this work, we employ both fuzzing and deep learning taint analysis [6] and symbolic execution [7], [8] to iden- techniques to automate the generation and detection of tify potential gadgets in benign applications. However, Spectre gadgets. We first create a diverse set of Spectre-V1 the methods proposed so far are associated with two gadgets by introducing perturbations to the known gadgets. shortcomings: (1) the low number of Spectre gadgets Using mutational fuzzing, we produce a data set with more prevents the comprehensive evaluation of the tools, (2) than 1 million Spectre-V1 gadgets which is the largest time consumption exponentially increases when the binary Spectre gadget data set built to date. -
EEMBC and the Purposes of Embedded Processor Benchmarking Markus Levy, President
EEMBC and the Purposes of Embedded Processor Benchmarking Markus Levy, President ISPASS 2005 Certified Performance Analysis for Embedded Systems Designers EEMBC: A Historical Perspective • Began as an EDN Magazine project in April 1997 • Replace Dhrystone • Have meaningful measure for explaining processor behavior • Developed business model • Invited worldwide processor vendors • A consortium was born 1 EEMBC Membership • Board Member • Membership Dues: $30,000 (1st year); $16,000 (subsequent years) • Access and Participation on ALL Subcommittees • Full Voting Rights • Subcommittee Member • Membership Dues Are Subcommittee Specific • Access to Specific Benchmarks • Technical Involvement Within Subcommittee • Help Determine Next Generation Benchmarks • Special Academic Membership EEMBC Philosophy: Standardized Benchmarks and Certified Scores • Member derived benchmarks • Determine the standard, the process, and the benchmarks • Open to industry feedback • Ensures all processor/compiler vendors are running the same tests • Certification process ensures credibility • All benchmark scores officially validated before publication • The entire benchmark environment must be disclosed 2 Embedded Industry: Represented by Very Diverse Applications • Networking • Storage, low- and high-end routers, switches • Consumer • Games, set top boxes, car navigation, smartcards • Wireless • Cellular, routers • Office Automation • Printers, copiers, imaging • Automotive • Engine control, Telematics Traditional Division of Embedded Applications Low High Power -
Cloud Workbench a Web-Based Framework for Benchmarking Cloud Services
Bachelor August 12, 2014 Cloud WorkBench A Web-Based Framework for Benchmarking Cloud Services Joel Scheuner of Muensterlingen, Switzerland (10-741-494) supervised by Prof. Dr. Harald C. Gall Philipp Leitner, Jürgen Cito software evolution & architecture lab Bachelor Cloud WorkBench A Web-Based Framework for Benchmarking Cloud Services Joel Scheuner software evolution & architecture lab Bachelor Author: Joel Scheuner, [email protected] Project period: 04.03.2014 - 14.08.2014 Software Evolution & Architecture Lab Department of Informatics, University of Zurich Acknowledgements This bachelor thesis constitutes the last milestone on the way to my first academic graduation. I would like to thank all the people who accompanied and supported me in the last four years of study and work in industry paving the way to this thesis. My personal thanks go to my parents supporting me in many ways. The decision to choose a complex topic in an area where I had no personal experience in advance, neither theoretically nor technologically, made the past four and a half months challenging, demanding, work-intensive, but also very educational which is what remains in good memory afterwards. Regarding this thesis, I would like to offer special thanks to Philipp Leitner who assisted me during the whole process and gave valuable advices. Moreover, I want to thank Jürgen Cito for his mainly technologically-related recommendations, Rita Erne for her time spent with me on language review sessions, and Prof. Harald Gall for giving me the opportunity to write this thesis at the Software Evolution & Architecture Lab at the University of Zurich and providing fundings and infrastructure to realize this thesis. -
Automated Performance Testing for Virtualization with Mmtests
Automated Performance Testing For Virtualization with MMTests Dario Faggioli <[email protected]> Software Engineer - Virtualization Specialist, SUSE GPG: 4B9B 2C3A 3DD5 86BD 163E 738B 1642 7889 A5B8 73EE https://about.me/dario.faggioli https://www.linkedin.com/in/dfaggioli/ https://twitter.com/DarioFaggioli (@DarioFaggioli) Testing / Benchmarking / CI Tools & Suites • OpenQA • Jenkins • Kernel CI • Autotest / Avocado-framework / Avocado-vt • Phoronix Test Suite • Fuego • Linux Test Project • Xen-Project’s OSSTests • … • ... SRSLY THINKING I’ll TALK ABOUT & SUGGEST USING ANOTHER ONE ? REALLY ? Benchmarking on Baremetal What’s the performance impact of kernel code change “X” ? Baremetal Baremetal Kernel Kernel (no X) VS. (with X) CPU MEM CPU MEM bench bench bench bench I/O I/O bench bench Benchmarking in Virtualization What’s the performance impact of kernel code change “X” ? Baremetal Baremetal Baremetal Baremetal Kernel Kernel Kernel (no X) Kernel (no X) (with X) (with X) VM VS. VM VS. VM VS. VM Kernel Kernel Kernel (no X) Kernel (no X) (with X) (with X) CPU MEM CPU MEM CPU MEM CPU MEM bench bench bench bench bench bench bench bench I/O I/O I/O I/O bench bench bench bench Benchmarking in Virtualization What’s the performance impact of kernel code change “X” ? Baremetal Baremetal Baremetal Baremetal Kernel Kernel Kernel (no X) Kernel (no X) (with X) (with X) VM VS. VM VS. VM VS. VM Kernel Kernel Kernel (no X) Kernel (no X) (with X) (with X) We want to run the benchmarks inside VMs CPU MEM CPU MEM CPU MEM CPU MEM bench bench bench bench bench bench bench bench I/O I/O I/O I/O bench bench bench bench Benchmarking in Virtualization What’s the performance impact of kernel code change “X” ? Baremetal Baremetal Baremetal Baremetal Kernel Kernel Kernel (no X) Kernel (no X) (with X) (with X) VM VS. -
Zhodnocení Použitelnosti Raspberry Pi Pro Distribuované Výpočty
Univerzita Karlova v Praze Matematicko-fyzikální fakulta BAKALÁŘSKÁ PRÁCE Petr Stefan Zhodnocení použitelnosti Raspberry Pi pro distribuované výpoèty Katedra softwarového inženýrství Vedoucí bakaláøské práce: RNDr. Martin Kruli¹, Ph.D. Studijní program: Informatika Studijní obor: Obecná informatika Praha 2015 Prohla¹uji, že jsem tuto bakaláøskou práci vypracoval(a) samostatně a výhradně s použitím citovaných pramenù, literatury a dalších odborných zdrojù. Beru na vědomí, že se na moji práci vztahují práva a povinnosti vyplývající ze zákona è. 121/2000 Sb., autorského zákona v platném znění, zejména skuteènost, že Univerzita Karlova v Praze má právo na uzavření licenční smlouvy o užití této práce jako ¹kolního díla podle x60 odst. 1 autorského zákona. V Praze dne 29. èervence 2015 Petr Stefan i ii Název práce: Zhodnocení použitelnosti Raspberry Pi pro distribuované výpoèty Autor: Petr Stefan Katedra: Katedra softwarového inženýrství Vedoucí bakaláøské práce: RNDr. Martin Kruli¹, Ph.D., Katedra softwarového inženýrství Abstrakt: Cílem práce bylo zhodnotit výkonnostní vlastnosti mikropočítače Rasp- berry Pi, a to především z hlediska možnosti sestavení výpoèetního klastru z více těchto jednotek. Součástí práce bylo vytvoření sady testù pro měření výpočetního výkonu procesoru, propustnosti operační paměti, rychlosti zápisu a čtení z per- sistentního úložiště (paměťové karty) a propustnosti síťového rozhraní Ethernet. Na základě porovnání výsledků získaných měřením na Raspberry Pi a na vhod- ném reprezentativním vzorku dalších běžně dostupných počítačů bylo provedeno doporučení, zda je konstrukce Raspberry Pi klastru opodstatněná. Tyto výsledky rovněž poskytly přibližné ekonomické a výkonnostní projekce takového řešení. Klíčová slova: Raspberry Pi výkon distribuovaný výpoèet benchmark Title: Assessing Usability of Raspberry Pi for Distributed Computing Author: Petr Stefan Department: Department of Software Engineering Supervisor: RNDr. -
Automatic Benchmark Profiling Through Advanced Trace Analysis
View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by Hal - Université Grenoble Alpes Automatic Benchmark Profiling through Advanced Trace Analysis Alexis Martin, Vania Marangozova-Martin To cite this version: Alexis Martin, Vania Marangozova-Martin. Automatic Benchmark Profiling through Advanced Trace Analysis. [Research Report] RR-8889, Inria - Research Centre Grenoble { Rh^one-Alpes; Universit´eGrenoble Alpes; CNRS. 2016. <hal-01292618> HAL Id: hal-01292618 https://hal.inria.fr/hal-01292618 Submitted on 24 Mar 2016 HAL is a multi-disciplinary open access L'archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destin´eeau d´ep^otet `ala diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publi´esou non, lished or not. The documents may come from ´emanant des ´etablissements d'enseignement et de teaching and research institutions in France or recherche fran¸caisou ´etrangers,des laboratoires abroad, or from public or private research centers. publics ou priv´es. Automatic Benchmark Profiling through Advanced Trace Analysis Alexis Martin , Vania Marangozova-Martin RESEARCH REPORT N° 8889 March 23, 2016 Project-Team Polaris ISSN 0249-6399 ISRN INRIA/RR--8889--FR+ENG Automatic Benchmark Profiling through Advanced Trace Analysis Alexis Martin ∗ † ‡, Vania Marangozova-Martin ∗ † ‡ Project-Team Polaris Research Report n° 8889 — March 23, 2016 — 15 pages Abstract: Benchmarking has proven to be crucial for the investigation of the behavior and performances of a system. However, the choice of relevant benchmarks still remains a challenge. To help the process of comparing and choosing among benchmarks, we propose a solution for automatic benchmark profiling. -
Generic User-Level PCI Drivers
Generic User-Level PCI Drivers Hannes Weisbach, Bj¨orn D¨obel, Adam Lackorzynski Technische Universit¨at Dresden Department of Computer Science, 01062 Dresden {weisbach,doebel,adam}@tudos.org Abstract Linux has become a popular foundation for systems with real-time requirements such as industrial control applications. In order to run such workloads on Linux, the kernel needs to provide certain properties, such as low interrupt latencies. For this purpose, the kernel has been thoroughly examined, tuned, and verified. This examination includes all aspects of the kernel, including the device drivers necessary to run the system. However, hardware may change and therefore require device driver updates or replacements. Such an update might require reevaluation of the whole kernel because of the tight integration of device drivers into the system and the manyfold ways of potential interactions. This approach is time-consuming and might require revalidation by a third party. To mitigate these costs, we propose to run device drivers in user-space applications. This allows to rely on the unmodified and already analyzed latency characteristics of the kernel when updating drivers, so that only the drivers themselves remain in the need of evaluation. In this paper, we present the Device Driver Environment (DDE), which uses the UIO framework supplemented by some modifications, which allow running any recent PCI driver from the Linux kernel without modifications in user space. We report on our implementation, discuss problems related to DMA from user space and evaluate the achieved performance. 1 Introduction in safety-critical systems would need additional au- dits and certifications to take place. -
Building Embedded Linux Systems ,Roadmap.18084 Page Ii Wednesday, August 6, 2008 9:05 AM
Building Embedded Linux Systems ,roadmap.18084 Page ii Wednesday, August 6, 2008 9:05 AM Other Linux resources from O’Reilly Related titles Designing Embedded Programming Embedded Hardware Systems Linux Device Drivers Running Linux Linux in a Nutshell Understanding the Linux Linux Network Adminis- Kernel trator’s Guide Linux Books linux.oreilly.com is a complete catalog of O’Reilly’s books on Resource Center Linux and Unix and related technologies, including sample chapters and code examples. ONLamp.com is the premier site for the open source web plat- form: Linux, Apache, MySQL, and either Perl, Python, or PHP. Conferences O’Reilly brings diverse innovators together to nurture the ideas that spark revolutionary industries. We specialize in document- ing the latest tools and systems, translating the innovator’s knowledge into useful skills for those in the trenches. Visit con- ferences.oreilly.com for our upcoming events. Safari Bookshelf (safari.oreilly.com) is the premier online refer- ence library for programmers and IT professionals. Conduct searches across more than 1,000 books. Subscribers can zero in on answers to time-critical questions in a matter of seconds. Read the books on your Bookshelf from cover to cover or sim- ply flip to the page you need. Try it today for free. main.title Page iii Monday, May 19, 2008 11:21 AM SECOND EDITION Building Embedded Linux SystemsTomcat ™ The Definitive Guide Karim Yaghmour, JonJason Masters, Brittain Gilad and Ben-Yossef, Ian F. Darwin and Philippe Gerum Beijing • Cambridge • Farnham • Köln • Sebastopol • Taipei • Tokyo Building Embedded Linux Systems, Second Edition by Karim Yaghmour, Jon Masters, Gilad Ben-Yossef, and Philippe Gerum Copyright © 2008 Karim Yaghmour and Jon Masters. -
Xeon Platinum 8280 Vs. AMD EPYC 7742 - Ubuntu Linux
www.phoronix-test-suite.com Xeon Platinum 8280 vs. AMD EPYC 7742 - Ubuntu Linux AMD EPYC and Intel Xeon benchmarks by Michael Larabel... Mix of single and multi-threaded workloads. Admittedly somewhat random tests with the intent of just being to doing some validation on Phoronix Test Suite 9.4 and checking out the graphing code, PDF generation, etc. Take the actual results as you wish. Automated Executive Summary 2 x EPYC 7742 had the most wins, coming in first place for 61% of the tests. Based on the geometric mean of all complete results, the fastest (2 x EPYC 7742) was 1.2x the speed of the slowest (2 x Xeon Platinum 8280). The results with the greatest spread from best to worst included: Tungsten Renderer (Scene: Volumetric Caustic) at 3.53x - MBW (Test: Memory Copy - Array Size: 4096 MiB) at 3.22x - Parboil (Test: OpenMP MRI Gridding) at 3.02x - Hackbench (Count: 32 - Type: Process) at 3.01x - Tachyon (Total Time) at 2.62x - C-Ray (Total Time - 4K, 16 Rays Per Pixel) at 2.37x - dav1d (Video Input: Chimera 1080p) at 2.33x Xeon Platinum 8280 vs. AMD EPYC 7742 - Ubuntu Linux - Coremark (CoreMark Size 666 - Iterations Per Second) at 2.3x - dav1d (Video Input: Summer Nature 1080p) at 2.17x - GraphicsMagick (Operation: Sharpen) at 2.17x. Test Systems: 2 x Xeon Platinum 8280 Processor: 2 x Intel Xeon Platinum 8280 @ 4.00GHz (56 Cores / 112 Threads), Motherboard: GIGABYTE MD61-SC2-00 v01000100 (T15 BIOS), Chipset: Intel Sky Lake-E DMI3 Registers, Memory: 12 x 32 GB DDR4-2933MT/s HMA84GR7CJR4N-WM, Disk: 280GB INTEL SSDPED1D280GA, Graphics: -
Fair Benchmarking for Cloud Computing Systems
Fair Benchmarking for Cloud Computing Systems Authors: Lee Gillam Bin Li John O’Loughlin Anuz Pranap Singh Tomar March 2012 Contents 1 Introduction .............................................................................................................................................................. 3 2 Background .............................................................................................................................................................. 4 3 Previous work ........................................................................................................................................................... 5 3.1 Literature ........................................................................................................................................................... 5 3.2 Related Resources ............................................................................................................................................. 6 4 Preparation ............................................................................................................................................................... 9 4.1 Cloud Providers................................................................................................................................................. 9 4.2 Cloud APIs ...................................................................................................................................................... 10 4.3 Benchmark selection ...................................................................................................................................... -
Introduction to Digital Signal Processors
INTRODUCTION TO Accumulator architecture DIGITAL SIGNAL PROCESSORS Memory-register architecture Prof. Brian L. Evans in collaboration with Niranjan Damera-Venkata and Magesh Valliappan Load-store architecture Embedded Signal Processing Laboratory The University of Texas at Austin Austin, TX 78712-1084 http://anchovy.ece.utexas.edu/ Outline n Signal processing applications n Conventional DSP architecture n Pipelining in DSP processors n RISC vs. DSP processor architectures n TI TMS320C6x VLIW DSP architecture n Signal and image processing applications n Signal processing on general-purpose processors n Conclusion 2 Signal Processing Applications n Low-cost embedded systems 4 Modems, cellular telephones, disk drives, printers n High-throughput applications 4 Halftoning, radar, high-resolution sonar, tomography n PC based multimedia 4 Compression/decompression of audio, graphics, video n Embedded processor requirements 4 Inexpensive with small area and volume 4 Deterministic interrupt service routine latency 4 Low power: ~50 mW (TMS320C5402/20: 0.32 mA/MIP) 3 Conventional DSP Architecture n High data throughput 4 Harvard architecture n Separate data memory/bus and program memory/bus n Three reads and one or two writes per instruction cycle 4 Short deterministic interrupt service routine latency 4 Multiply-accumulate (MAC) in a single instruction cycle 4 Special addressing modes supported in hardware n Modulo addressing for circular buffers (e.g. FIR filters) n Bit-reversed addressing (e.g. fast Fourier transforms) 4Instructions to keep the -
Aligning Intent and Behavior in Software Systems: How Programs Communicate & Their Distribution and Organization
© 2020 William B. Dietz ALIGNING INTENT AND BEHAVIOR IN SOFTWARE SYSTEMS: HOW PROGRAMS COMMUNICATE & THEIR DISTRIBUTION AND ORGANIZATION BY WILLIAM B. DIETZ DISSERTATION Submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Computer Science in the Graduate College of the University of Illinois at Urbana-Champaign, 2020 Urbana, Illinois Doctoral Committee: Professor Vikram Adve, Chair Professor John Regehr, University of Utah Professor Tao Xie Assistant Professor Sasa Misailovic ABSTRACT Managing the overwhelming complexity of software is a fundamental challenge because complex- ity is the root cause of problems regarding software performance, size, and security. Complexity is what makes software hard to understand, and our ability to understand software in whole or in part is essential to being able to address these problems effectively. Attacking this overwhelming complexity is the fundamental challenge I seek to address by simplifying how we write, organize and think about programs. Within this dissertation I present a system of tools and a set of solutions for improving the nature of software by focusing on programmer’s desired outcome, i.e. their intent. At the program level, the conventional focus, it is impossible to identify complexity that, at the system level, is unnecessary. This “accidental complexity” includes everything from unused features to independent implementations of common algorithmic tasks. Software techniques driving innovation simultaneously increase the distance between what is intended by humans – developers, designers, and especially the users – and what the executing code does in practice. By preserving the declarative intent of the programmer, which is lost in the traditional process of compiling and linking and building software, it is easier to abstract away unnecessary details.