DOCSLIB.ORG

Multi-IP-Based Soc Design Including CCM Security Mode of Operation

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Multi-IP-Based Soc Design Including CCM Security Mode of Operation Master Thesis ICT/ECS-2006-71 Multi-IP-Based SoC Design Including CCM Security Mode of Operation By Solmaz Ghaznavi A thesis presented to the University of Waterloo and KTH University in the fulfillment of the thesis requirement for the degree of Master of Science in System on-Chip Design Waterloo, Ontario, Canada, 2006 © Solmaz Ghaznavi, 2006 Supervisor: Professor Cathy Gebotys Examiner: Professor Axel Jantsch I hereby declare that I am the sole author of this thesis. I authorize the University of Waterloo and KTH University to lend this thesis to other institutions or individuals for the purpose of scholarly research. I further authorize the University of Waterloo and KTH University to reproduce this thesis by photocopying or by other means, in total or in print, at the request of other institutions is individuals for the purpose of scholarly research. ii Abstract Embedding security in many mobile electronic devices is of great importance. With the emergence of powerful self-contained FPGAs which include microprocessors, memory etc. for SoC designs, it has shifted focus to these programmable platforms. A co-design approach can be used to optimize speed, area and power consumption by partitioning function onto the on-chip microprocessor and programmable logic blocks. FPGAs typically provide higher efficiency compared to software. On the other hand they offer more flexibility and much lower design and debug costs compared to specifically-built hardware. This thesis mainly implements CCM security mode of operation on a FPGA platform by using the AES encryption algorithm, it then builds a complete SoC that is based on multi IP cores including CCM. Except for the hard on-chip IP cores (i.e. microprocessors and memory), the device controllers, the PLB and OPB buses and CCM are all soft IP peripherals to build a complex system. The idea of building the elements as soft IP cores makes it very easy for further on-chip developments or modifications. The CCM core that sits on the same PLB bus at 80 MHz, can easily communicate with PowerPC or DDR SDRAM or BRAM controllers which are on the same bus. The implementation exploits iterative structure of AES to save the hardware resources; it implements the key expansion core as well. It also reports on the challenges and problems throughout the implementation. iii Acknowledgements I would like to thank my supervisor, Professor Cathy Gebotys, for all her advice, guidance and encouragement. I would like to acknowledge CMC (Canadian Microelectronics Corporation) support for using the AP1100 board. I would also like to thank my parents and my best friend Adela for their support. iv Table of Contents Abstract ......................................................................................................................................... iii List of Figures.............................................................................................................................. vii List of Tables............................................................................................................................... viii 1 Introduction............................................................................................................................... 1 1.1 Thesis Objective.................................................................................................................. 2 1.2 Security Algorithm Choice................................................................................................... 2 1.3 Thesis Overview.................................................................................................................. 3 2 Board and the FPGA Features ................................................................................................ 4 2.1 Board Architecture .............................................................................................................. 4 2.2 Configuration, Debugging and Power Connections............................................................ 6 2.3 FPGA Features ................................................................................................................... 7 2.3.1 Configurable Logic Blocks ........................................................................................... 8 2.3.2 Slice Description .......................................................................................................... 9 2.3.3 Memory Style ............................................................................................................. 10 2.3.3.1 Distributed SelectRAM+ ..................................................................................... 10 2.3.3.2 Block SelectRAM+.............................................................................................. 12 2.3.4 FPGA Clocking .......................................................................................................... 14 3 Security Standards................................................................................................................. 15 3.1 CCM .................................................................................................................................. 16 3.1.1 CCM Cryptographic Techniques................................................................................ 17 3.1.1.1 Counter Mode Encryption (CTR)........................................................................ 17 3.1.1.2 CBC-MAC........................................................................................................... 19 3.1.2 CCM Security Assurance........................................................................................... 21 3.2 Advanced Encryption Standard (AES).............................................................................. 21 3.2.1 AES Cipher ................................................................................................................ 22 3.2.2 Key Expansion........................................................................................................... 24 4 Design and Analysis of CCM in SoC .................................................................................... 26 4.1 Security Design Objective ................................................................................................. 26 4.2 High Level Design Architecture......................................................................................... 26 4.2.1 User Logic S/W Register Support.............................................................................. 28 4.2.2 Memory Map of PowerPC.......................................................................................... 29 4.3 CCM Implementation and Analysis................................................................................... 31 4.3.1 Key Expansion and Synthesis Analysis..................................................................... 31 4.3.2 Cipher Module and Synthesis Analysis ..................................................................... 33 4.3.3 Comparison with Previous Research......................................................................... 34 4.3.3.1 Microprocessor Implementation ......................................................................... 35 4.3.3.2 FPGA Implementation ........................................................................................ 36 4.3.3.2.1 AES Iterative Implementation ..................................................................... 36 4.3.3.2.2 AES Unrolled Implementation..................................................................... 37 4.3.4 Conclusion ................................................................................................................. 38 v 4.4 Testing and Debugging ..................................................................................................... 39 4.5 Software Tools and Some Practical Hints......................................................................... 40 5 Discussion and Conclusions ................................................................................................ 42 5.1 Summary ........................................................................................................................... 42 5.2 Limitations and Future Work ............................................................................................. 42 References ................................................................................................................................... 44 Appendix A: AES Cipher HDL Synthesis Report ..................................................................... 45 Appendix B: MixColumns HDL Synthesis Report.................................................................... 47 Appendix C: Key Expansion HDL Synthesis Report ............................................................... 48 Appendix D: S-box (AES Forward Cipher)................................................................................ 50 Appendix E: Test Vectors ........................................................................................................... 51 Appendix F: VHDL Codes ........................................................................................................... 53 vi List of Figures Figure 2-1. AP1100 Board Architecture .......................................................................................... 5 Figure 2-2. Virtex-II Pro CLB Element............................................................................................. 8 Figure 2-3.
Load more

Recommended publications
  • Security Policy: Informacast Java Crypto Library
    FIPS 140-2 Non-Proprietary Security Policy: InformaCast Java Crypto Library FIPS 140-2 Non-Proprietary Security Policy InformaCast Java Crypto Library Software Version 3.0 Document Version 1.2 June 26, 2017 Prepared For: Prepared By: Singlewire Software SafeLogic Inc. 1002 Deming Way 530 Lytton Ave, Suite 200 Madison, WI 53717 Palo Alto, CA 94301 www.singlewire.com www.safelogic.com Document Version 1.2 © Singlewire Software Page 1 of 35 FIPS 140-2 Non-Proprietary Security Policy: InformaCast Java Crypto Library Abstract This document provides a non-proprietary FIPS 140-2 Security Policy for InformaCast Java Crypto Library. Document Version 1.2 © Singlewire Software Page 2 of 35 FIPS 140-2 Non-Proprietary Security Policy: InformaCast Java Crypto Library Table of Contents 1 Introduction .................................................................................................................................................. 5 1.1 About FIPS 140 ............................................................................................................................................. 5 1.2 About this Document.................................................................................................................................... 5 1.3 External Resources ....................................................................................................................................... 5 1.4 Notices .........................................................................................................................................................
    [Show full text]
  • How to Enhance the Security of the 3GPP Confidentiality and Integrity
    How to Enhance the Security of the 3GPP Confidentiality and Integrity Algorithms Tetsu Iwata and Kaoru Kurosawa Dept. of Computer and Information Sciences, Ibaraki University 4–12–1 Nakanarusawa, Hitachi, Ibaraki 316-8511, Japan {iwata, kurosawa}@cis.ibaraki.ac.jp Abstract. We consider the 3GPP confidentiality and integrity schemes that were adopted by Universal Mobile Telecommunication System, an emerging standard for third generation wireless communications. The schemes, known as f8 and f9, are based on the block cipher KASUMI. Although previous works claim security proofs for f8 and f9, where f9 is a generalized version of f9, it was shown that these proofs are incorrect; it is impossible to prove f8 and f9 secure under the standard PRP assumption on the underlying block cipher. Following the results, it was shown that it is possible to prove f8 and f9 secure if we make the assumption that the underlying block cipher is a secure PRP-RKA against a certain class of related-key attacks; here f8 is a generalized version of f8. Needless to say, the assumptions here are stronger than the standard PRP assumptions, and it is natural to seek a practical way to modify f8 and f9 to establish security proofs under the standard PRP assumption. In this paper, we propose f8+ and f9+, slightly mod- ified versions of f8 and f9, but they allow proofs of security under the standard PRP assumption. Our results are practical in the sense that we insist on the minimal modifications; f8+ is obtained from f8 by setting the key modifier to all-zero, and f9+ is obtained from f9 by setting the key modifier to all-zero, and using the encryptions of two constants in the CBC MAC computation.
    [Show full text]
  • Optimizing Authenticated Encryption Algorithms
    Masaryk University Faculty of Informatics Optimizing authenticated encryption algorithms Master’s Thesis Ondrej Mosnáček Brno, Fall 2017 Masaryk University Faculty of Informatics Optimizing authenticated encryption algorithms Master’s Thesis Ondrej Mosnáček Brno, Fall 2017 This is where a copy of the official signed thesis assignment and a copy ofthe Statement of an Author is located in the printed version of the document. Declaration Hereby I declare that this paper is my original authorial work, which I have worked out on my own. All sources, references, and literature used or excerpted during elaboration of this work are properly cited and listed in complete reference to the due source. Ondrej Mosnáček Advisor: Ing. Milan Brož i Acknowledgement I would like to thank my advisor, Milan Brož, for his guidance, pa- tience, and helpful feedback and advice. Also, I would like to thank my girlfriend Ludmila, my family, and my friends for their support and kind words of encouragement. If I had more time, I would have written a shorter letter. — Blaise Pascal iii Abstract In this thesis, we look at authenticated encryption with associated data (AEAD), which is a cryptographic scheme that provides both confidentiality and integrity of messages within a single operation. We look at various existing and proposed AEAD algorithms and compare them both in terms of security and performance. We take a closer look at three selected candidate families of algorithms from the CAESAR competition. Then we discuss common facilities provided by the two most com- mon CPU architectures – x86 and ARM – that can be used to implement cryptographic algorithms efficiently.
    [Show full text]
  • On the Security of CTR + CBC-MAC NIST Modes of Operation – Additional CCM Documentation
    On the Security of CTR + CBC-MAC NIST Modes of Operation { Additional CCM Documentation Jakob Jonsson? jakob [email protected] Abstract. We analyze the security of the CTR + CBC-MAC (CCM) encryption mode. This mode, proposed by Doug Whiting, Russ Housley, and Niels Ferguson, combines the CTR (“counter”) encryption mode with CBC-MAC message authentication and is based on a block cipher such as AES. We present concrete lower bounds for the security of CCM in terms of the security of the underlying block cipher. The conclusion is that CCM provides a level of privacy and authenticity that is in line with other proposed modes such as OCB. Keywords: AES, authenticated encryption, modes of operation. Note: A slightly different version of this paper will appear in the Proceedings from Selected Areas of Cryptography (SAC) 2002. 1 Introduction Background. Block ciphers are popular building blocks in cryptographic algo­ rithms intended to provide information services such as privacy and authenticity. Such block-cipher based algorithms are referred to as modes of operation. Exam­ ples of encryption modes of operation are Cipher Block Chaining Mode (CBC) [23], Electronic Codebook Mode (ECB) [23], and Counter Mode (CTR) [9]. Since each of these modes provides privacy only and not authenticity, most applica­ tions require that the mode be combined with an authentication mechanism, typically a MAC algorithm [21] based on a hash function such as SHA-1 [24]. For example, a popular cipher suite in SSL/TLS [8] combines CBC mode based on Triple-DES [22] with the MAC algorithm HMAC [26] based on SHA-1.
    [Show full text]
  • AES-CCM Brief
    FEATURES AES-CCM Encrypts and decrypts using the AES Rijndael Block Cipher Algorithm AES-CCM Authenticated Encrypt/Decrypt Engine Implemented according to the National Institute of Standards and Technology (NIST) Special The AES-CCM encryption IP core implements hardware Rijndael encoding and decoding in Publication 800-38D compliance with the NIST Advanced Encryption Standard. It processes 128-bit blocks, and is NIST Certified programmable for 128-, 192-, and 256-bit key lengths. Employs Counter with CBC- MAC CCM stands for Counter with CBC- MAC mode. CCM is a generic authenticate-and-encrypt mode (CCM) block cipher mode. CBC-MAC is utilized to generate an authentication string while CTR mode Processes 128-bit data in 32-bit is used to encrypt. blocks Two architectural versions are available to suit system requirements. The Standard version Employs user-programmable key size of 128, 192, or 256 bits (AES-CCM-S) is more compact, using a 32-bit datapath and requiring 44/52/60 clock cycles Two architectural versions: for each data block (128/192/256-bit cipher key, respectively). The Fast version (AES-CCM-F) o achieves higher throughput, using a 128-bit datapath and requiring 11/13/15 clock cycles for Standard is more compact: 32-bit data path size each data block. Processes each 128-bit data block The AES-CCM cores are fully synchronous designs, have been evaluated in a variety of in 44/52/60 clock cycles for 128/192/256-bit cipher keys, technologies, and are available optimized for ASICs or FPGAs. respectively Applications o Fast yields higher transmission rates: The AES-CCM can be utilized for a variety of encryption applications including protected 128-bit data path network routers, electronic financial transactions, secure wireless communications, secure Processes each 128-bit block in video surveillance systems, and encrypted data storage.
    [Show full text]
  • The Helion Basic Guide to AES Encryption in Hardware
    The Helion basic guide to AES encryption in hardware What is AES? During September 1997, the National Institute of Standards and Technology (NIST), the main standards body in the US, issued an open request for submissions for a new Advanced Encryption Standard (AES). The idea was that AES would be a new encryption standard to replace the existing Data Encryption Standard (DES), which had been in place for more than two decades. In August 1998, a number of potential candidates were selected from the submissions, and then in August 1999, these were further selected to become a shortlist of five finalists. In October 2000, one of these five algorithms, “Rijndael”, was chosen as the new AES. This decision was then fully ratified by the NIST in November 2001, at which point AES became the encryption algorithm of choice for all new commercial developments requiring a high degree of data security. What is AES like from the outside? Rijndael is what is known as a “Block Cipher” with multiple options for its block and key size. The NIST approved AES is a subset of these options; the block size is fixed at 128-bits, but the key may be either 128, 192 or 256-bits in length. As their name suggests, Block Ciphers only process data in blocks. In the case of AES this means that it is capable of encrypting plaintext data in blocks of 128-bits using any of the specified key sizes; in broad terms, the bigger the keysize, the higher the security. It is generally accepted that 128-bit keys will provide a sufficient level of security for most commercial applications, though longer keys seem to be specified more and more for the latest applications.
    [Show full text]
  • Design and Cryptanalysis of a Customizable Authenticated Encryption Algorithm
    Rochester Institute of Technology RIT Scholar Works Theses 8-2014 Design and Cryptanalysis of a Customizable Authenticated Encryption Algorithm Matthew Joseph Kelly Follow this and additional works at: https://scholarworks.rit.edu/theses Recommended Citation Kelly, Matthew Joseph, "Design and Cryptanalysis of a Customizable Authenticated Encryption Algorithm" (2014). Thesis. Rochester Institute of Technology. Accessed from This Thesis is brought to you for free and open access by RIT Scholar Works. It has been accepted for inclusion in Theses by an authorized administrator of RIT Scholar Works. For more information, please contact [email protected]. Design and Cryptanalysis of a Customizable Authenticated Encryption Algorithm by Matthew Joseph Kelly A Thesis Submitted in Partial Fulfillment of the Requirements for the Degree of Master of Science in Computer Engineering Supervised by Alan Kaminsky Department of Computer Science & Marcin Łukowiak Department of Computer Engineering Kate Gleason College of Engineering Rochester Institute of Technology Rochester, New York August 2014 ii The thesis “Design and Cryptanalysis of a Customizable Authenticated Encryption Algorithm” by Matthew Joseph Kelly has been examined and approved by the following Examination Commit- tee: Alan Kaminsky Professor, Department of Computer Science Primary Advisor Marcin Łukowiak Associate Professor, Department of Computer Engineering Primary Advisor Michael Kurdziel Harris Corporation Reza Azarderakhsh Assistant Professor, Department of Computer Engineering Thesis Release Permission Form Rochester Institute of Technology Kate Gleason College of Engineering Title: Design and Cryptanalysis of a Customizable Authenticated Encryption Algorithm I, Matthew Joseph Kelly, hereby grant permission to the Wallace Memorial Library to reproduce my thesis in whole or part. Matthew Joseph Kelly Date iv Dedication To my parents, Donna and Martin.
    [Show full text]
  • Mcoe: a Family of Almost Foolproof On-Line Authenticated Encryption Schemes
    McOE: A Family of Almost Foolproof On-Line Authenticated Encryption Schemes Ewan Fleischmann, Christian Forler, and Stefan Lucks Bauhaus-University Weimar, Germany {ewan.fleischmann, christian.forler, stefan.lucks}@uni-weimar.de Abstract. On-Line Authenticated Encryption (OAE) combines privacy with data integrity and is on-line computable. Most block cipher-based schemes for Authenticated Encryption can be run on-line and are prov- ably secure against nonce-respecting adversaries. But they fail badly for more general adversaries. This is not a theoretical observation only – in practice, the reuse of nonces is a frequent issue1. In recent years, cryptographers developed misuse-resistant schemes for Authenticated Encryption. These guarantee excellent security even against general adversaries which are allowed to reuse nonces. Their disadvan- tage is that encryption can be performed in an off-line way, only. This paper considers OAE schemes dealing both with nonce-respecting and with general adversaries. It introduces McOE, an efficient design for OAE schemes. For this we present in detail one of the family members, McOE-X, which is a design solely based on a standard block cipher. As all the other member of the McOE family, it provably guarantees rea- sonable security against general adversaries as well as standard security against nonce-respecting adversaries. Keywords: authenticated encryption, on-line encryption, provable se- curity, misuse resistant 1 Introduction On-Line Authenticated Encryption (OAE). Application software often requires a network channel that guarantees the privacy and authenticity of data be- ing communicated between two parties. Cryptographic schemes able to meet both of these goals are commonly referred to as Authenticated Encryption (AE) schemes.
    [Show full text]
  • FPGA Implementation AES for CCM Mode Encryption Using Xilinx Spartan-II Khoa Vu, David Zier
    ECE 679, ADVANCED CRYPTOGRAPHY, OREGON STATE UNIVERSITY, SPRING 2003 1 FPGA Implementation AES for CCM Mode Encryption Using Xilinx Spartan-II Khoa Vu, David Zier Abstract— This paper discusses a possible FPGA implementa- A. Algorithm Specification tion of the AES algorithm specifically for the use in CCM Mode For the AES algorithm, the length of the input block, the Encryption. CCM Mode encryption is a proposed standard to be used and the security backbone behind the new IEEE Std. output block and the State Array is 128 bits. The state array 802.11i. CCM currently spends most the computation power per- is the internal matrix upon which the data is manipulated and forming the AES algorithm. This paper investigate the possibility consists of four rows of bytes, each containing Nb bytes, of creating an off-chip AES system for CCM so that the process where Nb is the block length divided by 32. Figure 1 illustrates can be speed up. The implementation was done on Xilinx Spartan the layout of the State Array. IIE, running on 50MHz platform. Index Terms— AES, CCM, CCMP, Cryptography, 802.11i, State array Security, Wireless LAN. s0,0 s0,1 s0,2 s0,3 s1,0 s1,1 s1,2 s1,3 s2,0 s2,1 s2,2 s2,3 I. INTRODUCTION s3,0 s3,1 s3,2 s3,3 S 802.11i becoms a standard in the near future, it will Fig. 1. State Array A replace the current 802.11 WEP (wireless equivalent pro- tection) security scheme. Counter mode encryption CBC-MAC The length of the Cipher Key, K, is 128, 192, or 256 bits.
    [Show full text]
  • On the Security of the CCM Encryption Mode and of a Slight Variant Pierre-Alain Fouque, Gwenaëlle Martinet, Frédéric Valette, Sebastien Zimmer
    On the Security of the CCM Encryption Mode and of a Slight Variant Pierre-Alain Fouque, Gwenaëlle Martinet, Frédéric Valette, Sebastien Zimmer To cite this version: Pierre-Alain Fouque, Gwenaëlle Martinet, Frédéric Valette, Sebastien Zimmer. On the Security of the CCM Encryption Mode and of a Slight Variant. Applied Cryptography and Network Security : 6th International Conference, ACNS 2008, 2008, New York, United States. pp.411-428, 10.1007/978-3- 540-68914-0_25. inria-00556684 HAL Id: inria-00556684 https://hal.inria.fr/inria-00556684 Submitted on 17 Jan 2011 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. On the Security of the CCM Encryption Mode and of a Slight Variant Pierre-Alain Fouque1 and Gwena¨elle Martinet2 and Fr´ed´eric Valette3 and S´ebastien Zimmer1 1 Ecole´ normale sup´erieure, 45 rue d’Ulm, 75005 Paris, France {Pierre-Alain.Fouque;Sebastien.Zimmer}@ens.fr 2 DCSSI Crypto Lab, 51 Boulevard de la Tour-Maubourg F-75700 Paris 07 SP, France [email protected] 3 CELAR, 35 Bruz, France [email protected] Abstract. In this paper, we present an analysis of the CCM mode of operations and of a slight variant.
    [Show full text]
  • A Formally Verified Proposal for the Use of Authenticated Wrapping in PKCS
    1 How to wrap it up – A formally verified proposal for the use of authenticated wrapping in PKCS#11 Full version (June 26, 2019) Alexander Dax, Robert Kunnemann,¨ Sven Tangermann and Michael Backes F Abstract Being the most widely used and comprehensive standard for hardware security modules, cryptographic tokens and smart cards, PKCS#11 has been the subject of academic study for years. PKCS#11 provides a key store that is separate from the application, so that, ideally, an application never sees a key in the clear. Again and again, researchers have pointed out the need for an import/export mechanism that ensures the integrity of the permissions associated to a key. With version 2.40, for the first time, the standard included authenticated deterministic encryption schemes. The interface to this operation is insecure, however, so that an application can get the key in the clear, subverting the purpose of using a hardware security module. This work proposes a formal model for the secure use of authenticated deterministic encryption in PKCS#11, including concrete API changes to allow for secure policies to be implemented. Owing to the authenticated encryption mechanism, the policy we propose provides more functionality than any policy proposed so far and can be implemented without access to a random number generator. Our results cover modes of operation that rely on unique initialisation vectors (IVs), like GCM or CCM, but also modes that generate synthetic IVs. We furthermore provide a proof for the deduction soundness of our modelling of deterministic encryption in Bohl¨ et. al.’s composable deduction soundness framework.
    [Show full text]
  • Security Considerations for IEEE 802.15.4 Networks
    Security Considerations for IEEE 802.15.4 Networks Naveen Sastry David Wagner University of California, Berkeley University of California, Berkeley [email protected] [email protected] ABSTRACT building monitoring instruments, to heating and ventilation The IEEE 802.15.4 specification outlines a new class of wire- sensors [3, 14, 16, 17, 18]. These applications frequently less radios and protocols targeted at low power devices, per- use embedded devices controlled by an 8 or 16 bit micro- sonal area networks, and sensor nodes. The specification controller meant to operate without human intervention for includes a number of security provisions and options. In months. The long period of unattended operation with un- this paper, we highlight places where application designers derpowered hardware has two implications for the design of and radio designers should exercise care when implementing such systems: the software that runs on these devices must and using 802.15.4 devices. Specifically, some of the 802.15.4 be simple and correct, and the devices must make efficient optional features actually reduce security, so we urge imple- use of their limited energy. The wireless communication mentors to ignore those extensions. We highlight difficulties chip that is a part of these devices must honor these re- in safely using the security API and provide recommenda- quirements, since it and the microcontroller represent the tions on how to change the specification to make it less likely two largest sources of energy consumption. that people will deploy devices with poor security configu- The 802.15.4 specification is meant to support a variety rations.
    [Show full text]