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Deliverable D2.2 TERRANOVA System Architecture Work Package 2 - System Requirements, Concept and Architecture

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Deliverable D2.2 TERRANOVA System Architecture Work Package 2 - System Requirements, Concept and Architecture Ref. Ares(2018)1364959 - 13/03/2018 D2.2 – TERRANOVA system architecture This project has received funding from Horizon 2020, European Union’s Framework Programme for Research and Innovation, under grant agreement No. 761794 Deliverable D2.2 TERRANOVA system architecture Work Package 2 - System Requirements, Concept and Architecture TERRANOVA Project Grant Agreement No. 761794 Call: H2020-ICT-2016-2 Topic: ICT-09-2017 - Networking research beyond 5G Start date of the project: 1 July 2017 Duration of the project: 30 months TERRANOVA Project Page 1 of 116 D2.2 – TERRANOVA system architecture Disclaimer This document contains material, which is the copyright of certain TERRANOVA contractors, and may not be reproduced or copied without permission. All TERRANOVA consortium partners have agreed to the full publication of this document. The commercial use of any information contained in this document may require a license from the proprietor of that information. The reproduction of this document or of parts of it requires an agreement with the proprietor of that information. The document must be referenced if used in a publication. The TERRANOVA consortium consists of the following partners. No. Name Short Name Country 1 University of Piraeus Research Center UPRC Greece (Coordinator) 2 Fraunhofer Gesellschaft (FhG-HHI & FhG-IAF) FhG Germany 3 Intracom Telecom ICOM Greece 4 University of Oulu UOULU Finland 5 JCP-Connect JCP-C France 6 Altice Labs ALB Portugal 7 PICAdvanced PIC Portugal TERRANOVA Project Page 2 of 116 D2.2 – TERRANOVA system architecture Document Information Project short name and number TERRANOVA (653355) Work package WP2 Number D2.2 Title TERRANOVA system architecture Version v1.0 Responsible unit FhG Involved units JCP-C, FhG, ICOM, UOULU, UPRC, ALB, PIC Type1 R Dissemination level2 PU Contractual date of delivery 28.02.2018 Last update 12.03.2018 1 Types. R: Document, report (excluding the periodic and final reports); DEM: Demonstrator, pilot, prototype, plan designs; DEC: Websites, patents filing, press & media actions, videos, etc.; OTHER: Software, technical diagram, etc. 2 Dissemination levels. PU: Public, fully open, e.g. web; CO: Confidential, restricted under conditions set out in Model Grant Agreement; CI: Classified, information as referred to in Commission Decision 2001/844/EC. TERRANOVA Project Page 3 of 116 D2.2 – TERRANOVA system architecture Document History Version Date Status Authors, Reviewers Description v0.1 09.01.2018 Draft Robert Elschner (FhG- Initial version, definition of a HHI) structure v0.2 17.01.2018 Draft Alexandros-Apostolos A. Contribution on Abbreviations Boulogeorgos (UPRC) and Acronyms, Section 2.3 and 5 v0.3 18.01.2018 Draft Robert Elschner (FhG- Merge in of partner HHI) contributions v0.4 24.01.2018 Draft Robert Elschner (FhG- FhG contribution to Sections 2 HHI) and 3 v0.5 25.01.2018 Draft Alexandros-Apostolos A. Update Abbreviations and Boulogeorgos (UPRC) Acronyms and Contribution on Sections 2.3 and 5 v0.6 29.01.2018 Draft Janne Lehtomaki Contribution on Section 5 (UOULU) v0.7 31.01.2018 Draft Robert Elschner (FhG- Merge of partner contributions HHI) v0.8 04.02.2018 Draft Alexandros-Apostolos A. Update Abbreviations and Boulogeorgos (UPRC) Acronyms and Contribution on Sections 2 and 5 v0.9 10.02.2018 Draft Alexandros-Apostolos A. Update Abbreviations and Boulogeorgos (UPRC) Acronyms and Editing in Section 5 v0.10 12.02.2018 Draft Robert Elschner (FhG- Contributions on Section 3 HHI) v0.11 18.02.2018 Draft Francisco Typo review on all sections Rodrigues(PICa) Contribution on Section 3 v0.12 19.02.2018 Draft Robert Elschner (FhG- Merge of FhG-IAF contribution HHI) on section 4 v0.13 20.02.2018 Draft Alexandros-Apostolos A. Update Abbreviations and Boulogeorgos (UPRC) editing on all sections TERRANOVA Project Page 4 of 116 D2.2 – TERRANOVA system architecture v0.14 26.02.2018 Draft Robert Elschner (FhG- Introduction and conclusions, HHI) merge of JPC contribution to 5.4 v0.15 26.02.2018 Draft Alexandros-Apostolos A. Contribution in Section 2.2.1, Boulogeorgos (UPRC) Review of Section 5.4, abbreviation update and editing on all sections v0.16 27.02.2018 Draft Robert Elschner (FhG- Formatting, list of figures and HHI) tables, references v0.17 01.03.2018 Draft Robert Elschner (FhG- Addressing remaining HHI) comments v0.18 07.03.2018 Draft Thomas Merkle (FhG- Contributions to section 4 IAF) v0.19 08.03.2018 Draft Robert Elschner (FhG- Addressing remaining HHI) comments v0.20 08.03.2018 Draft Thomas Merkle (FhG- Contributions to section 4 IAF) v0.21 08.03.2018 Draft Alexandros-Apostolos A. Contribution on Sections 1 and Boulogeorgos (UPRC) 6, Replace Figure 3-1, Update Abbreviations, and editing on all sections. v0.22 09.03.2018 Draft Angeliki Alexiou (UPRC) Contribution on Sections 1 and 6 v0.23 09.03.2018 Draft Alexandros-Apostolos A. Proofreading and editing on all Boulogeorgos (UPRC) sections. v0.24 09.03.2018 Draft Robert Elschner (FhG- Proofreading and editing on all HHI) sections, merging partner proofreads. v0.25 12.03.2018 Draft Robert Elschner (FhG- Final edits HHI) v1.0 12.03.2018 Final Robert Elschner (FhG- Final version, document ready HHI) for submission TERRANOVA Project Page 5 of 116 D2.2 – TERRANOVA system architecture Acronyms and Abbreviations Acronym/Abbreviation Description 2G Second Generation 3G Third Generation 3GPP Third Generation Partnership Project 5G Fifth Generation A-BFT Associate BeamForming Training ACK Acknowledgement ACO Analog Coherent Optics ADC Analog-to-Digital Converter AFC Automatic Frequency Correction AFE Analogue FrontEnd AGC Automatic Gain Control AiP Antenna-in-Package AM Amplitude Modulation AMC Adaptive Modulation and Coding AP Access Point ASIC Application-Specific Integrated Circuit ATDE Adaptive Time Domain Equalizer ATI Announcement Transmission Interval AWG Arrayed Waveguide Gratings AWGN Additive White Gaussian Noise AWV Antenna Weight Vector BB BaseBand BC Beam Combining BER Bit Error Rate BF BeamForming BHI Beacon Header Interval BI Beacon Interval TERRANOVA Project Page 6 of 116 D2.2 – TERRANOVA system architecture BOC BackOff Counter BPSK Binary Phase Shift Keying BRP Beam Refinement Protocol BS Base Station BTI Beacon Transmission Interval CA Consortium Agreement CAP Contention Access Period CAUI 100 gigabit Attachment Unit Interface CBAP Contention-Based Access Period CapEx Capital Expenditure CC Central Cloud CCH Control CHannel CDR Clock and Data Recovery CFP C-Form Factor Pluggable CMOS Complementary Metal–Oxide–Semiconductor CoMP Coordination Multi-Point COTS Commercial Off-The-Shelf CPR Carrier Phase Recovery CRC Cyclic Redundancy Code CSI Channel State Information CSMA/CA Carrier Sense Multiple Access with Collision Avoidance CTA Channel Time Allocation CTAP Channel Time Allocation Period CTS Clear-To-Send CTS-NI Clear-To-Send-Node-Information CW Continuous Wave D2D Device-to-Device DAC Digital to Analog Converter DC Direct Current DCH Data CHannel DDC Digital Down Conversion TERRANOVA Project Page 7 of 116 D2.2 – TERRANOVA system architecture DEMUX DE-MUltipleXer DL DownLink DMG Directional Multi-Gigabit DMT Discrete Multi-Tone DoA Direction of Arrival DoF Degree of Freedom DP Detection Probability DP-IQ Dual Polarization In-phase and Quadrature DPD Digital PreDistortion DSB Dual-Side Band DSP Digital Signal Processing DTI Data Transfer Interval DUC Digital Up Conversion DWDM Dense Wavelength Division Multiplexing EC European Commission EDCA Enhanced Distributed Channel Access EDMG Enhanced Directional Multi-Gigabit E/O Electrical-Optical ESE Extended Schedule Element ETSI European Telecommunications Standards Institute eWLB embedded Wafer Level Ball grid array FAP False-Alarm Probability FEC Forward Error Correction FCS Frame Check Sequence FD Full Duplex FDD Frequency Division Duplexing FDMA Frequency Division Multiple Access FIFO First In First Out FM Frequency Modulation FPGA Field-Programmable Gate Array FSO Free-Space Optics TERRANOVA Project Page 8 of 116 D2.2 – TERRANOVA system architecture FSPL Free Space Path Loss FTTH Fiber To The Home FWA Fixed Wireless Access GA Grant Agreement GaAs Gallium Arsenide HEMT High Electron Mobility Transistor HFT High Frequency Trading HSPA High Speed Packet Access HSPA+ evolved High Speed Packet Access I/Q In-phase and Quadrature I2C Inter-Integrated Circuit IA Initial Access ICF Intermediate Carrier Frequency IEEE Institute of Electrical and Electronics Engineers IF Intermediate Frequency IoT Internet of Things IM/DD Intensity Modulation/Direct Detection IP Internet protocol layer ISI InterSymbol Interference ISM Industrial Scientific and Medical band ITU International Telecommunication Union ITU-R Radiocommunication sector of the International Telecommunication Union IQ COMP. In-phase and Quadrature impairments COMPensator IQD Indoor Quasi Directional KPI Key Performance Indicator LDPC Low-Density Parity-Check LO Local Oscillator LoS Line of Sight LTE-A Long Term Evolution Advanced MAC Medium Access Control TERRANOVA Project Page 9 of 116 D2.2 – TERRANOVA system architecture MCE MAC Coordination Entity MID Multiple sector IDentifier MIMO Multiple Input Multiple Output MMIC Monolithic Microwave Integrated Circuit mmWave Millimeter Wave MUE Mobile User Equipment MUX MUltipleXer MZI Mach-Zehnder Interferometer NAV Network Allocation Vector NETCONF NETwork CONFiguration NI Node Information NGPON2 Next-Generation Passive Optical Network 2 nLoS Non-Line Of Sight NR New Radio NRZ Non-Return to Zero OFDM Orthogonal Frequency Division Modulation OIF Optical Internetworking
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