M.I.E.T ENGG COLLEGE DEPT OF EEE
M.I.E.T. ENGINEERING COLLEGE (Approved by AICTE and Affiliated to Anna University Chennai) TRICHY – PUDUKKOTTAI ROAD, TIRUCHIRAPPALLI – 620 007
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
COURSE MATERIAL
GE6252 Basic Electrical and Electronics Engineering
I YEAR - II SEMESTER
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
UNIT – I ELECTRIC CIRCUITS AND MEASUREMENTS
BASIC DEFINITIONS OF ELECTRICITY: The electron or the electrons revolving in outermost orbit are hence loosely held to the nucleus. Such a shell is called the valence shell .and Such electrons are called valence electrons. In some atom such valence electrons are so loosely bound to the nucleus that at room temperature the additional energy imported to the valence electrons causes them to escape from the shell and exists as free electrons. Such free electrons constitute the flow of electric current.
CURRENT: The current can be defined as rate of flow of charge in an electric circuit or in any medium in which charges are subjected to an external electric field. I = Q / t ampere
OHM ‘s LAW : At constant temperature, the voltage difference across the two ends of the conductor is directly proportional to the current flowing through the conductor. V = R I
I R
V
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
KIRCHOFF’s LAW:
KIRCHHOFF’s CURRENT LAW (KCL):
“At a junction, total current flowing towards the junction is equal to total current flowing away from the junction.”
Simply, the algebraic sum of current meeting at a junction or node is zero. ∑I = 0.
Applying KCL, at a junction a.
I1 + I3 = I2 + I4 +I5
I1 – I2 + I3 – I4 – I5 = 0
KIRCHOFF’s VOLTAGE LAW (KVL): “In any closed network , the algebraic sum of the voltage drops across the circuit elements is equal to the algebraic sum of the e.m.f ‘s in the path.”Simply, in a closed network, potential rise equal to potential drop. ∑V= 0.
STEADY STATE SOLUTION OF DC CIRCUITS:
They are two solutions in DC circuits 1. Voltage division in series resistive circuit 2. Current division in parallel resistive circuit
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
VOLTAGE DIVISION IN SERIES RESISTIVE CIRCUIT:
Consider a series circuit of two resistors R1 and R2 connected to source of V volts. As two resistors are connected in series flowing through both the resistors is same i.e., then applying KVL we get V= IR1 + IR2 Therefore I = V/ R1 + R2
Total voltage applied is equal to the sum of voltage drops VR1 and VR2 across R1 and R2 respectively.
VR1 = I.R1
VR1 = {V / R1+ R2) .R1
VR1 = ( R1 / R2 ) .V
Similarly VR2 = I .R2
VR2 = (V/ R1+ R2).R2
VR2 = (R2 / R1 + R2) .V
So this circuit is a voltage divider circuit.
CURRENT DIVISION IN PARALLEL RESISTIVE CIRCUIT:
I1 R
I I2 R 2
V
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
Consider a parallel circuit of two resistor R1 and R2 connected across a source of V volts. Current through R1 is I1 and R2 is I2 , while total current drawn from source is I
I = I1 + I2
but I1 = V /R1 and I2 = V / R2
V = I1R1 =I2R2
i.e., V = I1 R1 =I2R2
I 1 = I2 (R2 /R1)
Substituting value of I1 in eqn
I = I2 (R2/R1) + I2 = I2(R2/R1 +1)
I = I2 (R1 +R2 / R1)
I2 = I(R1/R1+ R2)
Now, I1= I – I2 = I –(R1 / R1+R2) I
I1 = (R1 + R2 –R1/R1+R2) I
I1 = I (R2 / R1+R2)
Note : Current through a resistor = (incoming Current) * Opposite branch resistance / total loop resistance Voltage across a resistor = (applied voltage ) * Voltage of that branch resistance / Total loop resistance
INTRODUCTION OF AC CIRCUITS : Alternating current is the current which changes its magnitude and direction (polarity) at regular interval of time.
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
AC WAVEFORM: The waveforms of most alternating currents are curves representing gradual changes in voltage and current. i.e., first increasing in one direction upto a maximum value and decreases to zero .Then it will increase in the other direction upto the maximum value. The graph representing the manner in which an alternating current (or) voltage changes with respect to time is known as waveform or wave shape.
ADVANTAGES OF AC SUPPLY: 1. By using AC supply , it is possible to step up (or) step down the voltage to the required value, by the transformer. 2. When a high voltage is transmitted, in the transmission line, the current will be Minimum. Hence the I2R loss in the conductor will be minimum and therefore Transmission system will be efficient and economical.
GENERATION OF AC VOLTAGES:
Emf induced the different situation : (I) Moving the conductor across the lines of force
V ,velocity of conductor.
Magnetic flux lines
In this case maximum flux will be cuts by the conductor .So e = BlV v
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
Where ,
e= induced emf , (v) B= flux density , (Wb /m2) l = length of the conductor (m/sec) V = velocity of conductor (m/sec )
(ii) Moving the conductor parallel to the lines of force.
V , velocity of conductor
In this case , no flux lines will cut the conductor .So , e = 0 V (iii) Moving the conductor in such a way making an angle ‘’ 0 ‘ ‘ with the lines of force.
In this case , Velocity (V) can be resolved in to two components. (i) Across the magnetic flux = Vsin teta (ii) Along (parallel ) to the magnetic flux = Vcos teta
Therefore total induced emf , e = BlV sin teta + Blv cost eta When the conductor is parallel to magnetic flux lines , the e = 0 So ,
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
e = BlV sin teta Volts.
EQUATION OF ALTERNATING EMF AND CURRENT:
N
Φm
X X ‘
S
For the derivation of the equation of an alternating quantity , consider single turn , 2 pole alternator. The coil is rotated with constant angular velocity in the uniform magnetic field of density B Wb / m2 in the anti clockwise direction as shown in fig In position 1 , the coil lines in the plane of reference axis XOX 1.At this position maximum flux (Φm) will be linking the coil. After ‘t ‘ second , the coil is rotated through an angel θ radians as shown in fig. In position 2 , the maximum flux (Φm) can be resolved in to two components. (i) Component Φm cos ώt perpendicular to the plane of the coil. Due to this ,there will be maximum flux cutting in the coil and hence emf . induced in the coil. (ii) Component Φm sin ώt is parallel to the plane of the coil. Component does not induced emf in the coil.
According to Faraday’s law of electro magnetic induction , an emf induced in the coil is given by,
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
e = -N dΦ/dt Where , N = number of turns Φ = Flux linkage. N = l e = -d/ dt Φm cos ώt e = - Φm ( - sin ώt). Ώ e = ώ Φm sin ώtV (2.1) When θ = λ0 degree , maximum emf will be induced in the coil. Em = ώ Φm(1) = ώ Φm V (2.2)
Sub the equation 2.1 in 2.2 e = Emsin ώt e = Emsin θ therefore the equation of alternating emf induced in a coil is given by
e = Em sin ώt (or ) V = Vm sin ώtV
Equating of alternating current induced ina coil is
i = Im sinώtA
From the above equation , it is clear that the instantaneous values of voltage and current veries as the sine function of the time (t) or angle.Because of this reason only it is called as sinusoidal voltage / sinusoidal current.
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
VARIOUS TYPES OF WAVEFORMS:
The various types of waveforms are shown
i,v i , v
T t
Triangle waveform Rectangular waveform
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
Trapezoidal Waveform
ROOT MEAN SQUARE (RMS ) OR EFFECTIVE VALUE OF AN ALTERNATING QUANTITY
When a current through a resistor, heat is produced irrespective of the direction of current flow. The heat produced by an alternating current of maximum value (Imax) will not be equal to the heat produced by a direct current of Imax amperes. The RMS value of an alternating quantity is defined as the AC value of current flowing through a given resistance for a given time produces the same amount of heat as produced by the direct current when flowing through the same resistance for the same time. GRAPHICALMETHOD:
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
SIMPLE AC CIRCUITS. An AC circuit may contain any one or two or all of the following three circuit elements. 1.Resistance 2.Inductance 3.Capacitance.
POWER AND POWER FACTOR: Power : Pav = Average power consumed by R ,L, C Pav = I2R Pav = I (IR)
P = IVR P= IVcosø P= VI cosø W. POWER TRIANGLE:
P= VI cosø
ø S = VI Q = VI sinø Q = VI S = Vt cosø ø
P= VI cosø Xc > XL
POWER FACTOR: It is defined as the cosine angle between voltage and current. Power Factor = True Power / Apparent Power = VI cos ø/ VI Power Factor = cos ø
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
If current lags volume, power factor is said to be lagging .If current leads voltage Power factor is said to be leading. THREE PHASE CIRCUITS: AC voltage can be generated by using alternator. a single phase AC voltage can be generated by using single turn alternator .But the voltage produced by such a single turn is very less and not enough to supply practical loads. Some loads needs three phase voltage for its operation. A three phase voltage can generated by using three winding, three separate AC voltages will be available having same magnitude and frequency but they will have a phase difference of 360 /3 =120 with respect to each other. ADVANTAGES OF THREE PHASE SYSTEM: 1 .It gives steady output 2. For transmission and distributions, 3 phases needs less copper than a single phase System. 3. High efficiency 4. Better power factor. GENERATION OF THREE PHASE VOLTAGE: For three phase voltage , three windings are placed in uniform magnetic field , each made up of two conductors.
Let VR ,VY,VB be the voltage induced in three winding R ,Y,B .All the alternating voltages having same magnitude and frequency as they are rotated at uniform speed.
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
When VR is taken as reference phasor , Vy lags the voltage VR by 120 degree and Vb leads Vr by 120 degree. Vr = Vm sinwt Vy = Vmsin (wt -120) VB= Vm sin(wt +120) The sequence in which the voltages in three phases reach their maximum positive values is called phase sequence .Generally the phase sequence is R – Y – B
THREE PHASE SUPPLY CONNECTIONS In single phase system, two wires are sufficient for transmitting voltages to the end i.e., phase and neutral. But in case of three phase system , two ends of each phase are available to supply voltage to the load. If all six terminals are used. Independently to supply voltage to the load , then total six will be required and it will be very much costly. Tp reduce the cost of reducing the number of windings , the three windings are interconnected in a particular fashion .This gives different three phase connections. STAR CONNECTION: The star connection is formed by connecting starting ends of all the three winding together.This common point is called as neutral point. The remaining ends are left free for connection purpose.
DELTA CONNECTION: It is formed by connecting one end of winding to starting end of other end connections are continued to form closed loop.
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
TYPES OF INSTRUMENTS: The various types of instruments are used as ammeters , voltmeters , wattmeters and energy meters are given below .
AMMETERS AND VOLTMETERS : 1.Moving -coil type (a) Permanent – Magnet moving coil(PMMC)type ( for DC only) (b) Electro – dynamic (or) dynamometer type (for DC and AC) 2.Moving - Iron type (both for AC and DC) (a) Attraction Type (b) Repulsion type. 3.Hot wire type (for DC /AC ) 4.Induction type (for AC only) (a) Split phase winding type (b)Shaded – pole type . 5.Electro –static type (for voltmeters only , DC /AC) 6.Wattmeters (a) Dynamometer type (for DC /AC ) (b)Induction type (for AC only) 7.Energy Meters (a) Electrolytic type (for AC only) 8.Motor Meters (a) Mercuty motor meter (or DC only) (b) Induction type (for AC only)
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
PERMANENT – MAGNET MOVING COIL(PMMC)TYPE: The permanent magnet moving coil instruments are the most accurate type of DC measurements .the working principles of these instruments is same as that of a DC motor. When a current carrying conductor is placed in a magnetic field , the conductor experience a force and tends to move .Hence , as the coil is moving and the magnetic field is produced by a permanent magnet the instrument is called as permanent magnet moving coil instrument .This basic principle is called as D’ Arsonal principle.The amount of force experienced by the conductor is directly proportional to the current passing through the coil.The PMMC instrument is a direct reading type , provided with a pointer and a scale.
CONSTRUCTION: Moving Coil: The moving coil is wound with many turns of enameled silk covered copper wire on a rectangular aluminium former which is pivoted on jeweled bearings .The coil can move freely in the field of a permanent magnet.Most voltmeter coils are wound on metal frames to provide the required electromagnetic damping .Most ammeter coils are wound on non magnetic formes , because coil turns are effectively shorted out by the ammeter shunt.Therefore the coil itself provides electromagnetic damping.
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
Magnet System : Normally a concentratic structure is used, which is two sector shaped alnico magnts , having round cylindrical faces .they are placed inside a soft iron steel ring and the assembly is diecast together.So the steel ring provides a return path for the magnetic circuit and shields the assembly from stray magnetic fields. Control : The control torque is provided bytwo phosphor bronze hair springs.these springs also serve as leads to the coil. Damping: Eddy current damping is produced by the movement of the aluminium former moving in the magnetic fields of the permanent magnet. Pointer and Scale:The pointer is carried by the spindle and moves over a graduated scale Principle of operation of PMMC instrument : A current in the moving coil causes motor action as the coil is controlled by the control springs. Thus the necessary deflecting torque is produced , by the moving coil deflects and a pointer attached to the spindle moves over a graduated scale.If the direction of the current in the coil is changed , then the direction of motion of the coil also changes as the magnetic field is a permanent magnet.
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
Thus in permanent magnet moving coil instruments , the operating torque depends on the direction of the operating current .This type of instruments are polarized .So , if PMMC meters are connected for AC measurements , then the deflecting torque is a pulsating one and the meter will not read. That is , the meter will read the average value of the measuring quantity.
MOVING IRON (MI) INSTRUMENTS: All moving iron instruments may be classified, under the following two major groups .They are , (a) Attraction type (b) Repulsion type
ATTRACTION TYPE:
CONSTRUCTION: A moving iron, wended on a spindle , is situated inside a coil of wire. The moving iron is CAM shaped and consists of two or three thin discs of soft iron .It is eccentrically pivoted on the spindle. The spindle carries a pointer which moves over a graduated scale. The spindle is pivotated to jeweled bearings. The construction detail is shown .
WORKING:
The coil of wire be connected in series with the circuit if the instrument is an ammeter or in parallel, if it is a voltmeter. If an ammeter, the coil will carry either the load current Or a definite fraction of it. If a voltmeter, the coil will carry a current proportional to the voltage across the circuit .In both cases a magnetic field will be set up inside the coil. The soft iron piece is , therefore , attracted and so it tends to move from the weaker magnetic field outside the coil , to the stronger field inside it. Since the moving is eccentrically pivoted the spindle is turned and so the pointer deflects.
CONTROLLING AND DAMPING :
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
Spring control is almost universally used, but gravity control can be used in panel type instruments which are vertically mounted.a hair spring , made of phosphor bronze , is attached to the spindle so that when the spindle turns , the spring test coiled and exerts a controlling torque.Damping is by air fraction.A piston , attached to the spindle , moves inside an air chamber and gives the necessary damping.
REPULSION TYPE : In repulsion type of moving iron instruments , there are two vanes inside the coil , pne fixed and the other moveable.These are similarly magnetized when current flows through the coil.So there is a force of repulsion between the two varies resulting in the movement of the moving vane. There are two different types in repulsion type instruments: They are (a) Radial Vane type (b) Coaxial Vane type
Moving Coil Instruments There are two types of moving coil instruments namely, permanent magnet moving coil type which can only be used for direct current, voltage measurements and the dynamometer type which can be used on either direct or alternating current, voltage measurements.
Permanent Magnet Moving Coil Mechanism (PMMC) In PMMC meter or (D’Arsonval) meter or galvanometer all are the same instrument, a coil of fine wire is suspended in a magnetic field produced by permanent magnet. Accordinto the fundamental law of electromagnetic force, the coil will rotate in the magnetic field whenitcarries an electric current by electromagnetic (EM) torque effect. A pointer which attached the movable coil will deflect according to the amount of current to be measured which applied the coil. The (EM) torque is counterbalance by the mechanical torque of control springs attacheto the movable coil also. When the torques are balanced the moving coil will stopped anangular deflection represent the amount of electrical current to be measured against a fixed reference, called a scale. If the permanent magnet field is uniform and the spring linear, then the pointer deflection is also linear.
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
Mathematical Representation of PMMC Mechanism Assume there are (N) turns of wire and the coil is (L) in long by (W) in wide. The force (F) acting perpendicular to both the direction of the current flow and the direction of magnetic field is given by:
F = N ⋅ B ⋅ I ⋅ L where N: turns of wire on the coil I: current in the movable coil
B: flux density in the air gap L: vertical length of the coil Electromagnetic torque is equal to the multiplication of force with distance to the point of suspension
C = NBA Thus θ = CI
1- D.c Ammeter: An Ammeter is always connected in series with a circuit branch and measures the current flowing in it. Most d.c ammeters employ a d’Arsonval movement, an ideal ammeter would be capable of performing the measurement without changing or distributing the current in the branch but real ammeters would possess some internal resistance. The current range of d.c ammeter can be further extended by a number of shunts selected • by a range switch; such ammeter is called a multirange ammeter. Measures current in amperes, milliamperes, microamperes depending on the meter scale. • The coil in the meter movement is wound with many turns of fine wire. • If a large current was allowed to flow the coil, it would burn it out, so a shunt or alternate path is provided for current. Most of the current flows through the shunt. • Safety: Connect an ammeter is series with a circuit device. Never in parallel! 2- D.C Voltmeter: A voltmeter is always connect in parallel with the element being measured, and measures the voltage between the points across which its’ connected. Most d.c voltmeter employ PMMC meter with series resistor as shown. The series resistance should be much larger than the impedance of the circuit being measured, and they are usually much larger than Rm. A voltmeter is always connect in parallel with the element being measured, and measures • the voltage between the points across which its’ connected. Most d.c voltmeter employ PMMC meter with series resistor as shown. The series resistance should be much larger than the impedance of the circuit being measured, and they are usually much larger than Rm. To
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
ensure voltages across the coil never exceed .1V, multiplier resistors are placed in series with the meter movement coil using a switch. • Voltage ranges 0-1V, 0-10V, 0-100V, 0-500V • .1V can be placed across meter at any one time, therefore a resistor must drop .9V to use a 0- 1V scale. Full scale current deflection is 1mA or .001A • Rm = E/I + .λV/.001A = λ00Ω • Calculate multiplier resistors for other scales.
Extension of Voltmeter Range: Voltage range of d.c voltmeter can be further extended by a number of series resistance selected by a range switch; such a voltmeter is called multirange voltmeter. a) Direct D.c Voltmeter Method: In this method each series resistance of multirange voltmeter is connected in direct with PMMC meter to give the desired range. b) Indirect D.c Voltmeter Method: In this method one or more series resistances of multirange voltmeter is connected with PMMC meter to give the desired range.
Ohmmeter and Resistance measurement: When a current of 1A flows through a circuit which has an impressed voltage of 1volt, the circuit has a resistance of 1Ω. R =V /I a) Indirect method by ammeter and voltmeter. This method is inaccurate unless the ammeter has a small resistance and voltmeter have a high resistance b) Series Ohmmeter: Rx is the unknown resistor to be measured, R2 is variable adjusted resistance so that the pointer read zero at short circuit test. The scale of series ohmmeter is nonlinear with zero at the right and infinity at extreme left. Series ohmmeter is the most generally used meter for resistance measurement
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
c) Shunt Ohmmeter: Shunt ohmmeter are used to measure very low resistance values. The unknown resistance Rx is now shunted across the meter, so portion of current will pass across this resistor and drop the meter deflection proportionately. The switch is necessary in shunt ohmmeter to disconnect the battery when the instrument is not used. The scale of shunt ohmmeter is nonlinear with zero at the left and infinity at extreme right.
SINGLE PHASE CIRCUITS:
Depicted above (Figure above) is a very simple AC circuit. If the load resistor's power dissipation were substantial, we might call this a “power circuit” or “power system” instead of regarding it as just a regular circuit. The distinction between a “power circuit” and a “regular circuit” may seem arbitrary, but the practical concerns are definitely not.
One such concern is the size and cost of wiring necessary to deliver power from the AC source to the load. Normally, we do not give much thought to this type of concern if we're merely analyzing a circuit for the sake of learning about the laws of electricity. However, in the real world it can be a major concern. If we give the source in the above circuit a voltage value and also give power dissipation values to the two load resistors, we can determine the wiring needs for this particular circuit:
83.33 amps for each load resistor in Figure above adds up to 166.66 amps total circuit current. This is no small amount of current, and would necessitate copper wire conductors of at least 1/0 gage. Such wire is well over 1/4 inch (6 mm) in diameter, weighing over 300 pounds per thousand feet. Bear in mind that copper is not cheap either! It would be in our best interest to
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE find ways to minimize such costs if we were designing a power system with long conductor lengths.
One way to do this would be to increase the voltage of the power source and use loads built to dissipate 10 kW each at this higher voltage. The loads, of course, would have to have greater resistance values to dissipate the same power as before (10 kW each) at a greater voltage than before. The advantage would be less current required, permitting the use of smaller, lighter, and cheaper wire: (Figure below)
Same 10 kW loads at 240 Vac requires less substantial wiring than at 120 Vac (83 A).
Now our total circuit current is 83.33 amps, half of what it was before. We can now use number 4 gage wire, which weighs less than half of what 1/0 gage wire does per unit length. This is a considerable reduction in system cost with no degradation in performance. This is why
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE power distribution system designers elect to transmit electric power using very high voltages (many thousands of volts): to capitalize on the savings realized by the use of smaller, lighter, cheaper wire.
However, this solution is not without disadvantages. Another practical concern with power circuits is the danger of electric shock from high voltages. Again, this is not usually the sort of thing we concentrate on while learning about the laws of electricity, but it is a very valid concern in the real world, especially when large amounts of power are being dealt with. The gain in efficiency realized by stepping up the circuit voltage presents us with increased danger of electric shock. Power distribution companies tackle this problem by stringing their power lines along high poles or towers, and insulating the lines from the supporting structures with large, porcelain insulators.
At the point of use (the electric power customer), there is still the issue of what voltage to use for powering loads. High voltage gives greater system efficiency by means of reduced conductor current, but it might not always be practical to keep power wiring out of reach at the point of use the way it can be elevated out of reach in distribution systems. This tradeoff between efficiency and danger is one that European power system designers have decided to risk, all their households and appliances operating at a nominal voltage of 240 volts instead of 120 volts as it is in North America. That is why tourists from America visiting Europe must carry small step-down transformers for their portable appliances, to step the 240 VAC (volts AC) power down to a more suitable 120 VAC.
An essential component to a split-phase power system is the dual AC voltage source. Fortunately, designing and building one is not difficult. Since most AC systems receive their power from a step-down transformer anyway (stepping voltage down from high distribution levels to a user-level voltage like 120 or 240), that transformer can be built with a center-tapped secondary winding: (Figure below)
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If the AC power comes directly from a generator (alternator), the coils can be similarly center-tapped for the same effect. The extra expense to include a center-tap connection in a transformer or alternator winding is minimal.
Here is where the (+) and (-) polarity markings really become important. This notation is often used to reference the phasings of multiple AC voltage sources, so it is clear whether they are aiding (“boosting”) each other or opposing (“bucking”) each other. If not for these polarity markings, phase relations between multiple AC sources might be very confusing. Note that the split-phase sources in the schematic (each one 120 volts 0o), with polarity marks (+) to (-) just like series-aiding batteries can alternatively be represented as such: (Figure below) ∠
To mathematically calculate voltage between “hot” wires, we must subtract voltages, because their polarity marks show them to be opposed to each other:
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE
MOVING IRON INSTRUMENTS: Measuring instruments are classified according to both the quantity measured by the instrument and the principle of operation. Three general principles of operation are available: (i) electromagnetic, which utilizes the magnetic effects of electric currents; (ii) electrostatic, which utilizes the forces between electrically-charged conductors; (iii) electro-thermic, which utilizes the heating effect. Electric measuring instruments and meters are used to indicate directly the value of current, voltage, power or energy. In this lesson, we will consider an electromechanical meter (input is as an electrical signal results mechanical force or torque as an output) that can be connected with additional suitable components in order to act as an ammeters and a voltmeter. The most common analogue instrument or meter is the permanent magnet moving coil instrument and it is used for measuring a dc current or voltage of a electric circuit. On the other hand, the indications of alternating current ammeters and voltmeters must represent the RMS values of the current, or voltage, respectively, applied to the instrument
Various forces/torques required in measuring instruments
• Deflecting torque/force: The defection of any instrument is determined by the combined effect of the deflecting torque/force, control torque/force and damping torque/force. The value of deflecting torque must depend on the electrical signal to be measured; this torque/force causes the instrument movement to rotate from its zero position.
• Controlling torque/forceμ This torque/force must act in the opposite sense to the deflecting torque/force, and the movement will take up an equilibrium or definite position when the deflecting and controlling torque are equal in magnitude. Spiral springs or gravity usually provides the controlling torque.
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• Damping torque/forceμ A damping force is required to act in a direction opposite to the movement of the moving system. This brings the moving system to rest at the deflected position reasonably quickly without any oscillation or very small oscillation. This is provided by i) air friction ii) fluid friction iii) eddy current. It should be pointed out that any damping force shall not influence the steady state deflection produced by a given deflecting force or torque. Damping force increases with the angular velocity of the moving system, so that its effect is greatest when the rotation is rapid and zero when the system rotation is zero. Details of mathematical expressions for the above torques are considered in the description of various types of instruments.
ENERGY METER:
Electricity is a clean, convenient way to deliver energy. The electricity meter is how electricity providers measure billable services.
The most common type of meter measures kilowatt hours. When used in electricity retailing, the utilities record the values measured by these meters to generate an invoice for the electricity. They may also record other variables including the time when the electricity was used.
Since it is expensive to store large amounts of electricity, it must usually be generated as it is needed. More electricity requires more generators, and so providers want consumers to avoid causing peaks in consumption. Electricity meters have therefore been devised that encourage users to shift their consumption of power away from peak times, such as mid afternoon, when many buildings turn on air-conditioning.
For these applications, meters measure demand, the maximum use of power in some interval. In some areas, the meters charge more money at certain times of day, to reduce use. Also, in some areas meters have relays to turn off nonessential equipment.
Providers are also concerned about efficient use of their distribution network. So, they try to maximize the delivery of billable power. This includes methods to reduce tampering with the meters.
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Also, the network has to be upgraded with thicker wires, larger transformers, or more generators if parts of it become too hot from excessive currents. The currents can be caused by either real power, in which the waves of voltage and current coincide, or apparent power, in which the waves of current and voltage do not overlap, and so cannot deliver power.
Since providers can only collect money for real power, they try to maximize the amount of real power delivered by their networks. Therefore, distribution networks always incorporate electricity meters that measure apparent power, usually by displaying or recording power factors or volt-amp-reactive-hours. Many industrial power meters can measure volt-amp-reactive hours.
Energy transfer
Because energy is strictly conserved and is also locally conserved (wherever it can be defined), it is important to remember that by definition of energy the transfer of energy between the "system" and adjacent regions is work. A familiar example is mechanical work. In simple cases this is written as:
ΔE = W (1) if there are no other energy-transfer processes involved. Here E is the amount of energy transferred, and W represents the work done on the system.
More generally, the energy transfer can be split into two categories:
ΔE = W + Q (2) where Q represents the heat flow into the system.
There are other ways in which an open system can gain or lose energy. In chemical systems, energy can be added to a system by means of adding substances with different chemical potentials, which potentials are then extracted (both of these process are illustrated by fueling an auto, a system which gains in energy thereby, without addition of either work or heat). Winding a clock would be adding energy to a mechanical system. These terms may be added to the above equation, or they can generally be subsumed into a quantity called "energy addition term E"
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE which refers to any type of energy carried over the surface of a control volume or system volume. Examples may be seen above, and many others can be imagined (for example, the kinetic energy of a stream of particles entering a system, or energy from a laser beam adds to system energy, without either being either work-done or heat-added, in the classic senses).
ΔE = W + Q + E (3)
Where E in this general equation represents other additional advected energy terms not covered by work done on a system, or heat added to it.
Energy is also transferred from potential energy (Ep) to kinetic energy (Ek) and then back to potential energy constantly. This is referred to as conservation of energy. In this closed system, energy can not be created or destroyed, so the initial energy and the final energy will be equal to each other. This can be demonstrated by the following:
Epi + Eki = EpF + EkF'''
The equation can then be simplified further since Ep = mgh (mass times acceleration due to gravity times the height) and (half times mass times velocity squared). Then the total amount of energy can be found by adding Ep + Ek = Etotal
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UNIT-II UNIT II – ELECTRICAL MACHINES
TRANSFORMER:
• A transformer is a static machine. • The word ‘transformer’ comes form the word ‘transform’. • Transformer is not an energy conversion device, but is a device that changes AC electrical power at one voltage level into AC electrical power at another voltage level through the action of magnetic field, without a change in frequency. • It can be either to step-up or step down.
Transmission System TX1 TX1 Generation Distribution Station
s TX1 33/13.5k 13.5/6.6kV V
TX1
6.6kV/415 V Consumer
TRANSFORMER CONSTRUCTION • Two types of iron-core construction: a) Core - type construction b) Shell - type construction
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Core - type construction
When alternating voltage is applied to the primary winding, an alternating current will flow that will magnetize the magnetic core, first in one direction and then in the other direction. This alternating flux flowing around the entire length of the magnetic circuit induces a voltage in both the primary and secondary windings. Since both windings are linked by the same flux, the voltage induced per turn of the primary and secondary windings must be the same value and same direction. This voltage opposes the voltage applied to the primary winding and is called counter-electromotive force (CEMF).
Shell - type construction
Shell type transformer is used in transmission of multiple high and low voltages. It composes of a magnetic core enclosing the windings, which provides robustness to short circuit and transportation efforts, and compactness of the design to match transportation and hauling restrictions. The windings (high voltage, low voltage, tertiary) in the shell transformer can be fractioned in groups.
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IDEAL TRANSFORMER • An ideal transformer is a transformer which has no loses, i.e. it’s winding has no ohmic resistance, no magnetic leakage, and therefore no I2 R and core loses. • However, it is impossible to realize such a transformer in practice. • Yet, the approximate characteristic of ideal transformer will be used in characterized the practical transformer.
N1 : N2
I1 I2
V1 E1 E2 V2
V1 – Primary Voltage V2 – Secondary Voltage E1 – Primary induced Voltage E2 – secondary induced Voltage
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N1:N2 – Transformer ratio
SINGLE PHASE TRANSFORMER (REFERRED TO PRIMARY) ACTUAL METHOD
’ ’ N1: N2 I1 R1 X1 I2 ’ X2 I Io R2 I2
Ic Im Load V1 RC Xm E1 E2 2 V2
Single-phase meaning (2) power lines as an input source; therefore, only (1) primary and (1)secondary winding is required to accomplish the voltage transformation. However, most power is distributed in the form of three-phase A.C. Therefore, before proceeding any further you should understand what is meant by three-phase power. Basically, the power company generators produce electricity by rotating (3) coils or windings through a magnetic field within the generator . These coils or windings are spaced120 degrees apart. As they rotate through the magnetic field they generate power which is then sent out on three (3) lines as in three-phase power. Three-Phase transformers must have (3) coils or windings connected in the proper sequence in order to match the incoming power and therefore transform the power company voltage to the level of voltage we need and maintain the proper phasing or polarity. Three phase electricity powers large industrial loads more efficiently than single- phase electricity. When single-phase electricity is needed, It is available between any two phases of a three-phase system, or in some systems , between one of the phases and ground. By the use of three conductors a three-phase system can provide 173% more power than the two conductors of a single- phase system. Three-phase power allows heavy duty industrial equipment to operate more smoothly and efficiently. Three-phase power can be transmitted over long distances with smaller conductor size. In a three-phase transformer, there is a three-legged iron core as shown below. Each leg has a respective
primary and secondary winding.
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The three primary windings (P1, P2, P3) will be connected at the factory to provide the proper sequence (or correct polarity) required and will be in a configuration known as Delta. The three secondary windings (S1, S2, S3) will also be connected at the factory to provide the proper sequence (or correct polarity) required Delta and Wye Connections In a three-phase transformer, there is a three-legged iron core as shown below. Each leg has a respective primary and secondary winding.
Winding Combination As can be seen, the three-phase transformer actually has 6 windings (or coils) 3 primary and 3 secondary. These 6 windings will be pre-connected at the factory in one of two configurations:
Configuration 1. Three primary Windings in Delta and Three Secondary Windings in Wye Note: These are the designations which are marked on the leads or terminal boards provided for customer connections and they will be located in the transformer wiring compartment. In both single and three-phase transformers, the high voltage terminals are designated with an “h”
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and the low voltage with an “X” Configuration 2. Three Primary Windings in Delta and Three Secondary Windings in Delta Note: These are the designations which are marked on the leads or terminal boards provided for the customer connections and they will be located in the transforming wiring compartment. In both single and three-phase transformers, the high voltage terminals are designated with an “H” and the low voltage with an “X”.
CONSTRUCTION OF A TRANSFORMER
We usually design a power transformer so that it approaches the characteristics of an ideal transformer. To achieve this, following design features are incorporated: (i) The core is made of silicon steel which has low hysteresis loss and high permeability. Further, core is laminated in order to reduce eddy current loss. These features considerably reduce the iron losses and the no-load current. (ii) Instead of placing primary on one limb and secondary on the other, it is ausual practice to wind one-half of each winding on one limb. This ensures tight coupling between the two windings. Consequently, leakage flux is considerably reduced. (iii) The winding resistances R1 and R2 are minimized to reduce I2R loss and resulting rise in temperature and to ensure high efficiency. Advantages and Disadvantages of autotransformers Advantages (i) An autotransformer requires less Cu than a two-winding transformer of similar rating. (ii) An autotransformer operates at a higher efficiency than a two-winding transformer of similar rating. (iii) An autotransformer has better voltage regulation than a two-winding transformer of the same rating.
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(iv) An autotransformer has smaller size than a two-winding transformer ofthe same rating. (v) An autotransformer requires smaller exciting current than a two-winding transformer of the same rating. It may be noted that these advantages of the autotransformer decrease as the ratio of transformation increases. Therefore, an autotransformer has marked advantages only for relatively low values of transformation ratio (i.e. values approaching 1).
Disadvantages (i) There is a direct connection between the primary secondary.Therefore,the output is no longer d.c. isolated from the input. (ii) An autotransformer is not safe for stepping down a high voltage to a low voltage. As an illustration, Fig. (7.40)shows 11000/230 V step-down autotransformer. If an open circuit develops in the common portion 2-3 of the winding, then full-primary voltage (i.e., 11000 V in this case) will appear across the load. In such acase, any one coming in contact with the secondary is subjected to high voltage. This could be dangerous to both the persons and equipment. For this reason, autotransformers are prohibited for general use. (iii) The short-circuit current is much larger than for the two-winding transformer of the same rating. It can be seen from Fig. (7.40) that a short-circuited secondary causes part of the primary also to be shortcircuited.This reduces the effective resistance and reactance.
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Applications of single phase transformers (i) Autotransformers are used to compensate for voltage drops in transmission and distribution lines. When used for this purpose, they are known as booster transformers. (ii) Autotransformers are used for reducing the voltage supplied to a.c. motors during the starting period. (iii) Autotransformers are used for continuously variable supply.
Applications of Transformers There are four principal applications of transformers viz. (i) power transformers (ii) distribution transformers (iii) autotransformers (iv) instrument transformers (i) Power Transformers. They are designed to operate with an almost constant load which is equal to their rating. The maximum efficiency is designed to be at full-load. This means that full- load winding copper losses must be equal to the core losses. (ii) Distribution Transformers. These transformers have variable load which is usually considerably less than the full-load rating. Therefore, these are designed to have their maximum efficiency at between 1/2 and 3/4 of full load. (iii) Autotransformers. An autotransformer has only one winding and is used in cases where the ratio of transformation (K), either step-up or step down, differs little from 1. For the same output and voltage ratio, an autotransformer requires less copper than an ordinary 2-winding transformer. Autotransformers are used for starting induction motors (Reducing applied voltage during starting) and in boosters for raising the voltage of feeders. (iv) Instrument transformers. Current and voltage transformers are used to extend the range of a.c. instruments.
Single-Phase Induction Motors A single phase induction motor is very similar to a 3-phase squirrel cage induction motor. It has (i) a squirrel-cage rotor identical to a 3-phase motor and (ii) a single-phase winding on the stator. Unlike a 3-phase induction motor, a single-phase induction motor is not self starting but requires some starting means. The single-phase stator winding produces a magnetic field that pulsates in strength in a sinusoidal manner. The field polarity reverses after each half cycle but
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE the field does not rotate.Consequently, the alternating flux cannot produce rotation in a stationary squirrel-cage rotor. However, if the rotor of a single-phase motor is rotated in one direction by some mechanical means, it will continue to run in the direction of rotation. As a matter of fact, the rotor quickly accelerates until it reaches a speed slightly below the synchronous speed. Once the motor is running at this speed, it will continue to rotate even though single-phase current is flowing through the stator winding. This method of starting is generally not convenient For large motors. Nor can it be employed fur a motor located at some Inaccessible spot. Fig. ((9.1) shows single-phase induction motor having a squirrel cage rotor and a single phase distributed stator winding. Such a motor inherently docs not develop any starting torque and, therefore, will not start to rotate if the stator winding is connected to single-phase a.c. supply. However, if the Rotor is started by auxiliary means, the motor will quickly attain me final speed. This strange behavior of single-phase induction motor can be explained on the basis of double-field revolving theory
Double-Field Revolving Theory The double-field revolving theory is proposed to explain this dilemma of no torque at start and yet torque once rotated. This theory is based on the fact that an alternating sinusoidal flux (= m cos t) can be represented by tworevolving fluxes, each equal to one- half of the maximum value of alternating flux (i.e., m/2) and each rotating at synchronous speed (Ns = 120 f/P, = 2f) in opposite directions. The above statement will now be proved. The
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE instantaneous value of flux due to the stator current of a single-phase induction motor is given by; m cost Consider two rotating magneticfluxes 1 and 2 each of magnitude m/2 and rotating in opposite directions with angular velocity [See Fig. (9.2)]. Let the two fluxes start rotating from OX axis at
t = 0. After time t seconds, the angle through which the flux vectors have rotated is at. Resolving the flux vectors along-X-axis and Y-axis, we have, Thus the resultant flux vector is = m cos t along X-axis. Therefore, an alternating field can be replaced by two relating fields of half its amplitude rotating in opposite directions at synchronous speed. Note that the resultant vector of two revolving flux vectors is a stationary vector that oscillates in length with time along X-axis.
When the rotating flux vectors are in phase the resultant vector is = m; when out of phase by 180°.the resultant vector = 0. Making Single-Phase Induction Motor Self-Starting The single-phase induction motor is not self starting and it is undesirable to resort to mechanical spinning of the shaft or pulling a belt to start it. To make a single-phase induction motor self-starting, we should somehow produce a revolving stator magnetic field. This may be achieved by converting a single-phase supply into two-phase supply through the use of an additional winding. When the motor attains sufficient speed, the starting means (i.e., additional winding) maybe removed depending upon the type of the motor. As a matter of fact, single- phase induction motors are classified and named according to the method employed to make them self-starting.
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(i) Split-phase motors-started by two phase motor action through the use of an auxiliary or starting winding. (ii) Capacitor motors-started by two-phase motor action through the use of an auxiliary winding and a capacitor. (III)Shaded-pole motors-started by the motion of the magnetic field produced by means of a shading coil around a portion of the pole structure.
Permanent-split capacitor motor
One way to solve the single phase problem is to build a 2-phase motor, deriving 2-phase power from single phase. This requires a motor with two windings spaced apart 90o electrical, fed with two phases of current displaced 90o in time. This is called a permanent-split capacitor motor in Figure below.
Permanent-split capacitor induction motor.
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This type of motor suffers increased current magnitude and backward time shift as the motor comes up to speed, with torque pulsations at full speed. The solution is to keep the capacitor (impedance) small to minimize losses. The losses are less than for a shaded pole motor. This motor configuration works well up to 1/4 horsepower (200watt), though, usually applied to smaller motors.
Capacitor-start induction motor
In Figure below a larger capacitor may be used to start a single phase induction motor via the auxiliary winding if it is switched out by a centrifugal switch once the motor is up to speed. Moreover, the auxiliary winding may be many more turns of heavier wire than used in a resistance split-phase motor to mitigate excessive temperature rise. The result is that more starting torque is available for heavy loads like air conditioning compressors. This motor configuration works so well that it is available in multi-horsepower (multi-kilowatt) sizes.
Capacitor-start induction motor.
Capacitor-run motor induction motor
A variation of the capacitor-start motor (Figure below) is to start the motor with a relatively large capacitor for high starting torque, but leave a smaller value capacitor in place after starting to improve running characteristics while not drawing excessive current. The additional complexity of the capacitor-run motor is justified for larger size motors.
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Capacitor-run motor induction motor.
A motor starting capacitor may be a double-anode non-polar electrolytic capacitor which could be two + to + (or - to -) series connected polarized electrolytic capacitors. Such AC rated electrolytic capacitors have such high losses that they can only be used for intermittent duty (1 second on, 60 seconds off) like motor starting. A capacitor for motor running must not be of electrolytic construction, but a lower loss polymer type.
Resistance split-phase motor induction motor
If an auxiliary winding of much fewer turns of smaller wire is placed at 90o electrical to the main winding, it can start a single phase induction motor. (Figure below) With lower inductance and higher resistance, the current will experience less phase shift than the main winding. About 30o of phase difference may be obtained. This coil produces a moderate starting torque, which is disconnected by a centrifugal switch at 3/4 of synchronous speed. This simple (no capacitor) arrangement serves well for motors up to 1/3 horsepower (250 watts) driving easily started loads.
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Resistance split-phase motor induction motor.
This motor has more starting torque than a shaded pole motor (next section), but not as much as a two phase motor built from the same parts. The current density in the auxiliary winding is so high during starting that the consequent rapid temperature rise precludes frequent restarting or slow starting loads.
DC GENERATORS:
Introduction Although a far greater percentage of the electrical machines in service are a.c. machines, the d.c. machines are of considerable industrial importance. The principal advantage of the d.c. machine, particularly the d.c. motor, is that it provides a fine control of speed. Such an advantage is not claimed by any a.c. motor. However, d.c. generators are not as common as they used to be, because direct current, when required, is mainly obtained from an a.c. supply by the use of rectifiers. Nevertheless, an understanding of d.c. generator is important because it represents a logical introduction to the behaviour of d.c. motors. Indeed many D.C. motors in industry actually operate as d.c. generators for a brief period. In this chapter, we shall deal with various aspects of d.c.generators.
Generator Principle
An electric generator is a machine that converts mechanical energy into electrical energy. An electric generator is based on the principle that wheneverflux is cut by a conductor, an e.m.f. is induced which will cause a current to flow if the conductor circuit is closed. The direction of induced e.m.f. (and hence current) is given by Fleming’s right hand rule. Therefore, the essential components of a generator are: (a) a magnetic field (b) conductor or a group of conductors (c) motion of conductor w.r.t. magnetic field.
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SIMPLE LOOP GENERATOR Consider a single turn loop ABCD rotating clockwise in a uniform magnetic field with a constant speed as shown in Fig.(1.1). As the loop rotates, the flux linking the coil sides AB and CD changes continuously. Hence the e.m.f. induced in these coil sides also changes but the e.m.f. induced in one coil side adds to that induced in the other. (i) When the loop is in position no. 1 [See Fig. 1.1], the generated e.m.f. is zero because the coil sides (AB and CD) are cutting no flux but are moving parallel to it ii) When the loop is in position no. 2, the coil sides are moving at an angle to the flux and, therefore, a low e.m.f. is generated as indicated by point 2 in Fig. (1.2). (iii) When the loop is in position no. 3, the coil sides (AB and CD) are at right angle to the flux and are, therefore, cutting the flux at a maximum rate. Hence at this instant, the generated e.m.f. is maximum as indicated by point 3 in Fig. (1.2). (iv) At position 4, the generated e.m.f. is less because the coil sides are cutting the flux at an angle. (v) At position 5, no magnetic lines are cut and hence induced e.m.f. is zero as indicated by point 5 in Fig. (1.2). (vi) At position 6, the coil sides move under a pole of opposite polarity and hence the direction of generated e.m.f. is reversed. The maximum e.m.f. in this direction (i.e., reverse direction, See Fig. 1.2) will be when the loop is at position 7 and zero when at position 1. This cycle repeats with each revolution of the coil.
Fig.
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Note that e.m.f. generated in the loop is alternating one. It is because anycoil side, say AB has e.m.f. in one direction when under the influence of N-pole and in the other direction when under the influence of S-pole. If a load is connected across the ends of the loop, then alternating current will flow through the load.The alternating voltage generated in the loop can be converted into direct voltage by a device called commutator. We then have the d.c. generator. In fact,a commutator is a mechanical rectifier.
Action Of Commutator
If, somehow, connection of the coil side to the external load is reversed at the same instant the current in the coil side reverses, the current through the load. will be direct current. This is what a commutator does. Fig. (1.3) shows a commutator having two segments C1 and C2. It consists of a cylindrical metal ring cut into two halves or segments C1 and C2 respectively separated by a thin sheet of mica. The commutator is mounted on but insulated from the rotor shaft.The ends of coil sides AB and CD are connected to the segments C1 and C2 respectively as shown in Fig. (1.4). Two stationary carbon brushes rest on the commutator and lead current to the external load. With this arrangement, the commutator at all times connects the coil side under
S-pole to the +ve brush and that under N-pole to the ve brush.
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(i) In Fig. (1.4), the coil sides AB and CD are under N-pole and S-polerespectively. Note that segment C1 connects the coil side AB to point P of the load resistance R and the segment C2 connects the coil side CD to point Q of the load. Also note the direction of current through load. It is from Q to P. (ii) After half a revolution of the loop (i.e., 180° rotation), the coil side AB is under S-pole and the coil side CD under N-pole as shown in Fig. (1.5).The currents in the coil sides now flow in the reverse direction but the segments C1 and C2 have also moved through 180° i.e., segment C1 is now in contact with +ve brush and segment C2 in contact with ve brush.
Note that commutator has reversed the coil connections to the load i.e.,coil side AB is now connected to point Q of the load and coil side CD tothe point P of the load. Also note the direction of current through the load. It is again from Q to P. Fig.(1.3)
Construction of D.C. Generator
The d.c. generators and d.c. motors have the same general construction. In fact,when the machine is being assembled, the workmen usually do not know whether it is a d.c. generator or motor. Any d.c. generator can be run as a d.c. motor and vice-versa. All d.c. machines have five principal components viz., (i)field system (ii) armature core (iii) armature winding (iv) commutator (v)brushes [See Fig. 1.7].
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(i) Field system The function of the field system is to produce uniform magnetic field within which the armature rotates. It consists of a number of salient poles (of course,even number) bolted to the inside of circular frame (generally called yoke). The yoke is usually made of solid cast steel whereas the pole pieces are composed of stacked laminations. Field coils are mounted on the poles and carry the d.c.exciting current. The field coils are connected in such a way that adjacent poles have opposite polarity.The m.m.f. developed by the field coils produces a magnetic flux that passesthrough the pole pieces, the air gap, the armature and the frame Practical d.c. machines have air gaps ranging from 0.5 mm to 1.5 mm. Since armature and field systems are composed of materials that have high permeability, most of the m.m.f. of field coils is required to set up flux in the air gap. By reducing the length of air gap, we can reduce the size of field coils (i.e. number of turns)
(ii) Armature core The armature core is keyed to the machine shaft and rotates between the field poles. It consists of slotted soft-iron laminations (about 0.4 to 0.6 mm thick) that are stacked to form a cylindrical core as shown in Fig (1.9). The laminations (See Fig. 1.10) are individually coated with a thin insulating film so that they do not come in electrical contact with each other. The purpose of laminating the core is to reduce the eddy current loss. The laminations are slotted to
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE accommodate and provide mechanical security to the armature winding and to give shorter air gap for the flux to cross between the pole face and the armature “teeth”.
Fig.
(iii) Armature winding The slots of the armature core hold insulated conductors that are connected in a suitable manner. This is known as armature winding. This is the winding in which “working” e.m.f. is induced. The armature conductors are connected in series-parallel; the conductors being connected in series so as to increase the voltage and in parallel paths so as to increase the current. The armature winding of a d.c. machine is a closed-circuit winding; the conductors being connected in a symmetrical manner forming a closed loop or series of closed loops.
(iv) Commutator A commutator is a mechanical rectifier which converts the alternating voltage generated in the armature winding into direct voltage across the brushes. The commutator is made of copper segments insulated from each other by mica sheets and mounted on the shaft of the machine (See Fig 1.11). The armature conductors are soldered to the commutator segments in a suitable manner to give rise to the armature winding. Depending upon the manner in which the armatureconductors are connected to the commutator segments, there are two types ofarmature winding in a d.c. machine viz., (a) lap winding (b) wave winding.
.
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(v) Brushes The purpose of brushes is to ensure electrical connections between the rotating commutator and stationary external load circuit. The brushes are made of carbon and rest on the commutator. The brush pressure is adjusted by means of adjustable springs (See Fig. 1.12). If the brush pressure is very large, the friction produces heating of the commutator and the brushes. On the other hand, if it is too weak, the imperfect contact with the commutator may produce sparking.
Multipole machines have as many brushes as they have poles. For example, a 4- pole machine has 4 brushes. As we go round the commutator, the successive brushes have positive and negative polarities. Brushes having the same polarityare connected together so that we have two terminals viz., the +ve terminal and the ve terminal.
E.M.F. Equation of a D.C. Generator We shall now derive an expression for the e.m.f. generated in a d.c. generator.
Let = flux/pole in Wb Z = total number of armature conductors P = number of poles A = number of parallel paths = 2 ... for wave winding = P ... for lap winding N = speed of armature in r.p.m. Eg = e.m.f. of the generator = e.m.f./parallel path Flux cut by one conductor in one revolution of the armature,
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE d= Pwebers Time taken to complete one revolution, dt = 60/N second e.m.f. of generator, Eg = e.m.f. per parallel path
= (e.m.f/conductor) No. of conductors in series per parallel path
Types of D.C. Generators The magnetic field in a d.c. generator is normally produced by electromagnets rather than permanent magnets. Generators are generally classified according to their methods of field excitation. On this basis, d.c. generators are divided into the following two classes: (i) Separately excited d.c. generators (ii) Self-excited d.c. generators The behaviour of a d.c. generator on load depends upon the method of field excitation adopted.
Separately Excited D.C. Generators A d.c. generator whose field magnet winding is supplied from an independent external d.c. source (e.g., a battery etc.) is called a separately excited generator. Fig. (1.32) shows the connections of a separately excited generator. The voltage output depends upon the speed of rotation of armature and the field current (Eg =PZN/60 A). The greater the speed and field current, greater is the generated e.m.f. It may be noted that separately excited d.c. generators are rarely used in practice. The d.c. generators are normally of self-excited type.
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Armature current, Ia = IL
Terminal voltage, V = Eg IaRa Electric power developed = EgIa
Power delivered to load = aEgIa I R I E I R VI
Self-Excited D.C. Generators A d.c. generator whose field magnet winding is supplied current from the output of the generator itself is called a self-excited generator. There are three types of self-excited generators depending upon the manner in which the field winding is connected to the armature, namely; (i) Series generator; (ii) Shunt generator; (iii) Compound generator
Series generator In a series wound generator, the field winding is connected in series witharmature winding so that whole armature current flows through the field winding as well as the load. Fig. (1.33) shows the connections of a series wound generator. Since the field winding carries the whole of load current, it has a few turns of thick wire having low resistance. Series generators are rarely used except for special purposes e.g., as boosters. Armature current, Ia = Ise = IL = I(say)
Terminal voltage, V = EG I(Ra + Rse) Power developed in armature = EgIa
Power delivered to load = EgIa I R R I E I R R VI or VI
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(ii) Shunt generator In a shunt generator, the field winding is connected in parallel with the armature winding so that terminal voltage of the generator is applied across it. The shunt field winding has many turns of fine wire having high resistance. Therefore, only a part of armature current flows through shunt field winding and the rest flows through the load. Fig. (1.34) shows the connections of a shunt-wound generator. Shunt field current, Ish = V/Rsh Armature current, Ia = IL + Ish
Terminal voltage, V = Eg IaRa Power developed in armature = EgIa Power delivered to load = VIL
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(iii) Compound generator In a compound-wound generator, there are two sets of field windings on each pole—one is in series and the other in parallel with the armature. A compound wound generator may be: (a) Short Shunt in which only shunt field winding is in parallel with the armature winding [See Fig. 1.35 (i)]. (b) Long Shunt in which shunt field winding is in parallel with both series field and armature winding [See Fig. 1.35 (ii)].
Short shunt Series field current, Ise = IL Shunt field current I sh=V+IseRse / Rsh
Terminal voltage, V = Eg IaRa IseRse Power developed in armature = EgIa Power delivered to load = VIL
Long shunt Series field current, Ise = Ia = IL + Ish Shunt field current, Ish = V/Rsh
Terminal voltage, V = Eg Ia(Ra + Rse) Power developed in armature = EgIa Power delivered to load = VIL
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D.C. Motor- Principle A machine that converts d.c. power into mechanical power is known as a d.c. motor. Its operation is based on the principle that when a current carrying conductor is placed in a magnetic field, the conductor experiences a mechanical force. The direction of this force is given by Fleming’s left hand rule and magnitude is given by; F BIl newtons Basically, there is no constructional difference between a d.c. motor and a d.c.generator. The same d.c. machine can be run as a generator or motor.
Working of D.C. Motor Consider a part of a multipolar d.c. motor as shown in Fig. (4.1). When the terminals of the motor are connected to an external source of d.c. supply: (i) the field magnets are excited developing alternate N and S poles; (ii) the armature conductors carry ^currents. All conductors under N-pole carry currents in one direction while all the conductors under S-pole carry currents in the opposite direction. Suppose the conductors under N-pole carry currents into the plane of the paper and those under S-pole carry currents out of the plane of the paper as shown in Fig.(4.1). Since each armature conductor is carrying current and is placed in the magnetic field, mechanical force acts on it.Referring to Fig. (4.1) and applyingFleming’s left hand rule, it is clear that force on each conductor is tending to rotate thearmature in anticlockwise direction. All theseforces add together to produce a drivingtorque which sets the armature rotating.When the conductor moves from one side of a brush to the other, thcurrent in that conductor is reversed and at the same time it comes under the influence of next pole which is of opposite polarity. Consequently, the direction of force on the conductor remains the same.
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Back or Counter E.M.F. When the armature of a d.c. motor rotates under the influence of the driving torque, the armature conductors move through the magnetic field and hence e.m.f. is induced in them as in a generator The induced e.m.f. acts in opposite direction to the applied voltage V(Lenz’s law) and in known as back or counter e.m.f. Eb. The back e.m.f. Eb(= P ZN/60 A) is always less than the applied voltage V, although this difference is small when the motor is running under normal conditions. Consider a shunt wound motor shown in Fig. (4.2). When d.c. voltage V is applied across the motor terminals, the field magnets are excited and armature conductors are supplied with current. Therefore, driving torque acts on the armature which begins to rotate. As the armature rotates, back e.m.f.Eb is induced which opposes the applied voltage V. The applied voltage V has to force current through the armature against the back e.m.f. Eb. The electric work done in overcoming and causing the current to flow against Eb is converted into mechanical energy developed in the armature. It follows, therefore, that energy conversion in a d.c. motor is only possible due to the production of back e.m.f. Eb.
Net voltage across armature circuit = V Eb If Ra is the armature circuit resistance, then,Ia = V- Eb /Ra Since V and Ra are usually fixed, the value of Eb will determine the current drawn by the motor. If the speed of the motor is high, then back e.m.f. Eb (= P ZN/60 A) is large and hence the motor will draw less armature current and viceversa.
Voltage Equation of D.C. Motor Let in a d.c. motor (See Fig. 4.3), V = applied voltage Eb = back e.m.f. Ra = armature resistance Ia = armature current Since back e.m.f. Eb acts in opposition to the
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applied voltage V, the net voltage across the armature circuit is VEb. The armature current Ia is given by Ia =V –Eb /Ra or v= Eb +IaRa This is known as voltage equation of the d.c. motor.
Power Equation If Eq.(i) above is multiplied by ly throughout, we get,
2 VIa EbIa Ia Ra This is known as power equation of the d.c. motor. VIa = electric power supplied to armature (armature input) EbIa = power developed by armature (armature output) I a2Ra = electric power wasted in armature (armature Cu loss) Thus out of the armature input, a small portion (about 5%) is wasted as a I Rand the remaining portion EbIa is converted into mechanical power within the armature.
Types of D.C. Motors Like generators, there are three types of d.c. motors characterized by the connections of field winding in relation to the armature viz.:
(i) Shunt-wound motor in which the field winding is connected in parallelwith the armature [See Fig. 4.4]. The current through the shunt field winding is not the same as the armature
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(ii) Series-wound motor in which the field winding is connected in series with the armature [See Fig. 4.5]. Therefore, series field winding carries the armature current. Since the current passing through a series field winding is the same as the armature current, series field windings must be designed with much fewer turns than shunt field windings for the same m.m.f. Therefore, a series field winding has a relatively small number of turns ofthick wire and, therefore, will possess a low resistance. (iii) Compound-wound motor which has two field windings; one connected in parallel with the armature and the other in series with it. There are two types of compound motor connections (like generators). When the shunt field winding is directly connected across the armature
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The compound machines (generators or motors) are always designed so that the flux produced by shunt field winding is considerably larger than the flux produced by the series field winding. Therefore, shunt field in compound machines is the basic dominant factor in the production of the magnetic field in the machine.
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Applications of D.C. Motors 1. Shunt motors The characteristics of a shunt motor reveal that it is an approximately constant speed motor. It is, therefore, used (i) where the speed is required to remain almost constant from no-load to full-load (ii) where the load has 10 be driven at a number of speeds and any one of which is required to remain nearly constant Industrial use: Lathes, drills, boring mills, shapers, spinning and weaving machines etc.
2. Series motors It is a variable speed motor i.e., speed is low at high torque and vice-versa.However, at light or no-load, the motor tends to attain dangerously high speed. The motorhas a high starting torque. It is, therefore, used(i) where large starting torque is required e.g., in elevators and electric Traction (ii) where the load is subjected to heavy fluctuations and the speed isautomatically required to reduce at high torques and vice-versa Industrial use: Electric traction, cranes, elevators, air compressors, vacuum cleaners, hair drier, sewing machines etc.
3. Compound motors Differential-compound motors are rarely used because of their poor torque characteristics. However, cumulative-compound motors are used where a fairly constant speed is required with irregular loads or suddenly applied heavy loads. Industrial use: Presses, shears, reciprocating machines etc.
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UNIT III DIGITAL ELECTRONICS
Binary number system: The operation of a digital system is controlled by logic gates .In this chapter , we shall study various logic gates , namely NOT , OR ,AND ,NAND ,NOR and EX –OR.The term combinational logic is used for combining two or more basic logic gates to form a required function where the output at a given time depends only on the input. In base 10 , the decimal numbers are : 0,1,2,3,4,5,6,7,8 and 9.To represent numbers greater dhan 9 , the digits are arranged by columns on the left of a decimal point each column having a different weight or multiplying factor in different powers of 10 according to
n n-1 2 1 0 dndn-1 ….. d2d1d0 = dn10 + d n-110 + ….. +d210 +d110 +d010 where each digit di is one of the 10 symbols. As an example ,
3 2 1 0 5376 10 = 5* 10 +3 *10 +7 * 10 +6 * 10
For fractional numbers (number less dhan 1 ) may also be included if digits for negative powers of 10 are included.
For example ,
3 2 1 0 -1 -2 4527 .38 10 = 4 *10 +5 *10 +2*10 +7*10 +3 *10 +8 *10
The binary number system is the most important one in the digital system .”Binary “ means “two” .The binary number system uses only two digits 0 and 1 , in contrast to 10 digits of the decimal system.These two digits are termed binary digits .The base or the digital system is 2.The digits in a binary system correspond to different powers of the base 2.A binary number can be expressed as ,
n n-1 2 1 0 dndn-1 ….. d2d1d0 = dn2 + d n-12 + ….. +d22 +d12 +d02 where each di is one of the two symbols 0 and 1.
For example 3 2 1 0 1011 2 = 1 *2 +0*2 +1 *2 +1 *2 = 8 + 0 +2+1 = 11 10
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In a binary number system , the first or the left most bit is known as the most significant bit (MSB) .since it represents they largest power of 2.The last or the right most bit is known as least significant bit (LSB) .Since it represents the smallest power 2.
LOGIC GATES:
The simplest digital signals are binary signals having two levels .The two levels may be defined arbitrarily to any set of two values of voltage,but the signal is confined to these two values only .On and Off state off electronics devices like diode ,BJT and MOS are a very convenient way of setting up the binary signals. Logis gates are digital devices that convert binary inputs into binary outputs based on the rule of mathematical logic operations.These devices are called gates because they control the flow signals from the inputs to the single output .There are three basic logic operations namely , OR ,AND and NOT .Other logic operations such sa NOR ,NAND and XOR are realized from the basic logic operations.In these logic operations each combination of the input variable will give an outout depending on the operations.The statement of input and output is presented in tabular form and is called the truth table.
. AND gate
The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are high. A dot (.) is used to show the AND operation i.e. A.B. Bear in mind that this dot is sometimes omitted i.e. AB
OR gate
The OR gate is an electronic circuit that gives a high output (1) if one or more of its inputs are high. A plus (+) is used to show the OR operation.
NOT gate
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The NOT gate is an electronic circuit that produces an inverted version of the input at its output. It is also known as an inverter. If the input variable is A, the inverted output is known as NOT A. This is also shown as A', or A with a bar over the top, as shown at the outputs. The diagrams below show two ways that the NAND logic gate can be configured to produce a NOT gate. It can also be done using NOR logic gates in the same way.
NAND gate
This is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The outputs of all NAND gates are high if any of the inputs are low. The symbol is an AND gate with a small circle on the output. The small circle represents inversion.
NOR gate
This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The outputs of all NOR gates are low if any of the inputs are high. The symbol is an OR gate with a small circle on the output. The small circle represents inversion.
EXOR gate
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The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both, of its two inputs are high. An encircled plus sign ( ) is used to show the EOR operation.
EXNOR gate
The 'Exclusive-NOR' gate circuit does the opposite to the EOR gate. It will give a low output if either, but not both, of its two inputs are high. The symbol is an EXOR gate with a small circle on the output. The small circle represents inversion.
The NAND and NOR gates are called universal functions since with either one the AND and OR functions and NOT can be generated.
Note:
A function in sum of products form can be implemented using NAND gates by replacing all AND and OR gates by NAND gates.
A function in product of sums form can be implemented using NOR gates by replacing all AND and OR gates by NOR gates.
Table 1: Logic gate symbols
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Table 2 is a summary truth table of the input/output combinations for the NOT gate together with all possible input/output combinations for the other gate functions. Also note that a truth table with 'n' inputs has 2n rows. You can compare the outputs of different gates.
Table 2: Logic gates representation using the Truth table
BOOLEAN ALGEBRA: Boolean algebra involves the binary digits 1 or 0 , and it differs from the rules of ordinary algebra.There are no negative or fractional numbers.The two Boolean variables true or false , may be represented by on and off states of electronic switching circuits.The algebraic operations on the two variables of Boolean algebra are limited to these defined as AND , OR and NOT. BOOLEAN LAWS: Various Boolean laws help us simplify logic expressions and logic circuits.In the foolowing theorems A,B, C are input logic variables , which can be either 0 ar 1. The output logic variable is represented by Y.
Complementation Laws (NOT laws)
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In Boolean algebra , the NOT laws can be written as , Complement of 0 is 1 : 0 = 1 Complement of 1 is 0 : 1 = 0 Double complement of a variable equals the variable : A = A
AND Laws:
In Boolean algebra , the AND laws can be expressed as a variable AND ed with 0 equal 0 ; A. .0 =0 A variable AND ed with 1 equals the variable : A .1 = A A variable AND ed with itself equals the variables : A.A =A A variable AND ed with its complement produces 0 : A.A =0
OR Laws :
In Boolean algebra , OR Laws can be expressed as , A variable OR ed with 1 equals 1 : A + 1 =1 A variable OR ed with 0 equals with variables : A +0 =1. A variable OR ed with itself equals the variables: A+A = A A variable OR ed with its complement equals 1 : A+ A =1
Commutative Laws Law 1: In a two – input OR gate , The input signals can be transpored without changing the output . In Boolean algebra ,
A +B = B +A The above equation predicts that adding A and B will produce the same result as by adding B and A .
Law 2 : In a two input AND gate , the input signals can be transposed without affecting the output .In Boolean algebra ,
A.B = B.A
The above equation shows that multipliying A and B will give same results as by multiplying B and A.
Associative Laws:
The associative law states that logical elements may be grouped in any combination provided the same sign connects them. The associative law for OR operation as
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A+ (B+C ) = (A + B)+C Similarly , the associative law for AND operation as, A.(B.C )= (A.B).C
Distribuitive Laws:
The distribuitive law states the expression can be expanded by multiplying terms as in ordinary algebra .thus , A.(B+C ) = A..B +A.C
The rules of Boolean Algebra are:. AND Operations (·) 0·0 = 0 A·0 = 0 1·0 = 0 A·1 = A 0·1 = 0 A·A = A 1·1 = 1 A·A' = 0 OR Operations (+) 0+0 = 0 A+0 = A 1+0 = 1 A+1 = 1 0+1 = 1 A+A = A 1+1 = 1 A+A' = 1 NOT Operations (') 0' = 1 A'' = A 1' = 0 Associative Law (A·B)·C = A·(B·C) = A·B·C (A+B)+C = A+(B+C) = A+B+C Distributive Law A·(B+C) = (A·B) + (A·C) A+(B·C) = (A+B) · (A+C) Commutative Law A·B = B·A A+B = B+A Precedence AB = A·B A·B+C = (A·B) + C A+B·C = A + (B·C) DeMorgan's Theorem (A·B)' = A' + B' (NAND) (A+B)' = A' · B' (NOR)
Simplification of Boolean Functions Since there are an infinite variety of boolean functions of n variables, but only a finitenumber of unique boolean functions of those n variables, you might wonder if there is some method that will simplify a given boolean function to produce the optimal form. Of course, you can always use algebraic transformations to produce the optimal form, but using heuristics does not guarantee an optimal transformation. There are, however, twomethods that will reduce a given boolean function to its optimal form: the map method and the prime implicants method. In this text we will only cover the mapping method, see any text on logic design for other
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE methods.Since for any logic function some optimal form must exist, you may wonder why we don’t use the optimal form for the canonical form. There are two reasons. First, there may be several optimal forms. They are not guaranteed to be unique. Second, it is easy to convert between the canonical and truth table forms. Using the map method to optimize boolean functions is practical only for functions of two, three, or four variables. With care, you can use it for functions of five or six variables, but the map method is cumbersome to use at that point. For more than six variables, attempting map simplifications by hand would not be wise1.The first step in using the map method is to build a two-dimensional truth table for the function
Half and Full Adders
From basic gates, we will develop a full adder circuit that adds two binary numbers. Consider adding two 2-bit binary numbers and . , where is the carry bit. The truth table for all combinations of and is shown in table
Table 7.5: The binary addition of two 2-bit numbers. The column.
From the truth table
The mechanization of these two equation is shown in figure
Figure 7.7: A mechanization of the half adder using an EOR and an AND gate.
This circuit is known as the half adder. It can not handle the addition of any two arbitrary numbers because it does not allow the input of a carry bit from the addition of two previous digits. A circuit that can handle these three inputs can perform the addition of any two binary numbers.
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The truth table for three input variables is shown in figure
Figure 7.8: The binary addition of two 2-bit numbers. The column.
From the truth table
This is known as majority logic. And a majority detector is shown in figure
Figure 7.9: A mechanization of the majority detector.
The following device is known as a full adder and is able to add three single bits of information and return the sum bit and a carry-out bit.
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Figure 7.10: The full adder mechanization.
The circuit shown in figure is able to add any two numbers of any size. The inputs are and , and the output is .
Figure : A circuit capable of adding two 3-bit numbers.
Example: If the input to the circuit in figure is written as a number ABCD, write the nine numbers that will yield a true Q.
Figure: A typical logic function.
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Table 7.6: The truth table for the typical logic function example.
ABCD=(2,3,6,7,11,12,13,14,15) gives Q true.
Example: Using the 2's complement convention, the 3-bit number ABC can represent the numbers from -3 to 3 as shown in table . Assuming that A, B, C and are available as inputs, the goal is to devise a circuit that will yield a 2-bit output EF that is the absolute value of the ABC number. You have available only two- and three-input AND and OR gates.
1. Fill a truth table with the ABC and EF bits.
The truth table is shown in table
Table 7.7: Truth table with for the ABC and EF bits.
2. Write a Boolean algebra expression for E and for F.
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3. Mechanize these expressions.
The mechanized expressions are shown in figure
Figure : Mechanization for the ABC and EF bits.
Example: Suppose that the 2-bit binary number AB must be transmitted between devices in a noisy environment. To reduce undetected errors introduced by the transmission, an extra bit P is often included to add redundancy to the information. Assume that P is set true or false as needed to make an odd number of true bits in the resulting 3-bit number ABP. When the number is received, logic circuits are required to generate an error signal E whenever the odd number of bits condition is not met.
1. Develop a truth table of E in terms of A, B and P.
The truth table is shown in table
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Table 7.8: Truth table for E in terms of A, B and P.
2. Write a Boolean expression for E as determined directly from the truth table.
3. Using De Morgan's theorem twice, reduce this expression to one EOR and one NEOR operation. (This is very similar to the half-adder problem.)
Figure 7.14: Mechanization for E.
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FLIP FLOPS :
In digital circuits, a flip-flop is a term referring to an electronic circuit (a bistable multivibrator) that has two stable states and thereby is capable of serving as one bit of memory. Today, the term flip-flop has come to mostly denote non-transparent (clocked or edge-triggered) devices, while the simpler transparent ones are often referred to as latches; however, as this distinction is quite new, the two words are sometimes used interchangeably (see history).A flip- flop is usually controlled by one or two control signals and/or a gate or clock signal. The output often includes the complement as well as the normal output. As flip-flops are implemented electronically, they require power and ground connections.
JK FLIP FLOP
If the Q output is a logic 1 (the flip-flop is in the "Set" state), the S input can't make it any more set than it already is. Therefore, we can disable the S input without disabling the flip- flop under these conditions. In the same way, if the Q output is logic 0 (the flip-flop is Reset), the R input can be disabled without causing any harm. If we can accomplish this without too much trouble, we will have solved the problem of the "race" condition. The circuit below shows the solution. To the RS flip-flop we have added two new connections from the Q and Q' outputs back to the original input gates. Remember that a NAND gate may have any number of inputs, so this causes no trouble. To show that we have done this, we change the designations of the logic inputs and of the flip-flop itself. The inputs are now designated J (instead of S) and K (instead of R). The entire circuit is known as a JK flip-flop. Since one of the two logic inputs is always disabled according to the output state of the overall flip-flop, the master latch cannot change state back and forth while the CLK input is at logic 1. Instead, the enabled input can change the state of the master latch once, after which this latch will not change again. This was not true of the RS flip-flop.
(a) Logic diagram
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(b) Graphical symbol
(c) Transition table
Figure. Clocked JK flip-flop
If both the J and K inputs are held at logic 1 and the CLK signal continues to change, the Q and Q' outputs will simply change state with each falling edge of the CLK signal. (The master latch circuit will change state with each rising edge of CLK.) We can use this characteristic to advantage in a number of ways. A flip-flop built specifically to operate this way is typically designated as a T (for Toggle) flip-flop. The lone T input is in fact the CLK input for other types of flip-flops.
The JK flip-flop must be edge triggered in this manner. Any level-triggered JK latch circuit will oscillate rapidly if all three inputs are held at logic 1. This is not very useful. For the same reason, the T flip-flop must also be edge triggered. For both types, this is the only way to ensure that the flip-flop will change state only once on any given clock pulse.
NOTE: The flip-flop is positive-edge triggered (rising clock pulse) as seen in the timing diagram.
A circuit symbol for a JK flip-flop, where > is the clock input, J and K are data inputs, Q is the stored data output, and Q' is the inverse of Q
The characteristic equation of the JK flip-flop is:
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D flip-flop
The D flip-flop is the most common flip-flop in use today.The Q output always takes on the state of the D input at the moment of a rising clock edge It is called the D flip-flop for this reason, since the output takes the value of the D input or Data input, and Delays it by one clock count. The D flip-flop can be interpreted as a primitive memory cell, zero-order hold, or delay line. Whenever the clock pulses, the value of Qnext is D and Qprev otherwise.
Truth table:
These flip-flops are very useful, as they form the basis for shift registers, which are an essential part of many electronic devices. The advantage of the D flip-flop over the D-type latch is that it "captures" the signal at the moment the clock goes high, and subsequent changes of the data line do not influence Q until the next rising clock edge. An exception is that some flip-flops have a "reset" signal input, which will reset Q (to zero), and may be either asynchronous or synchronous with the clock.The above circuit shifts the contents of the register to the right, one bit position on each active transition of the clock. The input X is shifted into the leftmost bit position.The edge-triggered D flip-flop is easily derived from its RS counterpart. The only requirement is to replace the R input with an inverted version of the S input, which thereby becomes D. This is only needed in the master latch section; the slave remains unchanged.
One essential point about the D flip-flop is that when the clock input falls to logic 0 and the outputs can change state, the Q output always takes on the state of the D input at the moment of the clock edge. This was not true of the RS and JK flip-flops. The RS master section would repeatedly change states to match the input signals while the clock line is logic 1, and the Q output would reflect whichever input most recently received an active signal. The JK master section would receive and hold an input to tell it to change state, and never change that state until the next cycle of the clock. This behavior is not possible with a D flip-flop.
The edge-triggered D NAND flip-flop is shown below.
(a) Logic diagram with NAND gates
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(b) Graphical symbol
(c) Transition table
Figure 5. Clocked D flip-flop
Master–slave (pulse-triggered) D flip-flop
A master–slave D flip-flop is created by connecting two gated D latches in series, and inverting the enable input to one of them. It is called master–slave because the second latch in the series only changes in response to a change in the first (master) latch.
The term pulse-triggered means that data is entered on the rising edge of the clock pulse, but the output does not reflect the change until the falling edge of the clock pulse.
A master–slave D flip-flop. It responds on the negative edge of the enable input (usually a clock).
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For a positive-edge triggered master–slave D flip-flop, when the clock signal is low (logical 0) the "enable" seen by the first or "master" D latch (the inverted clock signal) is high (logical 1). This allows the "master" latch to store the input value when the clock signal transitions from low to high. As the clock signal goes high (0 to 1) the inverted "enable" of the first latch goes low (1 to 0) and the value seen at the input to the master latch is "locked". Nearly simultaneously, the twice inverted "enable" of the second or "slave" D latch transitions from low to high (0 to 1) with the clock signal. This allows the signal captured at the rising edge of the clock by the now "locked" master latch to pass through the "slave" latch. When the clock signal returns to low (1 to 0), the output of the "slave" latch is "locked", and the value seen at the last rising edge of the clock is held while the "master" latch begins to accept new values in preparation for the next rising clock edge.
An implementation of a master–slave D flip-flop that is triggered on the positive edge of the clock
By removing the leftmost inverter in the above circuit, a D-type flip flop that strobes on the falling edge of a clock signal can be obtained. This has a truth table like this:
SR FLIP FLOP
The fundamental latch is the simple SR flip-flop (also commonly known as RS flip-flop), where S and R stand for set and reset, respectively. It can be constructed from a pair of cross- coupled NAND or NOR logic gates. The stored bit is present on the output marked Q.
Normally, in storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S is pulsed high while R is held low, then the Q output is forced high, and stays high even after S returns low; similarly, if R is pulsed high while S is held low, then the Q output is forced low, and stays low even after R returns low.
The next-state equation of the SR flip-flop is
where Q is the current state .Qnext becomes Q (the stored value) at clock edge.
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T flip-flops
If the T input is high, the T flip-flop changes state ("toggles") whenever the clock input is strobed. If the T input is low, the flip-flop holds the previous value. This behavior is described by the characteristic equation:
(or, without benefit of the XOR operator, the equivalent: )
(a) Logic diagram
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(b) Graphical symbol
(c) Transition table
Figure . Clocked T flip-flop
Basic Flip-Flop
i. Draw the logic circuit for an unclocked NOR gate flip-flop. ii. Enter the expected timing diagram for signals Q and Q' in Figure
Figure 13. NOR gate flip-flop timing diagram iii. Draw the logic circuit for an unclocked NAND gate flip-flop. iv. Enter the expected timing diagram for signals Q and Q' in Figure
Figure 14. NAND gate flip-flop timing diagram
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REGISTERS :
A register is a set of elements and is used to hold information until it is needed. It can be implemented by a set of flip flops.If the output of each flip flop is connected.to the output of the adjacent flip flop , then the circuit is called a shift registers.Each flip flop stores a binary signal that is from 0 to 1and thus a flip flop is a one bit storage element or a one bit register.It should be possible to store n bits of data using n flip flops.This category of registers is called memory registers.
They are 1.Serial – in serial –out (SISO) 2.Serial – in parallel – out (SIPO) 3.Parallel – in serial – out(PISO) 4.Parallel – in parallel –out (PIPO)
1.Serial – in serial –out (SISO)
Serial-in, serial-out shift registers delay data by one clock time for each stage. They will store a bit of data for each register. A serial-in, serial-out shift register may be one to 64 bits in length, longer if registers or packages are cascaded. Below is a single stage shift register receiving data which is not synchronized to the register clock. The "data in" at the D pin of the type D FF (Flip-Flop) does not change levels when the clock changes for low to high. We may want to synchronize the data to a system wide clock in a circuit board to improve the reliability of a digital logic circuit.
The obvious point (as compared to the figure below) illustrated above is that whatever "data in" is present at the D pin of a type D FF is transfered from D to output Q at clock time. Since our example shift register uses positive edge sensitive storage elements, the output Q follows the D
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE input when the clock transitions from low to high as shown by the up arrows on the diagram above. There is no doubt what logic level is present at clock time because the data is stable well before and after the clock edge. This is seldom the case in multi-stage shift registers. But, this was an easy example to start with. We are only concerned with the positive, low to high, clock edge. The falling edge can be ignored. It is very easy to see Q follow D at clock time above. Compare this to the diagram below where the "data in" appears to change with the positive clock edge.
Since "data in" appears to changes at clock time t1 above, what does the type D FF see at clock time? The short over simplified answer is that it sees the data that was present at D prior to the clock. That is what is transfered to Q at clock time t1. The correct waveform is QC. At t1 Q goes to a zero if it is not already zero. The D register does not see a one until time t2, at which time Q goes high.
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Since data, above, present at D is clocked to Q at clock time, and Q cannot change until the next clock time, the D FF delays data by one clock period, provided that the data is already synchronized to the clock. The QA waveform is the same as "data in" with a one clock period delay.
A more detailed look at what the input of the type D Flip-Flop sees at clock time follows. Refer to the figure below. Since "data in" appears to changes at clock time (above), we need further information to determine what the D FF sees. If the "data in" is from another shift register stage, another same type D FF, we can draw some conclusions based on data sheet information. Manufacturers of digital logic make available information about their parts in data sheets, formerly only available in a collection called a data book. Data books are still available; though, the manufacturer's web site is the modern source.
The following data was extracted from the CD4006b data sheet for operation at 5VDC, which serves as an example to illustrate timing.
[*]
tS=100ns tH=60ns tP=200-400ns typ/max tS is the setup time, the time data must be present before clock time. In this case data must be present at D 100ns prior to the clock. Furthermore, the data must be held for hold time tH=60ns after clock time. These two conditions must be met to reliably clock data from D to Q of the Flip-Flop.
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There is no problem meeting the setup time of 60ns as the data at D has been there for the whole previous clock period if it comes from another shift register stage. For example, at a clock frequency of 1 Mhz, the clock period is 1000 µs, plenty of time. Data will actually be present for 1000µs prior to the clock, which is much greater than the minimum required tS of 60ns.
The hold time tH=60ns is met because D connected to Q of another stage cannot change any faster than the propagation delay of the previous stage tP=200ns. Hold time is met as long as the propagation delay of the previous D FF is greater than the hold time. Data at D driven by another stage Q will not change any faster than 200ns for the CD4006b.
To summarize, output Q follows input D at nearly clock time if Flip-Flops are cascaded into a multi-stage shift register.
Three type D Flip-Flops are cascaded Q to D and the clocks paralleled to form a three stage shift register above.
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SERIAL IN PARALLEL OUT:
A serial-in/parallel-out shift register is similar to the serial-in/ serial-out shift register in that it shifts data into internal storage elements and shifts data out at the serial-out, data-out, pin. It is different in that it makes all the internal stages available as outputs. Therefore, a serial- in/parallel-out shift register converts data from serial format to parallel format. If four data bits are shifted in by four clock pulses via a single wire at data-in, below, the data becomes available simultaneously on the four Outputs QA to QD after the fourth clock pulse.
The practical application of the serial-in/parallel-out shift register is to convert data from serial format on a single wire to parallel format on multiple wires. Perhaps, we will illuminate four LEDs (Light Emitting Diodes) with the four outputs (QA QB QC QD ).
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The above details of the serial-in/parallel-out shift register are fairly simple. It looks like a serial-in/ serial-out shift register with taps added to each stage output. Serial data shifts in at SI (Serial Input). After a number of clocks equal to the number of stages, the first data bit in appears at SO (QD) in the above figure. In general, there is no SO pin. The last stage (QD above) serves as SO and is cascaded to the next package if it exists.
If a serial-in/parallel-out shift register is so similar to a serial-in/ serial-out shift register, why do manufacturers bother to offer both types? Why not just offer the serial-in/parallel-out shift register? They actually only offer the serial-in/parallel-out shift register, as long as it has no more than 8-bits. Note that serial-in/ serial-out shift registers come in gigger than 8-bit lengths of 18 to to 64-bits. It is not practical to offer a 64-bit serial-in/parallel-out shift register requiring that many output pins. See waveforms below for above shift register.
PARALLEL IN SERIAL OUT :
Parallel-in/ serial-out shift registers do everything that the previous serial-in/ serial-out shift registers do plus input data to all stages simultaneously. The parallel-in/ serial-out shift register stores data, shifts it on a clock by clock basis, and delays it by the number of stages times the clock period. In addition, parallel-in/ serial-out really means that we can load data in parallel into all stages before any shifting ever begins. This is a way to convert data from a parallel format to a serial format. By parallel format we mean that the data bits are present simultaneously on individual wires, one for each data bit as shown below. By serial format we mean that the data bits are presented sequentially in time on a single wire or circuit as in the case of the "data out" on the block diagram below.
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Below we take a close look at the internal details of a 3-stage parallel-in/ serial-out shift register. A stage consists of a type D Flip-Flop for storage, and an AND-OR selector to determine whether data will load in parallel, or shift stored data to the right. In general, these elements will be replicated for the number of stages required. We show three stages due to space limitations. Four, eight or sixteen bits is normal for real parts.
Above we show the parallel load path when SHIFT/LD' is logic low. The upper NAND gates serving DA DB DC are enabled, passing data to the D inputs of type D Flip-Flops QA QB DC respectively. At the next positive going clock edge, the data will be clocked from D to Q of the three FFs. Three bits of data will load into QA QB DC at the same time.
The type of parallel load just described, where the data loads on a clock pulse is known as synchronous load because the loading of data is synchronized to the clock. This needs to be differentiated from asynchronous load where loading is controlled by the preset and clear pins of the Flip-Flops which does not require the clock. Only one of these load methods is used within an individual device, the synchronous load being more common in newer devices.
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The shift path is shown above when SHIFT/LD' is logic high. The lower AND gates of the pairs feeding the OR gate are enabled giving us a shift register connection of SI to DA , QA to DB , QB to DC , QC to SO. Clock pulses will cause data to be right shifted out to SO on successive pulses.
The waveforms below show both parallel loading of three bits of data and serial shifting of this data. Parallel data at DA DB DC is converted to serial data at SO.
What we previously described with words for parallel loading and shifting is now set down as waveforms above. As an example we present 101 to the parallel inputs DAA DBB DCC.
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Next, the SHIFT/LD' goes low enabling loading of data as opposed to shifting of data. It needs to be low a short time before and after the clock pulse due to setup and hold requirements. It is considerably wider than it has to be. Though, with synchronous logic it is convenient to make it wide. We could have made the active low SHIFT/LD' almost two clocks wide, low almost a clock before t1 and back high just before t3. The important factor is that it needs to be low around clock time t1 to enable parallel loading of the data by the clock.
Note that at t1 the data 101 at DA DB DC is clocked from D to Q of the Flip-Flops as shown at QA QB QC at time t1. This is the parallel loading of the data synchronous with the clock.
Now that the data is loaded, we may shift it provided that SHIFT/LD' is high to enable shifting, which it is prior to t2. At t2 the data 0 at QC is shifted out of SO which is the same as the QC waveform. It is either shifted into another integrated circuit, or lost if there is nothing connected to SO. The data at QB, a 0 is shifted to QC. The 1 at QA is shifted into QB. With "data in" a 0, QA becomes 0. After t2, QA QB QC = 010.
After t3, QA QB QC = 001. This 1, which was originally present at QA after t1, is now present at SO and QC. The last data bit is shifted out to an external integrated circuit if it exists. After t4 all data from the parallel load is gone. At clock t5 we show the shifting in of a data 1 present on the SI, serial input.
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Why provide SI and SO pins on a shift register? These connections allow us to cascade shift register stages to provide large shifters than available in a single IC (Integrated Circuit) package. They also allow serial connections to and from other ICs like microprocessors.
PARALLEL IN PARALLEL OUT:
The purpose of the parallel-in/ parallel-out shift register is to take in parallel data, shift it, then output it as shown below. A universal shift register is a do-everything device in addition to the parallel-in/ parallel-out function.
Above we apply four bit of data to a parallel-in/ parallel-out shift register at DA DB DC DD. The mode control, which may be multiple inputs, controls parallel loading vs shifting. The mode control may also control the direction of shifting in some real devices. The data will be shifted one bit position for each clock pulse. The shifted data is available at the outputs QA QB QC QD . The "data in" and "data out" are provided for cascading of multiple stages. Though, above, we can only cascade data for right shifting. We could accommodate cascading of left-shift data by adding a pair of left pointing signals, "data in" and "data out", above.
The internal details of a right shifting parallel-in/ parallel-out shift register are shown below. The tri-state buffers are not strictly necessary to the parallel-in/ parallel-out shift register, but are part of the real-world device shown below.
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The 74LS395 so closely matches our concept of a hypothetical right shifting parallel-in/ parallel-out shift register that we use an overly simplified version of the data sheet details above. See the link to the full data sheet more more details, later in this chapter.
LD/SH' controls the AND-OR multiplexer at the data input to the FF's. If LD/SH'=1, the upper four AND gates are enabled allowing application of parallel inputs DA DB DC DD to the four FF data inputs. Note the inverter bubble at the clock input of the four FFs. This indicates that the 74LS395 clocks data on the negative going clock, which is the high to low transition. The four bits of data will be clocked in parallel from DA DB DC DD to QA QB QC QD at the next negative going clock. In this "real part", OC' must be low if the data needs to be available at the actual output pins as opposed to only on the internal FFs.
The previously loaded data may be shifted right by one bit position if LD/SH'=0 for the succeeding negative going clock edges. Four clocks would shift the data entirely out of our 4-bit shift register. The data would be lost unless our device was cascaded from QD' to SER of another device.
Above, a data pattern is presented to inputs DA DB DC DD. The pattern is loaded to QA QB QC QD . Then it is shifted one bit to the right. The incoming data is indicated by X, meaning the we do no know what it is. If the input (SER) were grounded, for example, we would know what data (0) was shifted in. Also shown, is right shifting by two positions, requiring two clocks.
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The above figure serves as a reference for the hardware involved in right shifting of data. It is too simple to even bother with this figure, except for comparison to more complex figures to follow.
Right shifting of data is provided above for reference to the previous right shifter.
If we need to shift left, the FFs need to be rewired. Compare to the previous right shifter. Also, SI and SO have been reversed. SI shifts to QC. QC shifts to QB. QB shifts to QA. QA leaves
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Above we shift the same data pattern left by one bit.
There is one problem with the "shift left" figure above. There is no market for it. Nobody manufactures a shift-left part. A "real device" which shifts one direction can be wired externally to shift the other direction. Or, should we say there is no left or right in the context of a device which shifts in only one direction. However, there is a market for a device which will shift left or right on command by a control line. Of course, left and right are valid in that context.
What we have above is a hypothetical shift register capable of shifting either direction under the control of L'/R. It is setup with L'/R=1 to shift the normal direction, right. L'/R=1 enables the multiplexer AND gates labeled R. This allows data to follow the path illustrated by
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE the arrows, when a clock is applied. The connection path is the same as the"too simple" "shift right" figure above.
Data shifts in at SR, to QA, to QB, to QC, where it leaves at SR cascade. This pin could drive SR of another device to the right.
What if we change L'/R to L'/R=0?
With L'/R=0, the multiplexer AND gates labeled L are enabled, yielding a path, shown by the arrows, the same as the above "shift left" figure. Data shifts in at SL, to QC, to QB, to QA, where it leaves at SL cascade. This pin could drive SL of another device to the left. The prime virtue of the above two figures illustrating the "shift left/ right register" is simplicity. The operation of the left right control L'/R=0 is easy to follow. A commercial part needs the parallel data loading implied by the section title. This appears in the figure below.
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Now that we can shift both left and right via L'/R, let us add SH/LD', shift/ load, and the AND gates labeled "load" to provide for parallel loading of data from inputs DA DB DC. When SH/LD'=0, AND gates R and L are disabled, AND gates "load" are enabled to pass data DA DB DC to the FF data inputs. the next clock CLK will clock the data to QA QB QC. As long as the same data is present it will be re-loaded on succeeding clocks. However, data present for only one clock will be lost from the outputs when it is no longer present on the data inputs. One solution is to load the data on one clock, then proceed to shift on the next four clocks. This problem is remedied in the 74ALS299 by the addition of another AND gate to the multiplexer.
If SH/LD' is changed to SH/LD'=1, the AND gates labeled "load" are disabled, allowing the left/ right control L'/R to set the direction of shift on the L or R AND gates. Shifting is as in the previous figures.
The only thing needed to produce a viable integrated device is to add the fourth AND gate to the multiplexer as alluded for the 74ALS299. This is shown in the next section for that part.
COUNTERS : A counter is one of the most important subsystems in a digital system .A counter is a register capable of counting the number of clock pulses arriving at its clock input.Count represents the number of clock pulses arrived.They are two types of counters .
They are 1.Synchronous counters 2.Asynchronous counters
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SYNCHRONOUS COUNTERS:
A synchronous counter, in contrast to an asynchronous counter, is one whose output bits change state simultaneously, with no ripple. The only way we can build such a counter circuit from J-K flip-flops is to connect all the clock inputs together, so that each and every flip-flop receives the exact same clock pulse at the exact same time:
Now, the question is, what do we do with the J and K inputs? We know that we still have to maintain the same divide-by-two frequency pattern in order to count in a binary sequence, and that this pattern is best achieved utilizing the "toggle" mode of the flip-flop, so the fact that the J and K inputs must both be (at times) "high" is clear. However, if we simply connect all the J and K inputs to the positive rail of the power supply as we did in the asynchronous circuit, this would clearly not work because all the flip-flops would toggle at the same time: with each and every clock pulse!
Let's examine the four-bit binary counting sequence again, and see if there are any other patterns that predict the toggling of a bit. Asynchronous counter circuit design is based on the fact that each bit toggle happens at the same time that the preceding bit toggles from a "high" to a "low" (from 1 to 0). Since we cannot clock the toggling of a bit based on the toggling of a previous bit in a synchronous counter circuit (to do so would create a ripple effect) we must find some other pattern in the counting sequence that can be used to trigger a bit toggle:
Examining the four-bit binary count sequence, another predictive pattern can be seen. Notice that just before a bit toggles, all preceding bits are "high:"
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This pattern is also something we can exploit in designing a counter circuit. If we enable each J-K flip-flop to toggle based on whether or not all preceding flip-flop outputs (Q) are "high," we can obtain the same counting sequence as the asynchronous circuit without the ripple effect, since each flip-flop in this circuit will be clocked at exactly the same time:
The result is a four-bit synchronous "up" counter. Each of the higher-order flip-flops are made ready to toggle (both J and K inputs "high") if the Q outputs of all previous flip-flops are "high." Otherwise, the J and K inputs for that flip-flop will both be "low," placing it into the
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"latch" mode where it will maintain its present output state at the next clock pulse. Since the first (LSB) flip-flop needs to toggle at every clock pulse, its J and K inputs are connected to Vcc or Vdd, where they will be "high" all the time. The next flip-flop need only "recognize" that the first flip-flop's Q output is high to be made ready to toggle, so no AND gate is needed. However, the remaining flip-flops should be made ready to toggle only when all lower-order output bits are "high," thus the need for AND gates.
To make a synchronous "down" counter, we need to build the circuit to recognize the appropriate bit patterns predicting each toggle state while counting down. Not surprisingly, when we examine the four-bit binary count sequence, we see that all preceding bits are "low" prior to a toggle (following the sequence from bottom to top):
Since each J-K flip-flop comes equipped with a Q' output as well as a Q output, we can use the Q' outputs to enable the toggle mode on each succeeding flip-flop, being that each Q' will be "high" every time that the respective Q is "low:"
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Taking this idea one step further, we can build a counter circuit with selectable between "up" and "down" count modes by having dual lines of AND gates detecting the appropriate bit conditions for an "up" and a "down" counting sequence, respectively, then use OR gates to combine the AND gate outputs to the J and K inputs of each succeeding flip-flop:
This circuit isn't as complex as it might first appear. The Up/Down control input line simply enables either the upper string or lower string of AND gates to pass the Q/Q' outputs to the succeeding stages of flip-flops. If the Up/Down control line is "high," the top AND gates become enabled, and the circuit functions exactly the same as the first ("up") synchronous counter circuit shown in this section. If the Up/Down control line is made "low," the bottom AND gates become enabled, and the circuit functions identically to the second ("down" counter) circuit shown in this section.
To illustrate, here is a diagram showing the circuit in the "up" counting mode (all disabled circuitry shown in grey rather than black):
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Here, shown in the "down" counting mode, with the same grey coloring representing disabled circuitry:
Up/down counter circuits are very useful devices. A common application is in machine motion control, where devices called rotary shaft encoders convert mechanical rotation into a series of electrical pulses, these pulses "clocking" a counter circuit to track total motion:
As the machine moves, it turns the encoder shaft, making and breaking the light beam between LED and phototransistor, thereby generating clock pulses to increment the counter
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE circuit. Thus, the counter integrates, or accumulates, total motion of the shaft, serving as an electronic indication of how far the machine has moved. If all we care about is tracking total motion, and do not care to account for changes in the direction of motion, this arrangement will suffice. However, if we wish the counter to increment with one direction of motion and decrement with the reverse direction of motion, we must use an up/down counter, and an encoder/decoding circuit having the ability to discriminate between different directions.
If we re-design the encoder to have two sets of LED/phototransistor pairs, those pairs aligned such that their square-wave output signals are 90o out of phase with each other, we have what is known as a quadrature output encoder (the word "quadrature" simply refers to a 90o angular separation). A phase detection circuit may be made from a D-type flip-flop, to distinguish a clockwise pulse sequence from a counter-clockwise pulse sequence:
When the encoder rotates clockwise, the "D" input signal square-wave will lead the "C" input square-wave, meaning that the "D" input will already be "high" when the "C" transitions from "low" to "high," thus setting the D-type flip-flop (making the Q output "high") with every clock pulse. A "high" Q output places the counter into the "Up" count mode, and any clock pulses received by the clock from the encoder (from either LED) will increment it. Conversely, when the encoder reverses rotation, the "D" input will lag behind the "C" input waveform, meaning that it will be "low" when the "C" waveform transitions from "low" to "high," forcing the D-type flip-flop into the reset state (making the Q output "low") with every clock pulse. This "low" signal commands the counter circuit to decrement with every clock pulse from the encoder.
This circuit, or something very much like it, is at the heart of every position-measuring circuit based on a pulse encoder sensor. Such applications are very common in robotics, CNC machine tool control, and other applications involving the measurement of reversible, mechanical motion.
ASYNCRONOUS COUNTERS :
Since we know that binary count sequences follow a pattern of octave (factor of 2) frequency division, and that J-K flip-flop multivibrators set up for the "toggle" mode are capable of performing this type of frequency division, we can envision a circuit made up of several J-K
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE flip-flops, cascaded to produce four bits of output. The main problem facing us is to determine how to connect these flip-flops together so that they toggle at the right times to produce the proper binary sequence. Examine the following binary count sequence, paying attention to patterns preceding the "toggling" of a bit between 0 and 1:
Note that each bit in this four-bit sequence toggles when the bit before it (the bit having a lesser significance, or place-weight), toggles in a particular direction: from 1 to 0. Small arrows indicate those points in the sequence where a bit toggles, the head of the arrow pointing to the previous bit transitioning from a "high" (1) state to a "low" (0) state:
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Starting with four J-K flip-flops connected in such a way to always be in the "toggle" mode, we need to determine how to connect the clock inputs in such a way so that each succeeding bit toggles when the bit before it transitions from 1 to 0. The Q outputs of each flip- flop will serve as the respective binary bits of the final, four-bit count:
If we used flip-flops with negative-edge triggering (bubble symbols on the clock inputs), we could simply connect the clock input of each flip-flop to the Q output of the flip-flop before it, so that when the bit before it changes from a 1 to a 0, the "falling edge" of that signal would "clock" the next flip-flop to toggle the next bit:
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This circuit would yield the following output waveforms, when "clocked" by a repetitive source of pulses from an oscillator:
The first flip-flop (the one with the Q0 output), has a positive-edge triggered clock input, so it toggles with each rising edge of the clock signal. Notice how the clock signal in this example has a duty cycle less than 50%. I've shown the signal in this manner for the purpose of demonstrating how the clock signal need not be symmetrical to obtain reliable, "clean" output bits in our four-bit binary sequence. In the very first flip-flop circuit shown in this chapter, I used the clock signal itself as one of the output bits. This is a bad practice in counter design, though, because it necessitates the use of a square wave signal with a 50% duty cycle ("high" time = "low" time) in order to obtain a count sequence where each and every step pauses for the same amount of time. Using one J-K flip-flop for each output bit, however, relieves us of the necessity of having a symmetrical clock signal, allowing the use of practically any variety of high/low waveform to increment the count sequence.
As indicated by all the other arrows in the pulse diagram, each succeeding output bit is toggled by the action of the preceding bit transitioning from "high" (1) to "low" (0). This is the pattern necessary to generate an "up" count sequence.
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A less obvious solution for generating an "up" sequence using positive-edge triggered flip-flops is to "clock" each flip-flop using the Q' output of the preceding flip-flop rather than the Q output. Since the Q' output will always be the exact opposite state of the Q output on a J-K flip-flop (no invalid states with this type of flip-flop), a high-to-low transition on the Q output will be accompanied by a low-to-high transition on the Q' output. In other words, each time the Q output of a flip-flop transitions from 1 to 0, the Q' output of the same flip-flop will transition from 0 to 1, providing the positive-going clock pulse we would need to toggle a positive-edge triggered flip-flop at the right moment:
One way we could expand the capabilities of either of these two counter circuits is to regard the Q' outputs as another set of four binary bits. If we examine the pulse diagram for such a circuit, we see that the Q' outputs generate a down-counting sequence, while the Q outputs generate an up-counting sequence:
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Unfortunately, all of the counter circuits shown thusfar share a common problem: the ripple effect. This effect is seen in certain types of binary adder and data conversion circuits, and is due to accumulative propagation delays between cascaded gates. When the Q output of a flip- flop transitions from 1 to 0, it commands the next flip-flop to toggle. If the next flip-flop toggle is a transition from 1 to 0, it will command the flip-flop after it to toggle as well, and so on. However, since there is always some small amount of propagation delay between the command to toggle (the clock pulse) and the actual toggle response (Q and Q' outputs changing states), any subsequent flip-flops to be toggled will toggle some time after the first flip-flop has toggled. Thus, when multiple bits toggle in a binary count sequence, they will not all toggle at exactly the same time:
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As you can see, the more bits that toggle with a given clock pulse, the more severe the accumulated delay time from LSB to MSB. When a clock pulse occurs at such a transition point (say, on the transition from 0111 to 1000), the output bits will "ripple" in sequence from LSB to MSB, as each succeeding bit toggles and commands the next bit to toggle as well, with a small amount of propagation delay between each bit toggle. If we take a close-up look at this effect during the transition from 0111 to 1000, we can see that there will be false output counts generated in the brief time period that the "ripple" effect takes place:
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Instead of cleanly transitioning from a "0111" output to a "1000" output, the counter circuit will very quickly ripple from 0111 to 0110 to 0100 to 0000 to 1000, or from 7 to 6 to 4 to 0 and then to 8. This behavior earns the counter circuit the name of ripple counter, or asynchronous counter.
In many applications, this effect is tolerable, since the ripple happens very, very quickly (the width of the delays has been exaggerated here as an aid to understanding the effects). If all we wanted to do was drive a set of light-emitting diodes (LEDs) with the counter's outputs, for example, this brief ripple would be of no consequence at all. However, if we wished to use this counter to drive the "select" inputs of a multiplexer, index a memory pointer in a microprocessor (computer) circuit, or perform some other task where false outputs could cause spurious errors, it would not be acceptable. There is a way to use this type of counter circuit in applications sensitive to false, ripple-generated outputs, and it involves a principle known as strobing.
Most decoder and multiplexer circuits are equipped with at least one input called the "enable." The output(s) of such a circuit will be active only when the enable input is made active. We can use this enable input to strobe the circuit receiving the ripple counter's output so that it is disabled (and thus not responding to the counter output) during the brief period of time in which the counter outputs might be rippling, and enabled only when sufficient time has passed since the last clock pulse that all rippling will have ceased. In most cases, the strobing signal can be the same clock pulse that drives the counter circuit:
With an active-low Enable input, the receiving circuit will respond to the binary count of the four-bit counter circuit only when the clock signal is "low." As soon as the clock pulse goes "high," the receiving circuit stops responding to the counter circuit's output. Since the counter circuit is positive-edge triggered (as determined by the first flip-flop clock input), all the counting action takes place on the low-to-high transition of the clock signal, meaning that the receiving circuit will become disabled just before any toggling occurs on the counter circuit's four output bits. The receiving circuit will not become enabled until the clock signal returns to a
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE low state, which should be a long enough time after all rippling has ceased to be "safe" to allow the new count to have effect on the receiving circuit. The crucial parameter here is the clock signal's "high" time: it must be at least as long as the maximum expected ripple period of the counter circuit. If not, the clock signal will prematurely enable the receiving circuit, while some rippling is still taking place.
Another disadvantage of the asynchronous, or ripple, counter circuit is limited speed. While all gate circuits are limited in terms of maximum signal frequency, the design of asynchronous counter circuits compounds this problem by making propagation delays additive. Thus, even if strobing is used in the receiving circuit, an asynchronous counter circuit cannot be clocked at any frequency higher than that which allows the greatest possible accumulated propagation delay to elapse well before the next pulse.
A /D AND D/A CONVERSION:
A /D conversion An analog-to-digital converter (abbreviated ADC, A/D or A to D) is a device which converts continuous signals to discrete digital numbers. The reverse operation is performed by a digital-to-analog converter (DAC).
Continuous electrical signals are converted to the digital language of computers using analog-to-digital (A/D) converters. An A/D converter may be housed on a PC board with associated circuitry or in a variety of remote or networked configurations. In addition to the converter itself, sample-and-hold circuits, an amplifier, a multiplexer, timing and synchronization circuits, and signal conditioning elements also may be on board The logic circuits necessary to control the transfer of data to computer memory or to an internal register also are needed.
Figure 1-5: Analog Input Flow Diagram
When determining what type of A/D converter should be used in a given application, performance should be closely matched to the requirements of the analog input transducer(s) in question. Accuracy, signal frequency content, maximum signal level, and dynamic range all should be considered.
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Central to the performance of an A/D converter is its resolution, often expressed in bits. An A/D converter essentially divides the analog input range into 2N bins, where N is the number of bits. In other words, resolution is a measure of the number of levels used to represent the analog input range and determines the converter's sensitivity to a change in analog input. This is not to be confused with its absolute accuracy! Amplification of the signal, or input gain, can be used to increase the apparent sensitivity if the signal's expected maximum range is less than the input range of the A/D converter. Because higher resolution A/D converters cost more, it is especially important to not buy more resolution than you need-if you have 1% accurate (1 in 100) temperature transducers, a 16-bit (1 in 65,536) A/D converter is probably more resolution than you need. Absolute accuracy of the A/D conversion is a function of the reference voltage stability (the known voltage to which the unknown voltage is compared) as well as the comparator performance. Overall, it is of limited use to know the accuracy of the A/D converter itself. Accuracy of the system, together with associated multiplexer, amplifier, and other circuitry is typically more meaningful.
The other primary A/D converter performance parameter that must be considered is speed-throughput for a multi-channel device. Overall, system speed depends on the conversion time, acquisition time, transfer time, and the number of channels being served by the system: Acquisition is the time needed by the front-end analog circuitry to acquire a signal. Also called aperture time, it is the time for which the converter must see the analog voltage in order to complete a conversion. Conversion is the time needed to produce a digital value corresponding to the analog value. Transfer is the time needed to send the digital value to the host computer's memory. Throughput, then, equals the number of channels being served divided by the time required to do all three functions.
Digital Ramp ADC
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Conversion from analog to digital form inherently involves comparator action where the value of the analog voltage at some point in time is compared with some standard. A common way to do that is to apply the analog voltage to one terminal of a comparator and trigger a binary counter which drives a DAC. The output of the DAC is applied to the other terminal of the comparator. Since the output of the DAC is increasing with the counter, it will trigger the comparator at some point when its voltage exceeds the analog input. The transition of the comparator stops the binary counter, which at that point holds the digital value corresponding to the analog voltage.
D /A CONVERSION:
In electronics, a digital-to-analog converter (DAC or D-to-A) is a device for converting a digital (usually binary) code to an analog signal (current, voltage or electric charge).An analog- to-digital converter (ADC) performs the reverse operation.
When data is in binary form, the 0's and 1's may be of several forms such as the TTL form where the logic zero may be a value up to 0.8 volts and the 1 may be a voltage from 2 to 5 volts. The data can be converted to clean digital form using gates which are designed to be on or off depending on the value of the incoming signal. Data in clean binary digital form can be converted to an analog form by using a summing amplifier. For example, a simple 4-bit D/A converter can be made with a four-input summing amplifier. More practical is the R-2R Network DAC.
Four-Bit D/A Converter
One way to achieve D/A conversion is to use a summing amplifier.
This approach is not satisfactory for a large number of bits because it requires too much precision in the summing resistors. This problem is overcome in the R-2R network DAC.
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R-2R Ladder DAC
The summing amplifier with the R-2R ladder of resistances shown produces the output
where the D's take the value 0 or 1. The digital inputs could be TTL voltages which close the switches on a logical 1 and leave it grounded for a logical 0. This is illustrated for 4 bits, but can be extended to any number with just the resistance values R and 2R.
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UNIT-IV
SEMICONDUCTOR DEVICES AND APPLICATIONS
Characteirstics of PN junction diode:
Introduction
The most basic property of a junction diode is that it conducts an electric current in one direction and blocks it in the other. This behaviour arises from the electrical characteristics of a junction, called a p-n junction. fabricated within a semiconductor crystal. The most commonly used semiconductor material is silicon. The junction diode is useful in a wide variety of applications including the rectification of ac signals (producing dc from ac), the detection of radio signals, the conversion of solar power to electricity, and in the generation and detection of light. It also finds use in a variety of electronic circuits as a switch, as a voltage reference or even as a tunable capacitor. The p-n junction is also the basic building block of a host of other electronic devices, of which the most well-known is the junction transistor. For this reason, a study of the properties and behaviour of the p-n junction is important.
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CHARACTERISTICS A p-n junction can be viewed as isolated p- and «-type materials brought into intimate contact Being abundant in «-type material, electrons diffuse to the p-type material. The same process happens for holes from the p-type material. This flow of charges sets up an electric field that starts to hinder further diffusion until an equilibrium is struck.
CONDUCTION IN SOLIDS
All matter consists of atoms. Each atom has electrons orbiting the nucleus. The nucleus contains the same amount of positive charge as the negative charge possessed by the orbiting electrons. The ability of any material to conduct electricity depends primarily on the behaviour of the electrons in the outer orbits. Therefore, it is necessary to review briefly some aspects of solid-state physics. This subject will be dealt with in more detail later in the course.
CONDUCTORS
In a metallic conductor such as copper, the atoms are arranged in a regular array called a crystal lattice. The electrons in the outer orbits of each metal atom are only loosely bound to the nucleus. These electrons are not closely associated with any particular atom and are free to move through the crystal lattice. Once an electron has left its orbit around a particular atom, that atom
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE is left with an excess positive charge. The electron-deficient atom is called a positive ion. The electron that is now free to move is called a free electron. The free electrons in a conductor can be visualized as a cloud of electrons surrounding fixed positive ions as shown in Figure 1.
At normal temperatures, the ions possess energy and vibrate. Collisions between vibrating ions and free electrons cause the electrons to move in a random manner. Over a long period of time, the net motion of these free electrons is zero.
If an electric field is applied to the conductor, the free electrons will acquire additional energy and will tend to move in the direction dictated by the field. There will be a resulting net motion of free electrons. The net motion of charge carriers constitutes an electric current.
Insulators
In an insulator, nearly all electrons are very tightly bound to their respective atoms. There are practically no electrons that are able to move under the influence of an applied electric field. Therefore, an insulator cannot conduct any appreciable electric current under normal conditions.
Semiconductors
A semiconductor, such as silicon, has properties somewhere between those of a conductor and an insulator. The ability of a semiconductor to conduct electricity can be changed dramatically by adding small numbers of a different element to the semiconductor crystal. This process is called doping. Early experiments showed that an electric current through a semiconductor was carried by the flow of positive charges as well as negative charges (electrons).
Doped Semiconductors
A semiconductor crystal is called n-type if the addition of an impurity element results in a large number if free electrons (negative charge carriers) available for conduction. Each impurity atom is called a donor atom since it donates an electron. The electron is free to move and can contribute to an electric current. The positive ion left behind is fixed and cannot take part in conduction (see Figure 2).
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A semiconductor crystal can be made p-type by doping it with a different element so that there are a large number of positive charge carriers available for conduction. The positive charge carriers actually correspond to vacancies or deficiencies of electrons in the bonds holding the atoms in the crystal lattice. The positive charges are called holes. These holes can move through the lattice as illustrated in one dimension in Figures 3(a) and 3(b). The dotted lines represent the crystal lattice.Note that the movement of a hole is due to the movement of a bound electron from one bond to another. It is not due to the motion of free electrons. In a p-type semiconductor, most of the mobile charge carriers are holes. A hole moving away from its host impurity atom is equivalent to the atom gaining or accepting an electron into its bonding structure. The host atom gains an excess negative charge and is then called an acceptor ion. This situation is illustrated in Figure 4. Note again that the ions are locked in the crystal lattice and therefore reperesent fixed charges and cannot contribute to current. On the other hand, the holes are mobile charge carriers and can contribute to current flow.
Junction Diode Behaviour
The most important property of a junction diode is its ability to pass an electric current in one direction only. If the diode is connected to a simple circuit consisting of a battery and a resistor, the battery can be connected in either of two ways as shown in Figures 9(a) and 9(b). When the p-type region of the p-n junction is connected to the positive terminal of the battery, current will flow. The diode is said to be under forward bias. However, when the battery terminals are reversed, the p-n junction almost completely blocks the current flow. This is called reverse bias. If the diode is not connected at all, it is said to be open-circuited and of course no current can flow through the diode.
Forward bias
The application of a forward bias voltage V to a junction diode reduces the built-in potential from V_i_ to V_i_ - V, as shown in Figure 10. The reduction in the built-in potential is due to the applied voltage forcing more electrons into the n-type region and more holes into the p-type region, thus covering some of the fixed charges and narrowing the depletion layer. Since the total uncovered charge is reduced, the built-in potential must be lower. Remembering that the
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE built-in potential opposes the flow of majority carriers across the junction, a reduction in that potential makes it easier for holes in the p-type region to cross the junction and for electrons in the n-type region to cross the junction in the opposite direction. As the forward bias voltage is increased, the current through the junction becomes greater. When the applied voltage V approaches V_i_, the potential hill is almost removed. There is then little opposition to the flow of carriers across the junction and a large current can flow through the diode. The variation of diode current with voltage under forward bias is shown in the first quadrant of a typical junction diode current-voltage characteristic shown in Figure 11.
Reverse Bias
The application of a reverse voltage V_R_ extracts holes from the p-type region and free electrons from the n-type region and so uncovers more bound charges near the junction, as shown in Figure 12. The depletion layer therefore widens and the height of the potential hill is increased to (V_i_ + V_R_ ) volts. Majority carriers are thereby firther inhibited from crossing the junction. As the reverse voltage is increased, the current is reduced to almost zero. However, a very small reverse current does flow. This reverse saturation current depends only on the thermal generation of holes and electrons near the junction, not on the height of the potential barrier. In practice, this reverse saturation current is quite small but it increases with increasing temperature.
The Zener Effect
With the application of sufficient reverse voltage, a p-n junction will experience a rapid avalanche breakdown and conduct current in the reverse direction. Valence electrons which break free under the influence of the applied electric field can be accelerated enough that they can knock loose other electrons and the subsequent collisions quickly become an avalanche. When this process is taking place, very small changes in voltage can cause very large changes in current. The breakdown process depends upon the applied electric field, so by changing the thickness of the layer to which the voltage is applied, zener diodes can be formed which break down at voltages from about 4 volts to several hundred volts.
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Zener Diode
The zener diode uses a p-n junction in reverse bias to make use of the zener effect, which is a breakdown phenomenon which holds the voltage close to a constant value called the zener voltage. It is useful in zener regulators to provide a more constant voltage, for improvement of regulated power supplies, and for limiter applications.
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Zener diodes are widely used as voltage references and as shunt regulators to regulate the voltage across small circuits. When connected in parallel with a variable voltage source so that it is reverse biased, a Zener diode conducts when the voltage reaches the diode's reverse breakdown voltage. From that point on, the relatively low impedance of the diode keeps the voltage across the diode at that value.
In this circuit, a typical voltage reference or regulator, an input voltage, UIN, is regulated down to a stable output voltage UOUT. The intrinsic voltage drop of diode D is stable over a wide current range and holds UOUT relatively constant even though the input voltage may fluctuate over a fairly wide range. Because of the low impedance of the diode when operated like this, Resistor R is used to limit current through the circuit.
Zener Diode Characteristics
Forward Bias:
Set up the circuit as indicated below for the Zener diode provided.
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Vary the power supply voltage (if you are using a battery you can use a potentiometer as a voltage divider). Record the forward voltage across the diode Vf given by the voltmeter V1 (in increments of 0.1 V) and the forward current (I = V2/R; in the experiment R = 1 kΩ) through the diode from 0.0 to 5.0 mA. Plot I versus Vf. Reverse Bias:
Set up the circuit as indicated below for the two diodes provided.
Vary the power supply voltage (if you are using a battery you can use a potentiometer as a voltage divider). Record the reverse voltage Vr (in increments of 1 V) across the diode and the reverse current I through the diode. Diodes are active devices constructed to allow current to flow in one direction. The diode consists of N-type and P-type materials (see diagram shown below). Each of these materials originally consisted of pure silicon doped to obtain thetype of characteristic desired. Doping is the process of adding impurities to the pure semiconductor material. N-type material is formed when the impurities with five electrons in the outer most shell (pentavalent) are added to the pure semiconductor material. Pentavalent materials are elements such as antimony,arsenic, and phosphorus. The same procedure is then performed for the P-type material using an atom containing only three electrons in its outer shell (trivalent). Trivalent materials are elements such as boron, gallium, and indium. A diode is formed when a piece of pure material is doped half as N-type and half as P-type material. It is not constructed by fusing the N and P type materials together. The N-type material is called the cathode and the P-type material is called the anode. A junction, called the depletion region, is formed where the two materials meet. Some of
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE the free electrons begin diffusing across the junction and fill the holes in the P-type material. When this occurs the atom that the electron joined becomes a negative ion. When an electron leaves N-type material, it leaves a hole creating a positive ion. Eventually the diffusion of the free electrons and holes in the junction of the two materials will decrease to a point where it will stop. The area of positive and negative ions created around the junction is called the depletion layer. The free electrons in the N-type material are blocked from diffusing to the P-type material by the negative ions in the P material
Holes from the P material are blocked by the positive ions in the N material. For charge carriers to flow thrlayer, a small voltage potential of approximately 0.7V (silicon) or .3V (germanium)is required to break it down. This is called the barrier potential.There are two types of biasing that can be applied to a diode. For a diode to be forward biased, a power supply is connected with the positive terminal to the P-type material (anode) and the negative terminal to the N-type material (cathode).As the potential across the diode approaches the barrier, the diode begins conducting. For a diode to be reversed biased, the power supply leads are set up with the negative terminal attached to the P-type material and the positive terminal attached to the N-type material. With this configuration, the electrons in the N- type material and the holes in the P- type material are drawn away from the depletion layer increasing the width of the layer. Even though the majority current has stopped flowing, minority current is still flowing due to thermal energy. Minority current is also called saturation current and can only be increased by an increase in temperature. There is also a second minute current that flows through the resistive paths created by surface impurities. This type of current is called surface-leakage current.
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The sum of saturation current and the surface-leakage current is called the reverse current. A diode, such as the silicon diode, will conduct in the reverse bias direction with a significant amount of voltage applied. At the point of conduction, the diode breaks down resulting in the diode being damaged. The value of voltage at which the diode breaks down is called the breakdown voltage. Other types of diodes, such as zener diodes, function in the reverse bias region. The effect of a zener diode breaking down in the reverse region allows it to be used as a voltage regulator.The graph of a silicon diode shows the response curve including the forward and reverse bias regions (See Figure 1 next page). The graph of the silicon diode shows the point in the forward bias region where the barrier potential is exceeded and the diode begins conduction. The voltage at which the diode begins conducting is called the knee voltage. In the reverse bias region, the point at which the diode begins breaking down is also shown. The voltage level at the moment of breakdown is called the breakdown voltage as mentioned previously
RECTIFIER:
A rectifier is an electrical device that converts alternating current (AC) to direct current (DC), a process known as rectification. Rectifiers have many uses including a components of power supplies and as detectors of radio signals. Rectifiers may be made of solid state diodes, vacuum tube diodes, mercury arc valves, and other components.A device which performs the opposite function (converting DC to AC) is known as an inverter.
Half-wave rectifier:
In half wave rectification, either the positive or negative half of the AC wave is passed, while the other half is blocked. Because only one half of the input waveform reaches the output, it is very inefficient if used for power transfer. Half-wave rectification can be achieved with a single diode in a one-phase supply, or with three diodes in a three-phase supply.
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The output DC voltage of a half wave rectifier can be calculated with the following two ideal equations.
When a single rectifier unit is placed in series with the load across an ac supply, it converts alternating voltage into uni-directional pulsating voltage, using one half cycles of the applied voltage, the other half cycles being suppressed because it conducts only in one direction. Unless there is an inductance or battery in the circuit, the current will be zero, therefore, for half the time. This is called half-wave rectification. As already discussed, diode is an electronic device consisting of two elements known as cathode and anode. Since in a diode electrons can flow in one direction only i.e. from cathode to anode so the diode provides the unilateral conduction necessary for rectification. This is true for diodes of all types-vacuum, gas-filled,
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE crystal or semiconductor, metallic (copper oxide and selenium types) diodes. Semiconductor diodes, because of their inherent advantages are usually used as a rectifying device. However, for very high voltages, vacuum diodes may be employed.
The half-wave rectifier circuit using a semiconductor diode with a load resistance RL but no smoothing filter is given in figure. The diode is connected in series with the secondary of the transformer and the load resistance RL, the primary of the transformer is being connected to the ac supply mains.
Working of a Half wave rectifier:
The ac voltage across the secondary winding changes polarities after every half cycle. During the positive half-cycles of the input ac voltage i.e. when upper end of the secondary winding is positive w.r.t. its lower end, the diode is forward biased and therefore conducts current. If the forward resistance of the diode is assumed to be zero (in practice, however, a small resistance exists) the input voltage during the positive half-cycles is directly applied to the load resistance RL, making its upper end positive w.r.t. its lower end. The waveforms of the output current and output voltage are of the same shape as that of the input ac voltage.
During the negative half cycles of the input ac voltage i.e. when the lower end of the secondary winding is positive w.r.t. its upper end, the diode is reverse biased and so does not conduct. Thus during the negative half cycles of the input ac voltage the current through and voltage across the load remains zero if the reverse current, being very small in magnitude, is neglected. Thus for the negative half cycles no power is delivered to the load.
Thus the output voltage developed across load resistance RL (VL) is a series of positive half cycles of alternating voltage, with intervening very small constant negative voltage levels, It is obvious from the figure that the output is not a steady dc, but only a pulsating dc wave. Since only half-cycles of the input wave are used, it is called a half-wave rectifier.When a diode is connected to a source of alternating voltage, it will be alternately forward-biased, and then reverse-biased, during each cycle of the AC sine-wave. When a single diode is used in a rectifier circuit, current will flow through the circuit only during one-half of the input voltage cycle (Figure 6). For this reason, this rectifier circuit is called a half-
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE wave rectifier. The output of a half-wave rectifier circuit is pulsating DC.AFull-wave rectifier circuit two diodes are now used, together with a transformer whose secondary winding is split equally into two and has a common centre tapped connection, (C). Now each diode conducts in turn when its Anode terminal is positive with respect to the centre point C as shown below.
Full-wave rectification
A full-wave rectifier converts the whole of the input waveform to one of constant polarity (positive or negative) at its output. Full-wave rectification converts both polarities of the input waveform to DC (direct current), and is more efficient. However, in a circuit with a non-center tapped transformer, four diodes are required instead of the one needed for half-wave rectification. (See semiconductors, diode). Four diodes arranged this way are called a diode bridge or bridge rectifier:
Graetz bridge rectifier: a full-wave rectifier using 4 diodes.
For single-phase AC, if the transformer is center-tapped, then two diodes back-to-back (i.e. anodes-to-anode or cathode-to-cathode) can form a full-wave rectifier. Twice as many windings are required on the transformer secondary to obtain the same output voltage compared to the bridge rectifier above.
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Full-wave rectifier using a transformer and 2 diodes.
Full-wave rectifier, with vacuum tube having two anodes.
A very common vacuum tube rectifier configuration contained one cathode and twin anodes inside a single envelope; in this way, the two diodes required only one vacuum tube. The 5U4 and 5Y3 were popular examples of this configuration.
A three-phase bridge rectifier.
3-phase AC input, half & full wave rectified DC output waveforms
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For three-phase AC, six diodes are used. Typically there are three pairs of diodes, each pair, though, is not the same kind of double diode that would be used for a full wave single- phase rectifier. Instead the pairs are in series (anode to cathode). Typically, commercially available double diodes have four terminals so the user can configure them as single-phase split supply use, for half a bridge, or for three-phase use Disassembled automobile alternator, showing the six diodes that comprise a full-wave three-phase bridge rectifier. Most devices that generate alternating current (such devices are called alternators) generate three-phase AC. For example, an automobile alternator has six diodes inside it to function as a full-wave rectifier for battery charging applications.
The average and root-mean-square output voltages of an ideal full wave rectifier can be calculated as:
Where:
Vdc,Vav - the average or DC output voltage,
Vp - the peak value of half wave,
Vrms - the root-mean-square value of output voltage. π = ~ 3.14159 e = ~ 2.71828
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The circuit consists of two Half-wave rectifiers connected to a single load resistance with each diode taking it in turn to supply current to the load. When point A is positive with respect to point B, diode D1 conducts in the forward direction as indicated by the arrows. When point B is positive (in the negative half of the cycle) with respect to point A, diode D2 conducts in the forward direction and the current flowing through resistor R is in the same direction for both circuits. As the output voltage across the resistor R is the sum of the two waveforms, this type of circuit is also known as a "bi-phase" circuit.
As the spaces between each half-wave developed by each diode is now being filled in by the other diode the average DC output voltage across the load resistor is now double that of the single half-wave rectifier circuit and is about 0.637Vmax of the peak voltage, assuming no losses.
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The peak voltage of the output waveform is the same as before for the half-wave rectifier provided each half of the transformer windings have the same rms voltage value. To obtain a different d.c. voltage output different transformer ratios can be used, but one main disadvantage of this type of rectifier is that having a larger transformer for a given power output with two separate windings makes this type of circuit costly compared to a "Bridge Rectifier" circuit equivalent.
The Bridge Rectifier
Another type of circuit that produces the same output as a full-wave rectifier is that of the Bridge Rectifier. This type of single phase rectifier uses 4 individual rectifying diodes connected in a "bridged" configuration to produce the desired output but does not require a
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE special centre tapped transformer, thereby reducing its size and cost. The single secondary winding is connected to one side of the diode bridge network and the load to the other side as shown below.
The Diode Bridge Rectifier
The 4 diodes labelled D1 to D4 are arranged in "series pairs" with only two diodes conducting current during each half cycle. During the positive half cycle of the supply, diodes D1 and D2 conduct in series while diodes D3 and D4 are reverse biased and the current flows through the load as shown below.
The Positive Half-cycle
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During the negative half cycle of the supply, diodes D3 and D4 conduct in series, but diodes D1 and D2 switch of as they are now reverse biased. The current flowing through the load is the same direction as before.
The Negative Half-cycle
As the current flowing through the load is unidirectional, so the voltage developed across the load is also unidirectional the same as for the previous two diode full-wave rectifier, therefore the average DC voltage across the load is 0.637Vmax and the ripple frequency is now twice the supply frequency (e.g. 100Hz for a 50Hz supply).
The Smoothing Capacitor
We saw in the previous section that the single phase half-wave rectifier produces an output wave every half cycle and that it was not practical to use this type of circuit to produce a steady DC supply. The full-wave bridge rectifier however, gives us a greater mean DC value (0.637 Vmax) with less superimposed ripple while the output waveform is twice that of the frequency of the input supply frequency. We can therefore increase its average DC output level even higher by connecting a suitable smoothing capacitor across the output of the bridge circuit as shown below.
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Full-wave Rectifier with Smoothing Capacitor
The smoothing capacitor converts the full-wave rippled output of the rectifier into a smooth DC output voltage. Two important parameters to consider when choosing a suitable a capacitor are its Working Voltage, which must be higher than the no-load output value of the rectifier and its Capacitance Value, which determines the amount of ripple that will appear superimposed on top of the DC voltage. Too low a value and the capacitor has little effect. As a general rule of thumb, we are looking to have a ripple voltage of less than 100mV peak to peak.
The main advantages of a full-wave bridge rectifier is that it has a smaller AC ripple value for a given load and a smaller reservoir or smoothing capacitor than an equivalent half- wave rectifier. Therefore, the fundamental frequency of the ripple voltage is twice that of the AC supply frequency (100Hz) where for the half-wave rectifier it is exactly equal to the supply frequency (50Hz). The amount of ripple voltage that is superimposed on top of the DC supply voltage by the diodes can be virtually eliminated by adding a much improved π-filter (pi-filter) to the output terminals of the bridge rectifier. This type of low-pass filter consists of two smoothing capacitors, usually of the same value and a choke or inductance across them to introduce a high impedance path to the alternating ripple component. Another more practical and cheaper alternative is to use a 3-terminal voltage regulator IC, such as a LM7805 which can reduce the ripple by more than 70dB (Datasheet) while delivering over 1amp of output current.
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VOLTAGE REGULATION :
Ideally, the output of most power supplies should be a constant voltage. Unfortunately, this is difficult to achieve. There are two factors that can cause the output voltage to change. First, the ac line voltage is not constant. The so-called 115 volts ac can vary from about 105 volts ac to 125 volts ac. This means that the peak ac voltage to which the rectifier responds can vary from about 148 volts to 177 volts. The ac line voltage alone can be responsible for nearly a 20 percent change in the dc output voltage. The second factor that can change the dc output voltage is a change in the load resistance. In complex electronic equipment, the load can change as circuits are switched in and out. In a television receiver, the load on a particular power supply may depend on the brightness of the screen, the control settings, or even the channel selected.
These variations in load resistance tend to change the applied dc voltage because the power supply has a fixed internal resistance. If the load resistance decreases, the internal resistance of the power supply drops more voltage. This causes a decrease in the voltage across the load. Many circuits are designed to operate with a particular supply voltage. When the supply voltage changes, the operation of the circuit may be adversely affected. Consequently, some types of equipment must have power supplies that produce the same output voltage regardless of changes in the load resistance or changes in the ac line voltage. This constant output voltage may be achieved by adding a circuit called the voltage regulator at the output of the filter.
BIPOLAR JUNCTION TRANSISTOR:
A bipolar (junction) transistor (BJT) is a three-terminal electronic device constructed of doped semiconductor material and may be used in amplifying or switching applications. Bipolar transistors are so named because their operation involves both electrons and holes. Charge flow in a BJT is due to bidirectional diffusion of charge carriers across a junction between two regions of different charge concentrations. This mode of operation is contrasted with unipolar transistors, such as field-effect transistors, in which only one carrier type is involved in charge flow due to drift. By design, most of the BJT collector current is due to the
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE flow of charges injected from a high-concentration emitter into the base where they are minority carriers that diffuse toward the collector, and so BJTs are classified as minority-carrier devices.
PNP
NPN
Schematic symbols for PNP- and NPN-typeBJTs.
In the Diode tutorials we saw that simple diodes are made up from two pieces of semiconductor material, either Silicon or Geranium to form a simple PN-junction and we also learnt about their properties and characteristics. If we now join together two individual diodes end to end giving two PN-junctions connected together in series, we now have a three layer, two junction, three terminal device forming the basis of a Bipolar Junction Transistor, or BJT for short. This type of transistor is generally known as a Bipolar Transistor, because its basic construction consists of two PN-junctions with each terminal or connection being given a name to identify it and these are known as the Emitter, Base and Collector respectively.
The word Transistor is an acronym, and is a combination of the words Transfer Varistor used to describe their mode of operation way back in their early days of development. There are two basic types of bipolar transistor construction, NPN and PNP, which basically describes the physical arrangement of the P-type and N-type semiconductor materials from which they are made. Bipolar Transistors are "CURRENT" Amplifying or current regulating devices that control the amount of current flowing through them in proportion to the amount of biasing current applied to their base terminal. The principle of operation of the two transistor types NPN and PNP, is exactly the same the only difference being in the biasing (base current) and the polarity of the power supply for each type.
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Bipolar Transistor Construction
The construction and circuit symbols for both the NPN and PNP bipolar transistor are shown above with the arrow in the circuit symbol always showing the direction of conventional current flow between the base terminal and its emitter terminal, with the direction of the arrow pointing from the positive P-type region to the negative N-type region, exactly the same as for the standard diode symbol.
There are basically three possible ways to connect a Bipolar Transistor within an electronic circuit with each method of connection responding differently to its input signal as the static characteristics of the transistor vary with each circuit arrangement.
1. Common Base Configuration - has Voltage Gain but no Current Gain.
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2. Common Emitter Configuration - has both Current and Voltage Gain.
3. Common Collector Configuration - has Current Gain but no Voltage Gain.
The Common Base Configuration.
As its name suggests, in the Common Base or Grounded Base configuration, the BASE connection is common to both the input signal AND the output signal with the input signal being applied between the base and the emitter terminals. The corresponding output signal is taken from between the base and the collector terminals as shown with the base terminal grounded or connected to a fixed reference voltage point. The input current flowing into the emitter is quite large as its the sum of both the base current and collector current respectively therefore, the collector current output is less than the emitter current input resulting in a Current Gain for this type of circuit of less than "1", or in other words it "Attenuates" the signal.
The Common Base Amplifier Circuit
This type of amplifier configuration is a non-inverting voltage amplifier circuit, in that the signal voltages Vin and Vout are In-Phase. This type of arrangement is not very common due to its unusually high voltage gain characteristics. Its Output characteristics represent that of a forward biased diode while the Input characteristics represent that of an illuminated photo-diode. Also this type of configuration has a high ratio of Output to Input resistance or more importantly "Load" resistance (RL) to "Input" resistance (Rin) giving it a value of "Resistance Gain". Then the Voltage Gain for a common base can therefore be given as:
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Common Base Voltage Gain
The Common Base circuit is generally only used in single stage amplifier circuits such as microphone pre-amplifier or RF radio amplifiers due to its very good high frequency response.
The Common Emitter Configuration.
In the Common Emitter or Grounded Emitter configuration, the input signal is applied between the base, while the output is taken from between the collector and the emitter as shown. This type of configuration is the most commonly used circuit for transistor based amplifiers and which represents the "normal" method of connection. The common emitter amplifier configuration produces the highest current and power gain of all the three bipolar transistor configurations. This is mainly because the input impedance is LOW as it is connected to a forward-biased junction, while the output impedance is HIGH as it is taken from a reverse-biased junction.
The Common Emitter Amplifier Circuit
In this type of configuration, the current flowing out of the transistor must be equal to the currents flowing into the transistor as the emitter current is given as Ie = Ic + Ib. Also, as the load resistance (RL) is connected in series with the collector, the Current gain of the Common Emitter Transistor Amplifier is quite large as it is the ratio of Ic/Ib and is given the symbol of Beta, (β). Since the relationship between these three currents is determined by the transistor itself, any
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE small change in the base current will result in a large change in the collector current. Then, small changes in base current will thus control the current in the Emitter/Collector circuit.
By combining the expressions for both Alpha, α and Beta, β the mathematical relationship between these parameters and therefore the current gain of the amplifier can be given as:
Where: "Ic" is the current flowing into the collector terminal, "Ib" is the current flowing into the base terminal and "Ie" is the current flowing out of the emitter terminal.
Then to summarise, this type of bipolar transistor configuration has a greater input impedance, Current and Power gain than that of the common Base configuration but its Voltage gain is much lower. The common emitter is an inverting amplifier circuit resulting in the output signal being 180o out of phase with the input voltage signal.
The Common Collector Configuration.
In the Common Collector or Grounded Collector configuration, the collector is now common and the input signal is connected to the Base, while the output is taken from the Emitter load as shown. This type of configuration is commonly known as a Voltage Follower or Emitter Follower circuit. The Emitter follower configuration is very useful for impedance matching applications because of the very high input impedance, in the region of hundreds of thousands of Ohms, and it has relatively low output impedance.
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The Common Collector Amplifier Circuit
The Common Emitter configuration has a current gain equal to the β value of the transistor itself. In the common collector configuration the load resistance is situated in series with the emitter so its current is equal to that of the emitter current. As the emitter current is the combination of the collector AND base currents combined, the load resistance in this type of amplifier configuration also has both the collector current and the input current of the base flowing through it. Then the current gain of the circuit is given as:
This type of bipolar transistor configuration is a non-inverting amplifier circuit in that the signal voltages of Vin and Vout are "In-Phase". It has a voltage gain that is always less than "1" (unity).
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The load resistance of the common collector amplifier configuration receives both the base and collector currents giving a large current gain (as with the Common Emitter configuration) therefore, providing good current amplification with very little voltage gain.
The NPN Transistor
In the previous tutorial we saw that the standard Bipolar Transistor or BJT, comes in two basic forms. An NPN (Negative-Positive-Negative) type and a PNP (Positive-Negative-Positive) type, with the most commonly used transistor type being the NPN Transistor. We also learnt that the transistor junctions can be biased in one of three different ways - Common Base, Common Emitter and Common Collector. In this tutorial we will look more closely at the "Common Emitter" configuration using NPN Transistors and an example of its current flow characteristics is given below.
An NPN Transistor Configuration
Note: Conventional current flow.
We know that the transistor is a "CURRENT" operated device and that a large current (Ic) flows freely through the device between the collector and the emitter terminals. However, this only happens when a small biasing current (Ib) is flowing into the base terminal of the transistor thus allowing the base to act as a sort of current control input. The ratio of these two currents (Ic/Ib) is called the DC Current Gain of the device and is given the symbol of hfe or nowadays Beta, (β). Beta has no units as it is a ratio. Also, the current gain from the emitter to the collector terminal,
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Ic/Ie, is called Alpha, (α), and is a function of the transistor itself. As the emitter current Ie is the product of a very small base current to a very large collector current the value of this parameter α is very close to unity, and for a typical low-power signal transistor this value ranges from about 0.950 to 0.999.
α and β Relationships
By combining the two parameters α and β we can produce two mathematical expressions that gives the relationship between the different currents flowing in the transistor.
The values of Beta vary from about 20 for high current power transistors to well over 1000 for high frequency low power type bipolar transistors. The equation for Beta can also be re-arranged to make Ic as the subject, and with zero base current (Ib = 0) the resultant collector current Ic will also be zero, (β x 0). Also when the base current is high the corresponding collector current will also be high resulting in the base current controlling the collector current. One of the most important properties of the Bipolar Junction Transistor is that a small base current can control a much larger collector current. Consider the following example.
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE output Characteristics Curves for a Typical Bipolar Transistor
The PNP Transistor
The PNP Transistor is the exact opposite to the NPN Transistor device we looked at in the previous tutorial. Basically, in this type of transistor construction the two diodes are reversed with respect to the NPN type, with the arrow, which also defines the Emitter terminal this time pointing inwards in the transistor symbol. Also, all the polarities are reversed which means that PNP Transistors "sink" current as opposed to the NPN transistor which "sources" current. Then, PNP Transistors use a small output base current and a negative base voltage to control a much larger emitter-collector current. The construction of a PNP transistor consists of two P-type semiconductor materials either side of the N-type material as shown below.
A PNP Transistor Configuration
Note: Conventional current flow.
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The PNP Transistor has very similar characteristics to their NPN bipolar cousins, except that the polarities (or biasing) of the current and voltage directions are reversed for any one of the possible three configurations looked at in the first tutorial, Common Base, Common Emitter and Common Collector. Generally, PNP Transistors require a negative (-ve) voltage at their Collector terminal with the flow of current through the emitter-collector terminals being Holes as opposed to Electrons for the NPN types. Because the movement of holes across the depletion layer tends to be slower than for electrons, PNP transistors are generally more slower than their equivalent NPN counterparts when operating.
To cause the Base current to flow in a PNP transistor the Base needs to be more negative than the Emitter (current must leave the base) by approx 0.7 volts for a silicon device or 0.3 volts for a germanium device with the formulas used to calculate the Base resistor, Base current or Collector current are the same as those used for an equivalent NPN transistor and is given as.
Generally, the PNP transistor can replace NPN transistors in electronic circuits, the only difference is the polarities of the voltages, and the directions of the current flow. PNP Transistors can also be used as switching devices and an example of a PNP transistor switch is shown below.
A PNP Transistor Circuit
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The Output Characteristics Curves for a PNP transistor look very similar to those for an equivalent NPN transistor except that they are rotated by 180o to take account of the reverse polarity voltages and currents, (the currents flowing out of the Base and Collector in a PNP transistor are negative).
Transistor Curves
The pink shaded area at the bottom represents the "Cut-off" region. Here the operating conditions of the transistor are zero input base current (Ib), zero output collector current (Ic) and maximum collector voltage (Vce) which results in a large depletion layer and no current flows through the device. The transistor is switched "Fully-OFF". The lighter blue area to the left represents the "Saturation" region. Here the transistor will be biased so that the maximum amount of base current is applied, resulting in maximum collector current flow and minimum collector emitter voltage which results in the depletion layer being as small as possible and maximum current flows through the device. The transistor is switched "Fully-ON". Then we can summarize this as:
1. Cut-off Region - Both junctions are Reverse-biased, Base current is zero or very small resulting in zero Collector current flowing, the device is switched fully "OFF".
2. Saturation Region - Both junctions are Forward-biased, Base current is high enough to give a Collector-Emitter voltage of 0v resulting in maximum Collector current flowing, the device is switched fully "ON".
An example of an NPN Transistor as a switch being used to operate a relay is given below. With inductive loads such as relays or solenoids a flywheel diode is placed across the load to dissipate the back EMF generated by the inductive load when the transistor switches "OFF" and so protect
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE the transistor from damage. If the load is of a very high current or voltage nature, such as motors, heaters etc, then the load current can be controlled via a suitable relay as shown.
Transistor Switching Circuit
The circuit resembles that of the Common Emitter circuit we looked at in the previous tutorials. The difference this time is that to operate the transistor as a switch the transistor needs to be turned either fully "OFF" (Cut-off) or fully "ON" (Saturated). An ideal transistor switch would have an infinite resistance when turned "OFF" resulting in zero current flow and zero resistance when turned "ON", resulting in maximum current flow. In practice when turned "OFF", small leakage currents flow through the transistor and when fully "ON" the device has a low resistance value causing a small saturation voltage (Vce) across it. In both the Cut-off and Saturation regions the power dissipated by the transistor is at its minimum.
To make the Base current flow, the Base input terminal must be made more positive than the Emitter by increasing it above the 0.7 volts needed for a silicon device. By varying the Base- Emitter voltage Vbe, the Base current is altered and which in turn controls the amount of Collector current flowing through the transistor as previously discussed. When maximum Collector current flows the transistor is said to be Saturated. The value of the Base resistor determines how much input voltage is required and corresponding Base current to switch the transistor fully "ON".
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Elementary Treatment of Small Signal Amplifier.
Transistor Small Signal Amplifier Tutorial
The two transistor types have opposite polarity power supplies. The polarity of the capacitors is reversed. If the transistors have the same characteristics, then resistor values are the same in both circuits.
R1 and R2 are the base bias resistors, setting the bias point. R3 is the collector load resistor. R4 is the emitter stabilising resistor. C3 is the emitter decoupling capacitor. C1 and C2 are coupling capacitors which allow ac signals to pass but block dc.
With class A amplifiers this is done by biasing the transistor for d.c. conditions. Like this:
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Figure 3 - schematic of a class A amplifier
Here we have our customary 12V d.c. power supply. We have a resistor from supply to base and another from base to ground. There is also a resistor from supply to collector as well as one from emitter to ground.
Dealing with the pair associated with the base i.e. R1 and R2, they form a voltage divider network. The ratio of :
[R2/(R1 + R2)] * 12V = Base voltage (d.c.) if we use 82K for R1 and 39K for R2 we would get a base voltage of
[39K/(82K + 39K)] * 12V = 3.87V (d.c.) also the current flowing through these base resistors (ignoring any current into the base) is - from ohms law -
Ib = 12/ (R1 + R2) = 0.1 mA (rounding up slightly)
Now different people have different ideas but I'm a big believer in the theory that the current through the emitter should be between 5 - 10 times that of the base current. Let's pick a ratio of about midway, 7 i.e 0.7 mA for emitter current.
Of course if a higher emitter current was required then simply jack up your base current to maintain the approximate ratio.
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If you are worrying about me jumping from 4600 ohms to the nearest standard, which is 4K7 or 4700 ohms, then keep things in perspective. Most resistors, capacitors in these circuits are about 5% or worse tolerence.
This then leaves the resistor from 12V supply to collector, R4.
This is called the load resistor. It could (at r.f.) easily be a choke, a transformer or a resonant circuit. For the moment we are hanging in at a.c., sort of working around audio frequencies but the same principles apply to r.f.
Figure 4 - final schematic of a class A amplifier
Now IF 0.7 mA is flowing (at d.c.) through the emitter then it must also flow through the collector. Also if our supply is 12V and the emitter voltage is 3.22V then the voltage at the collector must be:
Vcc - (Ic * RL) Where RL is in fact R4 or
12V - (0.0007A * R4)
If we elect to have a load resistor of 6800 ohms or 6K8 for R4 what happens?. Well all we have concentrated on so far - in a long winded way - is the d.c. conditions. What about a.c.? Now here is the pointy end of the stick. Remember I said a.c., meaning the usual audio frequencies but the same principles apply to r.f.
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UNIT - V FUNDAMENTALS OF COMMUNICATION ENGINEERING
Types of Signals : Analog Signal : The analog signal are sinusoidal in nature with or without harmonics and represent the variations of a physical quantity like a sound wave. A telephone , radio broadcast or TV signals are very common types of analog signals for use of general public. Telephone signal : A telephone message comprises of speech sounds having vowels and consonants.These sounds produce audiowaves which makes the diapharm of a microphone to vibrate.To this diapharm is attached a coil surrounded by a static magnetic field on all the sides. These speech signals may be broken up into sinusoidal wave. TV picture signals: A picture is composed of bright and dark spots called picture elements arranged in a particular sequence. To television pictures , these images are focused to some kind of a photosensitive screen more commonly known as target which is symmetrically scanned by an electron beam. In this way of scanning, all the picture element are scanned and converted into electrical signal. Radio Broadcast signals: Another very important analog signal is the radio broadcast signal , used for education and entertainment of several masses. These signals may be in the form of speech or music. Though the speech signals occupy a bandwidth of 4 kHz only, The music occupies a considerably large bandwidth. Digital signals: This consists of pulse occurring at discrete intervals of time. The pulse may occur singly at a discrete period of time or as a coded group. These signals play a very important role in the transmission and reception of coded messages. Simplest types of digital signals are the telegraph and teleprinter signals.
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Telegraph Signals: A telegraph and teleprinter are the important instruments that are used to transmit written texts in the form of coded signals. Codes are allotted to different character. The simplest form of telegraph circuit consists of a telegraph key ,which switches on the current in to the line when it is pressed and stops the current when the key is released.The interval for which the current flows is termed as the MARK interval and the state of zero current is termed as SPACE interval .Such a telegraph signal is shown .This system is termed as SINGLE CURRENT working.
Mark
Space
Fig: Single current working telegraph signal
Another form of telegraph signal is termed as a DOUBLE CURRENT working. This system passes current in one direction during MARK but during SPACE the current is reversed .The double working signal is shown in fig.
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Mark
Space
Fig: Double current working telegraph signal
Radar Signal: Radar is a device which is used to find out the location of distance objects in terms of range and bearing. This is done by transmitting a short period signal and beaming it to the target. The reflected signal is picked up by the radar receiver and is used to determine the location of the object. The radar signal is basically a train of rectangular pulses transmitted at low pulse repetition frequency. The widths of the pulse employed are in the range of 1.0 sec duration. Radar is sometimes required to measure the velocity of a moving object. Such radar is termed as Doppler radar.
Modulation: Modulation may be defined as the process by which some parameter of a high frequency signal termed as carrier is varied in accordance with the signal to be transmitted. Various modulation methods have been developed for transmission of signals is effectively as possible which minimum possible distortion. The comparison of the effectiveness of these modulation methods may be based upon the signal power to noise power.
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Amplitude Modulation: The process of Amplitude modulation consists of varying the peak amplitude of a sinusoidal carrier wave in proportion to the instantaneous amplitude of the modulation signal. In AM, the amplitude of the carrier is changed but, its frequency remains the same. The envelope of the modulated carrier is an exact replication of the audio frequency signal.
Frequency modulation: Frequency modulation is the process of varying the frequency of a carrier wave in proportion to the instantaneous amplitude of the modulating signal without any variation in the amplitude of the carrier wave. Because the amplitude of the wave remains unchanged, the power associated with an FM wave is constant.
Advantages of FM over AM: 1 .The amplitude of the frequency modulated wave in FM is independent of the depth of modulation, where as in AM it is independent on this parameter. 2. In AM, when the modulation index increases, the total transmitted power is increased with the increased modulation index. 3. FM is much more immune to noise than AM and hence there is an increase in the signal; to noise ratio in FM. 4. By increasing frequency deviation, the noise can further be reduced in FM, where as AM does not have this feature.
Disadvantages of FM over AM: 1. FM requires a much wider channel, perhaps 7 to 15 times as large as that needed by AM. 2. FM transmitting and receiving equipments are more complex and expensive. 3. Since reception is limited to line of sight, the area of reception for FM is much smaller than for AM.
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Communication Systems:
Radio:
A radio transmitter is a device that transmits information by means of radio waves.The signal intelligence is translated in terms of a high frequency wave commonly termed as carrier wave and the process of intelligence translation in to high frequency is termed as modulation.All radio transmitters use one form of modulation or the order for transmission of intelligence. All radio transmitting systems have a section for generation of high frequency carrier wave , a section for converting information into electrical impulses and amplifying them to the required level, a section for modulating the carrier with signal intelligence, amplification stages for increasing the level of the modulated wave to the desired power and antenna system for transmitting these signals in to free space.Transmitters are usually named depending upon the type of signal to be transmitted , type of modulation employed , the carrier frequency used or the types of radiowaves radiated by the system.A transmitter may , therefore be named as broadcast transmitter, telephony or telegraphy transmitter depending upon whether the signal is an entertainment programme speech signal or picture signal.It may be termed as an AM or FM transmitter depending upon the modulation process employed.
The Radio Communications System (RCS) consists of several exterior communications subsystems which, in combination, provide all exterior communications requirements for the ship with the exception of the Special Intelligence Communications requirements. The RCS subsystems are turnkey installations and consist of the following subsystems: High Frequency Communications System, Very High Frequency Communications (VHF Comms) System, Ultra High Frequency Line-of-Sight Communications (UHF LOS Comms) System, Ultra High Frequency Satellite Communications (UHF SATCOM) System, Extremely High Frequency Satellite Communications (EHF SATCOM) System, Super High Frequency Satellite Communications (SHF SATCOM) System, Communications Support Segment (CSS), Naval Modular Automated Communications System (NAVMACS) II, and the Bridge To Bridge Communications System.
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The High Frequency Communications System consists of the High Frequency Radio Group (HFRG) is a fully automated subsystem of the external radio communications system (RCS) aboard surface ships. The HFRG operates in the Very Low Frequency (VLF), Low Frequency (LF), Medium Frequency (MF) and High Frequency (HF) frequency bands and supports full duplex, half duplex and simplex operation for tactical and long-haul voice, interrupted continuous-wave, teletype and digital data communications in the Lower Sideband (LSB), Upper Sideband (USB), Independent Sideband (ISB), Amplitude Modulation Equivalent (AME) and Link 11 modes of operation. The HFRG consists of three subsystems: the transmit subsystem, the receive subsystem and the control/monitor subsystem (CMS).
The Transmit Subsystem operates (in increments of 10 Hz) in the frequency range of 2 Mhz to 30 Mhz and is used primarily for broadband circuits. The Transmit subsystem is designed to allow all exciters to operate in the Link 11 mode, but contains the assets required to support two (2) 1kW narrowband circuits which are the primary HF Link 11 circuits.The operational capabilities of the transmit subsystem require both broadband and narrowband antennas. The operational configuration of the transmit subsystem is accomplished in response to commands from the CMS and frequency changes (except narrowband) are completed in less than 100 milliseconds. The transmit subsystem reports to the CMS when the system is configured and also reports detected failures.
The Receive Subsystem operates (in increments of 10 Hz) in the frequency range of 14 Khz to 1.619 Mhz and 2 Mhz to 30 Mhz. The receive subsystem requires at least two broadband antennas and 1 or 2 additional antennas dedicated to the use of the Ship Signal Exploitation Equipment (SSEE). The operational configuration of the receive subsystem is accomplished in response to commands from the CMS and frequency changes are completed in less than 20 milliseconds. The receive subsystem reports to the CMS when the system is configured and also reports detected failures.
The Control/Monitor Subsystem is the backup point of control for the HFRG when the system is being controlled by the Surface Ship Automated Communications Control System (SSACCS) (part of the Communications Support System (CSS)). The SSACCS normally controls the HFRG through an interface with the CMS, but if the SSACCS becomes inoperable
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE the CMS automatically assumes the functions of remote control, performance monitoring, test, operator interface, and display of the operational characteristics. The CMS is used to send configuration commands to the transmit and receive subsystems and, in turn, receive configuration completion and operational characteristics from these subsystems.
The Very High Frequency Communications (VHF Comms) System is utilized to transmit and receive tactical, operational and administrative information (both voice and data) in the VHF range (30-300 MHz). The VHF Comms System primarily supports line-of-sight (LOS) communications between accomplishing units and is comprised of several different Radio Groups or subsystems. Most of the Radio Groups are functionally interchangeable and therefore are not individually dedicated to a specific circuit or function.
The Ultra High Frequency Line-of-Sight Communications (UHF LOS Comms) System is utilized to transmit and receive tactical, operational and administrative information (both voice and data) in the UHF range (300 MHz - 3 GHz). The UHF LOS Comms System is capable of operating in either the UHF LOS or UHF Satellite Communications (UHF SATCOM) mode. Most of the UHF LOS equipments are functionally interchangeable and therefore are not individually dedicated to a specific circuit or function.
Television Transmission : Video signals produced by a TV camera contain picture information during the scan period but during retrace or flyback period , the camera output is zero .In order to transmit these signals , it is essential to add the synchronization pulses before modulating this signal at the desired carrier frequency.The complete set up of a TV transmission system is as shown.Video signals produced by the camera are amplified by the video amplifier and given to an adder circuit where line and field synchronization pulses are added to the signal.These pulses also play an important role in keeping TV receivers synchronized with the transmission system thereby allowing picture reception.the complete video signal is used to amplitude modulate an RF
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE carrier.The audio chain consists of an audio amplifier which amplifies the audio signals received from the microphone and feeds them to a FM modulator .This modulator changes the RF oscillator frequency in accordance with the amplitude of the AF signal thereby producing a fm wave.this signal is amplified to thedesired magnitude by an RF amplifier stage and passed on the common aerial for transmission.
Television (TV) is a widely used telecommunication medium for transmitting and receiving moving images, either monochromatic ("black and white") or color, usually accompanied by sound. "Television" may also refer specifically to a television set, television programming or television transmission. The word is derived from mixed Latin and Greek roots, meaning "far sight": Greek tele (τῆ ε), far, and Latin visio, sight (from video, vis- to see, or to view in the first person).
Commercially available since the late 1930s, the television set has become a common communications receiver in homes, businesses and institutions, particularly as a source of entertainment and news. Since the 1970s the availability of video cassettes, laserdiscs, DVDs and now Blu-ray Discs, have resulted in the television set frequently being used for viewing recorded as well as broadcast material.
Although other forms such as closed-circuit television are in use, the most common usage of the medium is for broadcast television, which was modeled on the existing radio broadcasting systems developed in the 1920s, and uses high-powered radio-frequency transmitters to broadcast the television signal to individual TV receivers.
Broadcast TV is typically disseminated via radio transmissions on designated channels in the 54–890 megahertz frequency band[1]. Signals are now often transmitted with stereo and/or surround sound in many countries. Until the 2000s broadcast TV programs were generally recorded and transmitted as an analog signal, but in recent years public and commercial broadcasters have been progressively introducing digital television broadcasting technology.
A standard television set comprises multiple internal electronic circuits, including those for receiving and decoding broadcast signals. A visual display device which lacks a tuner is properly called a monitor, rather than a television. A television system may use different
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE technical standards such as digital television (DTV) and high-definition television (HDTV). Television systems are also used for surveillance, industrial process control, and guiding of weapons, in places where direct observation is difficult or dangerous.
Facsimile (FAX) A Facsmile or FAX system is a document carrier , with the help of a FAX machine one can send an image on a sheet of paper to another FAX machine over regular telephone lines. The document with message written on it is inserted in the FAX machine at the input of the machine. The document is scanned by the electronic scanner line by line and from top to bottom using light and mirror.The electronic scanner uses a photocell which senses the light reflected from the document .Whenever there is mark on this , the photocell output voltage is very small or binary 0 is generated.If there is no mark , the voltage generated is very large and binary 1 is generated.As line by line is scanned series of 1’s and 0’s are generated.Each scan line is divided into 200 points per inch , so 8 ½. Wide paper produces 1700 bits / line .these 1’s and 0’s are further represented by two frequency tones when sent over the telephone line. A block diagram of facsimile system is shown in fig. At the receiving terminal . beam of light scan a specially treated drum surface in synchronization with the scan of the sending unit .As series of 1’s and 0’s are received the beam of light is turn on and off and drums at the end of each line .The drum carries the electrical charges on its surface that the complete image like photographic negative , and then uses these charges to transfer toner ink to a piece of paper. The reproduced image is the exact replica of the sending unit. Fax (short for facsimile, is a telecommunications technology used to transfer copies (facsimiles) of documents, especially using affordable devices operating over the telephone network. The word telefax, short for telefacsimile, for "make a copy at a distance", is also used as a synonym. Although fax is not an acronym (as it is abbreviated from facsimile), it is often written as “FAX”. The device is also known as a telecopier in certain industries. When sending documents to people at large distances, faxes have a distinct advantage over postal mail in that the delivery is nearly instantaneous, yet its disadvantages in quality have relegated it to a position beneath email as the prevailing form of electronic document transfer except where the legal status of a sent fax and its accompanying sending report are desired.
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Applictions:
1.Transmission of photographs. 2.Transmission of languages text. 3.Transmission of document , map etc.,
Microwave Communication: Electromagnetic waves in the frequency range of 1 GHz are referred to as microwaves As microwaves travel only on line of sight paths , the transmitter and receiver should be visible to each other.The microwave communication offers a large transmission – bandwidth , many thousands of telephone channels along with a few TV channels can be transmitted over the same route using the same facilities. Normally , carrier frequencies in the 3 to 12 GHz range are used for microwave communication.The transmitter output powers can be low because highly directional high gain antennas are used.Fig shows the one channel of a ground based microwave system.It consist of two terminals station and one or more repeater stations.At the sending terminal several thousand telephone channels and one or two television channels are frequency multiplexed. Then it can be produced a base band signal.The base band signal is allowed ti frequency modulate an intermediate (IF) carrier in the lower frequency large , which is then up converted to the microwave output frequency of 4 GHz.The signal is amplified and fed through a directional antenna towards a repeater station at a distance of about 50 km. At the repeater station , the signal is received on one antenna directed towards the originating station , the received signal is down converted to IF , amplified and up converted to new frequency of 6 GHz.The frequency conversion is done so that the outgoing and incoming signals do not interfere with each other in the repeater stations.The signal is retransmitted towards the receiving terminal stations where it is down converted to the IF and demodulated to recover the base band signal.This base band signal is then demiltiplexed to recover the individual television channel signals.
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Satellite communication System: A satellite communication is basically a RF repeater station which has made broadband long distance communication feasible and ensured a high quality service.The basic components of satellite communication system has three main parts. 1.Earth station or ground station 2.Medium and 3.Satellite itself. Constructional features of satellite: A satellite has many sub systems , thesesub systems are responsible for various functions.These subsystems are antenna , transponder , power generation and storage system ,telemetry and tele command subsystem , attitude and orbit control subsystem , propulsion sub system and thermal control subsystem. The satellite antenna is a parabolic reflector which recelve signals from ground station.The same antenna is used for transmission .The transponder is the heart of a satellite.All operations related to communication takes place inside the transponder .A block diagram of a single conversion satellite transponder is shown in fig.
When the signal is received at satellite, it is amplified bya low noise amplifier , its frequency is down converted by down converter and then it is radiated back by satellite towards the earth.All the earth station and dish antenna within the visible range of the satellite this down converted signal. The power generation and storage subsystem consists of solar cells and storage batteries. The solar cells convert solar energy into electrical energy .This electrical energy is supplied to various equipments of the satellite for proper operation.In addition to solar cells , satellite also has storage batteries .The power from these batteries is used when satellite comes in the shadow zone of the earth. Telemetry and telecommand subsystem of the satellite gives the condition of the satellite.The telemetry is a system which gives information about the satellite.an exploded view of a communation satellite is shown in fig.Attitude and orbit control subsystem perform two functions.Firstly it keeps the satellite in its desired location and secondly , adjust the position of the satellite.The thermal control subsystem maintains the inside temperature of the satellite and other equipments .these temperatures drop to as low as -150degree c when satellite comes in the shadow zone of the earth and shoot up very high when satellite faces the sun.
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A Satellite is a solid object which revolves around some heavenly body due to the effect of gravitational forces which are mutual in nature. We can categorize satellites in two types, namely Passive Satellites and Active satellites. Passive satellites are not like active satellites. Even a moon can be a passive satellite. Thus passive satellites are relay stations in space. A passive satellite can be further subdivided into two types, namely Natural satellites and artificial satellites. A moon is a natural satellite of earth. But spherical balloon with metal coated plastic serve as artificial satellites.
Active satellites are complicated structures having a processing equipment called Transponder which is very vital for functioning of the satellite. These transponders serve dual purpose i.e. provides amplification of the incoming signal and performs the frequency translation of the incoming signal to avoid interference between the two signals.
All ABOUT SATELLITE COMMUNICATION
The term Satellite communication is very frequently used, but what is satellite communication? It is simply the communication of the satellite in space with large number of earth stations on the ground. Users are the ones who generate baseband signals, which is processed at the earth station and then transmitted to the satellite through dish antennas. Now the user is connected to the earth station via some telephone switch or some dedicated link. The satellite receives the uplink frequency and the transponder present inside the satellite does the processing function and frequency down conversion in order to transmit the downlink signal at different frequency. The
II – SEM – BASIC ELECTRICAL & ELECTRONICS ENGG M.I.E.T ENGG COLLEGE DEPT OF EEE earth station then receives the signal from the satellite through parabolic dish antenna and processes it to get back the baseband signal. This baseband signal is then transmitted to the respective user via dedicated link or other terrestrial system. Previously satellite communication system used large sized parabolic antennas with diameters around 30 meters because of the very faint and weak signals received. But nowadays satellites have become much stronger, bigger and powerful due to which antennas used have become automatically smaller in size. Thus the earth station antennas are now not large in size as the antennas used in olden days. A satellite communication system operates and works in the millimeter and microwave wave frequency bands from 1 Ghz to 50 Ghz. There are various frequency bands utilized by satellites but the most recognized of them is the uplink frequency of 6 Ghz and the downlink frequency of 4 Ghz. Actually the uplink frequency band is 5.725 to 7.075 Ghz and the actual downlink frequency band is from 3.4 to 4.8 Ghz. The major components of a Satellite Communication system is spacecraft and one or more earth earths.
Optical Fibre communication system:
The outline of an optical communication system are given in fig.The sound signals from different subscribers are multiplexed and converted in to digital form by the ADC / ENCODER.The signal is then modulated using a pulse modulation technique and given by electrical to Optical (E – 0) converter.This device produces modulated optical signals.These signals are transmitted through an optical fibre to the desired destination. Optical fibres are used for transmission of optical signals in the same manner as coaxial cables for radio wave transmission.The main advantage of using optical frequencies as the carrier is that a very high density information transmission becomes possible at these frequencies .In addition to this , the optical fibres also have extremely low loss of nearly 0.2 db /Vm .Which permits larger repeater spacing .Other advantages of optical fibres are their much smaller size , light weight as compared to coaxial cables.They require much less duct space and transportation cost.Since they are made of dielectric materials,they are immnune to electromagnetic interference , short circuits /ground loops and are free from cross – talks. They are more tolerant to hostile temperature environments and very much cost effective , as compared to other transmission media for large volume of information traffic.
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The above fig geometry of an optical fibre.The fibre consists of a central silica glass or polystyrene.In a silica fibre , the cladding is also of silica glass , but its refractive index is lower the refractive index of the core.In the polystyrene cable , the cladding is also of the same plastic material .silica fibres have a better performance at higher bit rates but their cost is high.The plastic fibres have higher attenuation and low temperature withstanding capacibility and can be used for short distance transmission.
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