Haskell As a Higher Order Structural Hardware Description Language

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Haskell As a Higher Order Structural Hardware Description Language Haskell as a higher order structural hardware description language Master's thesis by Matthijs Kooijman December 9, 2009 Committee: Dr. Ir. Jan Kuper Ir. Marco Gerards Ir. Bert Molenkamp Dr. Ir. Sabih Gerez Computer Architecture for Embedded Systems Faculty of EEMCS University of Twente Abstract Functional hardware description languages have been around for a while, but never saw adoption on a large scale. Even though advanced features like higher order functions and polymorphism could enable very natural parametrization of hardware descriptions, the conventional hardware description languages VHDL and Verilog are still most widely used. Cλash is a new functional hardware description language using Haskell's syntax and semantics. It allows structurally describing synchronous hardware, using normal Haskell syntax combined with a selection of built-in functions for operations like addition or list operations. More complex constructions like higher order functions and polymorphism are fully supported. Cλash supports stateful descriptions through explicit descriptions of a function's state. Every function accepts an argument containing its current state and returns its updated state as a part of its result. This means every function is called exactly once for each cycle, limiting Cλash to synchronous systems with a single clock domain. A prototype compiler for Cλash has been implemented that can generate an equivalent VHDL description (using mostly structural VHDL). The prototype uses the front-end (parser, type-checker, desugarer) ofthe existing GHC Haskell compiler. This front-end generates a Core version of the description, which is a very small typed functional language. A normalizing system of transformations brings this Core version into a normal form that has any complex parts (higher order functions, polymorphism, complex nested structures) removed. The normal form can then be easily translated to VHDL. This design has proven to be very suitable. In particular the transformation system allows for some theoretical analysis and proofs about the compiler design itself (which have been left as future work). Using Haskell syntax, semantics and existing tools has enabled the rapid creation of the prototype, but it also became clear that Haskell is not the ideal language for hardware specification. The problems encountered could be solved with syntax extensions and major improvements to Haskell's dependent typing support, or be circumvented entirely by developing a completely new language. Cλash already allows for implementing real world systems, but has not seen much testing yet. There is much room for improvement, but there is also a clear path forward for further research. Acknowledgements This thesis and the research it presents is not the result of just my own work. I have received alotofideas, inspiration and comments from other people, who I would like to mention here. First of all, I would like to thank Christiaan Baaij, which has been my partner in crime during this research. Together we have started a new area of research at the University of Twente, in which I would nothave progressed so far on my own. Then there is my first supervisor, Jan Kuper, whose visions and ideas have sparked this research andwho always managed to place my practical views into the proper theoretical background. The rest of the gradu- ation committee has been a great help, providing feedback, comments and challenging questions, eachfrom their own unique point of view. Finally, I would like to thank Brenda, who has been suffering my working late and general lack of time for just over a year now. Contents Introduction . 9 1 Context . 13 1.1 Conventional hardware description languages . 13 1.2 Existing functional hardware description languages . 13 2 Hardware description . 15 2.1 Function application . 15 2.2 Choice . 17 2.3 Types . 18 2.3.1 Built-in types . 19 2.3.2 User-defined types . 20 2.3.3 Partial application . 22 2.4 Costless specialization . 23 2.4.1 Specialization . 23 2.5 Higher order values . 24 2.6 Polymorphism . 24 2.7 State . 24 2.7.1 Approaches to state . 25 2.7.2 Explicit state specification . 27 2.7.3 Explicit state annotation . 28 2.8 Recursion . 28 2.8.1 List recursion . 29 2.8.2 General recursion . 30 3 Prototype . 31 3.1 Input language . 31 3.2 Output format . 31 3.3 Simulation and synthesis . 32 3.4 Prototype design . 32 3.5 The Core language . 34 3.5.1 Core type system . 39 3.6 State annotations in Haskell . 42 3.6.1 Type synonyms . 42 3.6.2 Type renaming (newtype) . 42 3.6.3 Type synonyms for sub-states . 43 3.6.4 Chosen approach . 44 3.7 VHDL generation for state . 44 3.7.1 State in normal form . 44 3.7.2 Translating to VHDL . 48 3.8 Prototype implementation . 50 4 Normalization . 53 4.1 Normal form . 53 4.1.1 Intended normal form definition . 56 4.2 Transformation notation . 57 4.2.1 Transformation application . 61 4.2.2 Definitions . 61 4.2.3 Binder uniqueness . 62 4.3 Transform passes . 63 4.3.1 General cleanup . 64 4.3.2 Program structure . 69 4.3.3 Representable arguments simplification . ..
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