How to Run the Latest Linux BSP on MPC8313ERDB Rev. Ax Boards By: Shu Yinbo System and Application Engineer Beijing China

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How to Run the Latest Linux BSP on MPC8313ERDB Rev. Ax Boards By: Shu Yinbo System and Application Engineer Beijing China Freescale Semiconductor Document Number: AN3947 Application Note Rev. 0, 11/2009 How to Run the Latest Linux BSP on MPC8313ERDB Rev. Ax Boards by: Shu Yinbo System and Application Engineer Beijing China 1 Introduction Contents 1 Introduction . 1 The MPC8313E reference design board (RDB) is a 2 MPC8313E-RDB Overview . 2 3 Preparations . 3 system featuring the PowerQUICC™ II Pro processor 3.1 Host Preparations . 3 that includes a built-in security accelerator. The software 3.2 Porting Background. 3 board supported package (BSP) for this low-cost, 4 DTS Introduction . 5 4.1 Device Tree Generalities. 5 high-performance system solution is available on the 4.2 eTSEC and PHY Nodes . 8 Freescale website. The BSP enables the fastest possible 5 Porting Device Tree to Rev. Ax boards . 9 6 Running U-Boot and Kernel on the MPC8313E-RDB . 11 time-to-market for development or integration of 6.1 Flashing U-Boot. 11 applications, including printer engines, broadband 6.2 Configuring the U-Boot for NFS Deployment . 12 gateways, no-new-wires home adapters and access 7 References . 13 Appendix ABooting Log . 14 points, and home automation boxes. Appendix BComparison of the BSP Releases. 19 This document describes how to port the latest BSP to the old hardware platform to use the features added in the latest BSP. It details what you need to know and how to make changes to the latest BSP to match older boards. In the end, the eTSEC and preemptible kernel supports are verified on the MPC8313E-RDB Rev. A4 board. © Freescale Semiconductor, Inc., 2009. All rights reserved. MPC8313E-RDB Overview 2 MPC8313E-RDB Overview The MPC8313E-RDB reference platform is ideal for hardware and software development for cost-optimized networking applications. The cost-effective MPC8313E communications processor family meets the requirements of several small offices and home offices (SOHO), printing, IP services, and industrial control applications. It leverages Freescale’s highly integrated MPC8313E processor built on Power Architecture™ technology and leading-edge external components: a 5-port Gigabit Ethernet switch, USB port, one peripheral component interconnect (PCI) slot, one miniPCI slot, and one SD card memory slot. The high level integration in the MPC8313E helps to lower overall system costs, improve performance, and simplify board design. This section lists the features of the MPC8313E-RDB. • CPU—Freescale MPC8313E running at 333/166 MHz; CPU/coherent system bus (CSB) • Memory subsystem: — 128 MB unbuffered DDR2 SDRAM discrete devices — 8 MB flash single-chip memory — 32 MB NAND flash memory — 256 kbit M24256 serial EEPROM — SD connector to interface with the SD memory card in SPI mode •Interfaces: — 10/100/1000 BaseT Ethernet ports: – eTSEC1, RGMII—Five 10/100/1000 BaseT RJ-45 interfaces using Vitesse™ VSC7385 L2 switch, or one 10/100/1000 BaseT RJ-45 interface using Marvell™ 88E1111 PHY in REVC board – eTSEC2, selectable RGMII or SGMII—One 10/100/1000 BaseT RJ-45 interface using Marvell 88E1111 PHY — USB 2.0 port—High-speed host and device — USB interface—Selectable on-chip PHY or external ULPI PHY interface by SMSC USB3300 USB PHY — PCI—32-bit PCI interface running at up to 66 MHz – One 32-bit 3.3 V PCI slot connected to the PCI bus – One 32-bit 3.3 V miniPCI slot connected to the PCI bus — Dual UART ports: – DUART interface—Offices supports two UARTs up to 115200 bps for console display • Board connectors: — LCD connectors by GPIO — ATX power supply connector — JTAG/COP for debugging • IEEE Std. 1588™ signals for test and measurement • Real-time clock and thermal sensor on I2C bus How to Run the Latest Linux BSP on MPC8313ERDB Rev. Ax Boards, Rev. 0 2 Freescale Semiconductor Preparations • Programmable LEDs for debug use • 6-layer PCB routing (4-layer signals, 2-layer power and ground) 3 Preparations 3.1 Host Preparations 3.1.1 System Requirements A Linux PC must be prepared to use and port the BSP. The LTIB can run on most Linux host distributions that have glibc-2.2.x or later. Any of the following platforms can be used: • Redhat: 7.3, 8.0, 9.0, Enterprise release 4, Enterprise release 5 • Fedora Core: 1, 2, 3, 4, 5, 8 • Debian: 3.1r0 • Suse: 8.2, 9.1, 9.2, 10.0, 10.2, 10.3 • Ubuntu: 6.10, 7.04, 7.10, 8.04 3.1.2 BSP Preparations This porting guide applies to both the 20081216 and 20080613 BSP. You can download the BSP from the Freescale website and install either of them on your PC. After the installation, extract the kernel source using the following command: ./ltib –m prep –p kernel-2.6.23-mpc8313erdb_revc.spec 3.2 Porting Background From the beginning you must know the board differences and the why the latest BSP can not run on the older boards.The modifications to the BSP correspond to the changes of the board revisions. The main changes of the board are provided in Table 1. How to Run the Latest Linux BSP on MPC8313ERDB Rev. Ax Boards, Rev. 0 Freescale Semiconductor 3 Preparations Table 1. MPC8313E-RDB Changes MPC8313 Revision Descriptions Chip Revision REVA There are two major issues on the REVA board: 1.0 • On-chip PHY USB signals (DP, DM) are swapped. To use the USB, use a USB cable that swaps the signals (the cable is attached in the REVA package). • NAND flash memory cannot be used as a boot device. REVA1 Fixed both major issues on the REVA board. The boot-from-NAND on 1.0 the REVA1 -RDB has been verified. However, on the current BSP preloaded on REVA1 RDB, the NAND flash memory is empty, and not bootable. Booting from the NAND flash memory will be supported in a future release of the BSP. Software for REVA and REVA1 differs only in the OR1[BCTLD] register setting for NAND flash memory. That is, REVA OR1[BCTLD] is 1; while REVA1 OR1[BCTLD] is 0. REVA2 A minor update from REVA1 for mass production. It updated the 1.0 silkscreen and added a 12-V fan connector (J25) and resistor loading for ATX power. Software can be shared without modification between REVA1 and REVA2. How to Run the Latest Linux BSP on MPC8313ERDB Rev. Ax Boards, Rev. 0 4 Freescale Semiconductor DTS Introduction Table 1. MPC8313E-RDB Changes (continued) REVA3 The fixed PMC register issue power management control (PMC) 1.0 registers cannot be accessed. According to the processor erratum, a 166 MHz CSB frequency must be used. For this reason, some REVA3 and all later boards use 33 MHz instead of 66 MHz as the clock input (check your board U15 oscillator marking). The CORE/CSB/DDR frequency setting is 333/166/333 MHz. However, there are two drawbacks: • PCI bus can run at up to only 33 MHz • PCI/mini-PCI card can run at 66 MHz (with its M66EN pulled up) and must be used. Even the PCI bus on the RDB runs at only 33 MHz. Otherwise, the PCI frequency is further divided and it becomes 16.6 MHz. REVA4 Fixed the second drawback issue of REVA3. 1.0 REVB • Added GTX_CLK125 sourced from the external 125 MHz oscillator. 2.0 • Added an optional IEEE 1588 connector (P10). • Added three more resistor options (R31–R313) to route three IEEE 1588 signals that are only available in eTSEC1 to the IEEE 1588 connector. • Changed S4 to support LB_POR_CFG_BOOT_ECC_DIS. • Changed SD chip selection signal from SPISEL (GPIO31) to GPIO13. REVC • Added a Marvell 88E1111 PHY. Phy address was assigned to 0x3. 2.1 Used the same IRQ3 number as the L2 switch. • Added resistor option for RGMII signals route to either L2 switch or Marvell 88E1111 PHY. • Added SGMII support for eTSEC1 if using the added Marvell 88E1111 PHY. (SGMII for eTSEC2 was already supported.) • Added PLL CY23EP05SXC-1 U86 to PHY generated 125 MHz clock. • Changed default TSEC1_GTX_CLK125 clock source to PLL CY23EP05SX-1 instead of the external 125 MHZ oscillator. • Changed U36 1A linear regulator MIC39100-2.5WS to 3A MIC37302WR for higher 2.5V power consumption by additional PHY. • Changed default DAC to 16-bit SPI controlled MAX5203BEUB+ (U47). From the table, the Rev. Ax boards use the Rev. 1.0 silicon, Rev. B and Rev. C boards use the Rev. 2.x silicon. For details of the silicon changes, please refer to application note Migration from MPC8313E Revision 1.0 to Revision 2.x (document AN3545) The BSP difference is provided in the Appendix B, “Comparison of the BSP Releases.” You may refer to them for comparison of the BSP releases like the feature added, the bug fixed. 4 DTS Introduction 4.1 Device Tree Generalities The flat device tree whose format is defined after the Open Firmware specification maintains the kernel entry and bootloader <-> kernel interfaces. It is popularly used in the embedded Linux development today. This device-tree itself is separated in two blocks, a structure block and a strings block. Both need to be aligned to a 4 byte boundary. How to Run the Latest Linux BSP on MPC8313ERDB Rev. Ax Boards, Rev. 0 Freescale Semiconductor 5 DTS Introduction First, described here is the device-tree concept. The device-tree layout is strongly inherited from the definition of the Open Firmware IEEE 1275 device-tree. It is basically a tree of nodes, each node has two or more named properties. A property can have a value or not. It is a tree, therefore each node has only one parent except for the root node who has no parent. A node has two names.
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