IBM Storage and the NVM Express Revolution
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Storage Administration Guide Storage Administration Guide SUSE Linux Enterprise Server 12 SP4
SUSE Linux Enterprise Server 12 SP4 Storage Administration Guide Storage Administration Guide SUSE Linux Enterprise Server 12 SP4 Provides information about how to manage storage devices on a SUSE Linux Enterprise Server. Publication Date: September 24, 2021 SUSE LLC 1800 South Novell Place Provo, UT 84606 USA https://documentation.suse.com Copyright © 2006– 2021 SUSE LLC and contributors. All rights reserved. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or (at your option) version 1.3; with the Invariant Section being this copyright notice and license. A copy of the license version 1.2 is included in the section entitled “GNU Free Documentation License”. For SUSE trademarks, see https://www.suse.com/company/legal/ . All other third-party trademarks are the property of their respective owners. Trademark symbols (®, ™ etc.) denote trademarks of SUSE and its aliates. Asterisks (*) denote third-party trademarks. All information found in this book has been compiled with utmost attention to detail. However, this does not guarantee complete accuracy. Neither SUSE LLC, its aliates, the authors nor the translators shall be held liable for possible errors or the consequences thereof. Contents About This Guide xii 1 Available Documentation xii 2 Giving Feedback xiv 3 Documentation Conventions xiv 4 Product Life Cycle and Support xvi Support Statement for SUSE Linux Enterprise Server xvii • Technology Previews xviii I FILE SYSTEMS AND MOUNTING 1 1 Overview -
For Immediate Release
an ellisys company FOR IMMEDIATE RELEASE SerialTek Contact: Simon Thomas, Director, Sales and Marketing Phone: +1-720-204-2140 Email: [email protected] SerialTek Debuts PCIe x16 Gen5 Protocol Analysis System and Web Application New Kodiak™ Platform Brings SerialTek Advantages to More Computing and Data Storage Markets Longmont, CO, USA — February 24, 2021 — SerialTek, a leading provider of protocol test solutions for PCI Express®, NVM Express®, Serial Attached SCSI, and Serial ATA, today introduced an advancement in the PCIe® test and analysis market with the release of the Kodiak PCIe x16 Gen5 Analysis System, as well as the industry’s first calibration-free PCIe x16 add-in-card (AIC) interposer and a new web-based BusXpert™ user interface to manage and analyze traces more efficiently than ever. The addition of PCIe x16 Gen5 to the Kodiak analyzer and SI-Fi™ interposer family brings previously unavailable analysis capabilities and efficiencies to computing, datacenter, networking, storage, AI, and other PCIe x16 Gen5 applications. With SerialTek’s proven calibration-free SI-Fi interposer technology, the Kodiak’s innovative state-of-the-art design, and the new BusXpert analyzer software, users can more easily set up the analyzer hardware, more accurately probe PCIe signals, and more efficiently analyze traces. Kodiak PCIe x16 Gen5 Analysis System At the core of the Kodiak PCIe x16 analyzer is an embedded hardware architecture that delivers substantial and unparalleled advancements in capture, search, and processing acceleration. Interface responsiveness is markedly advanced, searches involving massive amounts of data are fast, and hardware filtering is flexible and powerful. “Once installed in a customer test environment the Kodiak’s features and benefits are immediately obvious,” said Paul Mutschler, CEO of SerialTek. -
NVM Express Over Fabrics
NVM Express Over Fabrics Dave Minturn, Intel Corp. OFADevWorkshop NVMe in Fabric Environments • A primary use case for NVMe PCIe SSDs is in an all flash appliance • Hundreds or more SSDs may be attached – too many for PCIe based attach scale-out • Concern: Today remote SSD scale-out over a fabric attach uses SCSI based protocols: Requiring protocol translation Desire best performance and latency from NVMe SSD investment over fabrics like Ethernet with RDMA (iWARP,RoCE), InfiniBand™, and Intel® Omni-Path Architecture Realizing Benefit of Next Gen NVM over Fabrics • PCIe NVMe SSD latency may be < 10 µs with Next Generation NVM • Using a SCSI-based protocol for remote NVMe access ads over 100 µs* in latency • Usage models require efficient write mirroring of PCIe Next Gen NVMe SSDs over fabrics *Source: Intel measurements. Concern: Low latency of Next Gen NVM lost in (SCSI) translation. Why NVMe over Fabrics? Simplicity, Efficiency and End-to-End NVMe Model • Simplicity of protocol enables hardware automated I/O Queues – NVMe transport bridge • No translation to or from another protocol like SCSI (in firmware/software) • Inherent parallelism of NVMe multiple I/O Queues is exposed to the host • NVMe commands and structures are transferred end-to-end • Maintains the NVMe architecture across a range of fabric types • Maintains architecture and software consistency between fabric types by standardizing a common abstraction and encapsulation definition Performance Goal: Make remote NVMe access over fabrics equivalent to local PCIe attached NVMe, -
Delock External Enclosure for M.2 Nvme Pcie SSD with Superspeed USB 20 Gbps (USB 3.2 Gen 2X2) USB Type-C™ Female
Delock External Enclosure for M.2 NVMe PCIe SSD with SuperSpeed USB 20 Gbps (USB 3.2 Gen 2x2) USB Type-C™ female Description This enclosure by Delock enables the installation of anM.2 PCIe NVMe SSD in 2280 format, it can be connected via USB to the PC or laptop. Therobust metal housing with cooling fins ensures an optimum temperature of the memory. SuperSpeed USB 20 Gbps The enclosure allows a data transfer rate of 20 Gbps on the USB-C™ port. Specification Item no. 42000 • Connectors: EAN: 4043619420001 external: 1 x SuperSpeed USB 20 Gbps (USB 3.2 Gen 2x2) USB Type-C™ female internal: 1 x 67 pin M.2 key M slot Country of origin: China • Chipset: Asmedia ASM2364 • Supports M.2 modules in format 2280 with key M or key B+M based on PCIe (NVMe) Package: • Retail Box • Maximum height of the components on the module: 1.5 mm, application of double- sided assembled modules supported • Supports NVM Express (NVMe) • Data transfer rate up to 20 Gbps • LED indicator for power and access • Metal housing • Dimensions (LxWxH): ca. 99 x 50 x 18 mm • Hot Plug, Plug & Play System requirements • Android 9.0 or above • Chrome OS 78.0 or above • Linux Kernel 4.6 or above • Mac OS 10.15.3 or above • Windows 8.1/8.1-64/10/10-64 • PC or laptop with a free USB Type-C™ port • PC or laptop with a free Thunderbolt™ 3 port Package content • External enclosure M.2 • Mounting material • 1 x thermal conductive pad • Screwdriver • Cable USB-C™ male to USB-C™ male, length ca. -
Delock External USB Type-C™ Combo Enclosure for M.2 Nvme Pcie Or SATA SSD - Tool Free
Delock External USB Type-C™ Combo Enclosure for M.2 NVMe PCIe or SATA SSD - tool free Description This enclosure by Delock enables the installation of anM.2 PCIe NVMe SSD or SATA M.2 SSD in 2280, 2260, 2242 and 2230 format. It can be connected directly via USB-C™ plug to the PC or laptop. Combo enclosure The big advantage of this Delock M.2 enclosure is that both SATA and PCIe (NVMe) M.2 SSDs can be inserted into the enclosure. The memory isautomatically recognized by the chipset and can then be used. SSD installation without tools The special feature of this enclosure is that no tools are required to install the M.2 SSD. The lid is pushed backwards and the SSD is plugged into the slot, the SSD will be attached to the PCB with a rubber nipple and then the lid is reattached until it locks. Specification Item no. 42635 • Connectors: EAN: 4043619426355 external: 1 x SuperSpeed USB 10 Gbps (USB 3.2 Gen 2) USB Type-C™ male internal: 1 x 67 pin M.2 key M slot Country of origin: China • Chipset: Realtek RTL9210B • Supports M.2 modules in format 2280, 2260, 2242 and 2230 with key M or key B+M Package: • Retail Box based on SATA or PCIe (NVMe) • Maximum height of the components on the module: 1.5 mm, application of double- sided assembled modules supported • Supports NVM Express (NVMe) • Bootable • Supports UASP • Data transfer rate up to 10 Gbps • LED indicator for power and access • Lanyard strip for cap • Dimensions (LxWxH): ca. -
General Nvme FAQ
General NVMe FAQ 1. What is NVMe? NVMe, more formally NVM Express, is an interface specification optimized for PCI Express based solid state drives. The interface is defined in a scalable fashion such that it can support the needs of Enterprise and Client in a flexible way. 2. Is NVMe an industry standard? NVM Express has been developed by an industry consortium, the NVM Express Workgroup. Version 1.0 of the interface specification was released on March 1, 2011. Over 80 companies participated in the definition of the interface. 3. What is the legal framework of the NVM Express organization? The legal framework is structured as a Special Interest Group (SIG). To join a company executes a Contributor/Adopter agreement. There are 11 member companies who have board seats and provide overall governance. The Governing board is called the NVM Express Promoters Group. There are seven permanent seats and six seats filled by annual elections. Contributor companies are all free to participate in regularly scheduled workinG sessions that develop the interface. All Contributors have equal input into the development of the specification. 4. Who are the companies that form the NVM Express Promoters Group? The Promoters Group is composed of 13 companies, Cisco, Dell, EMC, IDT, Intel, Marvell, Micron, NetApp, Oracle, Samsung, SanDisk, SandForce (now LSI) and STEC. Two elected seats are currently unfilled. 5. Who are the permanent board members? Cisco, Dell, EMC, IDT, Intel, NetApp, and Oracle hold the seven permanent board seats. 6. How is the specification developed? Can anyone contribute? The specification is developed by the NVM Express Working Group. -
Samsung Portable SSD X5
Data Sheet SAMSUNG PROPRIETARY jsdp Samsung Portable SSD X5 2018 Data Sheet )Revision 1.0 Add Title (SamsungOne300, 10pt) Revision 1.0 1 Data Sheet SAMSUNG PROPRIETARY DISCLAIMER SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS AT ANY TIME WITHOUT NOTICE. Information in this document is provided in connection with products of Samsung Electronics Co. Ltd. (“Samsung”). Product descriptions and specifications contained in this document are for reference purposes only. All information discussed in this document may change at any time, without notice, and is provided on an “AS IS” basis, without warranties of any kind. This document and all information discussed in this document remain the sole and exclusive property of Samsung. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by this document, express or implied, by estoppels or otherwise. Except as provided in Samsung’s terms and conditions of sale for such products, Samsung disclaims any express or implied warranty, relating to sale and/or use of Samsung products, including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply. For updates or additional information about Samsung products, contact your local Samsung store or visit Samsung website (https://www.samsung.com/portable-ssd and https://www.samsung.com/support). -
NVM Express Drives and Digital Forensics
NVM Express Drives and Digital Forensics by Bruce J. Nikkel [email protected] January 29, 2016 Abstract This paper provides an overview of NVME technology and discusses the relevance to the digital forensics community. The NVM Express stan- dard defines an interface and command set for communication between a host and non-volatile memory devices (SSD's). It allows the direct at- tachment of SSD storage to the PCI Express bus using PCIe slots, M.2, and U.2 interfaces. NVME was developed with a new command set and is not compatible with ATA/ATAPI or SCSI commands. The introduction of NVME to the market creates new challenges when performing digi- tal forensic acquisition and analysis, where legacy drive commands are expected. Keywords:NVME, PCIE, NVMExpress, PCIExpress, SATAExpress, M.2, U.2 1 1 Introduction to NVM Express The fundamental concepts of digital forensics describe the acquiring of storage media for use as evidence. This includes maximizing data completeness and minimizing data modification during the forensic acquisition process. Forensic tools and techniques for storage media interfaces such as IDE, ATA, SATA, SCSI, and SAS, are well known and tested in the forensics community. However, a new storage standard, NVM Express (NVME), is being introduced to the market which is not necessarily compatible with traditional digital forensics. The digital forensics community needs to be aware of this new storage standard, and take measures to ensure tools, techniques, and processes are adequately updated and tested. The NVM Express standard defines an interface and command set for commu- nication between a host and non-volatile memory devices (SSD's), attached to a system by the PCI Express bus. -
Nvme Over Fibre Channel) Qlogic® Enhanced 16GFC / 32GFC Hbas Concurrent FCP (FC-SCSI) and FC-Nvme (Nvme/FC)
White Paper FC-NVMe (NVMe over Fibre Channel) QLogic® Enhanced 16GFC / 32GFC HBAs Concurrent FCP (FC-SCSI) and FC-NVMe (NVMe/FC) August 2021 Background and Summary Back in 1956, the world’s first hard disk drive (HDD) shipped, setting a path for subsequent generations of drives with faster spinning media and increasing SAS speeds. Then in the early 1990s, various manufacturers introduced storage devices known today as flash- based or dynamic random access memory (DRAM)-based solid state disks (SSDs). The SSDs had no moving (mechanical) components, which allowed them to deliver lower latency and significantly faster access times. HDDs and SSDs have evolved, along with new and faster bus architectures such as PCI Express (PCIe) which have helped to further improve access speeds and reduce latency in conjunc- tion with the Non Volatile Memory Express (NVMe) standard and the ensuing products. Fibre Channel (FC) is a high-speed network technology primarily used to connect enterprise servers to HDD- or SSD-based data storage. 8GFC, 16GFC and 32GFC are the dominant speeds today (with a strong roadmap to 64GFC and beyond). Fibre Channel is standardized in the T11 Technical Committee of the International Committee for Information Technology Standards (INCITS) and has remained the dominant protocol to access shared storage for many decades. Fibre Channel Protocol (FCP) is a transport protocol that predominantly transports SCSI commands over Fibre Channel networks. With the advent of NVMe, FC has transformed to natively transport NVMe and this technological capability is called FC-NVMe. The Evolution of Disk and Fabric 32GFC & FC-NVMe 16GFC & FC-NVMe FC “NVMe” Over Fibre Channel “SCSI” Over Fibre Channel Performance Non-Volatile Memory “Spinning” Drive SAS/SATA “Flash” “Express” (NVMe) Today Time Figure 1: Evolution of Disk and Fibre Channel Fabric SCSI and NVMe Differences While the SCSI/AHCI interface comes with the benefit of wide software compatibility, it cannot deliver optimal performance when used with SSDs connected via the PCIe bus. -
IBM Elastic Storage System 3000: Service Guide Chapter 1
IBM Elastic Storage System 3000 6.0.2 Service Guide IBM SC28-3187-03 Note Before using this information and the product it supports, read the information in “Notices” on page 63. This edition applies to Version 6 release 0 modification 2 of the following product and to all subsequent releases and modifications until otherwise indicated in new editions: • IBM Spectrum® Scale Data Management Edition for IBM® ESS (product number 5765-DME) • IBM Spectrum Scale Data Access Edition for IBM ESS (product number 5765-DAE) IBM welcomes your comments; see the topic “How to submit your comments” on page xiii. When you send information to IBM, you grant IBM a nonexclusive right to use or distribute the information in any way it believes appropriate without incurring any obligation to you. © Copyright International Business Machines Corporation 2019, 2021. US Government Users Restricted Rights – Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Figures.................................................................................................................. v Tables................................................................................................................. vii About this information.......................................................................................... ix Who should read this information...............................................................................................................ix IBM Elastic Storage System information units.......................................................................................... -
Vitex-II Pro: the Platfom for Programmable Systems
The Platform for Programmable Systems Developing high-performance systems with embedded pro- cessors and fast I/O is quite a challenge. To be successful, you Industry’s Fastest must solve the difficult technical FPGA Fabric problems of hardware and Up to 4 IBM PowerPC™ Processors immersed in FPGA Fabric software development, I/O Up to 24 Embedded Rocket I/O™ Multi-Gigabit Transceivers interfacing, and third-party IP Up to 12 Digital Clock Managers integration; you must rigorously XCITE Digitally Controlled Impedance Technology simulate, test, and verify your Up to 556 18x18 Multipliers design; and you must meet Over 10 Mb Embedded Block RAM increasingly difficult deadlines with a cost-effective product that can adapt as industry standards Virtex-II Pro Platform FPGA Family quickly evolve. Benefits are Overwhelming The revolutionary Virtex-II Pro™ Because all of the critical system components (such as microprocessors, memory, IP peripherals, programmable logic, and high-performance I/O) are located on one family, based on the highly successful programmable logic device, you gain a significant performance and productivity Virtex-II architecture, provides a advantage. The Virtex-II Pro FPGA family, along with the Wind River Systems embedded tools and Xilinx ISE development environment, is the fastest, easiest, and unique platform for developing most cost effective method for developing your next generation high-performance high-performance microprocessor- programmable systems. and I/O-intensive applications. With Virtex-II Pro FPGAs, you get: Virtex-II Pro FPGAs provide up to • On-Chip IBM PowerPC Processors – You get maximum performance and ease of use because these are hard cores, operating at peak efficiency, tightly coupled with ™ four embedded 32-bit IBM PowerPC all memory and programmable logic resources. -
Design and Implementation of Clocked Open Core Protocol Interfaces for Intellectual Property Cores and On-Chip Network Fabric
DESIGN AND IMPLEMENTATION OF CLOCKED OPEN CORE PROTOCOL INTERFACES FOR INTELLECTUAL PROPERTY CORES AND ON-CHIP NETWORK FABRIC by Raghu Prasad Gudla A thesis submitted to the faculty of The University of Utah in partial fulfillment of the requirements for the degree of Master of Science Department of Electrical and Computer Engineering The University of Utah May 2011 Copyright c Raghu Prasad Gudla 2011 All Rights Reserved The University of Utah Graduate School STATEMENT OF THESIS APPROVAL This thesis of Raghu Prasad Gudla has been approved by the following supervisory committee members: Kenneth S. Stevens , Chair 01/14/2011 Date Approved Alan L. Davis , Member 01/14/2011 Date Approved Erik L. Brunvand , Member 01/14/2011 Date Approved and by Gianluca Lazzi , Chair of the Department of Electrical and Computer Engineering and by Charles A. Wight, Dean of the Graduate School. ABSTRACT This thesis designs, implements, and evaluates modular Open Core Protocol (OCP) interfaces for Intellectual Property (IP) cores and Network-on-Chip (NoC) that re- duces System-On-Chip (SoC) design time and enables research on different archi- tectural sequencing control methods. To utilize the NoCs design time optimization feature at the boundaries, a standardized industry socket was required, which can address the SoC shorter time-to-market requirements, design issues, and also the subsequent reuse of developed IP cores. OCP is an open industry standard socket interface specification used in this research to enable the IP cores reusability across multiple SoC designs. This research work designs and implements clocked OCP interfaces between IP cores and On-Chip Network Fabric (NoC), in single- and multi- frequency clocked domains.