Cortex-M – the Standard Architecture for MCU Applications
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Fill Your Boots: Enhanced Embedded Bootloader Exploits Via Fault Injection and Binary Analysis
IACR Transactions on Cryptographic Hardware and Embedded Systems ISSN 2569-2925, Vol. 2021, No. 1, pp. 56–81. DOI:10.46586/tches.v2021.i1.56-81 Fill your Boots: Enhanced Embedded Bootloader Exploits via Fault Injection and Binary Analysis Jan Van den Herrewegen1, David Oswald1, Flavio D. Garcia1 and Qais Temeiza2 1 School of Computer Science, University of Birmingham, UK, {jxv572,d.f.oswald,f.garcia}@cs.bham.ac.uk 2 Independent Researcher, [email protected] Abstract. The bootloader of an embedded microcontroller is responsible for guarding the device’s internal (flash) memory, enforcing read/write protection mechanisms. Fault injection techniques such as voltage or clock glitching have been proven successful in bypassing such protection for specific microcontrollers, but this often requires expensive equipment and/or exhaustive search of the fault parameters. When multiple glitches are required (e.g., when countermeasures are in place) this search becomes of exponential complexity and thus infeasible. Another challenge which makes embedded bootloaders notoriously hard to analyse is their lack of debugging capabilities. This paper proposes a grey-box approach that leverages binary analysis and advanced software exploitation techniques combined with voltage glitching to develop a powerful attack methodology against embedded bootloaders. We showcase our techniques with three real-world microcontrollers as case studies: 1) we combine static and on-chip dynamic analysis to enable a Return-Oriented Programming exploit on the bootloader of the NXP LPC microcontrollers; 2) we leverage on-chip dynamic analysis on the bootloader of the popular STM8 microcontrollers to constrain the glitch parameter search, achieving the first fully-documented multi-glitch attack on a real-world target; 3) we apply symbolic execution to precisely aim voltage glitches at target instructions based on the execution path in the bootloader of the Renesas 78K0 automotive microcontroller. -
AVR32 EVK1105 Evaluation Kit
Your Electronic Engineering Resource ATMEL - ATEVK1105 - AVR32 EVK1105 Evaluation Kit Product Overview: The AVR32 EVK1105 is an evaluation kit for the AT32UC3A3256 which combines Atmel’s state of art AVR32 microcontroller with an unrivalled selection of communication interface like USB device including On-The-Go functionality, SDcard, NAND flash with ECC and stereo 16-bit DAC. The AVR32 EVK1105 is an evaluation kit for the AT32UC3A0512 which demonstrates Atmel’s state-of-the-art AVR32 microcontroller in Hi-Fi audio decoding and streaming applications. Kit Contents: The kit contains reference hardware and software for generic MP3 player docking stations. Key Features: High Performance, Low Power AVR®32 UC 32-Bit Microcontroller Multi-Layer Bus System Internal High-Speed Flash Internal High-Speed SRAM Interrupt Controller Power and Clock Manager Including Internal RC Clock and One 32KHz Oscillator Two Multipurpose Oscillators and Two Phase-Lock-Loop (PLL), Watchdog Timer, Real-Time Clock Timer External Memories MultiMediaCard (MMC), Secure-Digital (SD), SDIO V1.1 CE-ATA, FastSD, SmartMedia, Compact Flash Memory Stick: Standard Format V1.40, PRO Format V1.00, Micro IDE Interface One Advanced Encryption System (AES) for AT32UC3A3256S, AT32UC3A3128S and AT32UC3A364S Universal Serial Bus (USB) One 8-channel 10-bit Analog-To-Digital Converter, multiplexed with Digital IOs. Legal Disclaimer: The content of the pages of this website is for your general information and use only. It is subject to change without notice. From time to time, this website may also include links to other websites. These links are provided for your convenience to provide further information. They do not signify that we endorse the website(s). -
MSP430FR2433 Mixed-Signal Microcontroller
Product Order Technical Tools & Support & Folder Now Documents Software Community MSP430FR2433 SLASE59C –OCTOBER 2015–REVISED AUGUST 2018 MSP430FR2433 Mixed-Signal Microcontroller 1 Device Overview 1.1 Features 1 • Embedded Microcontroller Storage – 16-Bit RISC Architecture – 1015 Write Cycle Endurance – Clock Supports Frequencies up to 16 MHz – Radiation Resistant and Nonmagnetic – Wide Supply Voltage Range From 3.6 V Down – High FRAM-to-SRAM Ratio, up to 4:1 to 1.8 V (Minimum Supply Voltage is Restricted • Clock System (CS) by SVS Levels, See the SVS Specifications) – On-Chip 32-kHz RC Oscillator (REFO) • Optimized Ultra-Low-Power Modes – On-Chip 16-MHz Digitally Controlled Oscillator – Active Mode: 126 µA/MHz (Typical) (DCO) With Frequency-Locked Loop (FLL) – Standby: <1 µA With VLO – ±1% Accuracy With On-Chip Reference at – LPM3.5 Real-Time Clock (RTC) Counter With Room Temperature 32768-Hz Crystal: 730 nA (Typical) – On-Chip Very Low-Frequency 10-kHz Oscillator – Shutdown (LPM4.5): 16 nA (Typical) (VLO) • High-Performance Analog – On-Chip High-Frequency Modulation Oscillator – 8-Channel 10-Bit Analog-to-Digital Converter (MODOSC) (ADC) – External 32-kHz Crystal Oscillator (LFXT) – Internal 1.5-V Reference – Programmable MCLK Prescalar of 1 to 128 – Sample-and-Hold 200 ksps – SMCLK Derived from MCLK With • Enhanced Serial Communications Programmable Prescalar of 1, 2, 4, or 8 – Two Enhanced Universal Serial Communication • General Input/Output and Pin Functionality Interfaces (eUSCI_A) Support UART, IrDA, and – Total of 19 I/Os on -
Schedule 14A Employee Slides Supertex Sunnyvale
UNITED STATES SECURITIES AND EXCHANGE COMMISSION Washington, D.C. 20549 SCHEDULE 14A Proxy Statement Pursuant to Section 14(a) of the Securities Exchange Act of 1934 Filed by the Registrant Filed by a Party other than the Registrant Check the appropriate box: Preliminary Proxy Statement Confidential, for Use of the Commission Only (as permitted by Rule 14a-6(e)(2)) Definitive Proxy Statement Definitive Additional Materials Soliciting Material Pursuant to §240.14a-12 Supertex, Inc. (Name of Registrant as Specified In Its Charter) Microchip Technology Incorporated (Name of Person(s) Filing Proxy Statement, if other than the Registrant) Payment of Filing Fee (Check the appropriate box): No fee required. Fee computed on table below per Exchange Act Rules 14a-6(i)(1) and 0-11. (1) Title of each class of securities to which transaction applies: (2) Aggregate number of securities to which transaction applies: (3) Per unit price or other underlying value of transaction computed pursuant to Exchange Act Rule 0-11 (set forth the amount on which the filing fee is calculated and state how it was determined): (4) Proposed maximum aggregate value of transaction: (5) Total fee paid: Fee paid previously with preliminary materials. Check box if any part of the fee is offset as provided by Exchange Act Rule 0-11(a)(2) and identify the filing for which the offsetting fee was paid previously. Identify the previous filing by registration statement number, or the Form or Schedule and the date of its filing. (1) Amount Previously Paid: (2) Form, Schedule or Registration Statement No.: (3) Filing Party: (4) Date Filed: Filed by Microchip Technology Incorporated Pursuant to Rule 14a-12 of the Securities Exchange Act of 1934 Subject Company: Supertex, Inc. -
Using Energia (Arduino)
Using Energia (Arduino) Introduction This chapter of the MSP430 workshop explores Energia, the Arduino port for the Texas Instruments Launchpad kits. After a quick definition and history of Arduino and Energia, we provide a quick introduction to Wiring – the language/library used by Arduino & Energia. Most of the learning comes from using the Launchpad board along with the Energia IDE to light LED’s, read switches and communicate with your PC via the serial connection. Learning Objectives, Requirements, Prereq’s Prerequisites & Objectives Prerequisites Basic knowledge of C language Basic understanding of using a C library and header files This chapter doesn’t explain clock, interrupt, and GPIO features in detail, this is left to the other chapters in the MSP430 workshop Requirements - Tools and Software Hardware Windows (XP, 7, 8) PC with available USB port MSP430F5529 Launchpad Software Already installed, if you Energia Download have installed CCSv5.x Launchpad drivers (Optional) MSP430ware / Driverlib Objectives Define ‘Arduino’ and describe what is was created for Define ‘Energia’ and explain what it is ‘forked’ from Install Energia, open and run included example sketches Use serial communication between the board & PC Add an external interrupt to an Energia sketch Modify CPU registers from an Energia sketch MSP430 Workshop - Using Energia (Arduino) 8 - 1 What is Arduino Chapter Topics Using Energia (Arduino) ............................................................................................................ -
Design Considerations When Using the MSP430 Graphics Library, and Provides an Example of Implementation and Optimization
www.ti.com 1 Trademarks MSP430, MSP430Ware are trademarks of Texas Instruments. Stellaris is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners. SLAA548–October 2012 1 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Application Report SLAA548–October 2012 Design Considerations When Using MSP430 Graphics Library Michael Stein ABSTRACT LCDs are a growing commodity in today’s market with products as diverse as children’s toys to medical devices. Modern LCDs, along with the graphics displayed on them, are growing in complexity. A graphics library can simplify and accelerate development while creating the desired user experience. TI provides the MSP430 Graphics Library for use in developing products with the MSP430™ MCU. This application report describes design considerations when using the MSP430 Graphics Library, and provides an example of implementation and optimization. Project collateral discussed in this application report can be downloaded from the following URL: www.ti.com/lit/zip/SLAA548. Contents 2 Introduction to the MSP430 Graphics Library............................................................................ 2 3 System Overview ............................................................................................................ 3 4 Hardware Implementation - LCD Bus Type .............................................................................. 4 5 Software Implementation- LCD Display Driver Layer .................................................................. -
Cross-Compiling Linux Kernels on X86 64: a Tutorial on How to Get Started
Cross-compiling Linux Kernels on x86_64: A tutorial on How to Get Started Shuah Khan Senior Linux Kernel Developer – Open Source Group Samsung Research America (Silicon Valley) [email protected] Agenda ● Cross-compile value proposition ● Preparing the system for cross-compiler installation ● Cross-compiler installation steps ● Demo – install arm and arm64 ● Compiling on architectures ● Demo – compile arm and arm64 ● Automating cross-compile testing ● Upstream cross-compile testing activity ● References and Package repositories ● Q&A Cross-compile value proposition ● 30+ architectures supported (several sub-archs) ● Native compile testing requires wide range of test systems – not practical ● Ability to cross-compile non-natively on an widely available architecture helps detect compile errors ● Coupled with emulation environments (e.g: qemu) testing on non-native architectures becomes easier ● Setting up cross-compile environment is the first and necessary step arch/ alpha frv arc microblaze h8300 s390 um arm mips hexagon score x86_64 arm64 mn10300 unicore32 ia64 sh xtensa avr32 openrisc x86 m32r sparc blackfin parisc m68k tile c6x powerpc metag cris Cross-compiler packages ● Ubuntu arm packages (12.10 or later) – gcc-arm-linux-gnueabi – gcc-arm-linux-gnueabihf ● Ubuntu arm64 packages (13.04 or later) – use arm64 repo for older Ubuntu releases. – gcc-4.7-aarch64-linux-gnu ● Ubuntu keeps adding support for compilers. Search Ubuntu repository for packages. Cross-compiler packages ● Embedded Debian Project is a good resource for alpha, mips, -
Differences Between the TI MSP430 and MC9S08QE128 And
Freescale Semiconductor Document Number: AN3502 Application Note Rev. 0, 09/2007 Differences between the TI MSP430 and MC9S08QE128 and MCF51QE128 Flexis Microcontrollers by: Inga Harris 8-bit Microcontoller Applications Engineer East Kilbride, Scotland 1 Introduction Contents 1 Introduction . 1 From the RS08 to our highest-performance ColdFire® 2 Top Level Specification Comparison . 2 3 Module Comparisons. 3 V4 devices, the Controller Continuum provides 3.1 12-bit Analog to Digital Convertor (ADC). 3 compatibility for an easy migration path up or down the 3.2 Analog Comparators . 4 performance spectrum. The connection point on the 3.3 Real Time Counter / Clock (RTC) . 5 3.4 I/O and Keyboard Interrupts . 6 Controller Continuum is where complimentary families 3.5 Hardware Multiplier . 7 of the S08 and ColdFire V1 (CFV1) microcontrollers 3.6 Low Voltage Detect (LVD). 7 3.7 Timer . 8 share a common set of peripherals and development tools 3.8 Interrupt Request (IRQ). 9 to deliver the ultimate in migration flexibility. 3.9 Watchdog . 9 Pin-for-pin compatibility between many devices allows 3.10 Flash Comparison . 9 3.11 Communications Peripherals. 11 controller exchanges without redesigning the board. The 3.12 Debugger. 13 MC9S08QE128 and the MCF51QE128 are the first 4 Clock Generator Module . 14 4.1 Functional Differences. 17 products in this series known as Flexis. 4.2 Clock Modes . 18 4.3 Clock Gating . 18 The term Flexis means a single development tool to ease 5 CPU Cores . 19 migration between 8-bit (S08) and 32-bit (CFV1), a 5.1 CPU Performance . 19 common peripheral set to preserve software investment 5.2 CPU Modes . -
Introduction to AVR®
Introduction to AVR® By BiPOM Electronics, Inc. Revision 1.02 © 2011 BiPOM Electronics, Inc. All rights reserved. All trademark names in this document are the property of their respective owners. AVR® History · The AVR® architecture was conceived by two students at the Norwegian Institute of Technology. · The original AVR® was known as μRISC (Micro RISC). · Among the first of the AVR® line was the AT90S8515, which in a 40-pin DIP package has the same pinout as an 8051 microcontroller. · The creators of the AVR® give no definitive answer as to what the term "AVR" stands for. AVR® Features · Some 8-bit, some 32-bit · TinyAVR, megaAVR, XMEGA, FPSLIC · Harvard Architecture for 8-bit devices: Separate code and data space · Flash, EEPROM and SRAM are all on a single chip, eliminating the need for external memory. · All code executed by the AVR® core must reside in the on-chip flash. · Most instructions take just one or two clock cycles. · The AVR family of processors were designed with the efficient execution of compiled C code in mind. Why AVR® ? · The AVR® instruction set is more powerful than PIC or 8051. · The AVR® runs instructions very fast (can execute 1 instruction in 1 machine clock cycle) · AVR® is a good choice for industrial projects. Frequently Asked Questions Can AVR® run an OS? - Yes, AVR32 can run Linux core 2.6.XX with BusyBox What programming languages are for programming AVR® microcontroller? - There are many different languages but most commonly used are C and BASCOM BASIC. Does BiPOM offer AVR® design services ? – Yes, -
Ti Msp430 Microcontrollers
TI MSP430 MICROCONTROLLERS BY ADITYA PATHAK THE MSP FAMILY • Ultra-low power; mixed signal processors • Widely used in battery operated applications • Uses Von Neumann architecture to connect CPU, peripherals and buses • AVR is commonly used debugger The MSP family (cont.) • 1 to 60 kB flash • 256B to 2kB RAM • With or without Hardware multipliers, UART and ADC • SMD package with 20 to 100 pins • MSP 430 family has 4 kB flash, 256B RAM, 2 timers and S0-20 package Memory Organization Architecture: Basic Elements • 16 bit RISC processor • Programmable 10/12 bit ADC • 12 bit Dual DAC for accurate analog voltage representation • Supply voltage supervisor for detection of Gray level • Programmable timers, Main and Auxiliary crystal circuits CPU features • Reduced Instruction Set Computer Architecture • 27 instructions wide instruction set • 7 orthogonal addressing modes • Memory to Memory data transfer • Separate 16 bit Address and Data buses • 2 constant number generators to optimize code Instruction Set • 27 “CORE” instruction and 24 “EMULATED” instructions • No code or performance penalties for Emulated instructions • Instructions can be for word or byte operands (.W / .B) • Classified into 3 groups Single Operand Instructions: RR, RRC, PUSH, CALL Dual Operand Instructions: MOV, ADD, SUB Jumps: JEQ, JZ, JMP Clock sub-system Basic Clock module includes: • LFXT1 – LF/HF crystal circuit, that uses either 32,768 Hz crystal (LF); or standard resonators in 450K-8MHz range • XT2 – optional HF oscillator that can be used with standard crystals -
MSP430 Family Architecture
MSP430 Family Architecture CPE621 Advanced Microcomputer Techniques Dr. Emil Jovanov CPE 621 MSP430 Architecture 1 Technology • Ultra low power – The MSP430 platform of ultra-low-power 16-bit RISC mixed-signal processors • 0.1 µA RAM retention • 0.8 µA real-time clock mode • 250 µA/MIPS active – MSP430x5xx – new Flash-based family featuring the lowest power consumption • up to 25 MIPS with 1.8 to 3.6V operation starting at 12 MIPS • New features include an innovative Power Management Module for optimizing power consumption, an internally controlled voltage regulator, and 2x more memory than previous devices. • Low power & high performance – TMS320C550x DSPs Industry’s lowest power fixed-point DSP • Large on-chip memory • optimized FFT co-processor for faster, cost- and energy-efficient performance – One-half the power consumption of existing TMS320C55x™ DSPs • 6.8 µW* in deep sleep mode (all peripheral clocks off) • 18/46 mW at 60/100 MHz • Applications: medical monitoring, noise cancellation headphones and portable audio/music recording CPE 621 MSP430 Architecture 2 1 MSP430 Family • MSP430x1xx – 1.8V to 3.6V operation –up to 60kB – 8MIPs with Basic Clock – from a simple low power controller with a comparator, to complete systems on a chip including high- performance data converters, interfaces and multiplier. • MSP430F2xx – up to 16 MHz – an integrated ±1% on-chip very lowpower oscillator, – software-selectable, internal pullup/pull-down resistors – increased number of analog inputs – the in-system programmable Flash has also been improved with smaller 64-byte segments and a lower 2.2-V programming voltage – Available in low-pin count options. -
GNU Toolchain for Atmel AVR 32-Bit Embedded Processors
RELEASE NOTES GNU Toolchain for Atmel AVR 32-bit Embedded Processors Introduction The Atmel AVR® 32-bit GNU Toolchain (3.4.3.820) supports all AVR 32-bit devices. The AVR 32-bit Toolchain is based on the free and open-source GCC compiler. The toolchain includes compiler, assembler, linker, and binutils (GCC and Binutils), Standard C library (Newlib). 32215A-MCU-08/2015 Table of Contents Introduction .................................................................................... 1 1. Installation Instructions .......................................................... 3 1.1. System Requirements ............................................................ 3 1.1.1. Hardware Requirements ............................................. 3 1.1.2. Software Requirements .............................................. 3 1.2. Downloading, Installing, and Upgrading ..................................... 3 1.2.1. Downloading/Installing on Windows .............................. 3 1.2.2. Downloading/Installing on Linux ................................... 3 1.2.3. Upgrading from previous versions ................................ 3 1.2.4. Manifest .................................................................. 3 1.3. Layout ................................................................................. 4 2. Toolset Background ................................................................ 5 2.1. Compiler .............................................................................. 5 2.2. Assembler, Linker, and Librarian .............................................