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Al39-01C Contents HONEYWELL DPS/LEVEL 68 & DPS 8M MULTICS PROCESSOR MANUAL HARDWARE PREFACE This manual describes the processors used in the Multics system. These are the DPS/L68, which refers to the DPS, L68 or older model processors (excluding the GE-645) and DPS 8M, which refers to the DPS 8 family of Multics processors, i.e. DPS 8/70M, DPS 8/62M and DPS 8/52M. The reader should be familiar with the overall modular organization of the Multics system and with the philosophy of asynchronous operation. In addition, this manual presents a discussion of virtual memory addressing concepts including segmentation and paging. The manual is intended for use by systems programmers responsible for writing software to interface with the virtual memory hardware and with the fault and interrupt portions of the hardware. It should also prove valuable to programmers who must use machine instructions (particularly language translator implementors) and to those persons responsible for analyzing crash conditions in system dumps. This manual includes the processor capabilities, modes of operation, functions, and detailed descriptions of machine instructions. Data representation, program-addressable registers, addressing by means of segmentation and paging, faults and interrupts, hardware ring implementation, and cache operation are also covered. The information and specifications in this document are subject to change without notice. Consult your Honeywell Marketing Representative for product or service availability. 11/85 ©Honeywell Information Systems Inc., 1985 File No.: 1L03, 1L53 AL39-01C CONTENTS Preface...............................................................................................................................................2 Section 1: Introduction.......................................................................................................................8 Multics Processor Features.......................................................................................8 Segmentation and Paging...................................................................................8 Address Modification and Address Appending...................................................9 Faults and Interrupts..........................................................................................9 Processor Modes of Operation..................................................................................9 Instruction Execution Modes............................................................................10 Normal Mode.............................................................................................10 Privileged Mode.........................................................................................10 Addressing Modes............................................................................................10 Absolute Mode...........................................................................................10 Append Mode.............................................................................................10 BAR Mode..................................................................................................10 Processor Unit Functions........................................................................................10 Appending Unit.................................................................................................11 Associative Memory Assembly..........................................................................11 Control Unit......................................................................................................11 Operation Unit..................................................................................................11 Decimal Unit.....................................................................................................11 Section 2: Data Representation........................................................................................................12 Information Organization........................................................................................12 Position Numbering.................................................................................................12 Number System.......................................................................................................12 Information Formats...............................................................................................13 Data Parity..............................................................................................................14 Representation of Data............................................................................................14 Numeric Data...................................................................................................15 Fixed-point Binary Data.............................................................................15 Floating-point Binary Data.........................................................................17 Decimal Data.............................................................................................19 Alphanumeric Data...........................................................................................21 Character String Data................................................................................22 Bit String Data...........................................................................................22 Section 3: Program Accessible Registers.........................................................................................23 Accumulator Register (A)........................................................................................24 Quotient Register (Q)..............................................................................................24 Accumulator-Quotient Register (AQ).......................................................................25 Exponent Register (E).............................................................................................25 Exponent-Accumulator-Quotient Register (EAQ).....................................................26 Index Registers (Xn)................................................................................................26 Indicator Register (IR).............................................................................................27 Base Address Register (BAR)..................................................................................30 Timer Register (TR).................................................................................................30 Ring Alarm Register (RALR)....................................................................................31 Pointer Registers (PRn)...........................................................................................31 Address Registers (ARn)..........................................................................................32 Procedure Pointer Register (PPR)...........................................................................33 Temporary Pointer Register (TPR)..........................................................................34 Descriptor Segment Base Register (DSBR).............................................................36 Segment Descriptor Word Associative Memory (SDWAM)......................................37 Page Table Word Associative Memory (PTWAM)....................................................39 Fault Register (FR) – DPS and L68..........................................................................41 Fault Register (FR) - DPS 8M..................................................................................43 Mode Register (MR) - DPS and L68.........................................................................45 Mode Register (MR) - DPS 8M................................................................................48 Cache Mode Register (CMR) - DPS and L68...........................................................49 Cache Mode Register (CMR) - DPS 8M...................................................................51 Control Unit (CU) History Registers - DPS and L68................................................53 Control Unit (CU) History Registers - DPS 8M........................................................55 Operations Unit (OU) History Registers - DPS and L68..........................................57 Decimal Unit (DU) History Registers - DPS and L68...............................................59 Decimal/Operations Unit (DU/OU) History Registers - DPS 8M..............................61 Appending Unit (APU) History Registers - DPS and L68.........................................64 Appending Unit (APU) History Registers – DPS 8M................................................65 Configuration Switch Data - DPS and L68...............................................................68 Configuration Switch Data - DPS 8M......................................................................69 Control Unit Data....................................................................................................71 Decimal Unit Data...................................................................................................76 Section 4: Machine Instructions.......................................................................................................79 Instruction Repertoire.............................................................................................79 Arrangement of Instructions.............................................................................79
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