Intel® Distribution of Openvino™ Toolkit Dr

Total Page:16

File Type:pdf, Size:1020Kb

Intel® Distribution of Openvino™ Toolkit Dr Intel® Distribution of OpenVINO™ toolkit Dr. Séverine Habert, Deep Learning Software Engineer April 9th, 2021 AI Compute Considerations How do you determine the right computing for your AI needs? Workloads requirements demand ASIC/ 1 FPGA/ GPU CPU 2 3 Utilization Scale What is my What are my use case How prevalent is AI workload profile? requirements? in my environment? Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 2 Intel® Distribution of OpenVINO™ Toolkit ▪ Tool Suite for High-Performance, Deep Learning Inference ▪ Fast, accurate real-world results using high-performance, AI and computer vision inference deployed into production across Intel® architecture from edge to cloud High-Performance, Streamlined Development, Write Once, Deep Learning Inference Ease of Use Deploy Anywhere • Enables deep learning inference from the edge to cloud. • Supports heterogeneous execution across Intel accelerators, using a common • Speeds time-to-market through an easy-to-use library of CV functions and pre- API for the Intel® CPU, Intel® Integrated Graphics, Intel® Gaussian & Neural optimized kernels. Accelerator, Intel® Neural Compute Stick 2, Intel® Vision Accelerator Design with • Includes optimized calls for CV standards, including OpenCV* and OpenCL™. Intel® Movidius™ VPUs. Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 3 Three steps for the Intel® Distribution of OpenVINO™ toolkit 1 Build 2 Optimize 3 Deploy Model Server Read, Load, Infer gRPC/ REST Server with C++ backend Model Optimizer Inference Engine Converts and optimizes Intermediate Common API that IR Data Deployment Manager trained model using a Representation abstracts low-level supported framework (.xml, .bin) programming for each hardware Trained Model Deep Learning Streamer Post-Training Optimization Tool Reduces model size into low- precision without re-training OpenCV OpenCL™ [NEW] Deep Learning Workbench Code Samples & Demos Open Model Zoo Visually analyze and fine-tune (e.g. Benchmark app, Accuracy Checker, Model Downloader) Intel® 100+ open sourced & optimized GNA [NEW] Available on Intel® DevCloud (IP) pre-trained models available for the Edge as a Beta release Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 4 Supported Frameworks Breadth of supported frameworks to enable developers with flexibility Trained Model (and other tools via ONNX* conversion) Supported Frameworks and Formats https://docs.openvinotoolkit.org/latest/_docs_IE_DG_Introduction.html#SupportedFW Configure the Model Optimizer for your Framework https://docs.openvinotoolkit.org/latest/_docs_MO_DG_prepare_model_Config_Model_Optimizer.html Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 5 Model Optimization Breadth of supported frameworks to enable developers with flexibility Model Optimizer loads a model into memory, reads it, builds the internal representation of the model, optimizes it, and produces the Read, Load, Infer Intermediate Representation. Trained Model Optimizer Intermediate Model IR Data Representation Optimization techniques available are: (.xml, .bin) — Linear operation fusing — Stride optimizations .xml – describes the network topology .bin – describes the weights and biases binary data — Group convolutions fusing Note: Except for ONNX (.onnx model formats), all models have to be converted to an IR format to use as input to the Inference Engine Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 6 Optimal Model Performance Using the Inference Engine Core Inference Engine Libraries Applications ▪ Create Inference Engine Core object to Inference Engine work with devices runtime ▪ Read the network Inference Engine (Common API) ▪ Manipulate network information Multi-device plugin (optional but recommended - for full system utilization) ▪ Execute and pass inputs and outputs Myriad & HDDL mkl-dnn plugin clDNN plugin GNA plugin FPGA plugin plugins Plugin architecture Device-specific Plugin Libraries ▪ For each supported target device, Intrinsics OpenCL™ GNA API Movidius API DLA Inference Engine provides a plugin — a DLL/shared library that contains Intel® GNA complete implementation for inference (IP) on this device. Available on LTS releases GPU = Intel CPU with integrated graphics/Intel® Processor Graphics/GEN GNA = Gaussian mixture model and Neural Network Accelerator Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 7 Inference Engine Synchronous vs Asynchronous Execution ▪ In IE API model can be executed by Infer Request which ▪ Asynchronous – checks the execution status with the can be: wait or specify a completion callback (recommended ▪ Synchronous - blocks until inference is completed. way). ▪ ▪ exec_net.infer(inputs = {input_blob: in_frame}) exec_net.start_async(request_id = id, inputs={input_blob: in_frame}) ▪ If exec_net.requests[id].wait() != 0 do something Sync Transfer 1 Transfer 2 API Inference 1 Inference 2 Result 1 Result 2 time Result 1 Result 2 Async Transfer 1 Transfer 2 API Inference 1 Inference 2 Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 8 Inference Engine Throughput Mode for CPU, iGPU and VPU ▪ Latency – inference time of 1 frame (ms). Device ▪ Throughput – overall amount of frames inferred Infer Request 1 Executionresources stream 1 per 1 second (FPS) Infer Request 2 Execution stream 2 ▪ “Throughput" mode allows the Inference Engine to efficiently run multiple infer requests Infer Request N Execution stream N simultaneously, greatly improving the overall throughput. ▪ Device resources are divided into execution time “streams” – parts which runs infer requests in CPU Example: parallel ie = IECore() ie.GetConfig(CPU, KEY_CPU_THROUGHPUT_STREAMS) Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 9 Inference Engine Heterogeneous Support ▪ You can execute different layers on different HW units ▪ Offload unsupported layers on fallback devices: ▪ Default affinity policy ▪ Setting affinity manually (CNNLayer::affinity) ▪ All device combinations are supported (CPU, GPU, FPGA, MYRIAD, HDDL) ▪ Samples/demos usage “-d HETERO:FPGA,CPU” FPGA InferenceEngine::Core core; auto executable_network = core.LoadNetwork(reader.getNetwork(), "HETERO:FPGA,CPU"); CPU Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 10 Inference Engine Multi-device Support Automatic load-balancing between devices Application (inference requests level) for full system Device priority Infer requests utilization Inference Engine Queue Manager ▪ Аny combinations of the following devices are CPU GPU VPU supported (CPU, iGPU, VPU, HDDL) queue queue queue ▪ As easy as “-d MULTI:CPU,GPU” for cmd-line option of your favorite sample/demo ▪ C++ example (Python is similar) CPU GPU VPU Plugin Plugin Plugin Core ie; ExecutableNetwork exec = CPU GPU VPU etc ie.LoadNetwork(network,{{“DEVICE_PRIORITIES”, “CPU,GPU”}}, “MULTI”) Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 11 Post-Training Optimization Tool Conversion technique that reduces model size into low-precision without re-training Trained Model Model trained using one of the supported Dataset and Annotation framework Reduces model size while also improving latency, with little degradation in model accuracy and without model re-training. Statistics & Accuracy and JSON Different optimization approaches are performance check Model Optimizer Converts and optimizes Post-training Optimization supported: quantization algorithms, etc. trained model using a IR Accuracy supported framework Tool Checker Full-Precision IR Conversion technique to quantize models to low precision for high Environment (hardware) performance specifications JSON IR Optimized IR Inference Engine Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 12 Deep Learning Workbench Web-based UI extension tool for model analyses and graphical measurements ▪ Visualizes performance data for topologies and layers to aid in model analysis ▪ Automates analysis for optimal performance configuration (streams, batches, latency) ▪ Experiment with INT8 or Winograd calibration for optimal tuning using the Post Training Optimization Tool ▪ Provide accuracy information through accuracy checker ▪ Direct access to models from public set of Open Model Zoo ▪ Enables remote profiling, allowing the collection of performance data from multiple different machines without any additional set-up. Intel® Distribution of OpenVINO™ toolkit / Product Overview 2020 © Copyright, Intel Corporation 13 Pre-Trained Models and Public Models Open-sourced repository of pre-trained models and support for public models 100+ Pre-trained Models 100+ Public Models Common AI tasks Pre-optimized external models Use free Pre-trained Models to speed up Object Detection Classification development and deployment Object Recognition Segmentation Reidentification Object Detection Take advantage of the Model Downloader Semantic Segmentation Human Pose Estimation and other automation tools to quickly get Instance Segmentation Monocular Depth Estimation started Human Pose Estimation Image Inpainting Image Processing Style Transfer Iterate with the Accuracy Checker to Text Detection Action Recognition validate the accuracy of your models Text
Recommended publications
  • SOL: Effortless Device Support for AI Frameworks Without Source Code Changes
    SOL: Effortless Device Support for AI Frameworks without Source Code Changes Nicolas Weber and Felipe Huici NEC Laboratories Europe Abstract—Modern high performance computing clusters heav- State of the Art Proposed with SOL ily rely on accelerators to overcome the limited compute power API (Python, C/C++, …) API (Python, C/C++, …) of CPUs. These supercomputers run various applications from different domains such as simulations, numerical applications or Framework Core Framework Core artificial intelligence (AI). As a result, vendors need to be able to Device Backends SOL efficiently run a wide variety of workloads on their hardware. In the AI domain this is in particular exacerbated by the Fig. 1: Abstraction layers within AI frameworks. existance of a number of popular frameworks (e.g, PyTorch, TensorFlow, etc.) that have no common code base, and can vary lines of code to their scripts in order to enable SOL and its in functionality. The code of these frameworks evolves quickly, hardware support. making it expensive to keep up with all changes and potentially We explore two strategies to integrate new devices into AI forcing developers to go through constant rounds of upstreaming. frameworks using SOL as a middleware, to keep the original In this paper we explore how to provide hardware support in AI frameworks without changing the framework’s source code in AI framework unchanged and still add support to new device order to minimize maintenance overhead. We introduce SOL, an types. The first strategy hides the entire offloading procedure AI acceleration middleware that provides a hardware abstraction from the framework, and the second only injects the necessary layer that allows us to transparently support heterogenous hard- functionality into the framework to enable the execution, but ware.
    [Show full text]
  • Intel® Deep Learning Boost (Intel® DL Boost) Product Overview
    Intel® Deep Learning boost Built-in acceleration for training and inference workloads 11 Run complex workloads on the same Platform Intel® Xeon® Scalable processors are built specifically for the flexibility to run complex workloads on the same hardware as your existing workloads 2 Intel avx-512 Intel Deep Learning boost Intel VNNI, bfloat16 Intel VNNI 2nd & 3rd Generation Intel Xeon Scalable Processors Based on Intel Advanced Vector Extensions Intel AVX-512 512 (Intel AVX-512), the Intel DL Boost Vector 1st, 2nd & 3rd Generation Intel Xeon Neural Network Instructions (VNNI) delivers a Scalable Processors significant performance improvement by combining three instructions into one—thereby Ultra-wide 512-bit vector operations maximizing the use of compute resources, capabilities with up to two fused-multiply utilizing the cache better, and avoiding add units and other optimizations potential bandwidth bottlenecks. accelerate performance for demanding computational tasks. bfloat16 3rd Generation Intel Xeon Scalable Processors on 4S+ Platform Brain floating-point format (bfloat16 or BF16) is a number encoding format occupying 16 bits representing a floating-point number. It is a more efficient numeric format for workloads that have high compute intensity but lower need for precision. 3 Common Training and inference workloads Image Classification Speech Recognition Language Translation Object Detection 4 Intel Deep Learning boost A Vector neural network instruction (vnni) Extends Intel AVX-512 to Accelerate Ai/DL Inference Intel Avx-512 VPMADDUBSW VPMADDWD VPADDD Combining three instructions into one UP TO11X maximizes the use of Intel compute resources, DL throughput improves cache utilization vs. current-gen Vnni and avoids potential Intel Xeon Scalable CPU VPDPBUSD bandwidth bottlenecks.
    [Show full text]
  • DL-Inferencing for 3D Cephalometric Landmarks Regression Task Using Openvino?
    DL-inferencing for 3D Cephalometric Landmarks Regression task using OpenVINO? Evgeny Vasiliev1[0000−0002−7949−1919], Dmitrii Lachinov1;2[0000−0002−2880−2887], and Alexandra Getmanskaya1[0000−0003−3533−1734] 1 Institute of Information Technologies, Mathematics and Mechanics, Lobachevsky State University 2 Department of Ophthalmology and Optometry, Medical University of Vienna [email protected], [email protected], [email protected] Abstract. In this paper, we evaluate the performance of the Intel Distribution of OpenVINO toolkit in practical solving of the problem of automatic three- dimensional Cephalometric analysis using deep learning methods. This year, the authors proposed an approach to the detection of cephalometric landmarks from CT-tomography data, which is resistant to skull deformities and use convolu- tional neural networks (CNN). Resistance to deformations is due to the initial detection of 4 points that are basic for the parameterization of the skull shape. The approach was explored on CNN for three architectures. A record regression accuracy in comparison with analogs was obtained. This paper evaluates the per- formance of decision making for the trained CNN-models at the inference stage. For a comparative study, the computing environments PyTorch and Intel Distribu- tion of OpenVINO were selected, and 2 of 3 CNN architectures: based on VGG for regression of cephalometric landmarks and an Hourglass-based model, with the RexNext backbone for the landmarks heatmap regression. The experimen- tal dataset was consist of 20 CT of patients with acquired craniomaxillofacial deformities and was include pre- and post-operative CT scans whose format is 800x800x496 with voxel spacing of 0.2x0.2x0.2 mm.
    [Show full text]
  • Dr. Fabio Baruffa Senior Technical Consulting Engineer, Intel IAGS Legal Disclaimer & Optimization Notice
    Dr. Fabio Baruffa Senior Technical Consulting Engineer, Intel IAGS Legal Disclaimer & Optimization Notice Performance results are based on testing as of September 2018 and may not reflect all publicly available security updates. See configuration disclosure for details. No product can be absolutely secure. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit www.intel.com/benchmarks. INFORMATION IN THIS DOCUMENT IS PROVIDED “AS IS”. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO THIS INFORMATION INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Copyright © 2019, Intel Corporation. All rights reserved. Intel, the Intel logo, Pentium, Xeon, Core, VTune, OpenVINO, Cilk, are trademarks of Intel Corporation or its subsidiaries in the U.S. and other countries. Optimization Notice Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations.
    [Show full text]
  • Accelerate Scientific Deep Learning Models on Heteroge- Neous Computing Platform with FPGA
    Accelerate Scientific Deep Learning Models on Heteroge- neous Computing Platform with FPGA Chao Jiang1;∗, David Ojika1;5;∗∗, Sofia Vallecorsa2;∗∗∗, Thorsten Kurth3, Prabhat4;∗∗∗∗, Bhavesh Patel5;y, and Herman Lam1;z 1SHREC: NSF Center for Space, High-Performance, and Resilient Computing, University of Florida 2CERN openlab 3NVIDIA 4National Energy Research Scientific Computing Center 5Dell EMC Abstract. AI and deep learning are experiencing explosive growth in almost every domain involving analysis of big data. Deep learning using Deep Neural Networks (DNNs) has shown great promise for such scientific data analysis appli- cations. However, traditional CPU-based sequential computing without special instructions can no longer meet the requirements of mission-critical applica- tions, which are compute-intensive and require low latency and high throughput. Heterogeneous computing (HGC), with CPUs integrated with GPUs, FPGAs, and other science-targeted accelerators, offers unique capabilities to accelerate DNNs. Collaborating researchers at SHREC1at the University of Florida, CERN Openlab, NERSC2at Lawrence Berkeley National Lab, Dell EMC, and Intel are studying the application of heterogeneous computing (HGC) to scientific prob- lems using DNN models. This paper focuses on the use of FPGAs to accelerate the inferencing stage of the HGC workflow. We present case studies and results in inferencing state-of-the-art DNN models for scientific data analysis, using Intel distribution of OpenVINO, running on an Intel Programmable Acceleration Card (PAC) equipped with an Arria 10 GX FPGA. Using the Intel Deep Learning Acceleration (DLA) development suite to optimize existing FPGA primitives and develop new ones, we were able accelerate the scientific DNN models under study with a speedup from 2.46x to 9.59x for a single Arria 10 FPGA against a single core (single thread) of a server-class Skylake CPU.
    [Show full text]
  • Deploying a Smart Queuing System on Edge with Intel Openvino Toolkit
    Deploying a Smart Queuing System on Edge with Intel OpenVINO Toolkit Rishit Dagli Thakur International School Süleyman Eken ( [email protected] ) Kocaeli University https://orcid.org/0000-0001-9488-908X Research Article Keywords: Smart queuing system, edge computing, edge AI, soft computing, optimization, Intel OpenVINO Posted Date: May 17th, 2021 DOI: https://doi.org/10.21203/rs.3.rs-509460/v1 License: This work is licensed under a Creative Commons Attribution 4.0 International License. Read Full License Noname manuscript No. (will be inserted by the editor) Deploying a Smart Queuing System on Edge with Intel OpenVINO Toolkit Rishit Dagli · S¨uleyman Eken∗ Received: date / Accepted: date Abstract Recent increases in computational power and the development of specialized architecture led to the possibility to perform machine learning, especially inference, on the edge. OpenVINO is a toolkit based on Convolu- tional Neural Networks that facilitates fast-track development of computer vision algorithms and deep learning neural networks into vision applications, and enables their easy heterogeneous execution across hardware platforms. A smart queue management can be the key to the success of any sector. In this paper, we focus on edge deployments to make the Smart Queuing System (SQS) accessible by all also providing ability to run it on cheap devices. This gives it the ability to run the queuing system deep learning algorithms on pre-existing computers which a retail store, public transportation facility or a factory may already possess thus considerably reducing the cost of deployment of such a system. SQS demonstrates how to create a video AI solution on the edge.
    [Show full text]
  • Bigdl: Distributed Deep Leaning on Apache Spark Using Bigdl
    Analytics Zoo: Distributed Tensorflow, Keras and BigDL in production on Apache Spark Jennie Wang, Big Data Technologies, Intel Strata2019 Agenda • Motivation • BigDL • Analytics Zoo • Real-world applications • Conclusion and Q&A Strata2019 Motivations Technology and Industry Trends Real World Scenarios Strata2019 Trend #1: Data Scale Driving Deep Learning Process “Machine Learning Yearning”, Andrew Ng, 2016 Strata2019 Trend #2: Real-World ML/DL Systems Are Complex Big Data Analytics Pipelines “Hidden Technical Debt in Machine Learning Systems”, Sculley et al., Google, NIPS 2015 Paper Strata2019 Trend #3: Hadoop Becoming the Center of Data Gravity Phillip Radley, BT Group Matthew Glickman, Goldman Sachs Strata + Hadoop World 2016 San Jose Spark Summit East 2015 Strata2019 Unified Big Data Analytics Platform Apache Hadoop & Spark Platform Machine Graph Spreadsheet Leaning Analytics SQL Notebook Batch Streaming Interactive R Java Python DataFrame Flink Storm Data ML Pipelines Processing SQL SparkR Streaming MLlib GraphX & Analysis Spark Core MR Giraph Resource Mgmt YARN ZooKeeper & Co-ordination Data Flume Kafka Storage HDFS Parquet Avro HBase Input Strata2019 Chasm b/w Deep Learning and Big Data Communities The Chasm Deep learning experts Average users (big data users, data scientists, analysts, etc.) Strata2019 Large-Scale Image Recognition at JD.com Strata2019 Bridging the Chasm Make deep learning more accessible to big data and data science communities • Continue the use of familiar SW tools and HW infrastructure to build deep learning
    [Show full text]
  • Bigdl, for Apache Spark* Openvino, Ray* and Apache Spark*
    Cluster Serving: Distributed and Automated Model Inference on Big Data Streaming Frameworks Authors: Jiaming Song, Dongjie Shi, Qiyuan Gong, Lei Xia, Jason Dai Outline Challenges AI productions facing Integrated Big Data and AI pipeline Scalable online serving Cross-industry end-to-end use cases Big Data & Model Performance “Machine Learning Yearning”, Andrew Ng, 2016 *Other names and brands may be claimed as the property of others. Real-World ML/DL Applications Are Complex Data Analytics Pipelines “Hidden Technical Debt in Machine Learning Systems”, Sculley et al., Google, NIPS 2015 Paper *Other names and brands may be claimed as the property of others. Outline Challenges AI productions facing Integrated Big Data and AI pipeline Scalable online serving Cross-industry end-to-end use cases Integrated Big Data Analytics and AI Seamless Scaling from Laptop to Distributed Big Data Prototype on laptop Experiment on clusters Production deployment w/ using sample data with history data distributed data pipeline Production Data pipeline • Easily prototype end-to-end pipelines that apply AI models to big data • “Zero” code change from laptop to distributed cluster • Seamlessly deployed on production Hadoop/K8s clusters • Automate the process of applying machine learning to big data *Other names and brands may be claimed as the property of others. AI on Big Data Distributed, High-Performance Unified Analytics + AI Platform Deep Learning Framework for TensorFlow*, PyTorch*, Keras*, BigDL, for Apache Spark* OpenVINO, Ray* and Apache Spark* https://github.com/intel-analytics/bigdl https://github.com/intel-analytics/analytics-zoo Seamless Scaling from Laptop to Distributed Big Data *Other names and brands may be claimed as the property of others.
    [Show full text]
  • Intel® Openvino™ with FPGA Support Through the Intel FPGA Deep Learning Acceleration Suite
    SOLUTION BRIEF Intel® OpenVINO™ with FPGA Support Through the Intel FPGA Deep Learning Acceleration Suite Intel® FPGA Deep Learning Acceleration Suite enables Intel FPGAs for accelerated AI optimized for performance, power, and cost. Introduction Artificial intelligence (AI) is driving the next big wave of computing, transforming both the way businesses operate and how people engage in every aspect of their lives. Intel® FPGAs offer a hardware solution that is capable of handling extremely challenging deep learning models at unprecedented levels of performance and flexibility. The Intel OpenVINO™ toolkit is created for the development of applications and solutions that emulate human vision, and it provides support for FPGAs through the Intel FPGA Deep Learning Acceleration Suite. The Intel FPGA Deep Learning Acceleration Suite is designed to simplify the adoption of Intel FPGAs for inference workloads by optimizing the widely used Caffe* and TensorFlow* frameworks to be applied for various applications, including image classification, computer vision, autonomous vehicles, military, and medical diagnostics. Intel FPGAs offer customizable performance, customizable power, deterministic low latency, and flexibility for today’s most widely adopted topologies as well as programmability to handle emerging topologies. Unique flexibility, for today and the future, stems the ability of Intel FPGAs to support emerging algorithms by enabling new numeric formats quickly. What makes FPGAs unique is its ability to achieve high performance through parallelism coupled with the flexibility of hardware customization – which is not available on CPU, GPU, or ASIC architectures. Turnkey Solution Offers Faster Time to Market The Intel Programmable Acceleration Card with Intel Arria® 10 GX FPGA (Intel PAC with Intel Arria 10 GX FPGA) combined with the Intel FPGA Deep Learning Acceleration Suite offer an acceleration solution for real-time AI inference with low latency as a key performance indicator.
    [Show full text]
  • Download The
    Cloudera Fast Forward Labs Deep Learning for Image Analysis 2019 Edition 03 Cloudera Fast Forward Labs Deep Learning for Image Analysis 2019 Edition Copyright © 2019 by Cloudera Fast Forward Labs http://fastforwardlabs.com New York, NY To the future— Contents 1 Introduction 7 What Can Deep Learning Do? 8 The Risks 8 Image Analysis Use Cases 10 2 Background 15 Deep Learning for Image Analysis: A Brief Background 15 Reusing Representations Learned by CNNs: Transfer Learning 18 Hardware Developments 19 The Evolving Field 20 3 Applied Image Analysis: Tasks and Models 23 Supervised Learning Tasks 23 Unsupervised Learning Tasks 28 Picking a Good Model: Accuracy vs. Latency 30 4 Interpreting Models 35 Visualization Methods 36 Attribution Methods 38 Open Source Libraries for Model Interpretability 40 5 Prototype 43 Semantic Search 43 Model Explorer 49 Emergent Design Principles 50 Implementation Details 52 Beyond the Prototype 53 6 Deep Learning in Industry Today 55 Deep Learning for Image Analysis as a Service 55 Open Source Neural Network Libraries 56 ML in the Browser 60 Abstractions on Top of Deep Learning Libraries 61 Choosing a Deep Learning Framework 63 Repositories for Pretrained ML Models 64 Deep Learning for Image Analysis Products 65 7 Ethics 67 Training Dataset Bias 67 Privacy 69 Manipulating Reality 71 Environmental Considerations 73 8 Future 75 From Supervised to Unsupervised Learning 75 From Complex Networks to Simpler Networks 76 External Factor Training of Deep Learning: Image Anal- ysis Systems 77 Evolving Hardware 78 Sci-f Story: What the Eyes Can See 79 9 Conclusion 85 chapter 1 Introduction There has been an explosion of industry interest in deep learning in the last fve years, in particular in image anal- ysis (IA), making this area of machine learning even more relevant to enabling operations and creating diferentiation in business activities today.
    [Show full text]
  • Intel Openvino Video Inference on the Edge
    Intel OpenVINO Video Inference on the Edge Igor Freitas Notices and Disclaimers Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. No computer system can be absolutely secure. Check with your system manufacturer or retailer or learn more at www.intel.com. Performance results are based on testing as of Aug. 20, 2017 and may not reflect all publicly available security updates. See configuration disclosure for details. No product can be absolutely secure. Cost reduction scenarios described are intended as examples of how a given Intel-based product, in the specified circumstances and configurations, may affect future costs and provide cost savings. Circumstances will vary. Intel does not guarantee any costs or cost reduction. This document contains information on products, services and/or processes in development. All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest forecast, schedule, specifications and roadmaps. Any forecasts of goods and services needed for Intel’s operations are provided for discussion purposes only. Intel will have no liability to make any purchase in connection with forecasts published in this document. ARDUINO 101 and the ARDUINO infinity logo are trademarks or registered trademarks of Arduino, LLC. Altera, Arria, the Arria logo, Intel, the Intel logo, Intel Atom, Intel Core, Intel Nervana, Intel Saffron, Iris, Movidius, OpenVINO, Stratix and Xeon are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others.
    [Show full text]
  • Arxiv:1809.02697V3 [Cs.DC] 5 Jul 2019 Computation on Cpus
    Optimizing CNN Model Inference on CPUs Yizhi Liu*, Yao Wang*, Ruofei Yu, Mu Li, Vin Sharma, Yida Wang Amazon Web Services {yizhiliu, wayao, yuruofei, mli, vinarm, wangyida}@amazon.com Abstract inference is essentially executing a computation graph con- sisting of operations. In practice, people normally use high- The popularity of Convolutional Neural Network (CNN) mod- performance kernel libraries (e.g. Intel MKL-DNN [27] and els and the ubiquity of CPUs imply that better performance of OpenBlas [51]) to obtain high performance for CNN opera- CNN model inference on CPUs can deliver significant gain tions. While these libraries tune very carefully for common to a large number of users. To improve the performance of operations with normal input data shapes (e.g. 2D convolu- CNN inference on CPUs, current approaches like MXNet tions), they only focus on the (mostly, convolution) operations and Intel OpenVINO usually treat the model as a graph and but miss the opportunities to further optimize the end-to-end use the high-performance libraries such as Intel MKL-DNN model inference at the graph level. The graph-level optimiza- to implement the operations of the graph. While achieving tion is often handled by the deep learning frameworks, e.g. reasonable performance on individual operations from the off- TensorFlow [5] and MXNet [8]. the-shelf libraries, this solution makes it inflexible to conduct optimizations at the graph level, as the local operation-level However, the graph-level optimization such as operation fu- optimizations are predefined. Therefore, it is restrictive and sion and data layout planing that a framework can do is limited misses the opportunity to optimize the end-to-end inference because the operation implementation is already predefined pipeline as a whole.
    [Show full text]