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Name: ID# Q1. Suppose That the Following Directives Are Declared in the Memory Data Segment Starting at Offset 0000. X DB ٢٠ ر ا ١٤٣١ ھـ 2nd Semester 1430/1431 Quiz 3 Monday 5 April 2010 ات وا ا ٣ - ١٤٠١٢١٤ Offset Content Name: ID# 0018 Q1. Suppose that the following directives are declared in the 0017 00 memory data segment starting at offset 0000. 0016 00 00 15 00 x DB -4, 4, 12 y DW 1101b, 13, 13h m 0014 0F z EQU 9h 0013 41 k DB ‘C’, ‘D’, ‘CD’ 0012 41 n DB 99h, 2 DUP ( 2 , 2 DUP ‘A’) 00 11 2 m DD 15 0010 41 Fill in the offsets in normal hexadecimal numbers. 000F 41 - Fill in the memory content in hexadecimal. Notice that the 000E 2 ASCII code for ‘A’, ‘a’, ‘0’ is 41h, 61h, 30h, respectively. n 000 D 99 - What are the decimal offset values of the variables: 000C 44 x = 0 000B 43 000A 44 y = 3 k 000 9 43 0008 00 z = Not in memory 0007 13 0006 00 k = 9 0005 0D 0004 00 n = 000Dh = 13 y 0003 0D 0002 0C m = 0014h = 20 0001 04 x 0000 FC Q2. Instructions that utilize registers for operands' storage execute much faster than instructions that utilize the main memory for operand storage. True False Q3. Newer IA32 processors won't run old programs written for older x86 processors due to their different register sizes. True False Q4. The lower 8-bits of the BX register can be addressed as:AX AH AL BX BH BL CX CH CL Q5. The register acting as a counter for repeating or looping instructions is: AX BX CX DX Q6. Bits storage of extended AX (EAX) register in Pentium processor can hold: 10 16 20 32 36. Q7. Memory segmentation (partitioning) was necessary because the x86 registers were 16-bits and could not hold the 20-bit addresses of the main memory. True False Q8. Each logical address maps to a unique physical address. True False Q9. Logical address F00F:1000h translates to the physical address: 1F00Fh F10F0h 1000Fh F100Fh ٢٠ ر ا ١٤٣١ ھـ 2nd Semester 1430/1431 Quiz 3 Monday 5 April 2010 ات وا ا ٣ - ١٤٠١٢١٤ Q10. The physical address 0000Ah is common to: one segment only two segments four segments Q11. Offset FFFFh of physical address 0FFFFh is within segment number: 0FFFh FFFFh 0000h Q12. Offset 000Fh of physical address 0FFFFh is within segment: A123h FFF0h 0FF0h 0FFFh Q13. The register that contains the segment number for the code segment is: CS BX SS DS Q14. Memory segments are implemented such that they do not overlap to avoid mixing the different program segments. True False Solve the following based on the table that Register Content (hex) shows contents of some CPU registers: AX C023 Q15. The contents of the AH register is: BX 1000 CX A628 1100 0000 0010 0011 0011 0010 0111 1111 DX EF05 CS 7FF0 Q16. The result of adding AL to BH would be: 1101 0000 1101 0011 0011 0011 0110 1111 DS 1FF0 SS 1000 Q17. The physical address of the next instruction to be fetched from ES 11F0 the main memory is: 765F0h 8755Fh 7FF00h A6280h SP 0020 Q18. The physical address of the top of the stack is: IP 765F 865F0h 8675Fh 7FF00h 10020h Flags 1155 Consider the table above and the flags register to answer the following questions. The 16-bit status (flag) register in the x86 processors looks as shown below (an x bit means an unidentified value): Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 position Flags X X X X O D I T S Z X A X P X C 0 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 Q19. The value of the zero flag is 1. True False Q20. The value of the sign flag is 0. True False Q21. The value of the carry flag is 0. True False Q22. After adding AL to BH, the contents of the flag bits S, Z, and C would be: S Z C = 1 0 1 S Z C = 0 0 1 S Z C = 1 0 0 S Z C = 0 0 0 Best W ishes… Dr. Adnan Gutub .
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