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Conjunto De Instruções Multimídia Conjunto de Instruções Multimídia Jonathas Campi Costa Instituto de Computação Universidade Estadual de Campinas - Unicamp Campinas, Brasil RA: 085380 [email protected] ABSTRACT Analisando mais atentamente esse conjunto de opera¸c˜oes Apresenta-se neste artigo uma vis˜aogeral dos diferentes con- multim´ıdia podemos classifica-la, segundo a classifica¸c˜aopro- juntos de instru¸c˜oes multim´ıdia existentes no mercado de posta por Flynn [3], como pertencentes a um hardware do processadores. S˜aoabordados os principais conceitos da tec- tipo SIMD, isto ´e, Single Instruction Multiple Data; pro- nologia por detr´asdo conjunto de instru¸c˜oes bem como seus cessadores em que uma mesma instru¸c˜ao´eaplicada sobre principais representantes; al´em de an´alises de desempenho e diferentes fluxos de dados, empacotados (o conceito de em- abordagens de implementa¸c˜ao. pacotamento de dados ser´aanalisado mais adiante). Es- sas instru¸c˜oes permitem ao hardware a opera¸c˜aosimultˆanea General Terms de diferentes ALUs (Arithmetic Logic Unit), ou equivalen- temente, a divis˜aode uma grande ALU em muitas ALUs SIMD theory, MMX, SSE, 3DNow!, Altivec. menores que podem executar paralelamente [9]. 1. INTRODUÇÃO A id´eia dos projetistas de hardware foi unir o melhor de Durante os anos 90 houve um grande aumento no uso da dois mundos, ou seja, unir o paralelismo existente em n´ıvel computa¸c˜aocomo suporte as opera¸c˜oes multim´ıdia, isto ´e, de instru¸c˜oes das m´aquinas tipo SISD com o paralelismo no o uso do computador na cria¸c˜aode informa¸c˜aomultim´ıdia n´ıvel dos dados, t´ıpico da m´aquinas SIMD. (video, imagem, som, etc.); aliado a esse fato, as worksta- tions e os computadores pessoais eram utilizados cada vez O uso de instru¸c˜oes multim´ıdia, referenciado de agora em mais como instrumentos de c´alculos avan¸cados. Analisando diante como instru¸c˜oes SIMD tamb´em, pode ser visto como essa tendˆencia, os principais fabricantes de processadores uma forma de aproveitamento de situa¸c˜oes em que o par- utilizaram uma id´eia j´aconhecida para atender a uma nova alelismo est´apresente e pode ser utilizado. Como um exem- demanda: o uso de instru¸c˜oes vetoriais. plo do uso de instru¸c˜oes SIMD podemos citar a coerˆencia espacial em aplica¸c˜oes de computa¸c˜aogr´afica [4]. A implementa¸c˜aode uma arquitetura vetorial completa (a presen¸ca de registradores vetoriais em todo os est´agios do Em aplica¸c˜oes de computa¸c˜aogr´afica, tipicamente aplica¸c˜oes pipeline) sobre uma arquitetura i386, por exemplo, se pos- de rasteriza¸c˜ao e processamento de imagem, a coerˆencia es- s´ıvel (devido a falta de flexibilidade na execu¸c˜aode c´odigos pacial est´amuito presente, isto ´e, a probabilidade de que o de prop´osito geral) ainda seria altamente complexa e cus- conjunto de pixels vizinhos a um certo pixel em quest˜aopos- tosa, do ponto de vista operacional, logo a solu¸c˜aoencon- sua atributos diferentes ´emuito pequena [4]. Logo, quando trada pelos fabricantes de processadores foi a implementa¸c˜ao desejamos aplicar uma instru¸c˜aosobre a imagem, a mesma de um subconjunto das opera¸c˜oes tipicamente existentes em instru¸c˜aoser´aaplicada ao mesmo conjunto de pixels com uma arquitetura puramente vetorial[9], sobre uma arquite- iguais propriedades, portanto utilizando uma ´unica instru¸c˜ao tura do tipo SISD [3]. Para tal conjunto de opera¸c˜oes foi sobre o mesmo conjunto de dados. Se o conjunto de pixels dado o nome de Conjunto de Instru¸c˜oes Multim´ıdia. E´ im- suportado pela opera¸c˜aoem quest˜aofor de cardinalidade n, portante notar que existem diferen¸cas significativas entre podemos dizer que a instru¸c˜aoSIMD possui n unidades fun- as instru¸c˜oes multim´ıdia e vetorial [9]; e.g. o n´umero de cionais onde cada unidade opera sobre um pixel a mesma elementos em uma instru¸c˜aovetorial n˜aoest´apresente no instru¸c˜ao. c´odigo da opera¸c˜ao(opcode) como nas instru¸c˜oes multim´ı- dia, e sim em um registrador separado. Um exemplo mais comum ´eo uso de instru¸c˜oes SIMD para aritm´etica de vetores; como um vetor pode ser decomposto por suas coordenadas, pode-se efetuar opera¸c˜oes aritm´eticas como soma, subtra¸c˜ao,etc., sobre as diferentes coordenadas dos vetores envolvidos nas opera¸c˜oes. Por exemplo, para a soma de dois vetores: Z~ = X~ + Y~ pode ser executada diretamente sobre as coordenadas dos vetores: zi = xi + yi, onde cada soma ser´aefetuada por uma unidade funcional distinta mas a partir da mesma instru¸c˜ao, i.e., a instru¸c˜ao de soma. Figure 1: Diagrama representando a soma entre dois pixels diferentes utilizando os registradores vetori- Figure 2: Diagrama do pipeline b´asico de execu¸c˜ao ais. da arquitetura P6. Figura retirada de [1]. Nos dois exemplos citados acima podemos observar clara- presen¸ca dessas unidades nas arquiteturas dos processadores mente a maior vantagem do uso das instru¸c˜oes SIMD: a da fam´ılia P6 da Intel (Figura 2), na arquitetura do pro- diminui¸c˜aoda latˆencia no acesso a mem´oria ao ler todos os cessador Athlon da AMD (Figura 3) e na arquitetura do dados necess´arios uma ´unica vez e efetuar a mesma opera¸c˜ao processador PowerPC 970 (Figura 4), por exemplo. sobre eles[5]. Uma implementa¸c˜aointeressante foi a do primeiro conjunto de instru¸c˜oes multim´ıdia da Intel, o MMX [18]. As in- 2. REGISTRADORES VETORIAIS stru¸c˜oes MMX foram implementadas sobre a unidade de A base da arquitetura vetorial e das instru¸c˜oes SIMD s˜ao ponto flutuante j´adispon´ıvel nos primeiros membros da ar- os registradores vetoriais. Um registrador vetorial ´eum reg- quitetura P5, isto ´e, os registradores vetoriais foram im- istrador em que os dados est˜aoorganizados na forma de um plantados sobre os registradores de ponto flutuante logo, os vetor, isto ´e, os dados podem ser comparados aos valores dos registradores MMX, como veremos mais adiante, que eram escalares que comp˜oem as coordenadas de um vetor. Assim, implementados com largura de 64-bits para trabalhar com enquanto que em arquiteturas do tipo SISD, a CPU opera dados em precis˜aointeira, eram representados internamente sobre escalares um a um, em uma arquitetura do tipo SIMD como n´umeros em ponto flutuante inv´alidos, j´aque os reg- a CPU opera sobre uma linha desses escalares, todos do istradores de ponto flutuante da arquitetura P5 possuiam mesmo tipo, executando uma mesma opera¸c˜aosobre todos, largura de 80-bits. Isso era uma forma de diferenciar o con- como uma unidade. te´udo dos registradores tamb´em. Esses vetores s˜aorepresentados em um formato de dados No in´ıcio, cada fabricante de processadores criou e imple- chamado: empacotado (packed data). Por empacotado pode- mentou seu pr´oprio conjunto de instru¸c˜oes SIMD, como por mos entender que os dados s˜aoagrupados em diferentes for- exemplo os conjuntos MAX, VIS, MDMX, etc; enquanto que matos, por exemplo, para um registrador vetorial de 128- na arquitetura i386 esse conjunto de instru¸c˜oes acabou por bits, podemos empacotar os dados como 4 inteiros de 32-bits tornar-se um padr˜aode mercado, o padr˜aoSSE; apesar de cada, ou 8 inteiros de 16-bits cada. atualmente existirem algumas varia¸c˜oes, como veremos mais adiante. Utilizando dessa abordagem de organiza¸c˜aodos dados, ´e poss´ıvel efetuar opera¸c˜oes sobre os dados de forma eficiente Para determinar quais seriam as melhores intru¸c˜oes a im- (a latˆencia no acesso aos dados ´ediminu´ıda, como anterior- plementar, os fabricantes de processadores selecionaram um mente exeplicado). Como abordado anteriormente, a soma conjunto de aplica¸c˜oes multim´ıdia que melhor representava o de dois pixels pode ser efetuada em uma opera¸c˜aode adi¸c˜ao que eles acreditavam ser um conjunto representativo de apli- apenas, bastando organizar os elementos do pixel (cores ver- ca¸c˜oes multim´ıdia geral [2]. Analisando essas aplica¸c˜oes, cri- melha, verde, azul e o canal de composi¸c˜ao)em um reg- aram, al´em das instru¸c˜oes b´asicas de aritm´etica e instru¸c˜oes istrador vetorial. Podemos observar tal arranjo na Figura de manipula¸c˜aol´ogica e de alinhamento, instru¸c˜oes para su- 1. portar opera¸c˜oes comuns a muitas das aplica¸c˜oes. Essas opera¸c˜oes variam em n´umero e complexidade de fabricante 3. ARQUITETURA PARA INSTRUÇÕES MUL- para fabricante. TIMÍDIA Em geral, podemos dividir o conjunto de instru¸c˜oes SIMD Em geral, a adi¸c˜aodas instru¸c˜oes multim´ıdia ´eefetuada implementadas pelos fabricantes em quatro grandes grupos: atrav´es da altera¸c˜aodo est´agio de execu¸c˜aodas arquiteturas escalares [11, 9, 5, 1], incluindo uma unidade especializada para a execu¸c˜aodas instru¸c˜oes SIMD. Podemos observar a • Instru¸c˜oes aritm´eticas – Podemos dividir as instru¸c˜oes aritm´eticas em dois subgrupos: as de ponto flutuante e as de precis˜ao inteira. Aqui est˜aoinclu´ıdas as principais oper- a¸c˜oes aritm´eticas, e.g.: satura¸c˜ao(clampf ), m´o- dulo, soma, subtra¸c˜ao,divis˜aoe multiplica¸c˜ao(al- guns fabricantes implementam essas duas ´ultimas opera¸c˜oes apenas atrav´es de shifts para esquerda e direita, respectivamente [6]). Em ponto flutu- ante podemos citar tamb´em opera¸c˜oes espec´ıficas para arredondamento e convers˜ao.
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