Lateral IMPATT Diodes in Standard CMOS Technology
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Lateral IMPATT Diodes in Standard CMOS Technology Tala1 Al-Attar, Michael D. Mulligan and Thomas H. Lee Center for Integrated Systems, Stanford University Stanford, CA, USA Abstract An IMPATT is biased into reverse breakdown, and a frequency-dependent negative resistance arises from We investigate the use of a lateral IMPAT? diode phase delay between the current and voltage built in 0.25" CMOS technology as a high frequency waveforms in the device. power source. These diodes are monolithically Maximum output power is facilitated by arranging integrated in coplanar waveguides and characterized by for V and I to he out of phase with one another by an S-parameter measurements from 40 MHz to 110 GHz. angle of 180". The first 90" of phase shift is achieved These measurements show excellent agreement with within the avalanche region. The remaining 90" is predictions of theoretical models. To our knowledge, obtained by adjusting the drift region length. this is the first such structure built in a standard CMOS technology. Device Structure and Properties Introduction There is presently significant interest in For our design, the p', n, and n' regions of the developing low cost millimeter-wave systems for IMPATT diode (Fig. I) are implemented using applications ranging from communications to standard source/drain, n-well, and ohmic contact automobile anti-collision radar systems. CMOS diffusion regions, respectively. The dimensions of the technologies are particularly appealing from a cost diode tested (0.5pn x 100pm) are based on two : reduction and systems integration standpoint. considerations: (I) reducing the resistance of the However, these systems typically operate at inactive region by increasing the diode width while frequencies beyond currently achievable CMOS also keeping it helow a qumer wavelength to minimize transistor fT, rendering conventional CMOS circuit any resonance or phasing problems, and (2) increasing techniques useless. As such, in this work we have the power efficiency by reducing the junction area and investigated the use of a lateral IMPATT (IMPact hence the junction capacitance. Avalanche Transit Time) diode as a high frequency (e.g. 77GHz) power source, built in a conventional 0.25pm CMOS technology. IMPATT diodes offer some of the highest available output powers for semiconductor devices operating at microwave and millimeter wave r Total 7 Length frequencies. Originally developed in 1958 [I], various IMPATT diode structures have been reported over the years. These include mesa; planar, distributed, and lateral structures [2]. However, all of these stmctures, p" whether vertical or horizontal, require special fabrication techniques and process modifications to achieve the desired performance. The basic theory was well described by Read [l] in his original paper. In addition, Sze [31 and DeLoach [4] have reviewed the Avalanche Inactive theory in the light of experimental results. Briefly, an Region Region IMPATT diode consists of three regions, an avalanche breakdown region, drift region and inactive region as Fig. I. Lateral lMPATT diode smcmre, showing the avalanche shown in Fig. I. region, drift region and the inactive region. 18.4.1 0-7803-8684- 1/04/$20.00 02004 IEEE IEDM 04-459 Designing IMPATT diodes in standard CMOS RF Measurements technology reveals the importance of the n-well impurity concentration as a key factor in controlling all These diodes have been monolithically integrated of the critical design parameters: breakdown voltage in coplanar waveguides (Fig. 4) and characterized by (Fig. 2); avalanche frequency; and avalanche, drift, and S-parameter measurements from 40 MHz to 110 GHz. inactive region lengths. Accounting for the vertical By carefully designing the Ground-Signal-Ground impurity concentration gradient of the n-well (lowest at (GSG) pad we are able to mitigate the undesired the surface) and spherical junction effects, and based oscillations that typically disturb S-parameter on the measured breakdown voltage (9V for ImA measurements of IMPATT diodes. reverse current) we may extract the doping profile of the n-well [3]. l.OE+OO 1.OE-91 1.OE-92 4- 1.OE-93 -c = 1.OE04 0 1.OE-95 1.OEd6 1.OE-97 0 2 4 8 8 io 12 I, 1s 18 Fig. 4. Die photo of the integrated IMPATT diode and the RF pmbe Voltage (v) Fig. 2. I-V charactenstic of LMPATT diode showing the transition to avalanche breakdown at 9V. Based on four measured data points-breakdown voltage, Rdcafter breakdown, Cdldebefore breakdown, Additionally, the retrograde diffusion profile and avalanche frequency-the model proposed in [5] affects the area of the junction capacitance before and (G&H Model) was constructed. As seen, the model’s after breakdown. With the reverse bias voltage less impedance profile matches the measured data closely than the breakdown value, the junction capacitance (Fig. 5). decreases as the voltage increases (Fig. 3). This figure is obtained by averaging five measurements at each bias voltage. 2w 3.5E.13 100 al 3E-13mI cPo o_ 2.51-13 g -100 me I- 0 2E-13 p 2 -200 I Measurement 9 1.5E.13 I M5mA c -300 1E-13 0 C 5E-14 0 2x10’’ 4x10’’ 6x10’’ 8x10’’ 1x10’’ < I I 0 ! I I I I Frequency ( Hz) 0 2 4 6 8 10 (a) Reverse Bias Voltage (V) Fig. 5a. Comparison between measured impedance at 1=55mA and the model introduced in [4] based on the four measured data points. Fig. 3. Junction capacitance a\ a function of reverse bias voltage (a) Imaginary part. (before breakdown). 18.4.2 460-TEDM 04 7.51+13 , I , 7.41+13 7.3Et13 7.21+13 > m 7.11+13 U) > 7Et13 6.91+13 6.81+13 IIIIIIII 6.7Et13 4 0 i020304050607060 Frequency ( Hz) Bias Current (mA) Fig. 6. Illustration of haw increasing the bias current affects the (b) saturation velocily and the ionization constam Fig. 5b. Comparison between measured impedance at I=55mA and the model introduced in [4] based on the four measured daw points. (b)Real pan. 400 Results and Discussion As shown in Table 1, the ratio of the avalanche cP frequency to the square root of the bias current CO decreases slightly instead of remaining constant. This P is caused by the temperature increase due to increasing a bias current. This increase in temperature causes the x -200 saturation drift velocity and the ionization constant to decrease (Fig. 6). Additionally, Table I shows that the avalanche frequency increases with increasing bias -400 cvrrent (Fig. 7). This is as expected and furthermore 0 2x10'' 4x10" 6~10'~8x10" lxlOi' provides a convenient means for tuning the IMPATT Frequency (Hz) diode. (a) Table I Ratio of avalanche frequency to the square root of Ule bias C"rr.2"t. I Bias 1 Bias I Avalanche I 1 11.5 182 0 2x10" 4~10'~6~10~ 8~10'~ 1x10'' Frequency ( L) For very high frequencies the real part of the (b) Fig. 7. MPATf impedance dab extracted from the SI,parameter IMPATT diode impedance becomes positive because mcasucemenu. As expected, the increase in avalanche frequency is of the increasing dominance by the series resistance proportional to the square root of the bias current. (a) Imaginary pat introduced by the inactive region. ib) Real part. 18.4.3 IEDM 04-461 Conclusion Acknowledgement Once the methodology is understood (Fig. 8) these The authors would like to thank Robert Bosch devices can be designed in any standard CMOS Corporation for financially supporting part of this technology that has an n-well with impurity work, National Semiconductor for fabricating the concentration less than about 5~10”cm~~.Above this diodes, and Anritsu for providing access to the 110 approximate upper limit on impurity concentration, GHz VNA. tunneling effects begin to dominate the breakdown process, preventing avalanching. Within that limit, the selection of process technology should be based on the References desired operating frequency as it is directly proportional to the n-well impurity concentration. W. T. Read 11. “A proposed high-frequency negative- These devices appear well suited for use in millimeter- [I] resistance diode,” Bell Syst. Tech. J., vol. 31, pp. 401- wave integrated circuits where minimum cost and high 446, Mar. 1958. integration are valued. [2] P. I. Stabile and B. Lalevic, “Lateral IMPATI Diodes,” IEEE Electron Devices Letters, vol. 10, No. 6, lune 1989. [3] S.M. Sze, Physics of Semiconductor Devices 2“ ed. 1 For a Given Wiley, 1981. 141 B. C. DeLoach, Ir., ”The IMPATT Story,” IEEE Trans. Electron Devices, v.23, no.7, July 1976. [SI M. Gilden and M. E. Hines, “Electronic tuning effects in the Read microwave avalanche diode,” IEEE Trans. Electron Devices (Special Issue on Semiconductor Bulk-Effect and Transit Time I I Devices), vol. ED-13, pp. 169-175, Jan. 1966. .,erProfile Estimate i=VsI 2(DR) Choare: Measure: .Cd,,. .Avslnche Frequency (S-Param.) .Diode Width - Rtat @ OC ‘1-Diode Length Find . lRd,*l as a function of F,. lXd,J as a function of F,. J. F, as a function of id,* 18.4.4 462-1EDM 04 .