Faculty of Information Engineering & Technology

Faculty of Information Engineering & Technology Electrical & Electronics Department Ali Ahmed Course: Advanced Microelectronics Lab ELCT905 Dr. Eman A. Soliman

ADVANCED MICROELECTRONIC

(REPORT)

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1 CMOS Operational Transconductors (OTA)

CMOS Transconductor Types:

I. Single Input Single Output Transconductors

A. CMOS Composite Transistor

1. Region of operation

2. Circuit Simulation

II. Differential Input-Single Output Transconductor

A. Differential pair as a voltage to current converter

1. Region of operation

B. Differential pair with degeneration resistor

Conclusion:

Performance comparison table

2 I. Single Input Single Output Transconductors

A. CMOS Composite Transistor:

M2 Iout

- VC M4

Figure 1 CMOS realization for Single Input Single Output Transconductor 1. Define the region of operation for each transistor:

< Vin < (On)

< Vin < (Sat)

2. Circuit Simulation:

Using Cadence with 90nm model and ±1.2V supply voltages with the aspect ratios for the transistors given below for the circuit shown in Fig.1, evaluate the following simulations; If applicable compare also the achieved results with the theoretical values:

M1- M3 M2-M4 VC 180nm/990nm 2µm/900nm 0.8 3  Circuit schematic on Virtuoso

a) Iout-Vin DC characteristic and its derivative Gm for a load of 1kΩ (comment on the

linearity range)

4 b) Vary Vc from (0.6V to 1V) for a load of 1kΩ and sketch Gm

c) Frequency response for Vin =1V ac while driving a load of 20 pF in parallel with

100kΩ.

5 d) The output current transient response to a 1MHz sinusoidal input voltage with

amplitude 0.1V (at 1Ω//1pF load)

e) The output current transient response to a 1MHz square wave input voltage with

amplitude 0.1V (at 1Ω//1pF load)

6 II. Differential Input-Single Output Transconductor

A. Differential pair as a voltage to current converter:

vid + - 7KΩ

Figure 2 CMOS realization for Differential Input Single Output Transconductor 1. Define the region of operation:

< Vid <

2. Circuit Simulation:

Using Cadence with 90nm model and ±0.6V supply voltages with the aspect ratios for the transistors given below for the circuit shown in Fig.2, evaluate the following simulations

M1-M2 M3-M4 M5-M6 40μm /0.9μm 20μm /0.36μm 10μm /0.36μm 7  Circuit Schematic on Virtuoso

a) Iout-Vid DC characteristic and its derivative Gm for a load of 1kΩ (comment on the

linearity range)

8 b) Frequency response for Vid =1V ac while driving a load of 100kΩ//1pF

B. Differential pair with source degeneration:

1. Add a source degeneration resistance with value 1kΩ to the circuit in the last

example, then evaluate the following simulations:

 Circuit Schematic on Virtuoso

9 a) Iout-Vin DC characteristic and its derivative Gm for a load of 1kΩ (comment on the

linearity range)

b) Repeat the last simulation for different values of the source degeneration

resistance; comment on the result

10 Home Assignment

Complete the output stage of the OPAMP u designed in

Microelectronics course. Plot the frequency response and mark the gain value and bandwidth.

NOTE: It’s important to have a complete and functional

OPAMP as it will be used in later sessions!!