european www.electronics-eetimes.com March 2015 business press

IoTize rejuvenates legacy systems

Executive interview: NXP’s Rick Clemmer Special focus: Flexible Electronics

150107_FRSH_EET_EU_Snipe.indd 1 12/30/14 3:29 PM 141126_WLSG_EET_EU.indd 1 11/24/14 11:56 AM march 2015

opinion DESIGN & PRODUCTS 4 Stress tracker tames drivers SPECIAL FOCUSES: 50 Save me from overbearing IoT analytics - DEBUGGING & PROGRAMMING TOOLS

NEws & TECHNOLOGY 20 Tips for designers using in an embedded project 6 NXP, Freescale plan mega merger In one of the biggest consolida- 23 Eliminating X-propagation in tions in the transition testing to date, NXP and Freescale have The requirement for robustness announced plans for a merger. towards failures in modern day SoCs demands for the maxi- 6 The NXP/Freescale takeover and mum test coverage. However, the increased gate automotive electronics count of SoCs requires more test patterns.

7 NXP CEO: ‘Security, IoT, Cars’ 26 Top five problems with PLCs Drove Freescale Deal 27 Optimizing data memory utilization 8 IoTize rejuvenates legacy systems Optimization is important to embedded with smartphone-compatibility software developers because they are always facing limited resources. 10 AMD describes notebook Carrizo Carrizo packs 29% more transistors and - squeezes double-digit gains in perfor- mance and drops in power consumption 32 Safe power for medical devices used at home out of the same 28nm and die area as its current Kaveri chip. 34 How to ground and power complex circuits Circuits with analogue and digital signals 11 IKEA and Samsung back Qi wireless charging tend to cause declaration of several ground references, often leading to a spaghetti-like 11 Is this the Tesla killer? result. Only a week after the introduction of its second generation 37 Welcome to the portable age electric sports sedan Quant F, e-car design company nanoFlowCell has - FLEXIBLE ELECTRONICS announced another development 40 PCB origami 12 Graphene polymer speeds electron transport Graphene is considered by many as 42 Flexible organic circuit makes the successor to silicon because its fever alarm electron mobility can be over 10X that of silicon plus it solves many of the 42 Printed OLEDs make large advertising problems with scaling silicon. 43 More IP blocks in line for plastic electronics 14 Samsung phones pack 14nm SoC Samsung will pack a handful of new technologies 45 IoT speeds printed electronics development – including a 14nm applications processor - into its new Galaxy S6 and S6 Edge. 45 Stick a PUF to your hardware

15 Semitrex’ ultimate goal: one size REader offer fits all power conversion Semitrex Technologies is looking up 46 5 RIoTboards for your to address a three billion unit a year connected applications power supply and battery charger Following up on its previous market with its Tronium power supply on a chip. reader offer, Freescale is now giving away five RIoTboards, 16 The future of custom ASICs worth $74 each, for EETimes Europe’s readers to win.

18 Porsche rainmaker advocates platooning 49 DISTRIbution corner

18 Parrot takes instant 3D mapping to the sky

3 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com Uncommon market

Stress tracker tames drivers By Julien Happich We don’t just comply ased on scientific literature, pulse rate alone doesn’t give issues and occasionally turning into road rage. an accurate reading of a person’s stress level (you could “Often the drivers themselves are not conscious that they just be jogging), but combining it with other indicators are stressed. By analysing both the vehicle’s parameters and with standards. Bsuch as skin conductance makes it possible to distinguish be- the driver’s physiological data, we can identify and correlate the tween good physical stress and bad emotional stress. sources of stress to specific road situations or driving behav- We co-write them. iours” told us Mikhail Boiko, Director of Embedded Practice at Some academic papers look into this to better secure bio- EPAM Systems during a demo at embedded world. Keysight DDR engineers are some of the best in the business. Proof? As you read this, metric authentication and prevent forced access, for example to detect a stressful situation when someone with the right Using data filtration and stress detection algorithms in the our engineers are leading the industry in the design of the next generation of DDR biometric credentials would be used as a live key. In that case, cloud, the smart wristband can then notify the driver of his memory standards and solutions. This means that in the future, when you’re trying to monitoring stress would add another security layer to existing stress level, and possibly coach her/him into less stressful solve some cutting-edge memory challenge, we can help out by sharing our expertise. biometric templates, preventing fake or even non-living samples situations or driving behaviours (or suggest a rest, since each It also means that we can rapidly integrate the new specs into our own hardware and (a chopped finger or its equivalent fingerprint stamp). individual driver has a log into the vehicle infotainment system). software. So they’ll be fully functional the day you need them. Other papers study the use of Galvanic Skin Response (GSR) Based on the stress analysis, Boiko says the infotainment data to distinguish between positive stress (seen as a form of system could suggest alternative routes to avoid recurrent excitement or high motivation) and poor motivation. stress hot spots, or try tame the driver into a smoother driving HARDWARE + SOFTWARE + PEOPLE = DDR INSIGHTS Software engineering company EPAM Systems looks at GSR experience. For more situational awareness, the smart wrist- data to monitor drivers’ stress levels, offering to analyse the band continuously records voice, only storing voice events dur- JEDEC and UFSA Board of Directors data from a wrist-worn GSR sensor (two electrodes in direct ing stress periods (and the 15mn preceding the stress). contact with the skin and correlating it to the vehicle’s infotain- Chairman, JEDEC Digital Logic (JC40.5) and ment system (a first connection through Bluetooth LE then a That leaves little room for privacy and possibly every vocife- UFSA Compliance Committees GSM connection to the cloud for further analytics). rated F… word may end-up identified as a companion of stress, Hundreds of applications engineers in 100 but in the case of lorry or drivers, the insurance companies countries around the world Driving can be stressful for all sorts of reasons. Some are may have the last word. Thousands of patents issued in Keysight’s history inherent to the car’s parameters (warning indicators such as low In fact, having acquired healthcare technology consult- fuel or low tire pressure, loud music or radio, high speed) and ing firm Netsoft USA last year, EPAM Systems is hoping to some are due to the on-going traffic, the weather conditions, strengthen its position as a global provider of healthcare and navigational problems encountered by the driver. insurance services and is certainly promoting the adoption of Then there is the driver exposed to long driving hours and this technology to its clients. tiredness, varying personal moods sometimes linked to private

Order our complimentary 2015 DDR memory resource DVD at www.keysight.com/find/HSD-insight

© Keysight Technologies, Inc. 2015

4 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com

Keysight_RV_DDR_People_PE_EETE.indd 1 13/02/2015 11:51 We don’t just comply with standards. We co-write them.

Keysight DDR engineers are some of the best in the business. Proof? As you read this, our engineers are leading the industry in the design of the next generation of DDR memory standards and solutions. This means that in the future, when you’re trying to solve some cutting-edge memory challenge, we can help out by sharing our expertise. It also means that we can rapidly integrate the new specs into our own hardware and software. So they’ll be fully functional the day you need them.

HARDWARE + SOFTWARE + PEOPLE = DDR INSIGHTS

JEDEC and UFSA Board of Directors Chairman, JEDEC Digital Logic (JC40.5) and UFSA Compliance Committees Hundreds of applications engineers in 100 countries around the world Thousands of patents issued in Keysight’s history

Order our complimentary 2015 DDR memory resource DVD at www.keysight.com/find/HSD-insight

© Keysight Technologies, Inc. 2015

Keysight_RV_DDR_People_PE_EETE.indd 1 13/02/2015 11:51 business

NXP, Freescale plan mega merger

By Rick Merritt

n one of the biggest consolidations in the semiconductor holders,” said Clemmer in a press statement. industry to date, NXP and Freescale have announced plans for NXP said the deal would add to the company’s non-GAAP a merger. earnings and non-GAAP free cash flow. NXP anticipates achiev- IIf the deal is approved, they would create a top-ten chip ing cost savings of $200 million in the first full year after closing maker and embedded processor giant with more than $10 billion the transaction, eventually expanding to $500 million of annual in combined revenues. cost savings. The deal would make the two companies the world’s ninth The cost cuts are relatively small for a merger of this size, sug- largest chip maker. It would leapfrog competitors STMicroelec- gesting any planned layoffs could be relatively small. Presumably tronics and Renesas at $7 billion each and approach Texas competing business units that support overlapping ARM-based Instruments at $12 billion, according to figures from IC Insights. would be among those targeted for cuts. The deal comes at a time of rapid consolidation as the semi- The companies scheduled a Monday morning conference call conductor industry generally lumbers to single-digit growth rates. to describe the deal to analysts. For its part, Freescale still carries significant debt but returned to Under the terms of the agreement, Freescale shareholders will profitability last year as it struggles toward a goal of 50% gross receive $6.25 in cash and 0.3521 of an NXP ordinary share for margins. each Freescale common share held at the close of the transac- In a smaller but similar deal announced in December, Cypress tion. The purchase price implies a total equity value for Freescale bid $4 billion to acquire Spansion. A year earlier, Avago bid $6.6 of approximately $11.8 billion based on NXP’s closing stock price billion for LSI, then sold part of the company to . as of February 27, 2015, the press statement said. For their part, NXP and Freescale stuck a definitive agreement The transaction is expected to close in the second half of for a deal they valued at $40 billion. They claim the combination calendar 2015. NXP intends to fund the transaction with $1.0 would make them the largest supplier of automotive chips and billion of cash from its balance sheet, $1.0 billion of new debt and general-purpose microcontrollers. approximately 115 million NXP ordinary shares. Post transaction, Richard Clemmer, NXP’s chief executive and proposed CEO Freescale shareholders will own approximately 32 percent of the of the combined company, called the merged company “a leader combined company. in high performance mixed signal solutions…We fully expect to The transaction has been unanimously approved by the continue to significantly out-grow the overall market, drive world- boards of directors of both companies and is subject to regula- class profitability and generate even more cash, which taken tory approvals as well as the approval of NXP and Freescale together will maximize value for both Freescale and NXP share- shareholders. The NXP/Freescale takeover and automotive electronics

By Christoph Hammerschmidt ill the planned acquisition of Freescale through NXP electronics segment whereas change the automotive semiconductor landscape? Renesas dominates the infotain- Obviously yes, since both companies are already ment sector. However, none of massivelyW involved in this market, and united they will certainly these two is positioned as broad- gain significance. But at whose expense? ly as a potential NXP / Freescale The die is cast: NXP will take over the highly indebted combo. Infineon keeps aloof of Freescale. The takeover will create a combined company everything in the car that deals with sales of more than $10 billion and catapult the company with graphics - instrument clus- to the pole position in the automotive semiconductor race. ters, infotainment and modern Both NXP and Freescale hold strong positions in that seg- HMIs. These applications how- ment, with plenty of expertise in success-critical areas such as ever are among those with the signal processing, sensor fusion, security and (wireless) data strongest growth expectations. communications. Without any doubt the combined company And in terms of wireless automo- will occupy the strategic technology points in some of the tive connectivity neither Infineon hottest market segments like ADAS, autonomous driving and nor Renesas can compete to the Connected Car. The same by the way holds true for non-au- “Perhaps Infineon now future Dutch-American duo. Per- tomotive markets with high growth potential such as IoT and has to pay the price for haps Infineon now has to pay the Industrial Internet - in particular if one includes the security price for having sold its wireless requirements into the picture. having sold its wireless communication business to Intel Competitors in these segments have reasons to wrap up communication business years ago. warmly, namely Renesas and Infineon. Both pursuit a more However, there is a major focused approach and cover specific niches. Infineon, for to Intel years ago.” business field where NXP even example, holds strong positions in the motor control and body with Freescale on board has

6 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com nothing to offer but an unprotected flank. This business field is So the die is cast is it really? After all, the terms of the power devices. According to market researchers like IHS, this planned merger could trigger dissent among shareholders of is a very strategic place with particular strong growth expecta- both companies, potentially resulting in a veto from the side tions. The demand in this field is driven by electromobility in of the owners. There are already voices speculating that other general; a strong demand driver is the legislative situation in chipmakers or investors with deeper pockets than NXP could most industrialised countries that aims for lower emissions. throw their hat into the ring and raise the offer. For the com- In power electronics, it currently looks like Infineon remains petitive situation in the automotive market such a perspective unbeatable; even an axis formed of NXP and Freescale won’t be however would not change anything. able to change this. NXP CEO: ‘Security, IoT, Cars’ Drove Freescale Deal

By Junko Yoshida

ne Freescale executive who appears to have secured Clemmer said that NXP has been long interested in his spot in the soon-to-be merged NXP is Geoff Lees, Freescale. Aside from sharing the similar background of senior vice president and general manager, responsible having been bought out by private equity funds, “We’ve known forO Freescale’s business. each other, and I’ve always thought it would make a strate- Reached by EE Times, Lees stayed mum, except to say that gic merger.” The debt loads independently carried by the two he used to work at NXP, before joining Freescale companies, however, stymied merger talk for a three years ago. In a one-on-one interview Tues- long time. day (March 3) with EE Times, Rick Clemmer, Freescale in recent years has halted a decline CEO of NXP, said, “Geoff will be coming home in product revenue and it’s deleveraging effec- to us. He’s a good guy. Glad to have him back.” tively. Under Gregg Lowe, it’s getting profitable, Clemmer insisted that the planned NXP-Fre- making the Austin, Texas-based company more escale deal is a strategic, not a tactical, acquisi- attractive, Clemmer explained. tion. He explained, “Through the merger, we are According to Dale Ford, vice president of adding Freescale’s computing power to our se- technology at IHS Technology, the new com- curity and [wireless] communication strengths, pany will become the 7th largest semiconductor in order to drive the .” supplier overall based on the firm’s preliminary Product divisions that don’t appear to belong market share data for 2014. to NXP’s stated focus on “security and con- NXP’s CEO, Rick Clemmer at Looking back, Ford said, “Both companies nectivity with a smarter world” are Freescale’s MWC started to outperform the overall market during network processors and NXP’s standard products, Clemmer the past 2 years prior to the merger announcement (2013 to pointed out. “But if they continue to perform well, why not? We 2014). Before that the growth for each company was below might as well keep them.” overall market growth since at least 2008.” Clemmer, however, did not deny the possibility of letting the two divisions go, “if they can be sold at their full value.” Really, no overlap? NXP, in announcing the deal, stated that it will sell its own In the connected device market in which NXP hopes to lead, the high-performance RF unit in order to avoid regulatory issues. four elements that matter are sensors, processing, connectivity “We’ll keep a stronger unit at Freescale, rather than ours,” he and security, according to Clemmer. said. The two companies’ RF businesses, when combined, will NXP leads in security. Both NXP and Freescale when com- pretty much hold the entire global high-performance RF market. bined have a broader connectivity portfolio. Although both have Asked which regulatory bodies will be looking at the deal, Bluetooth, NXP excels in NFC while it doesn’t have ZigBee. Clemmer said, aside from antitrust authorities in the United Processing is where Freescale shines. NXP’s microcontroller States and Europe who will have to approve the deal, “The only business is only one-fifth the size of Freescale’s, said Clemmer. one that matters is Mofcom,” the Ministry of Commerce in the Asked if they plan to adjust the two companies’ ARM Cortex-M People’s Republic of China. microcontroller lines, Clemmer said that those are the details that NXP needs to deal with, after the completion of the merger, Other merger candidates? in terms of “product selection.” Freescale certainly isn’t the first company NXP has studied as As for sensors, Clemmer acknowledges that Freescale has a an acquisition target. sensor platform. But he quickly added, “I see sensors should be Past candidates include IDT and CSR, according to the NXP an area where we should work with partners.” CEO. Had NXP completed a deal with IDT, for example, it would be “more like tactical deals Avago likes to make,” said Clemmer, Breaking down automotive chip business since Avago keeps acquiring companies to get into adjacent The merged NXP would become number one in automotive businesses. chips, a company “nobody can match,” said Clemmer. Taking NXP did not complete a deal with CSR, either. Clemmer a look under the hood, aren’t the two companies developing said, “When we looked at them, we only saw 25 percent of the similar technologies to enable things like Advanced Driver As- company that we wanted. We weren’t interested in the rest of sistance Systems, security and connected cars? Not necessa- the stuff.” rily, said the NXP CEO. www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 7 ® AddingAnalog isBluetooth Everywhere Low Energy to Your Application Just Got Easier Today, NXP’s AM/FM car radio chips are used on “27 out of cars are directly exposed to the outside world, while Freescale’s with the RN4020, a Complete Bluetooth 4.1 Low Energy Module 28 car audio platforms of choice” used by Tier Ones and car strength is in engine controls and power trains. OEMs, said Clemmer. “We’ve got silicon tuners and DSPs.” Luca DeAmbroggi, principal analyst for Automotive Semi- But once Freescale’s apps processors are brought to NXP’s car conductors, IHS Technology, mostly agreed with Clemmer’s radio platforms, the new NXP would be suddenly able to offer assessment. much fuller, compelling car infotainment systems. The analyst said, “The announced merger between Freescale NXP has been working on ADAS with Mobileye for vision and NXP gives birth to a company that is strongly positioned processors, according to Clemmer. “They’re doing a good and one that is able to serve complete automotive semiconduc- job,” he said, “but Freescale has a very good automotive vision tor solutions to all high-growth segments.” These segments SoC of its own.” Freescale’s automotive vision SoCs are using include infotainment, ADAS, and connectivity as well as the CogniVue’s APEX Image Cognition Processing technology. Fre- “new frontiers” represented by in-vehicle security and hybrid escale unveiled at the World Mobile Congrees, a new automo- and electric vehicles, he added. tive vision SoC, dubbed S32V, which can make safety-critical In terms of market share, the NXP-Freescale merger would decisions for drivers to prevent accidents. have formed a company with a turnover of a US$ 4 billion in Asked about if NXP and Freescale are both pushing for 2014, at least $1 billion ahead of the next supplier, Renesas. security in connected cars, Clemmer said, “Freescale is doing security in software, whereas we’re doing security in hardware” Layoffs by leveraging NXP’s security chips used in identify and banking Asked about layoffs among engineers at both companies, cards. Clemmer said, “We will not be cancelling any development Freescale is very strong in radar. But NXP has revealed at projects currently going on in R&.” the Mobile World Congress that the company has developed a He pegged the “cost synergy” – the savings in operating CMOS-based small radar chip. In addition to radar developed costs expected after the two companies are merged -- to be by Freescale, carmakers can add several tiny radar systems about $1.2 billion in R&D. inside a car in order to make cars even safer, Clemmer added. The savings will be mostly coming from supporting various The biggest difference between the two companies’ auto- CAD tools and models out of one organization than two, Clem- motive chip businesses is that NXP is focused on connectivity mer explained. interface and security — more of the areas where connected

IoTize rejuvenates legacy systems with smartphone-compatibility

By Julien Happich

t embedded world, the Raisonance business branch of system (from industrial designs to consumer goods) into the Keolabs was demonstrating an interesting NFC retrofit IoT sphere without any RF expertise nor any new certification solution for embedded systems, the IoTize plug-and-play process, while enabling different user accesses, say for remote Power Management Thermal Management ARF module able to rejuvenate and turn any legacy system into a configuration, maintenance or end-user personalization. With ■ DC/DC Conversion ■ Temperature sensors smartphone-compatible cloud-connected appliance. the added connectivity, usage data could be leveraged by cloud ■■ Simple System ASCII supervisors UART interface ■ Fan controllers Francis Lamotte, Raisonance’s former CEO and now Keo- analytics, to enhance user services or to better understand the ■ labs’ Vice President after his company’s merger users’ needs and manage product evolutions. ■ Selectable Battery charging on-board Bluetooth Profi les with Soliatis in 2012 explained the concept fairly Practically, the module connects via a flex ■■ Microchip’s Power measurement Low-Energy Data Profi leSignal (MLDP) Conditioning for custom serial data ■ simply. circuit, and could be stuck about anywhere ■ Scripting for standalone analog and digitalOp Amps data collection “On one hand, Raisonance has been provid- inside an appliance’s housing, retroactively. ■ Interfaceand transmission Comparators ing compilers and MCU development tools for Although the RF connection was demonstrat- ■ 2 ™ ® ■ over 30 years, on the other hand, we have been ed using near field communication, Keolabs ■ BluetoothCAN, LIN, SIG USB, and I regulatory, SPI, IrDA agency ADCscertifi cation* and DACs a provider of test equipment and emulators for says the same retrofit principle could apply ■ Ethernet ■ Digital potentiometers smart cards for the last 15 years, including more with Bluetooth or Sigfox-equipped IoTize *Check Microchip’s website for latest Regional Government■ Instrumentation Regulatory Certifi cations amps recently for NFC chips. So the IoTize concept is modules. Safety and Security really a fusion of our knowledge in both debug- Currently, in standby mode the NFC-only ■ Smoke Detection ICs LED Lighting ging and NFC-connectivity, connecting radio- module draws about 15µA from the system’s (standard and custom) ■ Off-line capable modules through a board’s typically board it is hooked to, and between 4.5 and ■ unused debug port”. 5mA when channelling data. But after further Piezoelectric horn drivers ■ DC/DC Measuring 25x35mm, the first IoTize proto- design and power optimization, Lamotte type modules combine an NFC chip together hopes the communication could be entirely with a co-processor to establish a direct con- powered by the smarphone’s NFC reader nection between the legacy system’s processor field, while drawing under 10µA from the (addressed through the debug port) and an NFC- system’s board when in sleep mode. enabled smartphone. As for additional communication channels such as Bluetooth, “The beauty of this approach is that the connection can be Wi-Fi or others, the board will have two modes: either the chan- done without modifying the native or hardware, and nels will be woken up from a very low power sleep mode by the the smartphone application can be created very simply, only smartphone’s NFC reader, or these channels would remain in microchip.com/analog having to edit some HTML” emphasized Lamotte. listening mode (the power consumption depending on the final The IoTize module allows engineers to take their embedded design’s components). The Microchip name and logo and the Microchip logo are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks are the property of their registered owners. © 2014 Microchip Technology Inc. All rights reserved. DS00001793A. MEC0020Eng.12.14 8 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com ® AddingAnalog isBluetooth Everywhere Low Energy to Your Application Just Got Easier with the RN4020, a Complete Bluetooth 4.1 Low Energy Module

Power Management Thermal Management ■ DC/DC Conversion ■ Temperature sensors ■■ Simple System ASCII supervisors UART interface ■ Fan controllers ■■ Selectable Battery charging on-board Bluetooth Profi les ■■ Signal Conditioning Microchip’sPower measurement Low-Energy Data Profi le■ (MLDP) for custom serial data ■ Op Amps Scripting for standalone analog and ■digital data collection Interfaceand transmission Comparators ■ 2 ™ ® ■ ■ Bluetooth CAN, LIN, SIG USB, and I C regulatory, SPI, IrDA agency ADCscertifi cation* and DACs ■ Ethernet ■ Digital potentiometers *Check Microchip’s website for latest Regional Government■ Instrumentation Regulatory Certifi cations amps Safety and Security ■ Smoke Detection ICs LED Lighting (standard and custom) ■ Off-line ■ Piezoelectric horn drivers ■ DC/DC

microchip.com/analog

The Microchip name and logo and the Microchip logo are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks are the property of their registered owners. © 2014 Microchip Technology Inc. All rights reserved. DS00001793A. MEC0020Eng.12.14 computing

AMD describes notebook processor Carrizo

By Rick Merritt

dvanced Micro Devices will describe the company’s lead engineer on power issues. at the International Solid-State “We’ve done a lot of work to squeeze at Circuits Conference the engineering least a node’s worth of improvements out of Aprowess behind its next-generation note- the design -- It wasn’t easy but the opportuni- book processor. ties were there,” said Naffziger. “If you look Carrizo packs 29% more transistors and at transistors per millimeter, Broadwell is only squeezes double-digit gains in performance 20% denser, so we are doing amazingly well and drops in power consumption out of the at two technology nodes behind Intel, en- same 28nm process and die area as its cur- abling HEVC and south bridge integration that rent Kaveri chip. it doesn’t have,” he said. AMD uses the extra space to pack its “We will have an advantage in some cases previously external south bridge I/O unit and they will in others,” Naffziger added. “Our into the die, saving system level power. The graphics are unparalleled and will continue to company claims the chip is also the first win there, but CPU is Intel’s forte --we have to provide hardware-assisted decode of the our plans to improve [our CPU core] but we new High Efficiency Video Codec (H.265). will not close that gap today,” he said. The net result is a chip that will sport power and performance Naffziger declined to comment on AMD’s plans for 20 or advantages for some mainstream notebooks over its com- 16nm designs or to give an update on AMD’s road map for x86 petitor, Intel’s Broadwell made and 64-bit ARM cores announced in a 14nm FinFET process that in May. He also declined to name debuted at CES in January. How- the foundry where AMD will make ever, Intel still commands a sig- Carrizo or give target frequency nificant lead in CPU performance. and price for the chip expected In addition, the 12-35W Carrizo to be formally announced before family requires a fan making it July. too hot and power hungry to find However he did share details sockets in notebooks. in the ISSCC paper about how The net accomplishment of AMD applied to Carrizo physical Carrizo is impressive, but it’s design techniques from its GPU unclear if the business impact will cores. Their auto place-and-route be adequate to assure healthy methodology and high density growth for the company led by libraries helped shrink the chips its new chief executive, Lisa Su. metal layer count from 13 to 9 AMD lost $330 million in its latest tracks, shrinking wires and saving quarter and laid off 7% of its staff power. in October, a week after Su took Other advances enable users over as CEO. AMD’s new Excavator x86 core fits in 23% less area than to access all 8 GPU cores on the Because “AMD’s integrated the prior core, in part due to use of the company’s dense design. In its prior 17W Kaveri graphics core is quite powerful, physical design methods and libraries for graphics cores. chip users could only access 6 of better than any of Intel’s GPUs 8 graphics units. – [Carrizo is] the equivalent of a The chip also marks first full graphics card with a processor implementation of the AMD-led and south bridge for free,” said Heterogeneous System Architec- Tom Halfhill, senior analyst for ture spec for letting GPUs and market watcher The Linley Group. CPUs share coherent memory However, “everyone’s worried links. Carrizo supports graphics about AMD long term, though context switching, the only piece they are doing well in the custom of the HSA 1.0 spec not in the [videogame processor] business, prior Kaveri chip. Lisa Su has a tough job ahead,” The paper also describes a he added. handful of power management The ISSCC paper will detail techniques AMD applied in Car- many of the chip’s advances rizo. They include new techniques packing its core into a smaller for mitigating voltage droop and area and delivering power con- use of 10 on-chip sensors moni- sumption savings, according to Methods for handling voltage droop reduced CPU power toring frequencies across about co-author Sam Naffziger, one of 500 pathways. consumption 19%. four AMD corporate fellows and

10 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com electric charge

IKEA and Samsung back Qi wireless charging advance

By Paul Buckley lobal home furnishings retailer IKEA has breathed new ing and most advanced global standard for wireless charging.” life into the wireless charging market with the launch To reinforce the trend for global brands to adopt the Qi wire- of Qi-powered bedside tables, lamps and desks that less power standard also revealed this Geliminate cable mess and allow to stay connected with always- week that wireless charging is built into the Korean company’s charged mobile devices. flagship Galaxy S6 and Galaxy S6 edge smartphones. Both IKEA said the wireless charging home furnishings will be handsets will charge straight ‘out of the box’ on all Qi chargers available in Europe April 2015, followed by a global rollout. now in the market. IKEA’s decision to opt for Qi global wireless “As the number one smartphone sup- charging standard gives the Wireless Power plier in the world, Samsung has set the Consortium (WPC) another major global bar on advanced, must-have features that brand to pin to its banner. enhance the consumer experience,” said “IKEA is delivering on its vision of mak- Menno Treffers, chairman of the Wireless ing life at home better with this innovative, Power Consortium. “By including Qi in the stylish and useful new collection that show Galaxy S6 line, Samsung has addressed a consumers the beauty and simplicity of basic consumer need having a phone that is wireless charging,” said Menno Treffers, WPC chairman. easily charged everywhere. Leading brands like Samsung, IKEA, Qi is the most widely deployed wireless power standard, Marriott, McDonalds, Toyota and others are continuing their available in 3,000 hotels, restaurants, airports and public loca- commitment to wireless charging by embedding Qi into their tions worldwide. There are now more than 80 Qi-enabled smart- products and locations.” phones, 15 models of Qi-enabled cars and countless Qi mobile “With the launch of Galaxy S6 and Galaxy S6 edge, we accessories in the market today. believe 2015 will be a landmark year for the adoption of wireless “Our belief is that mobile phones are vital parts to people’s charging,” said Peter Koo, Senior Vice President of Technol- lives at home and their desire to stay connected, and Qi ad- ogy Strategy team, Samsung Mobile. “We hope to accelerate dresses an unmet need to keep devices powered,” said Bjorn the use of this wireless charging technology with compelling Block, Range Manager for Lighting and Wireless Charging, at smartphones and making charging experience more convenient IKEA. “As a member of WPC, we value the access to the lead- for consumers.”

carts, electric scooters or four-wheel low-speed city vehicles Is this the Tesla killer? with up to 20 kW. One of the reasons is that to achieve high power at low voltage, very thick cables are required, which made them expensive and heavy. An additional drawback were By Christoph Hammerschmidt relatively high ohmic losses in the cabling nly a week after the introduction of its second- system. generation electric sports sedan Quant F, e-car La Vecchia design company nanoFlowCell has announced claims that the flow anotherO development to be shown at the Geneva Motor cell technology re- Salon. This time however, it is a small roadster with presents a solution low-voltage drive. In contrast to the Quant F, the Quan- to these issues, be- tino runs on just 48 Volts but nevertheless boasts quite Four seats, four-wheel drive, less than four metres cause there are also a sporty performance. long. The Quantino has a driving range of 1000 advantages of low- The electric energy is stored in the same flow bat- kilometres, nanoFlowcell promises. voltage drives over tery and buffer system as in the Quant F, the Quantino’s bigger the high-voltage systems deployed in today’s electric vehicles. brother. The powertrain however is different - the Quantino For example, the effort to implement a protection against ac- is equipped with four electric motors of 25 kW each. Thus it cidental contact or electric arcs, is much lower. The ECE-R 100 achieves about 136 horsepowers which give it a top speed of standard does not require any additional protective measures. some 200 kmph (about 125 mph). The best is its driving range This facilitates significantly the homologation process. of more than 1000 km which is even more than a comparably “Functional safety is much easier to implement”, La Vecchia powered gasoline vehicle would be able to offer. said. The flow cell technology, developed by Liechtenstein- “The Quantino will be an electric vehicle that everybody can based startup company nanoFlowcell, is a hybrid of conven- afford”, comments nanoFlowcell Nunzio La Vecchia, nanoFlow- tional chemical battery and fuel cell. With the technology, cell’s Chief Technology Officer. While the roadster will see the electric energy is generated out of the chemical reaction of two Geneva Motor Show as a concept car, it will become reality electrolytes. already this year, La Vecchia promised. “The Quantino will be These liquids are stored in two separate tanks in the car and ready to drive in 2015. And we are seeking road approval very can be refilled as fast as a gasoline tank at a conventional filling fast,” he said. station - a significant advantage over the lithium-ion batteries Hitherto low voltage drives typically were a feature of ve- today used to drive electric vehicles which require a recharging hicles with very low power of less than 5 kW. Examples are golf time measured in hours instead of minutes. www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 11 materials

Graphene polymer speeds electron transport a real BroaDsiDe! By R. Colin Johnson

raphene is considered by many as substrate and then the whole stack is the successor to silicon because flexible, so it can be applied to make flex- its electron mobility can be over ible devices,” professor David Barbero at G10X that of silicon plus it solves many of Umeå University told EETimes as leader the problems with scaling silicon. How- of the international research team that ever, graphene’s lack of the bandgap it performed the experiments at Stanford’s needs to create transistors has slowed its SLAC. development. Now researchers propose Graphene is difficult to deposit across coating it with a conductive polymer to a whole wafer, but Barbero’s team found a produce organic electronics that rival way to easily grow the graphene mono- silicon at a fraction of the price. layer on metal, then transfer it to nearly Researchers at the Umeå University any substrate--silicon and glass for the (Sweden) in collaboration with Stanford experiments--but also to other polymers University and its Synchrontron Radiation for flexible applications. Lightsource at SLAC (formerly the Stan- “A large-area single layer graphene ford Linear Acceleration Center) created was synthesized on a copper foil by prototypes of the new hybrid graphene/ Diagram of why experiments at the Stanford chemical vapor deposition (CVD) using a polymer material with remarkable results. vertical quartz tube. The graphene layer Synchrotron Radiation Lightsource showed Besides greatly accelerating the polymer, was then spin-coated with a polymer layer a thicker film (top) had significantly higher making it into a high-mobility semicon- (poly-methyl meth-acrylate, PMMA), and ductor, the hybrid material maintained its electron mobility than thinner polymer films the copper was etched in ammonium per- flexibility and seemed to work both for (bottom) by allowing more crystal-to-crystal sulfate, and the copper residues removed planar electronics and vertically oriented pathways for conduction. (Source: Umeå by wet cleaning. Finally, the graphene was conduction for light-emitting diodes (LEDs) University) floated in deionized water and transferred and solar cells. to a silicon or glass substrate, dried and the PMMA was dis- “The polymer film itself is flexible and the graphene layer solved to leave a clean monolayer of graphene,” Barbero told is also flexible by itself. Our experimental glass and silicon us. “The next step was to deposit the semiconducting polymer substrates are rigid, so our overall stack was rigid, but we can on top of the graphene. This was done by spin-coating from make the same graphene/polymer thin layers on a flexible a dilute solution until dry, and resulted in a uniform thin film of well-defined thickness.” When characterizing the material, the researchers made the remarkable finding that the electron mobility properties of the hybrid material were enhanced by depositing the semi- conducting polymer as a slightly thicker film, which is just the opposite of other thin films. In fact, by making the poly- low ohmic precision anD power resisTors mer semiconductor about 50 nanometers thick, its electron mobility was likewise boosted about 50 times over the same polymer film deposited at 10 nanometers thick. The research- ers speculated that the thicker film gave the randomly oriented crystals it more crystal-to-crystal pathways than a thinner film Top performance on small surface areas wiTh low-ohmic precision resisTors (unlike single-crystal films which whose crystals are side-by- side). Besides finding that the performance was even better than By reversal of the length to width ratio, our Vlx series resistors have larger soldering and contact pads, giving them: growing graphene on silicon, another notable finding was that conduction in the axis vertical to the surface was just as good, _ better heat dissipation, rthi < 20 K/w making the transparent material a good candidate for optical _ higher power rating: 2 w for size 1020, 1 w for size 0612 devices such as inexpensive photovoltaic (PV) solar cells and _ significant increase in mechanical stability LEDs. “The results show that there is potential for opto-electronic applications, and it would indeed be nice to build a more ef- ficient photovoltaic solar cell based on a graphene monolayer, which would moreover make the device be lightweight, super- thin and flexible,” Barbero told us. Since the initial discovery, the researchers have been ex- perimenting with different semiconducting polymers atop gra- Innovation by Tradition phene with the goal of exceeding the performance of standard Semiconducting polymers atop a graphene monolayer increase silicon chips as well as improving the performance of all sorts isabellenhütte heusler Gmbh & co. KG their electron mobility dramatically. (Source: Umeå University) of plastic photovoltaic and photonic devices. eibacher weg 3 – 5 · 35683 Dillenburg · phone +49 (0) 2771 934-0 · fax +49 (0) 2771 23030 [email protected] · www.isabellenhuette.de 12 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com

Isa-AnzeigeVLx_Elektronik_210mm x 297mm_ENG.indd 1 11.07.2012 13:47:34 a real BroaDsiDe!

low ohmic precision anD power resisTors

Top performance on small surface areas wiTh low-ohmic precision resisTors

By reversal of the length to width ratio, our Vlx series resistors have larger soldering and contact pads, giving them:

_ better heat dissipation, rthi < 20 K/w _ higher power rating: 2 w for size 1020, 1 w for size 0612 _ significant increase in mechanical stability

Innovation by Tradition

isabellenhütte heusler Gmbh & co. KG eibacher weg 3 – 5 · 35683 Dillenburg · phone +49 (0) 2771 934-0 · fax +49 (0) 2771 23030 [email protected] · www.isabellenhuette.de

Isa-AnzeigeVLx_Elektronik_210mm x 297mm_ENG.indd 1 11.07.2012 13:47:34 consumer

Samsung phones pack 14nm SoC

By Jessica Lipsky

amsung will pack a handful of new technologies -- in- “Both versions of the Samsung 6 are important for Samsung cluding a 14nm Exynos applications processor -- into its as it helps them gain attention in the premium smartphone new Galaxy S6 and S6 Edge smartphones announced market again and allows them to compete with Apple and oth- atS the Mobile World Congress here. Analysts said the handsets ers in this area,” Creative Strategies President Tim Bajarin told will give Samsung a technical edge that could help it regain EE Times. “[Exynos] should keep them competitive and give a momentum, at least until Apple debuts next-generation iPhones slight edge in mobile processes in speeds. However Apple’s later this year. new chip could be as fast when it comes out later this year,” he The Galaxy S6 and S6 Edge -- which has a much-rumored said. curved display -- include a 14nm Exynos application proces- While Samsung presented some significant innovation, sor, a novel memory stack, a new Galaxy champions may need to fast-charging battery and new temper their excitement. display and camera capabili- “Apple’s momentum with the ties. Taking a page from Apple’s iPhone 6 and 6S will be very playbook, users will not be able hard to break as the refresh to swap out batteries or expand cycle for Apple iPhone custom- memory as they did with prior ers will be strong for another Galaxy handsets. The phones will 12-18 months,” Bajarin said. be available in 20 countries on Ironically, Apple is believed April 10, 2015 for an undisclosed to be designing the applications price. processor for its next iPhone in “I think after several iterative Samsung’s 14nm process. generations, they’re really pour- Samsung’s foundry group is ing all their advanced stuff into courting big fabless companies the S6,” Envisioneering Research such as as custom- Director Rick Doherty told EE ers, too. In this way, Samsung Times. appears to be giving itself a “Some companies have Unlike its rivals, Samsung smartphones have tech and design slight advantage at the 14nm set themselves apart through node with a few months lead prowess, said CEO J.K. Shin. designs, others through practical- over its handset and silicon ity, but people want both,” Samsung President and CEO J.K. rivals. With its new handsets, Apple appears to be adopting a Shin told a crowd of thousands at its Unpacked event. “People page from Apple’s playbook. It has created a novel fast-charg- want the best in class smartphone with best in class design, it’s ing battery and enhanced memory technologies but users will what we have set out to build and we did it,” he said referring not have the option of swapping the components out as they obliquely to archrival Apple. did in previous Galaxy models. Both new Samsung phones use 64-bit SoCs built in the Samsung’s new built-in, rapid-charging battery is capable of Korean giant’s 14nm FinFet powering an S6 battery to a 40% process. The phones pack a charge in 10 minutes. The bat- CAT-6 LTE modem running at 300 tery –- 2,550 mAh in the S6 and Mbits/second downlink. 2,600 mAh in the Edge -- can While officials scarcely spoke fully charge in roughly half the about specs, Forbes has con- time it takes to charge an iPhone firmed that the S6 and S6 Edge 6, Samsung said. will use a Exynos 7 octacore It’s unclear whether Samsung processor with four cores running has created two batteries or one at 1.5GHz and four at 2.1GHz. segmented 6.8 mm battery. The These chips are 35% more phones also support both Qi and energy efficient than those in the Power Matters Association wire- less charging standards. Galaxy Note 4 and 20% faster. Battery life by activity on the Galaxy S6. Exynos was previously un- Samsung may be taking a risk available outside Asia and now presents Samsung with an addi- with a built-in battery and offerings of 32, 64, and 128 GByte tional advantage over fabless competitors such as Qualcomm, memory options rather than expandable storage. Doherty said Doherty said. Qualcomm has already taken a hit in negotiations his research has shown that many American and European over its royalty rates in China, and with Samsung supplying high customers chose the Galaxy line for its swappable battery and quality silicon for its own smartphones and lower grade chips to micro SD card. its competitors, Qualcomm may be left in the dust. “It’s a huge change in flexing their technology clout and their The phones also may help Samsung regain market share lost position of being first in a few of these features,” Doherty said. in China last year to Apple and domestic OEMs such as Xiaomi. “They’re clearly bifurcating the market a bit. For premium cus-

14 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com tomers [paying for additional storage] probably means nothing, el front camera capable of real-time HDR and a 16-megapixel but the question will be, ‘will this affect their majority sales,’” he rear camera with object tracking autofocus. said. The S6 and Edge were launched alongside a new edition of Doherty noted that LG had to “rush out with swappable bat- its Gear VR ready for the S6 and Samsung Pay, which inte- teries” in its G3 smartphone when customers were dissatisfied grates MST or LoopPay and NFC. As many as 90% of U.S. with the G2’s internal battery. merchants aren’t equipped for Apple or Google pay systems, The S6 also boasts 3GBytes LPDDR4 RAM, heretofore Samsung officials said. unseen in smartphones, to achieve an 80% increase in running “We believe that for any payment service to be successful memory. The company fused SSD and eMMC to create a new universal acceptance is critical. NFC is not universally ac- flash storage technology similar to that used in smartwatches cepted,” Justin Denison, vice president of product strategy and and Internet of Things devices. marketing, said. “MST allows you to use mobile payments when “I think the DDR4 push clearly differentiates Samsung from merchants only use the stripe barcode.” Qualcomm and Intel in trying to secure these advanced phone Users will be authenticated by fingerprint and the card will sets,” Doherty said. be encrypted; no information will be stored by Samsung or in Samsung has improved the media experience on the hand- the device. Doherty called the announcement bold, but added sets by using 5.1-inch displays with 577 pixels/inch. Its image that Apple and Google won’t be threatened until Samsung Pay sensors support optical image stabilization. It has a 5-megapix- debuts this summer. Semitrex’ ultimate goal: one size fits all power conversion

By Julien Happich fter two years in stealth mode and having filed 46 patents around a capacitive voltage reduction technol- ogy dubbed muxcapacitor, Californian startup Semitrex ATechnologies is looking up to address a three billion unit a year power supply and battery charger market with what it claims to be a one-size fits all power supply on a chip, the Tronium. By arranging a network of cascading silicon supercapacitors cleverly controlled through interconnected gates, founder Mi- chael Freeman, CEO and CTO for Semitrex explained EETimes Europe that he had effectively designed a much more energy efficient power conversion device without relying on inherently dissipative inductors. In a way, what the Tronium chip does is to control the flow of The design gets rid of magnetic and inductive components charges from one voltage level to the next, barely with any dis- altogether, finely controlling instant charge transfers through the sipation. Built at the 1.8um node, the design’s tunable capaci- chip’s built-in networks of multiplexed supercapacitors. Doing tance across a whole chip can vary from 0.1uF to 7uF. so, Freeman was able to design a very compact down convert- “The real breakthrough was that we were able to figure out ing solution programmable to output voltages from 1.7V to 48V custom circuitry and unlock the secret of sharing the gates ap- starting from high mains DC levels. propriately to take a main DC voltage all the way down to any voltage”, told us Freeman, not willing to reveal more about the architecture of the chip. Prototyped in a 50x50mm form factor this configurable “dial-a-voltage” solution could eliminate the need for the more than 2,500 existing power supplies currently offered to span the globe’s differing voltage requirements, he claims. According to the company’s datasheets, Tronium ICs boast an efficiency that starts at 92% right from a 50mA current out- put, going up to 97%. Freeman hopes to improve this efficiency figure to 99% by tweaking the process or using GaNi or other material options. The equity-owned startup (strong of 30 engineers) has already churned out its 3rd round of silicon and is expecting its fourth batch by the end of February. Generations 5 and 6 should be ready by July with first samples going to selected customers by the end of the summer and maybe a first commercial product ready by the end of the year, the Tronium IoT PSSoC.

www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 15 The future of custom ASICs

By Donnacha O’Riordan

ith the prevailing view that Moore’s Law is slowing businesses only on the largest scale, and led to the adoption Donnacha O’Riordan, director of services strategy for and evolution of the current fabless semiconductor model. S3 Group, gives a view of accessing IC solutions with As the complexity of each new process node grew however, IPW and tailored silicon solutions. to maintain the pace of Moore’s law, fabless semi companies For decades, electronics product innovation has been incre- needed to have two or three generations in development simul- mental in nature, relying largely on the next generation of semi- taneously, compounding the requirement of massive scale, and conductors to deliver performance improvement. For almost ultimately driving the consolidation we have been seeing since 50 years Moore’s Law has delivered 2x performance (power or the beginning of the current decade. Moore’s law is struggling cost) improvement in semiconductors every 18 months, outpa- to maintain an 18 month pace. cing any product or system level innovation cycle that could be achieved by even the most ambitious hardware teams. What Moore’s Law is slowing down has evolved is a “sit & wait” approach, to product innovation. Arguably clock scaling as a performance metric, ended in 2003, However it is now clear that Moore’s law is broken, and the since then multi-core architectures have been employed to implications are profound for hardware designers. achieve the performance gains predicated on Moore’s Law, as shown in the graph below. The Semiconductor industry is consolidating, into fewer Certain fundamental parameters have already hit a wall, such huge players. The fabless model is as Vth, Vddmin, Gate Oxide thick- under increasing strain favouring ness. only the most massively distributed This is not to say that scaling companies. Hardware product will not happen, it certainly will at teams can no longer “sit & wait” for least to possibly 5nm, somewhere performance improvement to be between 2020 and 2030, and there delivered by semiconductor compa- will still be some applications with nies, architecture is becoming more unit volume sales that support the relevant, it becomes feasible – even economics required. necessary, for product teams to However, we are not getting 2x develop their own custom ASICs. improvements every 18th months, and this has profound implications Here, I highlight some of the for hardware innovation, as the “sit trends that have caused the hard- & wait” approach to hardware and ware industry to favour a “sit & wait” product innovation falls apart. approach to innovation, and looking The key insight is, when you look forward 5 to 10 years, suggest what at a typical two-to-three year prod- will be a fundamental shift in how uct development timeline, in the hardware product innovation hap- post Moore era, there is ample time pens. to execute this cycle in between process node releases. As a result there is now a compelling Hardware’s innovation problem reason and time, to consider new innovative system architec- Moore’s Law has been relentless for almost 50 years. A new tures or build custom ASICs optimized for a specific product, hardware product has to be conceived, designed, prototyped, since doing so beats the improvement that can be gained from validated, mass manufactured, and distributed to enable trac- process scaling alone. tion and ultimately wide scale adoption by end users. A typical product innovation cycle can take two to three years to com- Post Moore plete. In the post Moore’s law world, architecture matters, optimiza- tion matters, and a custom ASIC approach is beginning to In the past, Moore’s law will have delivered two cycles of re-emerge, as not just feasible, but a necessary option for many process node shrinks in that same time frame, each of which System Companies and OEMs. delivering a 2x improvement, in performance, power, cost. This In other words, there is a genuine market window for mon- makes it impossible for hardware designers to outpace Moore’s etizing innovative product and hardware solutions, based on law using any other innovation approach. What has emerged as custom ASICs, instead of sit & wait. a result, is a “sit and wait” approach to innovation from product Deceleration of Moore’s Law is already showing its impact companies. on markets that are not as sensitive to performance. Consider For semiconductor companies in turn to be competitive in the rise of the Arduino platform. The Arduino took several years the Moore era, increasingly required massive distribution and in- to gain popularity, with virtually the same hardware at its core frastructure to deploy millions of units per month. This favoured since 2005. Closer to home, consider the Iridium Satellite transceiver Donnacha O’Riordan is Director of Services Strategy at S3 platform, S3 Group have developed 3 generations of custom RF Group - www.s3group.com & mixed signal ASIC solutions, in the same period as two pro-

16 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com mouser.com

The end of clock frequency scaling prompted the genesis of multicore architecture. cess node developments, enabling Iridium and more important- ly their customers benefit in terms of cost & form factor through innovative new architecture approaches, rather than process shrinks of the original ASSPs.

In what are now mature process nodes, ASIC development times are shortened considerably due to the availability of semiconductor IP, production proven on those nodes. As the process node shrink cycle lengthens, typical Product Develop- ment cycle now outperforms the process node cycle in deliver- ing price/performance improvements.

Hardware optimization becomes relevant In the past there was little motivation to optimize hardware or architecture, when gains could be made by cramming more fea- tures into software, waiting for a semiconductor upgrade cycle and then it would start to run well as Moore’s Law delivered semiconductor performance. Remember how slow WinXP and Vista ran when they first came out?

Megatrends like open compute projects, the maker move- ment, hardware hackathons, are all examples of (or reactions to) the realization that gains from product architecture optimization can and do outpace those of semiconductor upgrades.

Conclusion In the post Moore’s law world, architecture matters, hardware optimisation matters, doing custom ASICs are not just feasible, but a necessary option for many System Companies and OEMs.

As process technology nodes advance and Moore’s Law slows at the leading edge, falling costs and increasing capacity on more mature nodes, coupled with the availability of high per- formance RF and mixed-signal IP is enabling a new paradigm in hardware and product innovation. OEMs can now embark on custom ASIC developments to take advantage of higher levels of integration, realising significant BOM savings.

While the open hardware movement, and open compute projects are still niche areas and for now custom ASICs are maybe out of reach, other megatrends like IoT are driving new platforms, architectures and opportunities. Not in over 30 years, have custom, mixed-signal, ASIC developments been within reach of so many lower volume hardware applications.

This article first appeared on EE Times’ Planet Analog website. www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 17 Newestproducts_93x277.indd 1 04/03/15 15:13 automotive electronics

Porsche rainmaker advocates platooning Redefining RF and By Christoph Hammerschmidt

ndividual mobility as our fathers knew it gets increasingly chal- certain extend, competitor) Volvo. With platooning, cars organise Microwave Instrumentation lenged. Traffic density, pollutant emissions and other ecologic themselves in groups with the leading vehicle assuming the control problems afflict the automotive industry. To some extend, new over the speed for a certain time or distance. Merging into the with open software and modular hardware Iforms of traffic organisation could relief the situations. Armin Müller, platoon is done electronically with existing distance sensors and one of the thought leaders of sports car manufacturer Porsche has inter-vehicle communications; once logged into the platoon, the a surprising suggestion: Platooning. vehicle could drive along to a large extend automatically. In times when new players such as Google (and perhaps soon, All vehicles but the leader benefit from driving in the slipstream Apple) are entering the automotive market, the traditional top dogs of the vehicle in front which already helps to reduce fuel consump- are becoming thoughtful. As a matter of fact, the entire European tion. More relevant however is the fact that all vehicles are mov- automotive industry currently is in search mode for solutions to the ing along at the same speed and at short distances. Thus, the challenges of the automotive markets of the future. At the recent capacity of the motorways is utilised much better than with today’s annual Euroforum Automotive Electronics congress in Munich, individual (and most of the time, a bit chaotic) traffic. The effective this was also the case. Armin Müller who oversees strategic future capacity per lane could be multiplied massively, Müller worked out. projects Porsche, analysed the situation. Given the incredible What’s more, this mild form of automated driving would increase awesome of the markets in China and the mega traffic streams it traffic safety significantly, Müller explained. “In the US alone, we is expected to generate, it is obvious that the market will be much see 3000 traffic fatalities caused by inattentive driving”, he said, different from today. More roads and highways are not a solution, suggesting that this type of traffic organisation could reduce this Müller conceded. Ecologic compatibility is becoming a must even figure drastically. for sports car makers. To make this way of travelling possible, some conditions need From the perspective of the powertrain, plug-in hybrids will to be met. The availability of V2X communications is one of these be the most promising solution, Müller explained, because they requirements. “We need standards, complete network coverage reduce the effective fuel consumption significantly. Battery electric and assessment methods for the safety of such systems”, he said. vehicles are no solution, at least for the time being. “As long as the Also the legal conditions have to be modified accordingly. driving range is not good enough, they won’t see acceptance at Platooning of course does not put an end to individual respon- the markets”, Müller stated. sibility and control. Once a participant has reached the motorway The throughput of motorways could be maximised without high exit of his destination, he withdraws from the platoon and contin- investments into traffic infrastructure by establishing platooning as ues the travel in the conventional way. a standard option for highway travel, Müller suggested. Platooning Something different probably would not be imaginable for a has already been tested successfully by fellow carmaker (and to a dyed-in-the-wool sports car manufacturer. Parrot takes instant 3D mapping to the sky

By Julien Happich

n ’s booth at embedded world, a robot arm was accumulated views and extended its field of view. Arguably, the swinging a stereo camera assembly, in a drone-like 3D mapped environment could be streamed to the drone opera- fashion, demonstrating Parrot’s software capabilities tor, but more likely and more useful, it could be used automati- toO turn cheap stereovision into real-time 3D mapping using cally by a self-aware drone to avoid obstacles and navigate into nVidia’s Jetson TK1 development kit. complex and unchartered 3D mazes. Achieve speed, accuracy and flexibility in your RF and microwave test applications WIRELESS TECHNOLOGIES Not relying on any other sensors but low- Now, nVidia didn’t want to reveal exactly by combining NI open software and modular hardware. Unlike rigid traditional NI supports a broad range of wireless cost cameras and an inertial motion unit, the what Parrot is aiming at, but claimed a map- instruments that quickly become obsolete by advancing technology, the system standards, including: demo was reconstructing the scene in front ping resolution down to 1cm within a 5m / of the swinging arm, a small Lego house range while processing 1280x720p resolu- design software of LabVIEW, coupled with PXI hardware, puts the latest advances LTE GSM EDGE 802.11a/b/g/n/ac CDMA2000/EV-DO complete with furniture and Lego dolls and tion video at 30 frames per second (the in PC buses, processors and FPGAs at your fingertips. displaying the 3D results as seen from the depth being extracted from black & white WCDMA/HSPA/HSPA+ Bluetooth drone’s perspective. frames). Then a trade-off can be made be- Whilst Parrot already makes 3D mapping tween the speed of acquisition and the level commercially available through heavy post- of resolution, which could mean faster 3D >> Learn more at ni.com/redefine flight image processing, the novelty here is mapping for large obstacle collision avoid- that the topological reconstruction is done ance scenarios in the automotive sector, Follow us on Search National Instruments or LabVIEW on-board and in real-time. The 3D mapping only using cheap stereo cameras for ADAS. is synchronized with the IMU data so as to always present the Other speculative use cases for this application could include Austria 43 662 457990 0 n Belgium 32 (0) 2 757 0020 n Czech Republic, Slovakia 420 224 235 774 n Denmark 45 45 76 26 00 environment relative to the drone’s position. generic 3D mapping as an extension of Google’s StreetView, Finland 358 (0) 9 725 72511 n France 33 (0) 8 20 20 0414 n Germany 49 89 7413130 n Hungary 36 23 448 900 n Ireland 353 (0) 1867 4374 From watching the demo, one could appreciate the preci- automated indoor and outdoor architectural exploration or Israel 972 3 6393737 n Italy 39 02 41309277 n Netherlands 31 (0) 348 433 466 n Norway 47 (0) 66 90 76 60 n Poland 48 22 328 90 10 sion of the reconstructed 3D landscape, increasing as the drone ready-to-3D-print landmark data acquisition. Portugal 351 210 311 210 n Russia 7 495 783 6851 n Slovenia, Croatia, Bosnia and Herzegovina, Serbia, Montenegro, Macedonia 386 3 425 42 00 Spain 34 (91) 640 0085 n Sweden 46 (0) 8 587 895 00 n Switzerland 41 56 2005151 n UK 44 (0) 1635 517300

©2015 National Instruments. All rights reserved. LabVIEW, National Instruments, NI and ni.com are trademarks of National Instruments. 18 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com Other product and company names listed are trademarks or trade names of their respective companies. 04749

Redefining RF 210x297 euro.indd 1 05/03/2015 14:25 Redefining RF and Microwave Instrumentation with open software and modular hardware

Achieve speed, accuracy and flexibility in your RF and microwave test applications WIRELESS TECHNOLOGIES by combining NI open software and modular hardware. Unlike rigid traditional NI supports a broad range of wireless instruments that quickly become obsolete by advancing technology, the system standards, including: design software of LabVIEW, coupled with PXI hardware, puts the latest advances LTE GSM/EDGE 802.11a/b/g/n/ac CDMA2000/EV-DO in PC buses, processors and FPGAs at your fingertips. WCDMA/HSPA/HSPA+ Bluetooth

>> Learn more at ni.com/redefine

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Austria 43 662 457990 0 n Belgium 32 (0) 2 757 0020 n Czech Republic, Slovakia 420 224 235 774 n Denmark 45 45 76 26 00 Finland 358 (0) 9 725 72511 n France 33 (0) 8 20 20 0414 n Germany 49 89 7413130 n Hungary 36 23 448 900 n Ireland 353 (0) 1867 4374 Israel 972 3 6393737 n Italy 39 02 41309277 n Netherlands 31 (0) 348 433 466 n Norway 47 (0) 66 90 76 60 n Poland 48 22 328 90 10 Portugal 351 210 311 210 n Russia 7 495 783 6851 n Slovenia, Croatia, Bosnia and Herzegovina, Serbia, Montenegro, Macedonia 386 3 425 42 00 Spain 34 (91) 640 0085 n Sweden 46 (0) 8 587 895 00 n Switzerland 41 56 2005151 n UK 44 (0) 1635 517300

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Redefining RF 210x297 euro.indd 1 05/03/2015 14:25 DEBUGGING &PROGRAMMING TOOLS

Tips for designers using Linux in an embedded project

By Arnoldas Bagdonas icrocontroller manufacturers’ development boards, and • ‘ld’, the linker, which links discrete object code seg- the example software projects that they provide with ments into a , or executable them, can provide great assistance to engineers at the Mstart of a new design. Equally, the software that they provide The compiler is the second important component of a tool- can cause problems as a design project goes beyond its early chain. In embedded Linux, it is known as GCC, and supports a phases. wide range of MCU and processor architectures.

Designs using a real-time as the platform Next is the C library. This implements Linux’s traditional for application code also face the challenge of partitioning POSIX Application Programming Interface (API), which can be functionality into concurrent tasks, designing bullet-proof inter- used to develop user-space applications. It interfaces with the process communications, and testing the whole package in kernel through system calls, and provides higher-level services. hardware. The engineer has several choices of C Library: More and more OEMs are finding that the best way to avoid • glibc is the C library available from the open-source both of the problems described above is to base new designs GNU project. This library is full-featured, portable, and conforms on an open-source, proven Operating System (OS) which is to the Linux standard. scalable and runs on various hardware platforms: Linux. Ths OS • Embedded GLIBC (EGLIBC) is a variant optimised for has been ported to more computer hardware platforms than any embedded systems. It has a reduced footprint, supports cross- other. Its derivatives run on a very wide range of embedded sys- compiling and cross-testing, and maintains source and binary tems such as network routers, mobile phones, building automa- compatibility with GLIBC. tion controls, televisions and video game consoles. • uClibc is another C library that may be used if Flash space is limited and/or the must be mini- Just because Linux is used successfully, however, does not mised. mean that it may always be used easily. The OS consists of more than one million lines of code, and operates with a distinc- The debugger is also usually part of the toolchain, as a tive Linux philosophy that the beginner may struggle to grasp cross-debugger is needed to debug applications running on the quickly. target machine. In the embedded Linux world, the usual debug- ger is GDB. The main aim of this article, therefore, is to provide a five- step guide to starting a new design project using the µClinux Essential as these tools are, when used on their own it would version of embedded Linux. To illustrate the guidance, the take too long to compile Linux source code and merge it into article describes the implementation of a µClinux project on an a final image. Fortunately, the tool automates the STM32F429 microcontroller from STMicroelectronics (ARM® process of building a complete , and eases Cortex®-M4 core running at 180MHz maximum), and using cross-compilation by generating any or all of: Emcraft’s STM32F429 Discovery Linux • a cross-compilation toolchain (BSP). • a root filesystem • a kernel image Step 1: Linux tools and project layout • a bootloader image Every design starts with the selection of the right tools. For embedded systems designers, it can also be convenient to use a utility aggregator tool, such as BusyBox, that combines A toolchain is a set of software development tools that are the most commonly required utilities in one place. According linked (or chained) together, and it consists of components such to the BusyBox information page, it ‘combines tiny versions of as GNU Compiler Collection (GCC), binutils and glibc, as well many common UNIX utilities into a single small executable. It as, in some cases, other tools such as compilers and debug- provides replacements for most of the utilities you usually find gers. The toolchain used for embedded development is a cross- in GNU fileutils, shellutils, etc. The utilities in BusyBox gener- toolchain, more commonly known as a cross-compiler. ally have fewer options than their full-featured GNU cousins; however, the options that are included provide the expected The GNU Binutils is the first component of an embedded functionality and behave very much like their GNU counterparts. Linux toolchain. GNU Binutils contains two important tools: BusyBox provides a fairly complete environment for any small • ‘as’, the assembler, which turns assembly code (gener- or embedded system.’ ated by gcc) into binary One last essential tool is a BSP that is made specifically for Arnoldas Bagdonas is Field Applications Engineer at Future the motherboard carrying the project’s target MCU or proces- Electronics (Lithuania) - www.futureelectronics.com sor. A BSP includes preconfigured tools, and a bootloader that

20 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com loads the operating system to the board. It also provides source Step 2: boot sequence, clock system, code for the kernel and device drivers (see figure 1). memory and serial interface A typical embedded Linux boot-up sequence runs as follows: 1) Bootloader firmware (U-Boot in the example project) runs on the target from integrated Flash (no external memory is required) and performs all required initialisation after power-on/ reset, including setting up serial ports and the memory control- ler for external memory (RAM) accesses.

2) U-Boot may relocate the Linux image from external Flash to external RAM, and passes control to the kernel entry point in RAM. The Linux image can be compressed to save Flash stor- age space, at the cost of decompression time during boot-up.

3) Linux proceeds to boot up and mount a RAM-based file system (initramfs) as a root filesystem. Initramfs is populated with the required files and directories at build time, and is then simply linked into the kernel.

4) Execution of /sbin/init under the . The /sbin/init program initialises the system following the description in the / etc/inittab configuration file.

5) Once the init process completes the run-level execution Fig. 1: the main components of the Emcraft BSP for the and the commands in /sbin/init, it will start a log-in process. STM32F429 Discovery board 6) The boot-up process finishes with the execution of the

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www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 21 DEBUGGING &PROGRAMMING TOOLS

shell initialisation file’s /etc/profile. Terminal is the main tool used to configure the Linux host and to build embedded Linux applications. Type these commands to Boot time may be decreased markedly, and overall perfor- install and other required tools: mance may be improved, by enabling Execute In Place (XIP). su [enter root user password] This is a method for executing code from Flash. Normally, apt-get install eclipse-cdt Linux code is loaded from Flash into external memory, and then apt-get install genromfs executed from external memory. By executing from Flash, less apt-get install libncurses5-dev memory space is used as a copy step is eliminated, and no apt-get install git memory is occupied by read-only sections. apt-get install mc

The example project featured in this article is based on an STM32F429 MCU. In fact, users might find peripheral initialisa- tion on the STM32F4 series difficult at first. Fortunately, STMi- croelectronics has developed several tools to help. One of the latest is the STM32CubeMX initialisation code generator (part number UM1718). This tool covers every detail of peripheral initialisation, shows warnings and errors, and warns of hardware conflicts while configuring peripherals.

The STM32F429 MCU has enough internal Flash memory for small embedded Linux projects. It is important to remember that embedded Linux projects use several binary images (boot loader, Linux kernel and the root filesystem): these need to be aligned on Flash sector boundaries. This avoids the risk that, by loading one image, a part of another will be erased or cor- rupted.

Step 3: installing Linux on a host computer To build an embedded Linux project, a Linux host is required. For a Windows PC, it is advisable to install the Oracle® Virtu- alBox, creating a new virtual machine with 512Mbytes of RAM and a 16Gbyte disk. Fig. 2: Linux includes the ‘Terminal’ utility and ‘Files’, a graphical utility similar to Windows Explorer Many Linux distributions are available; is, in the author’s experience, compatible with the VirtualBox environ- The last step in preparing Linux is to download the ST- ment. This Linux host must have access to the internet, so that M32F429 Discovery Buildroot and extract it to the /uclinux the GNU cross-build tools for the ARM Cortex-M target may folder. be downloaded. The designer will then create a tree structure similar to that shown in figure 1, and extract cross-build tools Step 4: building µClinux with Buildroot into the /tools folder. Now it is necessary to close the previous terminal, which was using the root user profile, and launch a new terminal. In the At this point, it is necessary to create an ACTIVATE.sh script. command line, type ‘mc’ and use the navigator to go to ‘Docu- Simply use this code to do so. (<...... > is the path to the ex- ments’, then ‘uclinux’. Press Ctrl+O and activate a Linux ARM tracted GNU tools folder): Cortex-M development session, and run ‘.ACTIVATE.sh’. Again export INSTALL_ROOT=<...... > press Ctrl+O and enter the ‘stm32f429-linux-builder-master’ export PATH=$INSTALL_ROOT/bin:$PATH folder. export CROSS_COMPILE=arm-uclinuxeabi- export CROSS_COMPILE_APPS=arm-uclinuxeabi- The user now has two options. If using the example project in export MCU=STMDISCO VirtualBox, follow the ‘make clean’ and ‘make all’ command se- export ARCH=arm quence. If preparing a brand new environment, use the ‘make’ command. Around 30 minutes later, the new µClinux images will Installing GNU tools into a clean Linux system, however, is be available, as follows: not on its own sufficient to allow their use. Their operation is in out\uboot\u-boot.bin fact dependent on some other system components (such as out\kernel\arch\arm\boot\ xipuImage.bin the host C/C++ compiler, standard C library headers, and some out\romfs.bin system utilities). One way to provide these necessary compo- nents is to install the Eclipse Integrated Development Environ- Write these new images to Flash memory. If using Windows ment (IDE) for C. As well as fixing this immediate problem, the and the ST-LINK utility, the following code will work: Eclipse IDE can help in many other aspects of the development ST-LINK_CLI.exe -ME process, although it is outside the scope of this article to de- ST-LINK_CLI.exe -P “u-boot.bin” 0x08000000 scribe its features. ST-LINK_CLI.exe -P “xipuImage.bin” 0x08020000 ST-LINK_CLI.exe -P “romfs.bin” 0x08120000 Now, it is time to launch the Linux terminal utility: click ‘Ap- plications’, then ‘Accessories’ and ‘Terminal’ (see figure 2). Connect the serial console to the board (external RX =>

22 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com PC10, external TX => PC11, 115200 bits/s, 8 data bits, no parity, make all 1 stop bit mode), then press the Reset button, and the µClinux ./out/bin/hello project will be live. The boot-up output will be shown in the con- sole and the display will show the Linux penguin. To embed hello.c in Linux Buildroot scripts, modify a mk/rootf. mak file, using the Tab key where necessary. (Bold type shows Step 5: create a ‘Hello, world’ application where a new line begins): Now follow the code example and instructions below to add a . . . user application to a µClinux project. user_hello: [Tab] make -C $(user_dir) CROSS_COMPILE=$(CROSS_ Create an stm32f429-linux-builder-master/user/src/hello.c file: COMPILE) CFLAGS=$(ROOTFS_CFLAGS) target_ #include out=$(target_out_user) int main() { $(rootfs_target): $(rootfs_dir) $(target_out_busybox)/.config printf(“Hello, world\n”); user_hello return 0; [Tab] cp -af $(rootfs_dir)/* $(target_out_romfs) } [Tab] cp -f $(target_out_kernel)/fs/ext2/ext2.ko $(target_out_ Create an stm32f429-linux-builder-master/user/Makefile file, romfs)/lib/modules using the Tab key where necessary: [Tab] cp -f $(target_out_kernel)/fs/mbcache.ko $(target_out_ CC = $(CROSS_COMPILE)gcc romfs)/lib/modules LDFLAGS ?=$(CFLAGS) [Tab] cp -f $(target_out_user)/bin/* $(target_out_romfs)/usr/bin target_out ?= out . . . all: checkdirs [Tab] $(CC) $(LDFLAGS) src/hello/hello.c -o $(target_out)/bin/ And the last modification is needed in a mk/defs.mak file. Ap- hello $(LDLIBS) pend the following lines: [Tab] -rm -rf $(target_out)/bin/*.gdb . . . checkdirs: user_dir := $(root_dir)/user [Tab] mkdir -p $(target_out)/bin target_out_user := $(target_out)/user clean: [Tab] -rm -rf $(target_out) Once the image is built, downloaded and running in the target, the app may be found in the /usr/bin directory, along with other Test the ‘Hello, world’ application in the host without activating existing applications. Test it by typing ‘hello[Enter]’ into the termi- the cross-compile environment by using the activate.sh script. nal connected to the Discovery board. Type in the /user folder: Eliminating X-propagation in transition testing

By Gourav Kapoor and Harkaran Singh

he requirement for robustness towards failures in modern- In Automatic Test Pattern Generation (ATPG) testing, it day SoCs demands for the maximum test coverage. How- results in more number of test patterns required to achieve the ever, the increased gate count of SoCs requires more test desired coverage. What’s more, in specialized test methodolo- patterns.T Nowadays, the test cost of a chip exceeds its manu- gies like LBIST testing, the propagation of even a single ‘X’ can facturing cost. To increase an SoC’s on-field robustness, Logic corrupt the resultant signature. So, for LBIST testing, we have Built-In Self-Test (LBIST) is becoming necessary. Designers are to mask all these ‘X’ sources and replace these by a known finding innovative ways to reduce test cost and the number of value in test. In ATPG testing too, this methodology is applied test patterns so as to reduce the overall test cost. One of these to achieve lesser pattern count. The masking of these ‘X’ values is to minimize the propagation of ‘X’ in testing. is termed ‘X-bounding’. Figure 1 shows a source of ‘X’ whose output goes to a combinational cloud, thus, making many other The concept of ‘X’: In design terminology, especially in De- nodes ‘X’. The propagation of ‘X’ can be stopped by bypassing sign-For-Test (DFT), ‘X’ refers to the propagation of an unknown the non-scan flop with a known value; or simply, X-binding the value. DFT involves structurally testing each and every node in output as shown in figure 2. Here, we have shown X-binding by the design for different faults by propagating known values to a . We can also X-bind by inserting an AND gate or a node, and then observing the node to check if it was able to an OR gate. receive that value. A typical design has a number of sources generating ‘X’ values, eg, one of these being, but not limited to, Multi-cycle and false paths, an overhead to DFT: In almost a latch because it is out of scan and does not have a reset pin. every design, we have functional multi-cycle and false paths So, its output can be anything; or simply ‘X’. A single source of wherever affordable so as to save power and area by sacrificing ‘X’ can make many other nodes ‘X’, hence, hindering from get- throughput where the performance requirement is not criti- ting the known value being propagated. cal. These are taken care of functionally by architecture; but in DFT testing, these paths have to be considered single cycle. Gourav Kapoor and Harkaran Singh are design engineers at Since, single cycle timing for these paths is not met, these are India – www.freescale.com sources of ‘X’ because we are not sure if the value launched will www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 23 DEBUGGING &PROGRAMMING TOOLS

propagate to end point in a single cycle as shown in the figure 5. In this case, or not. Sometimes, it may. Sometimes, all the paths through the through-point it may not. In other words, multi-cycle will get blocked depriving of coverage paths are a source of ‘X’. Hence, we of all the paths can say that having multi-cycle and (whether multi-cycle or not) false paths in the design is not DFT through the through-point which friendly. In testing transition faults for may be significant. This kind ATPG testing, the number of X’s gener- of x-masking can be deployed ated may be so high that it may reduce in LBIST transition testing as the efficiency of patterns generated transition coverage requirement by a significant amount. For transition is very less. Using this approach faults testing using LBIST methodolgy, Fig. 1: X propagation from non-scan flop/latch. in transition ATPG testing may even a single MCP can be fatal as prove to be fatal as a lot of paths stated above. So, in LBIST, it is manda- are masked proving very costly for tory to break all the multi-cycle/false overall test budget. paths as shown in figure 3 below. For ATPG testing too, we can opt to break 2) Through-point masking/End- these paths to reduce the number of point masking approach: In X’s generated. this approach, we can consider transition testing as a two- Dynamic x-bounding: As stated pass process. In first pass, the above, to achieve minimum possible through-point is masked and test pattern count, and hence, test the paths to end-point not cost, all ‘X’ sources, including multi-cy- passing through through-point cle and false paths have to be masked. are captured at the end-point The masking of multi-cycle and false as shown in figure 6. In second paths for X-propagation in test modes pass, the through-point is made is termed as dynamic X-bounding. This Fig. 2: The probable X generating latch output is transparent. In this pass, to dis- can be achieved by either overriding able the multi-cycle paths, the x-bound. the ‘X’ source with a control point or scan architecture is made such with the help of a bypass multiplexer. that when through-point is made An alternative path is provided in test transparent, end-point goes in mode that provides the coverage for shift mode propagating the data the required path. Theoretically, there at its scan-in pin to its output as can be different approaches for dy- shown in figure 7. Thus, in pass 1 namic x-bounding depending upon the as shown in figure 6, we have to requirement for coverage and the effort time the end-point’s scan-in path that can be afforded as discussed at-speed which can be difficult below: to meet if functional frequency is very high. Also, there is an intro- Different approaches to dynamic duction of one extra logic level in x-bounding: Let us say, we have a scan-enable path, which can also multi-cycle path of general type “from hurt if functional frequency is very start-point through through-point Fig. 3: X-bound on exceptions/multi-cycled path high. Following this approach, to ” as shown in figure 4. we lose the coverage of all the end-point which are single cycle in DFT modes. Please note that all the paths through paths through through-point and through-point may or may not be going to end-point regardless of multi-cycle. Similarly, all the paths whether they are multi-cycle or starting from start-point may not be not. multi-cycle and all the paths ending at end-point may not be multi-cycle. 3) Through-point masking and Figure 4 shows all the possible combi- end-point clock masking: In a nations that can be possible in such a variation of case 2, the clock of scenario. A number of approaches can the end-point can be masked be tried, each with its own pros and instead of keeping it in shift mode cons in terms of area, timing, power even during capture phase as and test coverage as mentioned below: shown in figure 8. This will save from timing scan paths at-speed, 1) Masking the data-path: In the but, the output of the end-point simplest of the scenarios, all the will remain constant during paths through through-point can Fig. 4: Typical multicycle path scenario in soCs capture depriving of its coverage. Thus, there are supposed to be be masked by putting a ‘0-control (from a startpoint ➔ through through-point ➔ to point’ or ‘1-control point’ blocking handful extra patterns required endpoint as highlighted. all the paths that are multi-cycle than case 2. This approach will

24 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com add extra logic in the clock path of end-point. To save from this, we can try to group the end-points in the fanout of Ultra-Miniature | High Reliability a single Quartz Crystals, Oscillators  cell, and and Sensors control the test-enable pin of the clock gating to mask the clock when- ever required as per the algorithm. Thus, we are

CX4_GLASS_A Fig. 5: Data-path masked with 0/1 control. saved from timing the scan-in paths at-speed. However, the otherwise slow frequency test-enable CX9A of clock gating may be

needed to be timed at full CX11A frequency.

CX16A 4) Start-point end-point clock gating: This ap- proach can be applied at CXOL_A RTL stage itself if multi- cycle paths are known in

CX18A Fig. 6: Pass 1 ➔ through-point acts transparent; advance. This can also be endpoint is made to shift data; considered as a 2-pass Medical process. In first pass, the startpoint ➔ through-point ➔ endpoint path not clock of all the start- formed. points can be gated. In second pass, the clock Industrial of all the end-points can be gated; thus, all the ‘X’ generated don’t propagate further. This scheme is illustrated in figure 8. Similar to case 3, the controls can control the test-enable pin of the respective clock gating Defense cells. In this approach, and Aerospace Fig. 7: Pass 2 ➔ through-point is blocked and when the start-point’s endpoint acts in functional mode. No path through clock is gated, its output is static and vice-versa. In through-point is visible. this case, we get the cov- erage of all possible valid UNSURPASSED QUALITY paths, but number of pat- terns may be a bit higher • Highest mechanical shock survivability than case 2. However, this in the industry approach guaranteed no X-propagation. • Military temperature range and beyond • Exceptional stability and precision As stated above, functional • Ultra-low power consumption multi-cycle paths and false • Excellent long-term aging paths are sources of ‘X’. How- ever, all functional multi-cycle Fig. 8: Pass 1 clock gated for startpoints, Pass 2 paths are not by architecture. AS9100C As an illustration, suppose we clock gated for endpoints. ISO 9001:2008 have more than one functional mode and an STA engineer decides to merge those modes. In that case, he may STATEK CORPORATION mark some of the paths as multi-cycle or false. However, these paths will be handled properly in transition testing too. Hence, these paths will not be source of X. Similarly, 512 N. Main St., Orange, CA 92868 paths to reset pins can be treated multi-cycle. But resets are treated specially in DFT; Tel. 714-639-7810 | Fax 714-997-1256 hence, need not be masked in DFT modes. www.STATEK.com

www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 25 DEBUGGING &PROGRAMMING TOOLS

Top five problems with PLCs

By Jonathan Wilkins

he Programmable Logic Controller, or using the less of the PLC. This doesn’t mean questioning whether the PLC is a tongue-tieable acronym, PLC, has become a stalwart of good, honest citizen with morals and a clean tax record, rather the automation industry and can be found in countless the integrity of the ground has to be electronically checked. automatedT manufacturing processes across the world. PLCs find a home wherever there is a need to control devic- The power and ground wiring also needs to be examined es, such as pneumatic machines, robots, traffic lights, hydraulic further, to ascertain whether its loose, corroded or has damaged machines and packaging lines. Such heavy duty, essential connections. The power supply should be checked; using a machine-kit ought to be problem and troubleshooting free, no? digital meter and both AC/DC voltages should be zero. Well despite being a powerhouse of control systems, and widely becoming the device du jour for a wide variety of control 3) Interference tasks, the truth is the PLC is an iconic and integral component Another problem for the PLC can be the effects of electromag- in industry with a whole host of responsibilities, functionalities netic interference (EMI) or radio frequency interference (RFI). and capabilities. By performing sequences of instructions such These can be related to lightning strikes, welding in the area or as timing, counting, storing memory, relaying logic and arith- handheld radio transmitters. The handheld radios used by main- metic computation, the PLC’s duties are crucial and imperative tenance staff, emit powerful radio frequency radiation, disrupt- for the complex processes needed. So what possibly can go ing and interfering with any unprotected electronic equipment. wrong? Improvements in shielding, grounding and power conditioning can combat any EMI or RFI problems. The black box There is a propensity amongst 4) Corrupted memory those unfamiliar with the PLC Frequency interference, power to fear the mysterious ‘black and grounding are all problems box’ when troubleshoot- that can disrupt and corrupt ing. This irrationality can be the PLC’s memory, so it is soothed though as PLCs are crucial to verify the program in fact easier to troubleshoot is still correct and comparable than old-school hard-wired with a backup copy on tape, control systems, with more disk or in the cloud. As with all open and easy diagnosis due data backups, ensure they are to the black box. up to date and kept away from Putting aside the traditional our old enemies, EMI and RFI, and universal signs of some- along with high temperatures thing going wrong, such as and humidity. programme bugs and wiring errors, here we will explore 5) Confusion the top five things that can go When PLC troubleshooting, a wrong with our beloved industry giant, the PLC. major aim is to find out why the internal status of the PLC (what the PLC thinks is happening) is in conflict and not in agreement 1) I/O modules with the external situation (what is actually happening). Everyone generally assumes that when something goes wrong Our job is to determine the status of the relationship between with a PLC, it is due to internal processor problems. Wrong! physical I/O modules and I/O instructions in the PLC program. A big percentage of problems are the result of I/O modules Different manufacturers have different solutions and schemes, or field equipment. No need to panic either as it is not difficult usually a terminal, handheld unit or PC (not PLC). Either can be to diagnose whether the problem is emanating from the I/O used to check the internal status of the input/output in question. system or in the processor. Both types of problems have unique So, like most things in life, the PLC can be both advanta- signatures allowing an even easier examination, and therefore geous and disadvantageous. Yes, there is and always will be conclusion. a lot of work required in connecting wires, a difficulty with changes and replacements and potentially long hold up times 2) In or out? when something does go wrong. And, when something does go If the problem is traced back to a specific I/O module, this wrong, the best advice is to choose a reliable partner, such as means that it is usually an external one, like the aforementioned European Automation, that can source and deliver the correct wiring errors. If it is an internal problem, this could actually part quickly and efficiently. result in erratic behaviour, large groups of failures, or even total But rather like a stubborn grandfather there is something failure of the PLC system! nostalgically pleasing and reassuring about the familiarity of the However, one of the first checks to do now is the ‘integrity’ PLC. In today’s high technology world, sometimes it’s advisable to choose equipment or brands that are easily managed. Cost Jonathan Wilkins is Marketing Manager of European effective, flexible, reliable and delivered with troubleshooting Automation - www.euautomation.com aids, the PLC has come a long way.

26 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com Memory

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2 Memory Products Serial EEPROM

Microchip offers the broadest range of Serial EEPROM devices. Our Serial EEPROMs are low-power, non-volatile memory devices with robust operating ranges, small- size and byte-alterability, making them ideal for data and program storage. Serial EEPROMs can be written more than 1 million times. Innovative low-power designs and extensive testing have ensured industry-leading endurance and best-in-class quality. Key Features ■ Broad range of densities: 128 bits to 1 Mbit ■ Serial architecture: I2C™, SPI, UNI/O® bus, Microwire ■ Tiny 3-, 5-, 6-- and 8-pin packages; die and wafer Industry-Leading Testing ■ Innovative, low-power designs Microchip’s best-in-class field performance is the ■ Industry-leading endurance combined result of world-class manufacturing, wafer-level burn-in and wafer probe quality screens. Microchip’s Triple- ■ Wide temperature and voltage range Test Flow is currently the most robust testing procedure • Operating voltage: 1.7 to 5.5 V for Serial EEPROM devices in the industry. It tests each • Temperature range: up to 150°C cell of each die three times and performs extensive ■ Fast read and write times endurance and data retention tests to ensure quality and ■ Flexible reliability. Infant mortality of Microchip Serial EEPROMs • Byte-write capability is among the lowest in the industry due to this extensive • Multiple package options testing, excellent fabrication and highly-reliable memory • Custom programming options cell design. • Application-specific serial memory Triple-Test Flow ISO/TS16949-compliant ■ Microchip tests every cell in wafer form twice, then Robust Design performs a final test after assembly. ■ ESD protection Any die with charge loss in any cell between the two • > 4000V Human Body Model (HBM) probes is rejected to prevent infant mortality. • > 400V Machine Model (MM)

• > 1000V charged device model 3. ■ Latch-up protection > 200 mA on all pins 1. Retentionntion 22.. Assembly Wafer Probe Bakeke WWaafferer PrProbeobe and Final dd ■ ESD-induced latch-up > 100 V (MM) on V ; > 400 V Test on all I/O; > 1 M cycles endurance and > 200 years Full-functional tests on 100% 250°C up to 24 hourshours 2nd2nd 100% bit test (25°C)(25°C) data retention of die and bits; 85 or 125°C (equivalent too 100 yearsyears full-functional screenscreen ■ Up to 150°C operation (read and write) 5,000 E/W cycles on all bits at 100°C)0°C) ■ Power-On Reset (POR) and Brown-Out Reset (BOR) • Effective protection against noisy automotive Main Goal: Zero Defects environments ■ Full verification of datasheet parameters for functional • Eliminates false writes compliance at die and package level ■ Schmitt Trigger input filters for noise reductions ■ Removal of manufacturing defects to ensure highest ■ Complete traceability including die location on wafer quality and reliability ■ Screening out of functional devices that may fail in the future

Memory Products 3 Serial EEPROM

Serial EEPROM Bus Comparison Parameter I2C™ Microwire UNI/O® Bus SPI Density Range 128 bits–1 Mbit 1 Kbit–16 Kbits 1 Kbit–16 Kbits 1 Kbit–1 Mbit Speed Up to 1 MHz Up to 3 MHz Up to 100 kHz Up to 20 MHz I/O Pins 2: Clock, Data 4: Clock, CS, DI, DO 1: Clock/Data 4: SCK, CS, DI, DO PDIP, SOIC, SOIJ, PDIP, SOIC, TSSOP, PDIP, SOIC, TSSOP, PDIP, SOIC, SOIJ, TSSOP, TSSO P, MSO P, 2 × 3 Package Options MSO P, 2 × 3 TDFN, MSO P, 2 × 3 TDFN, MSO P, 2 × 3 TDFN, TDFN, 6 × 5 DFN, SOT-23 SOT-23, TO92, WLCSP 6 × 5 DFN, SOT-23 SOT-23, SC70, WLCSP Security Options Hardware Hardware Software Hardware/Software Pricing Fewest features/lowest cost –––––––––––––––––––––––––––––––––––––––— Most features/highest cost

Microchip’s best-in-class field performance is the Standard and Specialty/Application-Specific combined result of Wafer Level Burn-In and Wafer EEPROMs Probe-Quality Screens. Serial EEPROMs Microchip Serial EEPROM Field Return Data

1.0 Standard Specialty/Application EEPROMs Specific EEPROMs

0.8 I2C™ UNI/O® Bus MAC Address Chips 128b–1 Mb, 1.7–5.5V 1–16 Kb, 1.8–5.5V EUI-48™ & EUI-64™ Node Address 0.6 Partial Array Write Protect ½, ¼ and Whole Array WP Options 0.4 Microwire SPI 1–16 Kb, 1.8–5.5V 1 Kb–1 Mb, 1.8–5.5V DIMM-DDR2/3/4 Reversible Software Write Protect; I2C 0.2 Extended Temperature −55 to 150°C 0 2005 2006 2007 2008 2009 2010 2011 2012 2013 VESA Monitors DDC1™/DDC2™ Interface

■ Industry’s lowest field return numbers, best suited for Very-Low Voltage automotive applications 1.5V EEPROM

Microchip Serial EEPROM Endurance Unique ID

150 Total Endurance™ Software Model 120 Total Endurance Software Model provides a comprehensive model that helps estimate the endurance and reliability of 90 Microchip Serial EEPROM devices. By providing operating conditions based on your application, all design trade-

60 offs affecting reliability can be accurately estimated both graphically and numerically in PPM, FIT and MTBF modes, saving time and ensuring a truly robust design. The Total 30 Endurance Software Model is available for free online at www.microchip.com/EEPROM. 0 500,000 1,000,000 1,500,000 2,000,000

E/W Cycles at 85C

Supplier A Supplier B Supplier C Supplier D Microchip

■ All devices from supplier A and B failed before 2 million E/W cycles at 85°C ■ Testing shows zero Microchip EEPROM fails even at 2 million E/W cycles at 85°C

4 Memory Products Specialty EEPROM

EUI-48™/EUI-64™ MAC Address Chips Need fast, easy and inexpensive access to MAC addresses? Microchip’s pre-programmed MAC address chips have a unique ID and require no serialization. EUI-48™ programmed Serial EEPROMs provide low cost and easy access to IEEE MAC addresses. These plug- and-play devices allow you to quickly add a MAC address to your networking application eliminating the need for programming and serialization on the MCU—helping you save cost and get to market faster. For more information visit www.microchip.com/MAC.

I2C™ 24AA02E48/E64 100 kHz SPI 25AA02E48/E64 10 MHz UNI/O® Bus 11AA02E48/E64 100 kHz Flexibility and Easy to Manage Quickly add EUI-48 to your networking application and get Microwire 93AA46AE48 2 MHz to market faster. Plug-and-Play Devices ■ Buy code only when needed No added programming and serialization costs, reduce EUI-48 address embedded in a 2 Kbit Serial EEPROM ■ system costs Quick and easy access to IEEE MAC address, read code ■ Code with no volume restrictions directly off Serial EEPROM ■ ■ Unique ID ■ Available in SPI, I2C and UNI/O bus ■ At least 1.5 Kbit of Serial EEPROM memory ■ Available in SOIC and SOT-23 packages ■ Write-protected codes ■ EUI-48 and EUI-64™ compatible • EUI-48: networking, Ethernet, Wi-Fi® (IEEE 802.11), Bluetooth® • EUI-64: ZigBee® (IEEE 802.15.4), MiWi™ Protocol, FireWire, IPv6 ■ Can be custom programmed in any memory density Contact Microchip sales for more information.

Partial Array Write-Protect I2C EEPROMs Microchip’s family of partial array Write-Protect (WP) EEPROMs offers hardware write-protect capability for only a part of the memory array. These I2C EEPROM devices are available from 1 Kbit–64 Kbit. ½ Array WP ¼ Array WP

User data, real-time updates, data that changes

Calibration parameters, unique ID, data that never changes

1–16 Kbit 32 and 64 Kbit

I2C and SPI Serial EEPROMs with Options Ranging From −55°C to +150°C ■ Automotive turbo chargers and exhaust gas recirculation ■ Automotive fan motors, air valves, flaps and spark plugs ■ Aerospace ■ Mining (certifications for use in explosive atmospheres available)

Memory Products 5 Serial EEPROM Products

I2C™ Memory Products

Max. Operating Temperature Density Endurance Data Write-Protect Device Clock Voltage (I, E, H) Packages (Organization) (E/W Cycles) Retention (Hardware) Frequency (AA, LC, C) (°C) 24XX00 128 bits (×8) 400 kHz 1.7–5.5 V −40 to 125 1 M 200 years – PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN 24XX01/014 1 Kbit (×8) 400 kHz 1.7–5.5 V −40 to 125 1 M 200 years W, ½ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP, SC70 24XX02/024 2 Kbits (×8) 400 kHz 1.7–5.5 V −40 to 125 1 M 200 years W, ½ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP, SC70 24XX04 4 Kbits (×8) 400 kHz 1.7–5.5 V −40 to 125 1 M 200 years W, ½ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP, WLCSP 24XX08 8 Kbits (×8) 400 kHz 1.7–5.5 V −40 to 125 1 M 200 years W, ½ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP 24XX16 16 Kbits (×8) 400 kHz 1.7–5.5 V −40 to 125 1 M 200 years W, ½ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP, WLCSP 24XX32 32 Kbits (×8) 400 kHz 1.7–5.5 V −40 to 125 1 M 200 years W, ¼ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP, WLCSP 24XX64/65 64 Kbits (×8) 1 MHz 1.7–5.5 V −40 to 125 1 M/10 M 200 years W, ¼ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP, WLCSP 24XX128 128 Kbits (×8) 1 MHz 1.7–5.5 V −40 to 125 1 M 200 years ü PDIP, SOIC, TSSOP, 2 × 3 TDFN, 6 × 5 DFN, WLCSP 24XX256 256 Kbits (×8) 1 MHz 1.7–5.5 V −40 to 125 1 M 200 years ü PDIP, SOIC, TSSOP, 6 × 5 DFN, MSOP, WLCSP 24XX512 512 Kbits (×8) 1 MHz 1.7–5.5 V −40 to 125 1 M 200 years ü PDIP, SOIC, TSSOP, 6 × 5 DFN, WLCSP 24XX1024 1 Mbit (×8) 1 MHz 1.7–5.5 V −40 to 125 1 M 200 years ü PDIP, SOIC, SOIJ, 6 × 5 DFN

UNI/O® Bus EEPROM Products

Max. Operating Temperature Density Endurance Data Write-Protect Device Clock Voltage (I, E) Packages (Organization) (E/W Cycles) Retention (Software) Frequency (AA, LC, C) (°C) 11XX010 1 Kbit (×8) 100 kHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP, TO92, WLCSP 11XX020 2 Kbits (×8) 100 kHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP, TO92, WLCSP 11XX040 4 Kbits (×8) 100 kHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP, TO92, WLCSP 11XX080 8 Kbits (×8) 100 kHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP, TO92, WLCSP 11XX160 16 Kbits (×8) 100 kHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP, TO92, WLCSP

Microwire EEPROM Products

Max. Operating Temperature Density Endurance Data Write-Protect Read Device Clock Voltage (I, E,) Packages (×8 or ×16) (E/W Cycles) Retention (Hardware) Current Frequency (AA, LC, C) (°C) 93XX46A/B/C 1 Kbit 3 MHz 1.8–5.5 V −40 to 125 1 M 200 years – 1 mA PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP 93XX56A/B/C 2 Kbits 3 MHz 1.8–5.5 V −40 to 125 1 M 200 years – 1 mA PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP 93XX66A/B/C 4 Kbits 3 MHz 1.8–5.5 V −40 to 125 1 M 200 years – 1 mA PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP 93XX76A/B/C 8 Kbits 3 MHz 1.8–5.5 V −40 to 125 1 M 200 years ü 1 mA PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP 93XX86A/B/C 16 Kbits 3 MHz 1.8–5.5 V −40 to 125 1 M 200 years ü 1 mA PDIP, SOIC, TSSOP, SOT-23, 2 × 3 TDFN, MSOP A: ×8 Organization, B: ×16 Organization, C: Selectable ×8 or ×16 Organization

SPI EEPROM Products

Max. Operating Temperature Density Endurance Data Write-Protect Device Clock Voltage (I, E, H) Packages (Organization) (E/W Cycles) Retention (Software) Frequency (AA, LC, C) (°C) 25XX010A 1 Kbit (×8) 10 MHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, 2 × 3 TDFN, MSOP, SOT-23 25XX020A 2 Kbits (×8) 10 MHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, 2 × 3 TDFN, MSOP, SOT-23 25XX040A 4 Kbits (×8) 10 MHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, 2 × 3 TDFN, MSOP, SOT-23 25XX080C/D 8 Kbits (×8) 10 MHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, 2 × 3 TDFN, MSOP 25XX160C/D 16 Kbits (×8) 10 MHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, 2 × 3 TDFN, MSOP 25XX320A 32 Kbits (×8) 10 MHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, 2 × 3 TDFN, MSOP 25XX640A 64 Kbits (×8) 10 MHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, 2 × 3 TDFN, MSOP 25XX128 128 Kbits (×8) 10 MHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, 6 × 5 DFN 25XX256 256 Kbits (×8) 10 MHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, TSSOP, 6 × 5 DFN 25XX512 512 Kbits (×8) 20 MHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIC, 6 × 5 DFN 25XX1024 1 Mbit (×8) 20 MHz 1.8–5.5 V −40 to 125 1 M 200 years W, ½, ¼ PDIP, SOIJ, 6 × 5 DFN 1. Voltage Range: AA = 1.7–5.5 V, LC = 2.5–5.5 V, C = 4.5–5.5 V 4. Write Protect: W = Whole Array, ½ = Half Array, ¼ = Quarter Array 2. I = −40°C to 85°C, E = −40°C to 125°C, H = −40°C to 150°C 5. ESD Protection > 4 kV (HBM), > 400 V (MM) on all pins 3. All devices are RoHS-compliant 6. H temperature is SOIC only

6 Memory Products Serial EEPROM Packages

More Memory in Less Space! Serial EEPROM devices from Microchip are available in a wide variety of tiny, innovative packages to help minimize your design, save board space and reduce cost. ■ WLCSP: die-sized packages, smallest form factor EEPROM package in the world ■ SC-70: among the smallest 5-lead EEPROM package ■ 5-pin SOT-23 available up to 64 Kbit, 8-pin TDFN up to 128 Kbit, 8-pin SOIC up to 1 Mbit (I2C)

SOIC SOT-23 TSSOP TDFN PDIP MSOP SOIJ DFN SC70 TO92 Wafer Max. Density (SN) (OT/TT) (TS) (MNY/MC) (P) (MS) (SM) (MF) (LT) (TO) (W/S/WF) Speed 5 × 6 3 × 3 3 × 6.5 2 × 3 8 × 9.5 3 × 5 5 × 8 5 × 6 2 × 2 Die I2C™ Bus 1.75.5 V 128bit–2 K 400 kHz ü 5 ü ü ü ü – – 5 – ü 4–32 K 400 kHz ü 5 ü ü ü ü – – – – ü 64 K 1 MHz ü 5 ü ü ü ü ü – – – ü 128 K 1 MHz ü – ü ü ü ü ü ü – – ü 256 K 1 MHz ü – ü – ü ü ü ü – – ü 512 K 1 MHz ü – ü – ü – ü ü – – ü 1 Mbit 1 MHz ü – – – ü – ü – – – – Microwire Bus 1.8–5.5 V 1–16 K 3 MHz ü 6 ü ü ü ü – – – – ü SPI Bus 1.8–5.5 V 1–4 K 10 MHz ü 6 ü ü ü ü – – – – ü 8–64 K 10 MHz ü – ü ü ü ü – – – – ü 128 K, 256 K 10 MHz ü – ü – ü – ü ü – – ü 512 K 20 MHz ü – 14 – ü – ü ü – – ü 1 Mbit 20 MHz – – – – ü – ü ü – – ü UNI/I® Single-Wire Bus 1.8–5.5 V 1–16 K 100 kHz ü 3 – ü ü ü – – – ü ü

Package Sizes

5-pin5-pin SC-70SC-7 33-pin-pin SOSOTT 55-- & 6-6-pinpin SOT 8-8-pinpin TDFTDFNN 88-pin-pin MSOMSOPP 88-pin-pin TSSOP 8-8-pinpin SOISOICC 8-8-pinpin DFDFNN 88-pin-pin SOISOICC 8-pin PDIP (LT) (TT(TT)) ((OT)OT) (MC(MC/MNY)/MNY) (MS) ((ST)ST) ((SN)SN) ((MF)MF) ((SM)SM) (P) 2 × 2 mm 3 × 2.5 mm 3 × 3 mm 2 × 3 mm 3 × 5 mm 3 × 6.5 mm 5 × 6 mmm 5 × 6 mmmm 5 × 8 mm 8 × 9.5 mm

WLCSP: World’s Smallest EEPROM Package The Wafer-Level Chip Scale Package (WLCSP) from Microchip is a bumped die with a redistribution layer to route the bond pads to the bumps. ■ True “die-sized” packages ■ Industry’s smallest package form factor ■ Lowest profi le package ■ Available in I2C, UNI/O bus Actual Size Elarged to ■ Compatible with standard surface-mount assembly Show Detail lines WLCSP 4 Kbit I2C ■ Fit a large density into a small space < 1 × 1 mm Typical Applications ■ Mobile phones ■ Networking ■ Security camera ■ RF ■ Sensors ■ Medical ■ Servers ■ Portable electronics

Memory Products 7 Serial SRAM

Microchip’s Serial SRAM family provides a way to easily and inexpensively add external RAM to almost any application. These serial devices use less power and fewer I/O connections than traditional parallel SRAM, and they allow you to use a smaller microcontroller with additional on-board RAM. Microchip’s SPI-compatible Serial SRAM devices are available in 64 Kbit, 256 Kbit, 512 Kbit and 1 Mbit options and up to 20 MHz. The 512 Kbit and 1 Mbit parts support data backup via an external battery/coin cell connected VBAT pin. These 8-pin devices have unlimited endurance and zero write times. Typical Applications 1.5–1.95 V 2.7–3.6 V ■ Metering 1 Mb 23A1024/20 MHz 23LC1024/20 MHz ■ Point-Of-Sale (POS) terminals 512 Kb 23A512/20 MHz 23LC512/20 MHz ■ Printers 256 Kb 23A256/16 MHz 23K256/20 MHz ■ Internet radio 64 Kb 23A640/16 MHz 23K640/20 MHz ■ Ethernet ■ Wi-Fi Key Features ■ Replace parallel RAM ■ SPI Bus, 20 MHz ■ Any application needing low-cost RAM ■ Volatile memory ■ Operating voltage: 1.5–1.95 V, 2.7–3.6 V Flexible RAM Expansion ■ Infi nite endurance Add features to your current microcontroller and get to ■ Zero write speeds market faster. ■ Low power consumption ■ Add functionality to your current design Key Benefi ts ■ No need to buy a larger microcontroller just for the RAM Familiar 4-pin SPI interface ■ Lower system costs – innovative products, tiny ■ packages, low-power consumption, fewer I/O pins, ■ Reduce cost in your current design small form factor ■ Scratchpad, buffering, high-endurance applications ■ Save I/O pins on the MCU – more compact designs, add additional features Secure data with write-protect options ■ RAM ■ Robust designs with broad operating conditions MCU The Serial SRAM Advantage Feature Traditional Parallel SRAM Microchip’s Serial SRAM I/O Connection to MCU 16–20 Parallel4 Standby Current RAM 3 mA RAM 1 μA Active Current 50 mA 1–10. . .mA Parallel MCU MCU lowest Operating Voltage 3.0 V 1.7 V SRAM 2 2 Footprint 100 mm 2016–20 mm Smallest Packages 28-pin TSSOP, 28-pin SOIC 8-pin TSSOP,I/O lines 8-pin SOIC

Parallel RAM RAM RAM SPI Parallel Serial MCU MCU . . . MCU SRAM SRAM 4 I/O lines 16–20 I/O lines Stand-alone Serial SRAM offering greater design flexibility and the opportunity for RAM expansion Serial SRAM Products Parallel RAM RAM SPI Max. Clock Operating Voltage Temperature (I, E) Read Current Max. Standby Battery Device Density (Organization) Parallel Serial Packages MCU Frequency. . . (A, K)MCU (°C) (mA) Current Back-Up SRAM SRAM 23X640 8 KB (64 Kbits) 20 MHz 1.8 V, 3 V −404 I/O to lines 125 3 mA 4 µA PDIP, SOIC, TSSOP No 23X256 32 KB (256 Kbits) 16–2020 MHz 1.8 V, 3 V −40 to 125 3 mA 4 µA PDIP, SOIC, TSSOP No 23X512 64 KB (512 Kbits) I/O20 lines MHz 1.8 V,Stand-alone 3 V, 5 V Serial SRAM−40 oftofering 125 greater design3 mA 4 µA PDIP, SOIC, TSSOP Yes flexibility and the opportunity for RAM expansion 23X1024 125 KB (1 Mbit) 20 MHz 1.8 V, 3 V, 5 V −40 to 125 3 mA 4 µA PDIP, SOIC, TSSOP Yes 1. Voltage Range: A = 1.5–1.95 V, K = 2.7–3.6 V 2. All devices are RoHS-compliant RAM SPI Serial MCU SRAM 8 Memory Products 4 I/O lines

Stand-alone Serial SRAM offering greater design flexibility and the opportunity for RAM expansion NOR Flash

What Is SuperFlash Technology? Memory Cell Structure Comparison Microchip’s SuperFlash technology is an innovative, highly reliable and versatile type of NOR Flash memory. SuperFlash technology memory is much more flexible and reliable than competing non-volatile memories. This Poly 1 Poly 2 technology utilizes a split-gate cell architecture which uses Source Drain a robust thick-oxide process that requires fewer mask Thicker tunnel Split Gate steps resulting in a lower-cost nonvolatile memory solution oxide reduces SuperFlash® Technology leakage with extremely fast erase time, excellent data retention improving data and higher reliability. retention and reliability. SuperFlash Technology Advantages ■ Fast, fixed program and erase times • ~ 40 ms for SuperFlash technology vs. more than a Poly 2 minute for conventional 64 Mb Poly 1 • Results in improved manufacturing efficiency and lower costs Source Stacked Gate Drain (Conventional Flash) ■ No pre-programming or verification required prior to erase • Results in significantly lower power consumption ■ Superior reliability 100× Times Faster Erase Times Than Competitors • 100 K cycles and 100 years data retention and Chip Erase Time Remains the Same Across ■ Inherent small-sector size All Densities • 4 KB erase sector vs. 64 KB 100 • Results in faster re-write operations and contributes

to lowering overall power consumption 100 Flash Performance Comparison 10 Microchip 26 Series SQI™ (80 MHz) 1

Parallel ×16 (70 ns) 0.1

Parallel ×16 0.01 (70 ns) 0.5 124816 32 64 Density (Mb)

Serial SPI (66 MHz) Microchip Competitor 1 Competitor 2 Competitor 3 Competitor 4 0 100 200 300 400 Sustained Data Transfer Rate (Mbit/sec)

Serial and Parallel Flash 8 Mb and 16 Mb Firmware Flash Serial Flash (25 and 26 Series) are designed for a wide Microchip is the sole remaining supplier of 8 Mb and variety of applications in consumer electronics, computing, 16 Mb Firmware Flash. These SuperFlash technology networking and industrial spaces. Small form factor, memory devices are compliant with the Intel Low Pin standard pinouts and command sets make Serial Flash Count (LPC) Interface Specification and are intended to easy to design in and cost competitive. store system BIOS in applications such as PCs, point-of- Our Parallel Flash (39 and 38 Series) are ideal for sale systems, set-top boxes, network boards and other GPS/navigation and other mobile devices that require embedded CPU applications. execute-in-place (XIP) performance and for demanding ■ FWH devices (49LF008A and 49LF016C) incorporate industrial and automotive applications. Intel’s proprietary FWH interface protocol used in the Intel 8XX Series Hub Architecture chipsets. ■ LPC Flash devices (49LF080A and 49LF160C) comply with the standard Intel Low Pin Count Interface Specification 1.1.

Memory Products 9 Serial Flash

Serial Flash Serial Flash Key Features ■ Serial peripheral interface: Mode 0 and Mode 3 ■ Small footprint • 8-pin SOIC, low-profi le 8-contact WSON, 8-bump XFBGA Z-Scale ■ Operating voltage • 1.65–1.95V, 2.3–3.6V ■ Clock frequency up to 104 MHz ■ Flexible erase capability • 4 Kbyte uniform sector erase • 32/64 Kbyte block erase Serial Flash Applications • Chip erase ■ Home networking ■ Notebook PCs ■ Endurance: 100,000 cycles (typical) ■ HDTVs ■ ■ Data retention: 100 years (min) ■ Bluetooth ■ Printers ■ Fast sector erase or block erase time: 18 ms (typical) ■ Wearable devices ■ Wireless LAN ■ Byte program time: 7 µs (typical) ■ DSL and cable modems ■ Set-top boxes ■ Active read current: 10 mA (typical) ■ Tablets ■ LCD monitors ■ Standby current: 5 µA (typical) throughput ■ Hard disk drives ■ Digital radios ■ Proven technology ■ Desktop PCs • CMOS SuperFlash technology boosts data retention and endurance, and reduces erase time and power consumption, making Microchip Serial Flash ideal for portable designs.

Serial SPI Flash Serial Quad I/O™ (SQI™) Flash 25 Series 26 Series Serial SPI Flash is a small, low-power Flash memory that SQI Flash memory uses 4-bit multiplexed I/O serial features a Serial Peripheral Interface (SPI) and pin-for-pin protocol, boosts performance while maintaining the compatibility with industry-standard SPI EEPROM devices. compact form factor of standard SPI Flash. SQI devices Its small footprint reduces ASIC controller pin count and can be used in Quad, Dual or SPI mode so it is backward packaging costs, saves board space and keeps system compatible with SPI devices. costs down. Offering lower power consumption and fewer wires than Parallel Flash, Serial SPI Flash is the ideal SQI Flash-Specifi c Features cost-efficient data transfer solution. ■ 4-bit multiplexed I/O serial protocol ■ > 300 Mbps sustained read Serial SPI Flash-Specifi c Features ■ Density: 4 Mb to 64 Mb ■ Densities up to 16 Mb ■ Software parameter and individual block locking ■ Single footprint package up to 32 Mb ■ Security ID ■ Full SPI protocol compatibility ■ Page mode programming ■ Serial Flash Discoverable Parameters (SFDP)

10 Memory Products Parallel Flash

Parallel Flash Multi-Purpose Flash Devices (MPF™ Devices) Multi-Purpose Flash Plus Devices (MPF+ Devices) 39 Series Multi-Purpose Flash and Multi-Purpose Flash Plus make up a family of Parallel Flash memory products that deliver high performance, low-power consumption, superior reliability and small sector size. Based on Microchip’s SuperFlash technology, MPF and MPF+ provide faster program, erase and read times than conventional Flash, thereby saving power consumption and increasing manufacturing throughput. Parallel Flash Key Features In addition to offering 3 V and 5 V memory products, ■ Densities from 512 Kb through 64 Mb MPF devices and MPF+ devices provide 1.8 V that deliver ■ Hardware reset/boot block/erase suspend significant power savings compared to industry standard ■ Security ID and page read/write on 64 Mb Flash. Ideal for space-constrained applications, this family ■ Operating voltages: offers the industry’s smallest standard packages, the • 1.65–1.95 V, 2.7–3.6 V, 4.5–5.5 V XFLGA and WFBGA, both as small as 4 × 6 mm. ■ Low power consumption Advanced Multi-Purpose Flash Plus Devices • Active current: 5 mA (typical) (Advanced MPF+ Devices) • Standby current: 3 µA (typical) 38 Series ■ Fast read access times Advanced MPF+ memory devices incorporate advanced • 55 ns and 70 ns (39 series), 25 ns (38 series) security and protection features, page read access and ■ Fast programming* better write programming into the standard MPF+ family. • 7 µs per word (typical, 39 series) Currently these devices are available on 64 Mbit only. • 1.75 µs per word (typical,38 series) Parallel Flash Applications ■ Flexible erase capability and fast erase times* ■ Bluetooth ■ Servers and routers • 2 Kword sector erase: 18 ms (typical) ■ GPS ■ Set-top boxes • 32 Kword block erase: 18 ms (typical) ■ Wi-Fi/WiMax ■ Digital cameras • Chip erase: 70 ms (typical) ■ Mobile phones ■ Industrial ■ Small uniform sector sizes: 2 Kword and 32 Kword ■ DSL/cable modems ■ Automotive infotainment ■ Commercial and industrial operating temperatures ■ Endurance: 100,000 cycles (typical) ■ Data retention: 100 years (min) ■ MPF+ devices offer additional features • Erase suspend • Boot block • Hardware reset features ■ Advanced protection features (series 38)

*Data varies for different devices, please refer to the datasheet for details.

Memory Products 11 Flash Products

FlASh PRODUCtS Write Protect ypical)

Product* Packages** emperature Range Bus Released (R) Not Released (NR) Density Organization Max. Clock Frequency (V) Operating Voltage t E/W Endurance (Minimum) Data Retention (Minimum) Write Speed ( t Max. Standby Current h ardware Software Protected Size Array Serial Flash Memory SST25VF512A R 512 Kb 64 K × 8 33 MHz 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles (typ.) 100 years 14 µs (Byte Program) 8 µA ü ü Various 8L-SOIC, 8C-WSON, 8B-XFBGA SST25VF010A R 1 Mb 128 K × 8 33 MHz 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles (typ.) 100 years 14 µs (Byte Program) 8 µA ü ü Various 8L-SOIC, 8C-WSON, 8B-XFBGA SST25VF020B R 2 Mb 256 K × 8 80 MHz 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles (typ.) 100 years 7 µs (Word Program) 5 µA ü ü Various 8L-SOIC, 8C-WSON, 8L-USON

×1 SST25PF020B R 2 Mb 256 K × 8 40 MHz 2.3–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles (typ.) 100 years 7 µs (Word Program) 5 µA ü ü Various 8L-SOIC, 8C-WSON, 8L-USON SST25WF020A R 2 Mb 256 K × 8 40 MHz 1.65–1.95 0°C to 70°C, −40°C to +85°C 100,000 cycles (typ.) 20 years 3 ms (Page Program) 10 µA ü ü Various 8L-SOIC, 8C-WSON, 8L-USON SST25VF040B R 4 Mb 512 K × 8 80 MHz 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles (typ.) 100 years 7 µs (Word Program) 5 µA ü ü Various 8L-SOIC, 8C-WSON, 8B-XFBGA SST25VF080B R 8 Mb 1 M × 8 80 MHz 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles (typ.) 100 years 7 µs (Word Program) 5 µA ü ü Various 8L-SOIC, 8C-WSON, 8B-XFBGA SST25WF040B R 4 Mb 512 K × 8 40 MHz 1.65–1.95 0°C to 70°C, −40°C to +85°C 100,000 cycles (typ.) 20 years 1 ms (Page Program) 10 µA ü ü Various 8L-SOIC, 8C-WSON, 8L-USON

×1, ×2 ×1, SST25WF080B R 8 Mb 1 M × 8 40 MHz 1.65–1.95 0°C to 70°C, −40°C to +85°C 100,000 cycles (typ.) 20 years 1 ms (Page Program) 10 µA ü ü Various 8L-SOIC, 8C-WSON SST26WF040B R 4 Mb 512 K × 8 104 MHz 1.65–1.95 0°C to 70°C, −40°C to +85°C 100,000 cycles (min) 100 years 1 ms (Page Program) 3 µA ü ü Various 8L-SOIC, 8C-WSON SST26WF080B R 8 Mb 1 M × 8 104 MHz 1.65–1.95 0°C to 70°C, −40°C to +85°C 100,000 cycles (min) 100 years 1 ms (Page Program) 3 µA ü ü Various 8L-SOIC, 8C-WSON SST26WF016B R 16 Mb 2 M × 8 104 MHz 1.65–1.95 0°C to 70°C, −40°C to +85°C 100,000 cycles (min) 100 years 1 ms (Page Program) 3 µA ü ü Various 8L-SOIC, 8C-WSON SST26VF016B R 16 Mb 2 M × 8 104 MHz 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles (min) 100 years 1 ms (Page Program) 15 µA ü ü Various 8L-SOIC, 8C-WSON ×1, ×2, ×4 ×2, ×1, SST26VF032B/BA R 32 Mb 4 M × 8 104 MHz 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles (min) 100 years 1 ms (Page Program) 15 µA ü ü Various 8L-SOIC, 8C-WSON, 24B-TFBGA SST26VF064B/BA R 64 Mb 8 M × 8 104 MHz 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles (min) 100 years 1 ms (Page Program) 15 µA ü ü Various 8L-SOIC, 8C-WSON, 24B-TFBGA lPC Firmware Flash/Firmware hub Flash Memory SST49LF008A R 8 Mb 1 M × 8 33 MHz 3.0–3.6 V 0°C to 70°C 100,000 cycles (min) 100 years 14 µs (Byte Program) 14 µA ü ü Various 32L-PLCC, 32L-TSOP SST49LF016C R 16 Mb 2 M × 8 33 MHz 3.0–3.6 V 0°C to 70°C 100,000 cycles (min) 100 years 14 µs (Byte Program) 14 µA ü ü Various 32L-PLCC, 32L-TSOP ×4 SST49LF080A R 8 Mb 1 M × 8 33 MHz 3.0–3.6 V 0°C to 70°C 100,000 cycles (min) 100 years 14 µs (Byte Program) 14 µA ü ü Various 32L-PLCC, 32L-TSOP SST49LF160C R 16 Mb 2 M × 8 33 MHz 3.0–3.6 V 0°C to 70°C 100,000 cycles (min) 100 years 14 µs (Byte Program) 14 µA ü ü Various 32L-PLCC Parallel Flash Memory SST39SF010A R 1 Mb 128 K × 8 55/70 ns 4.5–5.5 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 14 µs (Byte Program) 30 µA – – N/A 32L-PLCC, 32L-PDIP, 32L-TSOP SST39LF010 R 1 Mb 512 K × 8 55 ns 3.0–3.6 0°C to 70°C 100,000 cycles 100 years 14 µs (Byte Program) 1 µA – – N/A 48B-TFBGA, 32L-TSOP, 32L-PLCC SST39VF010 R 1 Mb 512 K × 8 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 14 µs (Byte Program) 1 µA – – N/A 48B-TFBGA, 32L-TSOP, 32L-PLCC SST39LF020 R 2 Mb 512 K × 8 55 ns 3.0–3.6 0°C to 70°C 100,000 cycles 100 years 14 µs (Byte Program) 1 µA – – N/A 48B-TFBGA, 32L-TSOP, 32L-PLCC SST39SF020A R 2 Mb 256 K × 8 55/70 ns 4.5–5.5 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 14 µs (Byte Program) 30 µA – – N/A 32L-PLCC, 32L-PDIP, 32L-TSOP

×8 SST39VF020 R 2 Mb 512 K × 8 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 14 µs (Byte Program) 1 µA – – N/A 48B-TFBGA, 32L-TSOP, 32L-PLCC SST39SF040 R 4 Mb 512 K × 8 55/70 ns 4.5–5.5 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 14 µs (Byte Program) 30 µA – – N/A 32L-PLCC, 32L-PDIP, 32L-TSOP SST39LF040 R 4 Mb 512 K × 8 55 ns 3.0–3.6 0°C to 70°C 100,000 cycles 100 years 14 µs (Byte Program) 1 µA – – N/A 48B-TFBGA, 32L-TSOP, 32L-PLCC SST39VF040 R 4 Mb 512 K × 8 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 14 µs (Byte Program) 1 µA – – N/A 48B-TFBGA, 32L-TSOP, 32L-PLCC SST39VF168X R 16 Mb 2 M × 8 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 7 µs (Byte Program) 3 µA ü – 64 KB 48B-TFBGA, 48L-TSOP 128 K SST39LF200A R 2 Mb 55 ns 3.0–3.6 0°C to 70°C 100,000 cycles 100 years 14 µs (Word Program) 3 µA – – N/A 48B-TFBGA, 48L-TSOP × 16 128 K 48B-TFBGA, 48L-TSOP, SST39VF200A R 2 Mb 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 14 µs (Word Program) 3 µA – – N/A × 16 48B-WFBGA 256 K 48B-TFBGA, 48L-TSOP, SST39LF40XC R 4 Mb 55 ns 3.0–3.6 0°C to 70°C 100,000 cycles 100 years 7 µs (Word Program) 3 µA ü – 8 KB × 16 48B-WFBGA 256 K 48B-TFBGA, 48B-WFBGA, SST39WF400B R 4 Mb 70 ns 1.65–1.95 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 28 µs (Word Program) 5 µA – – N/A × 16 48B-XFBGA 256 K 48B-TFBGA, 48L-TSOP, SST39VF40XC R 4 Mb 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 7 µs (Word Program) 3 µA ü – 8 KB × 16 48B-WFBGA 512 K 48B-TFBGA, 48B-WFBGA, SST39WF800B R 8 Mb 70 ns 1.65–1.95 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 28 µs (Word Program) 5 µA – – N/A × 16 48B-XFBGA 512 K 48B-TFBGA, 48L-TSOP, SST39LF80XC R 8 Mb 55 ns 3.0–3.6 0°C to 70°C 100,000 cycles 100 years 7 µs (Word Program) 3 µA ü – N/A × 16 48B-WFBGA

×16 512 K 48B-TFBGA, 48L-TSOP, SST39VF80XC R 8 Mb 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 7 µs (Word Program) 3 µA ü – N/A × 16 48B-WFBGA 48B-TFBGA, 48B-WFBGA, SST39WF160X R 16 Mb 1 M × 16 70 ns 1.65–1.95 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 28 µs (Word Program) 5 µA ü – 32 KB 48B-XFBGA 48B-TFBGA, 48L-TSOP, SST39VF160XC R 16 Mb 1 M × 16 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 7 µs (Word Program) 3 µA ü – 8 KB 48B-WFBGA SST39VF160X R 16 Mb 2 M × 8 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 7 µs (Byte Program) 3 µA ü – 64 KB 48B-TFBGA, 48L-TSOP SST39VF320XB R 32 Mb 2 M × 16 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 7 µs (Word Program) 4 µA ü – 32 KB 48B-TFBGA, 48L-TSOP SST39VF320XC R 32 Mb 2 M × 16 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 7 µs (Word Program) 4 µA ü – 8 KB 48B-TFBGA, 48L-TSOP 7 µs/1.75 µs 32 KB/ SST38VF640X R 64 Mb 4 M × 16 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 3 µA ü ü 48B-TFBGA, 48L-TSOP (Write Buffer Program) 8 KB 7 µs/1.75 µs 32 KB/ SST38VF640XB R 64 Mb 4 M × 16 70 ns 2.7–3.6 0°C to 70°C, −40°C to +85°C 100,000 cycles 100 years 3 µA ü ü 48B-TFBGA, 48L-TSOP (Write Buffer Program) 8 KB

*X is a wildcard to indicate “top” or “bottom” boot block support. Please refer to the respective datasheets for more details. **Only standard packages are listed here. Please inquire with your local sales office for devices in die form or in chip-scale packages.

12 Memory Products Automotive Memory Products

Microchip Technology has developed industry-leading processes for each step in the design, manufacturing and testing phases of its serial EEPROMs, and has become one of the most respected leaders in supply of these devices to the automotive industry worldwide. EEPROM: Robust Design ■ ESD protection • > 4000 V Human Body Model (HBM) • > 400 V Machine Mode (MM) • > 1000 V Charged Device Model ■ Latch-up protection > 200 mA on all pins ■ ESD induced latch-up > 100 V (MM) on Vdd; > 400 V on all I/O > 1 M cycles endurance and > 200 years data retention ■ Up to 150°C operation (read and writes) ■ Power-On Reset (POR) and Brown-Out Reset (BOR) • Effective protection against noisy automotive environments • Eliminates false writes ■ Schmitt Trigger input fi lters for noise reduction ■ Complete traceability including die location on wafer

All Major Bus Types Extended Temperatures SPI 25LCXX I2C™ 24LCXX Complete H-Temp −40 to 150°C Product Lines Microwire 93LCXX E-Temp −40 to 125°C Density: 128 bits to 1 Mbit UNI/O® Bus 11LCXX I-Temp −40 to 85°C Speed: Up to 20 MHz

Tools MPLAB® Starter Kit for Serial Highest Quality Memory Products Serial QS9000; ISO/TS16949 Total Endurance™ Software AEC-Q100-oompliant Verilog and IBIS Models EEPROM RoHS-compliant Microchip Advanced Parts Long product life cycles Selector (MAPS)

Innovative Packages Operating Voltages Reliability and Dies LC: 2.5–5.5 V High endurance: 1 million E/W cycles PDIP, SOIC, TSSOP, T-DFN, AA: 1.7–5.5 V MSOP, SOT-23, SC70, Data retention: C: 4.5–5.5 V WLCSP, Die and Wafer Over 200 years VL: 1.5–3.6 V

Memory Products 13 Automotive Memory Products

Automotive Grade* ■ ISO TS-16949-compliant (inc. VDA6.1) quality manufacturing systems ■ Restricted site assembly ■ Production Parts Approval Process (PPAP) ■ Exceeds AEC Q-100 product qualifi cation requirements ■ Special screening and test methods including Maverick lot testing ■ Long product life cycle in support of automotive industry 15 year supply requirement Temperature Range Now offering I2C and SPI Serial EEPROMs with optional range from −55 to 150°C. ■ Automotive turbo chargers and exhaust gas recirculation ■ Automotive fan motors, air valves, fl aps and spark plugs Flash Areas under the vehicle hood ■ Unique Flash Cell Design Serial SRAM Looking for RAM memory also? Microchip’s SPI Serial SRAM products offer: Poly 1 Poly 2 ■ A quick and easy way to add external RAM Thicker tunnel oxide reduces ■ 4-pin SPI interface leakage Source Split Gate Drain 20 MHz clock speed improving data ■ SuperFlash® Technology No write cycle time retention and ■ reliability.

Both Serial and Parallel SQI™ Flash Device 26XX Parallel 39XX

Highest Quality Extended Temperatures QS9000; ISO/TS16949 Grade 2 −40 to 105°C Flash AEC-Q100-oompliant Grade 3 −40 to 85°C RoHS-compliant Long product life cycles

Tools Reliability Serial Flash Evaluation Kit High endurance: Parallel Flash Evaluation Kit 100,000 cycles min. Data retention: Over 100 years

*Automotive grade criteria will evolve as market requirements change.

14 Memory Products Resources

Development Tools Serial EEPROM Plug-In Module PICtail™ Board Reduce development time and cost with Microchip’s Pack (AC243003) development tools. Competitive market conditions force The Serial EEPROM Plug-In Module businesses to examine every aspect of their product life PICtail Board Pack is a series of cycle to maximize productivity and minimize expense. boards designs around Microchip’s Easy-to-learn, low-cost common development tools are one Serial EEPROM devices. The boards way to reduce risk and get to market faster. are designed to interface with the PICtail Plus connector as well as the MPLAB® Starter Kit for Serial Memory Products MPLAB Starter Kit for Serial Memory (DV243003) Products and the PICkit™ 3 board, allowing you to get Reduce time to market and started right out of the box. create a rock-solid design using ■ Plug-and-play with PICtail Plus connector and the MPLAB Starter Kit for Serial PICkit 3 connector Memory Products. It includes ■ Test points for oscilloscope connections for fi rmware everything necessary to quickly debugging (I2C and UNI/O only) develop a robust and reliable ■ Microwire Buses are included for maximum fl exibility in Serial EEPROM design, and development of your application greatly reduces the time required for system integration and hardware/software fine-tuning. Serial SuperFlash Technology Kit 1 ■ 3.3 V and 5.0 V on-board voltage selection The Serial SuperFlash Technology Kit 1 ■ Supports Microchip UNI/O bus, I2C, SPI and Microwire allows you to evaluate Serial Flash and Serial EEPROMs quickly develop and test firmware using known good hardware. This kit includes ■ 1.8 V to 5.5 V external voltage support three Serial Flash PICtail Plus daughter Includes free copy of MPLAB X IDE ■ boards, each having a Serial Flash ■ USB interconnect soldered on it. The Serial Flash devices included are SST25VF016B, SST26VF032 UNI/O Bus Parasitic Power Demonstration Board and SST25VF064C. (AC243004) The UNI/O Bus Parasitic Power Parallel SuperFlash Technology Kit 1 (AC243006-1) Demonstration Board is designed to The Parallel Flash PICtail Plus Daughter Board is an illustrate how a standard half-wave evaluation board designed to interface with the PICtail rectifier and capacitor circuit can be Plus connector found on the Explorer 16 Development used to parasitically extract power for Board. The Parallel SuperFlash Technology Kit 1 contains a UNI/O device from the Serial Clock, Data Input/Output two Parallel Flash PICtail Plus Daughter Boards. Each (SCIO) signal as described in application note AN1213. board has a parallel Flash device soldered on it. The This reduces the number of connections necessary for parallel Flash devices included are SST38VF6401 adding a UNI/O device to your application down to two: and SST39VF1601C. SCIO and VSS.

Memory Products 15 Support Training Microchip is committed to supporting its customers If additional training interests you, then Microchip can in developing products faster and more efficiently. We help. We continue to expand our technical training options, maintain a worldwide network of field applications offering a growing list of courses and in-depth curriculum engineers and technical support ready to provide product locally, as well as significant online resources – whenever and system assistance. In addition, the following service you want to use them. areas are available at www.microchip.com: ■ Technical Training Centers and Other Resources: ■ Support link provides a way to get questions www.microchip.com/training answered fast: http://support.microchip.com ■ MASTERs Conferences: www.microchip.com/masters ■ Sample link offers evaluation samples of any ■ Worldwide Seminars: www.microchip.com/seminars Microchip device: http://sample.microchip.com ■ eLearning: www.microchip.com/webseminars ■ Forum link provides access to knowledge base and peer help: http://forum.microchip.com ■ Buy link provides locations of Microchip Sales Channel Partners: www.microchip.com/sales

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www.microchip.com Information subject to change. The Microchip name and logo, the Microchip logo, MPLAB, SuperFlash and UNI/O are registered Microchip technology Inc. trademarks and MiWi, MPF, PICDEM, PICkit, PICtail, Serial Quad I/O, SQI and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks mentioned herein are property of their respective 2355 W. Chandler Blvd. companies. ©2015, Microchip Technology Incorporated. All Rights Reserved. DS20005356A. ML2148Eng02.15 Chandler, AZ 85224-6199 Optimizing data memory utilization

By Colin Walls

ptimization is important to embedded software develo- Most embedded compilers have pers because they are always facing limited resources. a to select what kind of code So, being able to control the size and speed trade-off generation and optimization is required. withO code is critical. It is less common for thought to be given to However, there may be a situation where the optimization of data, where there can be a similar speed- you decide to have all your data un- versus-size tension. This article looks at how this conflict comes packed for speed, but have certain data about and what the developer can do about it. structures where you would rather save memory by packing. In this case, the A key difference between embedded and desktop system language extension keyword packed may programming is variability: every Windows PC is essentially the be applied, thus: same, whereas every embedded system is different. There are a number of implications of this variability: tools need to be more packed struct sophisticated and flexible; programmers need to be ready to ac- { commodate the specific requirements of their system; standard short two_byte; programming languages are mostly non-ideal for the job. This char one_byte; last point points towards a key issue: control of optimization. } my_array[4];

Optimization is a set of processes and algorithms that enable This overrides the optimization setting a compiler to advance from translating code from (say) C into for this one object. to translating an algorithm expressed in C into a functionally identical one expressed in assembly. This is a Alternatively, you may need to pack subtle but important difference. all the data to save memory, and have certain items that you want unpacked Data/memory optimization either for speed or for sharing with other A key aspect of optimization is memory utilization. Typically, a software. This is where the unpacked decision has to be made in the trade-off between having fast extension keyword applies. Fig. 1: packed C code or small code - it is rare to have the best of both worlds. code mapping. This decision also applies to data. The way data is stored into It is unlikely that you would use both memory affects its access time. With a 32-bit CPU, if everything packed and unpacked keywords in one is aligned with word boundaries, access time is fast; this is program, as only one of the two code termed ‘unpacked data’. Alternatively, if bytes of data are stored generation options can be active at any as efficiently as possible, it may take more effort to retrieve data one time. and hence the access time is slower; this is ‘packed’ data. So you have a choice much the same as with code: compact data Space optimization that is slow to access, or some wasted memory but fast access As previously discussed, modern embed- to data. ded compilers provide the opportunity to minimize the space used by data objects; For example, this structure: this may be controlled quite well by the developer. However, this optimization is struct only to the level of bytes, which might not { be good enough. short two_byte; char one_byte; For example, imagine an application } my_array[4]; that uses a large table of values, each of which is in the range 0 to 15. Clearly could be mapped into memory in a number of ways. The C this requires 4 bits of storage (a nibble), language standard gives the compiler complete freedom in this so keeping them in bytes would only be regard. Two possibilities are: packed, like in figure 1, or un- 50% efficient. It is the developer’s job to packed like in figure 2: do better (if memory footprint is deemed to be of greater importance than access Unpacked could be even more wasteful. This graphic shows time). There are broadly two ways to ad- word (16-bit) alignment. Long word (32-bit) alignment would dress this problem. result in 5 bytes being wasted for every 3 bytes of data! One way is to use bit fields in struc- Colin Walls is an embedded software technologist with the tures. This has the advantage that a com- Mentor Graphics Embedded Software Division - piler can readily optimize memory usage, Fig. 2: unpacked C www.mentor.com/embedded-software and is based in the UK. if the target CPU offers a convenient code mapping. He may be reached by email at [email protected] capability. The downside is that bit fields www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 27 DEBUGGING &PROGRAMMING TOOLS ™

within a structure cannot be indexed without writing additional programmer could produce code substantially more efficient code, but this is not too difficult. The following code shows how than a modern compiler. to access nibbles in an array of structures: Speed optimization. struct nibbles There is little a developer can do to improve speed of access to HIgH PERfORmaNCE BaTTERy HOLdERS { data beyond the optimization that the compiler does (i.e., not unsigned n0 : 4; packing the data for fast access). But one option is to locate unsigned n1 : 4; data in the fastest available memory. An embedded toolchain unsigned n2 : 4; includes a linker, which will normally have the flexibility to effect unsigned n3 : 4; this optimization. This opens up a few possibilities for consider- } mydata[100]; ation:

unsigned get_nibble(struct nibbles words[], unsigned index) The fastest place to keep data is in a CPU register, but these { are in short supply and should be used sparingly. Most compil- unsigned nibble; ers make smart choices for register optimization.

nibble = index % 4; RAM is the fastest type of memory in most systems. Ob- index /= 4; viously, variables tend to be located in RAM, but it may be switch (nibble) worthwhile to ensure that constant data is copied into RAM as { well. This is commonly done automatically, as code is normally case 0: copied from flash to RAM for execution. return words[index].n0; case 1: Microcontrollers typically have on-chip RAM, which is faster return words[index].n1; than external memory. So ensuring that speed-critical data is case 2: located there makes sense. return words[index].n2; case 3: Memory is commonly cached into an internal buffer for fast return words[index].n3; access. Some CPUs permit locking of a so that the con- } tents are always immediately available. } Embedded software developers are always interested in the A similar put_nibble() function would be required, of course. efficient use of resources. Careful coding and use of compiler optimizations can ensure that code is optimal for a given ap- The other way to code a solution would be to perform all the plication. To complete the job, a similar approach must be taken bit shifting explicitly in the code, which is really just emulating to the handling of data, where the balance of memory footprint what the compiler might generate. It is unlikely that a human against access time needs careful consideration

Secure kernel hypervisor moves into ARM Telit adds ARM compiler Both Lynx Software Technologies LynxOS 7.0 RTOS and its LynxSecure to its App Zone separation kernel hypervisor are moving to new ARM-based processors, Telit Wireless Solutions announced the availability allowing the development of military-grade security to protect ARM-based of the ARM Compiler as an optional addition to embedded designs for IoT. LynxOS 7.0 is being migrated initially to the the Telit AppZone, the ARM Cortex-A series of processor cores, including processors from Xilinx, integrated develop- TI and Freescale. LynxSecure is being migrated to Cortex-A family mem- ment environment for • For AA, AAA, 1/2AA and CR123A cylindrical batteries • Coil Spring and Polarized contacts assure low contact resistance and proper continuity bers that offer hardware virtualization support. The LynxOS 7.0 RTOS uses its popular GE910, for circuit protection • Available in Thru Hole Mount (THM) or Surface Mount (SMT) configurations• THM versions use nickel-plated stainless steel features such as access control lists, audit, quotas, local trusted path, ac- HE910, UE910, contacts • SMT versions feature gold-plated stainless steel contacts • Durable, rugged High Temperature Nylon housing • Quick & easy battery count management, and OpenPAM. These capabilities mean that security UE866 and UL865 can be designed into a connected embedded device rather than being cellular modules. Following an agreement with installation/replacement • Retains battery securely • Optional Covers are available for additional retention, if required • Ideal for low profile, added as an afterthought, and hence IoT edge and gateway devices can ARM, Telit can now offer the ARM Compiler as an space saving PCB applications • Suitable for Industrial and Consumer product applications be deemed ‘secure by design’. The LynxSecure separation kernel hypervi- option for optimal performance and size manage- sor provides strict isolation on a single hardware platform, efficiently sepa- ment. For professional grade, real-time functional- rates memory, CPU and devices without the need of a “helper” operating ity, the optional ARM Compiler enables engineers system that is commonly found in hypervisors. The virtualization technol- to take full advantage of the module’s embedded It’s what’s on the InsIde that counts ogy in LynxSecure sits above the separation kernel, and by using hardware processing capabilities. The toolchain incorporates ® virtualization features found in many of the newest ARM cores, can provide a highly optimizing C/C++ compiler, assembler, performance very close to the native speeds for guest operating systems linker and libraries for embedded software devel- running in the isolated domains. LynxSecure can be used to securely sepa- opment. Telit AppZone is an integrated Application ELECTRONICS CORP. rate different networks, for example IT and OT networks commonly found Development Environment which provides a full in IoT gateways, and it can securely partition persistent storage to isolate suite of development tools including everything critical information from malicious threats. one needs in order to start develop immediately. Lynx Software Technologies Telit Wireless Solutions European Headquarters: www.keyelco.com • 33 (1) 46 36 82 49 • 33 (1) 46 36 81 57 www.lynx.com www.telit.com

28 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com

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• For AA, AAA, 1/2AA and CR123A cylindrical batteries • Coil Spring and Polarized contacts assure low contact resistance and proper continuity for circuit protection • Available in Thru Hole Mount (THM) or Surface Mount (SMT) configurations• THM versions use nickel-plated stainless steel contacts • SMT versions feature gold-plated stainless steel contacts • Durable, rugged High Temperature Nylon housing • Quick & easy battery installation/replacement • Retains battery securely • Optional Covers are available for additional retention, if required • Ideal for low profile, space saving PCB applications • Suitable for Industrial and Consumer product applications

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Analysis tool stops software “erosion” Customizable code generator Enabling developers to write better embedded software is the is certification-ready goal of the creators of the Bauhaus Suite, a software develop- AdaCore’s QGen 1.0 is what the company calls a qualifi- ment environment from tool vendor Axivion GmbH. The tool able and customizable code generator and model verifier suite supports MISRA C:2012 and allows automated static for Simulink and Stateflow models. This tool can generate analysis for C# programs integrated into Microsoft Visual Stu- MISRA C and SPARK source code pro- dio. The Axivion Bauhaus tool suite, available now in release ducing readable, traceable, and efficient 6.2, targets safety-relevant software in automotive and medi- code. It is particularly suited for develop- cal environments. Supporting the MISRA C:2012 standard, the ing and verifying high-integrity real-time tool tests embedded software and provides information to the control applications, especially where programmer as to in which lines its code deviates from the rules safety certification is required. The tool as set by the relevant standards. It also provides hints to the handles around 100 Simulink blocks. These were selected as programmer which program statements need to be corrected a safe subset that guarantees predictable code generation or at least described in a comment. The selection of program- patterns, does not require any run-time support, and allows ing languages supported has been enhanced with a view to for tool qualification against software safety standards. Sup- GUI design in industrial environments. As a result, the tool port for Stateflow models is expected during late Q2 2015. enables users to perform in-depth static analysis of C# code. The tool’s static model verifier detects run-time errors such Thanks to the increased degree of integration, the results of the as integer overflow and division by zero. It also can find logic analysis are accessible directly in the errors such as dead execution paths, and verify functional development environment which also supports C++. Develop- properties through Simulink Assertion blocks. QGen can be ers involved in large projects can benefit from the newly added integrated with AdaCore’s GNATemulator and GNATcover- 64-bit support for all operating systems. Axivion Bauhaus suite age tools to support Processor-in-the-Loop (PIL) testing and 6.2 automatically performs static analysis on large amounts of structural coverage analysis without any code instrumenta- code at high speed, facilitating quality assurance in embedded tion. Qualification material for QGen will be available for software development. This feature also improves quality and standards such as DO-178C (avionics), EN 50128 (rail), and serviceability of the software. For instance, it tracks instances ISO 26262 TCL3 (automotive). The model verification feature with identical software statements; if one of them is modified, it is qualifiable for DO-178C at Tool Qualification Level 5. automatically applies this modification to all other instances. AdaCore Axivion www.adacore.com www.axivion.com

IDE targets concurrent 8/32-bit MCU Imperas opens MIPS Warrior processor models and wireless design Imperas has released the Open Virtual Platforms (OVP) Fast Simplicity Studio is what Silicon Labs claims to be industry’s Processor Models for the MIPS Warrior P-class and M-class first integrated MCU/wireless development environment CPU IP cores from Imagination Technologies. The processor enabling concurrent MCU and RF design for a wide range core models and example platforms are available from the Open of IoT applications. This new Virtual Platforms website, www.OVPworld.org/MIPS. The mod- software release inherits the best els of the P5600 and M51xx processor cores, as well as models features of the original Simplicity of other MIPS processors, work with the Imperas and OVP Studio platform and adds sup- simulators, including the QuantumLeap parallel simulation ac- port for Silicon Labs’ new 8-bit celerator, performing at hundreds of millions of instructions per EFM8 MCU family, new EZR32 second. All OVP processor models are instruction accurate, and sub-GHz wireless MCUs and very fast, focused on enabling embedded software engineers to EM35xx Ember ZigBee wireless have a development environment available early to accelerate SoCs – the most widely used 2.4 GHz connectivity solution the entire product development cycle. Virtual platforms utilizing in the 802.15.4 mesh networking market. The tool provides these OVP processor models can be created with the OVP pe- MCU and wireless developers with one-click access to ripheral and platform models, or the processor models can be everything they need to complete their projects, from initial integrated into SystemC/TLM-2.0 based virtual platforms using concept to final product, in a unified software environment. the native TLM-2.0 interface available with all OVP processor It includes an Eclipse-based integrated development environ- models. The OVP models also work with the Imperas advanced ment (IDE), graphical configuration tools, energy profiling tools for multicore software verification, analysis and debug, tools, network analysis tools, demos, software examples, including key tools for hardware-dependent software develop- documentation, technical support and community forums. ment such as OS and CPU-aware tracing (instruction, function, All of these integrated features combine to make embedded task, event), profiling, code coverage and memory analysis. development simple and productive for IoT developers. Sim- The tools use the Imperas SlipStreamer patent pending binary plicity Studio automatically detects the connected 8-bit or interception technology. SlipStreamer enables these analytical 32-bit MCU or wireless IC, graphically configure the device, tools to operate without any modification or instrumentation of and show supported configuration options to help develop- the software source code, i.e., the tools are completely non- ers get their projects up and running in minutes. intrusive. Silicon Labs Imperas www.silabs.com www.imperas.com

30 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com Optimised compiler claims peak EEMBC mance scores, say GHS and ARM. The Green Hills toolchain Automarks score on ARM core has received certificates by accredited independent agencies ARM and Green Hills Software have collaborated on an opti- TÜV Nord and Exida at the highest levels of automotive and mised compiler for the ARM Cortex®-R5 processor that, the industrial functional safety, including ISO 26262 ASIL D and IEC two companies say, enables the Cortex-R5 processor to meet 61508 SIL4. This combined level of certification and perfor- the needs of the most challenging automotive applications more mance will enable the Cortex-R5 to deliver performance, safety cost-effectively than any other MCU solution currently available and cost advantages to automotive systems developers as it EEMBC Labs has certified the Green Hills compiler, version eliminates the need for custom MCU architectures. 2015.1 as having achieved a performance score of 1.01EEMBC ARM Automarks/MHz on the Cortex-R5 automotive MCUs from www.arm.com Spansion. This represents a 30% increase on previous perfor-

Runtime visualisation tool adds Segger embOS Percepio AB, the Swedish developer of RTOS visualisation tools, has added embOS-Trace.

This tool offers a new level of insight into the runtime world for embedded software developers using Segger embOS and Segger J-Link debug probes. Percepio embOS-Trace is the latest member in Percepio’s No Boundaries Tracealyzer family and the embOS integration has been developed in Our mission-critical resistors are truly out of collaboration with Segger. Founded in 2009 and based in Västerås, this world. In fact, soon they will be out of our Sweden, Percepio is a developer solar system, helping NASA’s Voyager spacecraft of highly visual runtime diagnostics tools for embedded and Linux-based travel where no Earth craft has gone before. software. Percepio’s tool family Tracealyzer facilitates understanding, Thirty-fi ve years and 11 billion miles... troubleshooting and optimisation of embedded system code. Now that’s reliability. The new line of Tracealyzer tools, including embOS-Trace, use the performance of Segger J-Link debug probes to offer continuous trace State of the Art, Inc. streaming of runtime events, such as scheduling, interrupt handlers, kernel RESISTIVE PRODUCTS calls and application events. Trace- alyzer uses software-defined trace, where events are stored in a RAM buffer. This is very flexible, easy-to- use, and does not depend on hard- ware trace support. In embOS-Trace the trace length is no longer limited by the available RAM. Percepio www.percepio.com Made in the USA.

www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 31 POWER MANAGEMENT

Safe power for medical devices used at home

By Herbert Blum

n aging population and the rising cost of healthcare The icon for Protection Class II symbolizes two insulation lay- around the world are a matter of concern to the general ers and is affixed to all Protection Class II devices. public these days. This is especially true in the USA, The protective insulation has to be reinforced according to Awhere keeping costs under control becomes more and more the general standard IEC 61140 for protection against electric challenging. In order to reduce the cost of overhead, while offer- shocks or be double that of Protection Class I. A second insula- ing increased levels of care by way of technology, we are seeing tion for the power feed is a common solution. Doubling the a trend towards medical care at home. Along with this trend clearance and creepage distances for all live contacts also has is increasing demand for smaller, more portable and efficient the same effect as a double insulation. medical equipment. This ensures that the two conductors, consisting of the While the shorter stay in overcrowded hospitals is saving phase and neutral conductor, are sufficiently insulated against costs in the health industry, manufacturers of medical devices all other surfaces that can be touched. If the surfaces that can are being presented with new challenges to minimize the safety be touched are electrically conductive, the gaps and insulations risks associated with the use of medical devices. Medical also have to be doubled. The clearance and creepage gaps devices used at home are being operated by for Protection Class I are 4 mm between live laypersons with no medical training, instead conductors and metal enclosures or ground of trained personnel in a controlled hospital conductors. This value is doubled in Protection environment. Regulatory requirements have Class II, corresponding to a gap of 8 mm be- been established to provide safety measures tween live conductors and a metal enclosure. specifically for these users. As an important addition to the basic stan- 5008: C8 appliance inlet with filter A C8 style IEC connector with a maximum dard IEC 60601-1 for medical devices, IEC rated current of 2.5 A is suitable for all devices 60601-1-11 describes requirements about with outputs up to approx 500 W. Matching medical equipment used in the home. The de- connecting cables are available with 2-pin velopers of such devices or components have Euro and National Electrical Manufacturing to observe additional requirements as it relates Association (NEMA) plugs. The C18 connector, to safety in addition to specifications about with a rated current up to 10A VDE and 15 A marking (simple operation) and documentation C8 C18 UL is available for medical devices with higher (for example, understandable operating in- outputs. structions). The utmost care has to be exercised when it comes to powering the device. The safety requirements according to Complying with EMC IEC 60601-1-11 can be summarized as follows: for domestic medical equipment - Altered ambient conditions (domestic environment) Since laypersons operate medical devices at home, special - Protection Class II attention to the equipment’s ability to effectively suppress - Minimum IP 21 degree of water and dust protection interference is needed. This also includes ensuring electromag- - Stricter shock and vibration tests netic compatibility (EMC). Most devices today are supplied with A key criteria is most certainly the responsibility to provide power by switched-mode power supplies. These are suitable Protection Class II safety, as well as equipment immunity to for the various mains voltages around the world and have a high electromagnetic interference. efficiency, due to the fast switching capability by ICs. These switching ICs, however, cause great interferences Safe power supply for medical equipment that can be measured on the power mains. The EMC standards used at home specify limits for conducted and radiated interfering voltages. Domestic power supply systems, unlike in- This is a precondition for compliance with the stallations in hospitals, are not always reliable EMC standards, which in turn is necessary or may be insufficiently grounded. A medical for the CE conformity marking. The use of a device used at home has to compensate for filter is recommended because of the interfer- this potential. It is therefore imperative that it ences caused by modern electronic devices. be designed with Protection Class II safety. A filter can be discreetly mounted on the PC Protection Class is defined in safety stan- C18 PEM connector 5707 with V-Lock board or used as a block or in line filter in dards that offer protection against dangerous locking system and IP 65 protection combination with the connector. contact voltages. Devices in Protection Class II have double insulation between the mains circuit and the output voltage or Since the ground connection is usually missing with Protec- metal enclosure. Even if they do have electrically conductive tion Class II, the filter has to make do without grounded capaci- surfaces, they are protected against any contact with tors. These so-called Y-capacitors are very popular in most filter other live parts through circuits since they offer good attenuation in the higher frequen- Icon for Protection Class II the double insulation. cy range. The two attenuation curves for the same filter, one with (standard) and one without Y-capacitors (Protection Class Herbert Blum is Product Manager at Schurter AG – II) clearly show the attenuation loss for the asymmetric attenua- www.schurter.com tion in the frequency range above 1 MHz.

32 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com then meets with the shielding inside The attenuation loss can be com- the plastic enclosure, thus guarantee- pensated by more inductivity or by ing the most complete shielding pos- attaching ferrites to the power cable. sible. Make sure that the electrically But this is not always practical and conductive shield is double insulated possible. This is why it is recommend- against the live conductors. An inlet fil- ed that interferences in this frequency ter in Protection Class II already satis- range be dealt with as close as pos- fies these requirements. The inlet filter sible to the source of the interference. together with the enclosure shielding Connecting capacitors to the internal guarantees a very broadband attenua- ground are suitable means in a sec- tion. This forms the basis for success- ondary circuit. Linear chokes may also Asymmetric attenuation curves: 1-A filter with ful proof of the EMC conformity. be suitable, though these have only a Y-capacitors (top line) and without Y-capacitors Schurter offers various combination limited frequency range. (bottom line) connectors that satisfy the require- If interferences occur in a device in a frequency range above ments of the standard IEC 60601-1-11 which includes Protec- 30 MHz, shielding should also be provided in addition to the in- tion Class II variations. These filtered connectors in a Protection put filter. If the high-frequency source of the interference can be Class II design have been high-voltage tested with 4000 V. spatially separated from the remainder of the electronic circuits; Every single one of the manufactured components is tested in we recommend that it be shielded by a metal enclosure. Should the final inspection between live and tangible conductive parts. this prove impossible the entire device should be shielded, Examples of conductive parts are the filter shield or the as- though this is not always easy since Protection Class II devices sembly panel. The combination connectors are also protected do not normally have a metal enclosure. against solid foreign bodies with a diameter above 12.5 mm, Plastic enclosures with metal coating on the inside provide against penetration with a finger, and have an IP 40 degree of an effective shielding alternative and are often used as a lower- protection. Additionally, we recommend a flush-mounted instal- cost alternative. lation in the enclosure so as to achieve the protection against If a connector with integrated filter is used, it is advisable to drip, in accordance with IP 21. rear-mount it to the inside panel. The metal flange of the filter

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www.electronics-eetimes.comRZ_TY_Anzeige_EETimes.indd 1 Electronic Engineering Times Europe March25.11.14 2015 12:24 33 POWER MANAGEMENT

How to ground and power complex circuits

By Nicholaus Smith

s electronics applications continue to become more nodes. The ripple reduction should be aimed at the frequencies compact, powerful, and versatile, the final system of interest, in this case the audible range <20kHz. The capaci- demands and complexities of mobile and stationary tance should be selected so that the LDO ripple current is Adevices also are becoming increasingly sophisticated. This reduced until the interference is removed by using the capacitor complexity which demands wireless and wired interconnectivity current equation (1): of analogue and digital circuits - requires system engineers to This will reduce the ripple to DC. Then the current only use multiple power rails and mixed disciplines of circuit design. causes a voltage drop, and it will not vary with time as much (t Circuits with analogue and digital signals tend to cause declara- from above should be considered as an average of the audible tion of several ground references, often leading to a spaghetti- frequency, 12-14kHz). Error can then be controlled by using like result, where ideas are distorted and what appear to be solid solutions turn out to be chaotic failures. In order to put engineering foundations back into complex systems, it is imperative that power and grounding solutions are proactively engineered in a manner that optimizes performance and heat dissipation while reducing EMI radiation and signal to wide power and GND connections between each IC to limit the noise interference. This article demonstrates how to optimize voltage drop (product of current times resistance) governed by complex circuits from the point of view of power delivery, im- Ohms Law. proved signal integrity and properly grounded functional blocks The width of the GND and power lines should be guided by to implement the final system. The focus is on understanding considering the acceptable loss. Typical 1-oz copper printed circuit needs and pre-planning for the final system, because circuit boards (PCBs) resistance can be estimated as ~0.5m per the result of those two steps is a project that effectively moves square. from the schematic to the final printed circuit board. By taking the time during the design stage to consider each block of a complex system from the current path and noise susceptibility point of view, then placing blocks and powering circuits based on the simple axiom that current always flows in a loop, the complexity faced by today’s system engineers can be broken down into manageable pieces, and implemented into a final, robust design. To demonstrate the theory, let’s examine a simple circuit and consider the shown connections. This basic circuit consists of three elements, a low-drop out (LDO) linear regulator, a micro- processing USB data-to-audio driver, and a speaker. All are powered by a USB plug connected to some computing host. In this example, the USB-to-audio driver must be powered by 3.3V. Since the speaker is powered by the audio driver output, and the audio driver input needs the +3.3V LDO which is pow- ered by the USB connector (+5V), it seems an obvious conclu- sion to place them on the board just like the schematic in figure 1(a) shows. However, with this configuration, the current making the speaker play will create a voltage bounce while it returns to the driver that sourced the current. That voltage bounce will, in turn, flow back to the LDO and finally to the USB connector. In this example, the reference voltage converting the USB data to mu- sic will bounce at the rate the music plays. The phase shift due to the speaker inductance will increase the error and this will be compounded by higher volumes due to increased current levels. The bounce also will cause ripple that will degrade the sound quality from the speaker. Fig. 1: A simple circuit showing power circuit causes bounce There are a couple of ways to minimize the impact of the and must return to source ripple current. One is to reduce the ripple by adding a capacitor (C1) very close to the USB to Audio IC from the VLDO node to Since solving such issues cannot always be accomplished the GND pin such that the capacitor is centred between these by adding capacitors, the root cause could be addressed as shown in figure 1 (b). The LDO is placed above the audio driver Nicholaus Smith is an Applications Engineer at Integrated IC so that the stereo sound current loop avoids the sensitive Device Technology – www.idt.com audio driver GND, thus the GND voltage bounce that occurs

34 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com Safe Power for DC12 Protection Class II

does not interfere with the audio driver and only the small ripple is present. In the previous example there were only two current loops for the application. Now, we will move on to a much more com- plicated example. The next system considered is a complex system, such as a tablet. In this example, the tablet will consist of items such as a backlight, touch screen, camera, charging system (USB and Wireless), Bluetooth, Wi-Fi, audio outputs (speaker, headphones), and memory for storing data. Of course, most of these applications require various voltage supply rails to operate well. As can be seen in figure 2, this system has five power supply rails and two methods of charging the battery, which means that there will be at least five current loops. But there will be more to consider than just the DC power supplies and the current paths related to each. There are multiple switching regulators and broadcasting and receiving antenna systems that all need to be coordinated and controlled using the . In order to visualize the power and GND paths that are associ- ated with each power supply and the block they power, it helps - For home medical equipment to tabulate each supply and load current estimate in order to - Available in white or black consider component power ratings and tolerances; determine - Designed for high inrush current trace widths; determine sensitivity to voltage drops, noise injec- - Suitable for V-Lock cord retaining tion or generation; and limit current loop areas to reduce EMI emissions. In figure 2, the main power supply rails have been color-cod- ed, and the current flowing in the respective GND symbols has schurter.com/emc_news been matched to the rail that supplies the current. For example, every component not related to charging the battery (RED) has an end current return to the battery, but the USB to audio IC is powered by the 3.3V BUCK regulator, which is powered by the 5V Boost, then the battery. Therefore, the GND current returns from the audio IC to each regulator in series and then to the battery; the audio IC current does not return straight to the bat- tery. PCB Prototypes & Small Series The system shown in figure 2 runs off of a Lithium-ion battery that is charged by a USB charger or a wireless power transmit- ter and receiver. The battery is boosted up to +5V (for the cam- era zoom motor, +3.3V step-down regulator for microprocessor, audio, and touchscreen), stepped down to +1.2V (for the micro-

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FREE SMT stencil with Fig. 2: Typical mobile tablet schematic blocks EVERY Prototype order! processor, memory, Bluetooth, and Wi-Fi), and boosted to +7V for camera flash. Obviously, voltage regulators should be placed [email protected] near their respective loads, but the form factor of the final GmbH of Beta LAYOUT trademark PCB-POOL® is a registered product often forces designers to place loads far from power supplies or intermingled around the board. Each power supply supports multiple loads, so strategic routing and placement has www.pcb-pool.com to be used to control current paths and unintended EMI. www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 35 POWER MANAGEMENT

Some important placement considerations include available Intentional placement of blocks has been implemented because space, mechanical constraints, acceptable voltage drops along this method uses natural current flow to shield circuits from un- the power and GND rails (the product of load current and num- desired GND bounce. Any trace that carries currents or voltages ber of squares in traces/planes), power supply and GND cur- (positive potential) must have a return path. The return path will rents paths, cost (PCB layer count, components), the frequency flow as close as possible to the positive potential form of the of digital or analogue signals, and the availability of a direct signal, and it will be distributed on the GND plane under the return path from the source. For the last example, we present a sourcing signal/power rail. hypothetical final system with mechanical constraints. In such a Understanding current flow and the concept of minimizing system, the user interfaces and overall dimensions will control current loops leads to the obvious conclusion that the single the design. Figure 3 shows a practical placement of each block. GND method is ideal and preferred as a PCB design approach In figure 3, each power supply has been color-coded for clar- because it significantly reduces component count, layer count, ity. The most important part of the image is the colouring of the and potential radiation. Every trace and block will be provided GND return currents. Because multiple power supplies are in the shortest return path possible on the PCB. By following this series leading to each final load, the GND currents are forced to guidance, the system designer will only have to control the PCB complete the return paths in the same order they were supplied. design from the perspective of proper trace widths as well as For example, the battery powers the BUCK1.2V regulator, smart placement of components and blocks. He or she should not have to check every trace or build multiple experimental boards to obtain the correct power, signal, and GND scheme. An additional advantage offered by single, uninterrupted GND plane is that the continuity of the plane allows heat developed to spread evenly across the entire PCB surface, resulting in lower operating temperatures. Any signal (or power supply) used to drive any circuit must be given a proper path to return to its source. C circuit de- signers must consider the source and grounding schemes to properly implement a final system solution. Consideration of the load and the type of load is crucial during the implementation phase to keep current paths that cause voltage bounce con- trolled. Placing and locating those current paths in areas of the PCB that can afford GND noise without impacting performance is key to effective and efficient design. Fig. 3: Typical mobile tablet application blocks and placement Regulator has output tracking and which powers the microprocessor; therefore, the current power- ing the microprocessor will return directly to the BUCK1.2V sequencing for FPGAs and MPUs regulator GND prior to returning to the battery. The failure to Designed to provide a compact solution size and high envision the entire current loop and the order in which the frequency switching for point of load conversions, Intersil’s paths are completed can often create unstable operation or ISL8002B is a synchronous buck (step-down) switching inadequate GND current returns because they are not properly regulator that delivers up accounted for and controlled in the layout. to 2A of continuous out- For example, it is easy to imagine a systems engineer placing put current from a 2.7V the Bluetooth and WiFi antennas in the place of the camera and to 5.5V input supply. The flash. The problem that would result from the reversal of the device’s 2 MHz switch- camera with the WiFi/Bluetooth blocks is that even though the ing frequency optimises +1.2V power supply would still properly split to provide power transient response, and to the blocks as needed, the GND return currents of the high its key features - pro- frequency WiFi/Bluetooth would now flow directly through and grammable soft-start, under the microprocessor/memory blocks, thereby injecting and output tracking the ripple currents and voltage bounces associated with the and sequencing of FPGAs and - increase antennas directly into the high frequency microprocessor GND system reliability for point-of load conversions. The ISL8002B and memory transactions. This will result in errors with analog- enables greater system reliability through features such as; to-digital conversions of battery temperature, could corrupt the the regulator’s output tracking and sequencing of FPGAs stereo quality to the speaker, impact the camera resolution, and and MPUs ensures sensitive multi-rails properly start up and cause memory errors that could lead to lost data. By compari- shut down. Its output rails are configurable for coincidental, son, as drawn, the WiFi/Bluetooth power and GND currents ratiometric, or sequential settings, ensuring the FPGA or would remain separate and in parallel from the BUCK1.2V MPU’s internal ESD diodes are not biased or overstressed regulator to each independent load and back to the source during rising or falling outputs. The ISL8002B’s undervoltage (BUCK1.2V in this case), avoiding all of these issues. lockout and several other protection/stability features (over- Note that each of the above examples assumes a single voltage, overcurrent, undercurrent, negative current, over GND, and they are drawn as a copper plane that is continuous temperature and short-circuit) safeguard the system from and uninterrupted on one of the PCB layers. This GND plane damage when an unwanted electrical fault event occurs. is shared by all blocks of the circuit instead of partitioning the Intersil GND plane or separating it into sub-sections and using com- www.intersil.com ponents to combine GND planes and control current paths.

36 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com Harwin Gecko EETImes Europe third page Sept 14.qx

Welcome to the portable age

By Rob Phillips

ecent advancements in medicine are producing startling results, from innova- tions in 3D bio-printing to breakthroughs in transplant surgery. The improve- ment of patient care remains a driving force, evidenced in the rapid growth of theR portable and transportable medical device market. The new wave of devices are compact, lightweight and, crucially, no longer restricted to a mains power supply.

Over two years ago Accutronics conceived the idea of the CMX Series, a range of lithium ion batteries and chargers specifically for the medical device market. Dur- ing the research stage we realised there was an extraordinary opportunity to create a range of rechargeable batteries and chargers that could deliver safe and reliable energy to portable and transportable medical devices. We used our understanding of market requirements to develop a product range that would meet the increasing demand for high energy density and high power discharge, without compromising on safety and reliability for life-critical applications. One of the key points we considered was the potential social benefits. Mobile tech- nology is used both in hospitals and in the field. During patient transfer, transportable devices are used to monitor or treat patients on life supporting machines. The CMX can be used as a main or secondary battery, offering greater security for patients and guaranteeing the power supply throughout High Reliability in a the transfer process, it also compact package protects against mains power loss. Hospitals are able to perform routine power manage- Harwin’s Gecko connectors ment checks without having to provide high reliability under remove the medical device from service using the smart charger extreme conditions. that accompanies the CMX - Pin spacing 1.25mm battery. In addition to clinical set- - 2A per contact and ting applications, intimate and up to 1000 operations personal portable devices are widely used to treat patients in the home, improving the patients’ quality of life and - Four-finger BeCu contact reducing health service costs. system (Patent Published) A further consideration was the economic benefits of the concept. Thanks to our - Pick and Place to experience of working closely with medical OEMs, we can appreciate the pressure optimise production many are under, due to the rising global demand for hi-tech portable devices such as acute ventilators and anaesthesia workstations. - Comprehensive selection In Europe there are around 600 medical device OEMs and for the smaller manu- of cabling options available facturer they simply don’t have the resources to develop bespoke battery systems for their devices. For these companies, the CMX Series offers considerable economic - Locking latch with board benefits as the platform technology is adaptable, meaning that the battery system retention features development and qualification costs are much reduced and the development cycle is shortened. Using our battery technology, OEMs are able to focus their attentions, and budget, on their core skills, such as the design and development of the medical device itself.

Transport regulations The new batteries have been designed to meet stringent regulations and they comply with the relevant transport regulations, which exists to mitigate the risk associated with the transport of such energy dense cargo. They also comply with international For evaluation samples, safety standards required for batteries used in medical devices. CAD models and technical As part of our branded Entellion range, the CMX is available in three versions, us- specifications go to: ing eight, twelve or sixteen ‘18650’ sized cells, with continuous discharge rates of up to 300W. Two voltage platforms are used; 28.8V, which operates between 20.0V and www.harwin-gecko.com Rob Phillips is Managing Director of Accutronics - www.accutronics.co.uk

www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 37 POWER MANAGEMENT

33.6V and 14.4V, which operates between 10.0V and 16.8V. The CMX420E and CMX810E are perfect for devices that require the highest amount of energy in the smallest volume, and where discharge cur- rent is low. CMX440P and CMX820P are designed for devices that draw very high levels of power. When energy density is important but high power discharge Smart power management means the battery only requests is also necessary, the CMX420M, CMX430M and CMX810M of- charge when needed and shuts down when not being used. Ac- fer a balance between size and power capability. For customer curate run time prediction is possible to within 1% through the convenience, two chargers are available to accompany the use of an impedance tracking fuel gauge which also provides CMX series, an internal single channel charger and an external a bar graph indicator for battery capacity through the use of a dual bay desktop charger, which can also be used for battery liquid crystal display. calibration. Advancements in medicine and the changing nature of health care are driving the need for products to be truly innovative, at a Smart features time when OEMs are under pressure to cut costs and increase The smart portable power products are designed to meet the value in each product they sell. the emerging needs of feature-laden devices in professional The medical market is a challenging environment, and un- markets. Smart features of the CMX series include active and derstandably so, but the arrival of the CMX Series supports the passive protection circuits that prevent over-temperature, over creation of pioneering equipment that medical practitioners can and under-voltage, overload and short circuit. rely on.

Source-measure units target battery-driven SMD DC-DC converters uprate efficiency, product power optimisation isolation and temperature range Keysight Technologies has added two source/measure units These isolated DC-DC converters occupy industry-standard (SMUs), that feature dynamic current measurement, to its SMD packages. In single and dual output versions they are N6700 Series modular power systems – the N6785A two- available in power ranges from 0.25 to 3W. They claim higher quadrant SMU for efficiency, increased isolation and an extended operating battery drain analy- temperature over competitive models. sis and the N6786A Both regulated and unregulated output two-quadrant SMU for models are available. The ISA, ISE, functional test. Both ISH and ISK series offer unregulated SMUs provide power outputs while the ISR and ISW have output up to 80W. regulated outputs. ISE and ISA ranges These SMUs expand provide 1W output with single and the N6780A Series SMU family by offering up to four times dual unregulated outputs respectively, more power than the previous models. The new models the ISH is a 2W version of the ISE offer sourcing, measurement and analysis to help engineers range, and the ISK offers an unregu- deliver the best possible battery life in their devices. The lated 0.25W single output. ISW is a N6785A and N6786A SMUs allow engineers to test devices 1W single output converter with a regulated output, with the that require current up to 8A, such as tablets, large smart- ISR range providing a regulated 3W single output. Accord- phones (known as phablets), police/military handheld radios ingly there are various combinations of single output models and components of these devices. The N6780A Series SMUs from 3.3 to 24VDC, and dual output models with outputs eliminate the challenges of measuring dynamic currents with of ±5, ±9, ±12, ±15 and ±24VDC. Each series offers up to a feature called seamless measurement ranging. With seam- five ±10% input voltage ranges or a 2:1 input range on the less measurement ranging, engineers can precisely measure ISR series. Offering standard 1.5 or optional 3 kVDC input / dynamic currents without any glitches or disruptions to the output isolation figures, the converters measure 12.7 x 8.3 measurement. As the current drawn by the device under test x 7.25 mm for the ISE, ISH and ISK ranges. The ISA and (DUT) changes, the SMU automatically detects the change ISW measure 15.24 x 8.30 x 7.25 mm and the ISR measures and to the current measurement range that will 23.86 x 13.70 x 8.00 mm. All have industry standard pin outs. return the most precise measurement. When combined with The converters feature an extended operating temperature the SMUs built-in 18-bit digitiser, seamless measurement range of -40 to +105C for the ISA, ISE, ISH, ISK and ISR ranging enables effective vertical resolution of (in the region ranges (+85C for ISW), and full output power up to +100C is of) 28-bits. This capability lets users visualise current drain achievable (+85 C for ISR and +70C for ISW). The ISA/E/H/K/ from nano-Amps to Amps in one pass. R/W series is available from Farnell element14, Digi-Key. Keysight Technologies XP Power www.keysight.com www.xppower.com

38 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com Multi-channel load sink driver consumes 12x less power 8W wireless power receiver Diodes Incorporated has introduced a 7-channel relay and inductive load sink driver outputs 3 to 7V that claims to consume 12 times less power while offering a direct replacement to Integrated Device Technology’s wire- the industry-standard device. The ULN2003V12 7-channel relay and inductive load less power receiver IC, the P9027, is a sink driver directly replaces the industry-standard ULN2003A from other vendors, magnetic induction receiver that boasts while consuming 12 times less power. A 4-chan- 80 percent peak nel version, the ULN2003F12, is also offered; this system level provides a smaller footprint solution for when efficiency and fewer output channels are required, such as improved overall when driving low-voltage stepper motors. Target thermal perfor- end-markets for these devices include domestic mance. Support- appliances like washing machines and dishwash- ing the Wireless ers. The ULN2003V12 and ULN2003F12 both Power Consortium’s Qi standard, the support 3.3 V to 5 V CMOS logic inputs, making P9027 is an 8 Watt receiver measuring them compatible with a wide range of microcon- approximately 37 square millimeters trollers and logic devices. They also both integrate an input RC snubber circuit, which and requiring six fewer capacitors improves performance in noisy operating conditions, and an internal input stage than competitive products. The result pull-down resistor to simplify the use of tri-state input logic. The use of low-output is less board space and a lower bill of impedance drivers minimizes on-chip power dissipation while still supporting output materials cost. The device’s proprietary pull-up voltages up to 20 V. The devices feature low, 25 µA/channel supply current alignment guide optimizes inductive and outstanding ESD performance of 4 kV HBM, making them suitable for industrial coupling with the transmitter to maxi- applications. A feature of the ULN2003V12 and ULN2003F12 devices is that each mize coil-to-coil power efficiency. The output is connected in a common-cathode configuration via internal freewheeling 3 V to 7 V adjustable output voltage diodes to the COM pin. This provides an increased current sink capability by combin- range is capable of driving a variety of ing several adjacent channels in parallel. For example, under typical conditions the downstream power management ICs, ULN2003V12 can handle a 1 A load current when all seven channels are connected while proprietary foreign object detec- in parallel. Miniaturized packages help reduce board space requirements, with the tion (FOD) ensures safe operation in the ULN2003V12 available in SO-16 and TSSOP-16 packages, while the ULN2003F12 is presence of metal objects. offered in a U-DFN3030-10 package. IDT Diodes Incorporated www.idt.com www.diodes.com

Low power, USB Type-C charger Sine-wave, motor pre-driver ICs cut vibration and device reference designs and power consumption Lattice Semiconductor has used its programmable-device A series of eight single-phase BLDC motor pre-driver ICs is platform to create three low power, online solutions for USB intended for use in high-current cooling fan applications such Type-C that are intended to reduce development time/risk, as PC servers and home appliances, including fridges. The and expedite introduction of TC78B006 series reduces vibration USB Type-C implementation and noise by using a digital-control- in consumer and industrial type sine wave drive. Integrated pre- devices The three freely- drive circuitry enables the devices downloadable reference to drive external p-channel and designs that enable design- n-channel MOSFETs and minimises ers working in consumer, in- the number of external components dustrial and other sectors to needed to drive motors. A power saving standby function quickly implement the cable reduces power consumption by cutting power supply to the detect and power delivery functions required to unlock the Hall element magnetic sensor used to detect rotor position and new capabilities of Type-C including 100W power, 20Gbps rotation speed, whenever the motor is in standby mode. Within bandwidth, reversibility and flexibility. The three solutions the TC78B006 series, the TC78B006FNG, TC78B006AFNG, offered by Lattice address both Cable Detect (CD) and Power TC78B006FTG and TC78B006AFTG ICs feature PWM duty Delivery (PD) functions and deliver: input control, while the TC78B006BFNG, TC78B006CFNG, CD/PD targeting chargers; TC78B006BFTG and TC78B006CFTG offer analogue voltage CD/PD for devices such as , docks, dongles hand- input control. Rotation speed direction output is featured on the held industrial; FNG, BFNG, FTG and BFTG ICs, while the AFNG, CFNG, AFTG CD/PD-Phy for devices such as smart phones and tablets. and CFTG offer lock detection output. The entire TC78B006 se- The downloadable reference designs include: Schematic; ries has an operating voltage of 3.5 to 30V, quick start function, BOM; Pin-list; Bitstream; and Code to allow Policy Engine thermal shutdown, lock protection and auto-restart. There are customisation. The designs are based on Lattice’s iCE40 two package types: a 16pin SSOP measuring 5.5×6.4×1.6 mm, ultra-low power, miniature and low cost FPGA families. for the FNG, AFNG, BFNG and CFNG ICs or 16pin QFN, which Lattice Semiconductor measures 3×3×0.7 mm for the FTG, AFTG, BFTG and CFTG. S www.latticesemi.com Toshiba Electronics Europe www.toshiba.semicon-storage.com www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 39 FLEXIBLE ELECTRONICS

PCB origami

By Robert Huxel

esign of printed circuit boards for modern electronic the best-possible levels of integration. products is becoming ever-more complex. In the One area in which there has been considerable progress is electrical domain, clock speeds and signal frequencies the availability of outlines and mechanical (software) component continueD to climb; designers for whom a straightforward flow models. Manufacturers routinely offer such models along with of schematic capture, followed by place-and-route, would have the electrical parameters of their products; the major compo- been sufficient, now find themselves having to invoke sophis- nent distribution companies also maintain databases with this ticated signal integrity and simulation tools to ensure that their information. When this information arrives along with electrical project will function as they intend. In the mechanical domain, data, it makes complete sense to import it together with the matters are no less complex. Consumers have come to expect electrical information, into an environment that can make use of products that are, in each generation, smaller, and lighter than both attributes. their predecessors. The product designer has to fit increased An integrated package that “knows about” both the electri- functionality into less and less space – while maintaining manu- cal and mechanical environments can overcome these ob- facturability, and allowing for maintenance. stacles and give the entire team visibility of both electrical and mechanical domains, resulting in a product design that meets Between the two lies the interface between the electrical and design targets first time and that can progress from “virtual the mechanical spaces; in the past, this has often involved a space” to prototype and to production with no major re-de- hand-over from electrical/ signs. electronic CAD and CAE One company that is to 3D mechanical CAD meeting those challenges software. Worse, a single is Kaba, maker of access project can require multiple control systems. Recently file transfers from electri- Kaba has successfully cal to mechanical EDA/ completed the design of CAD, as issues are revealed a new generation of door and design revisions ap- locks, with electronic plied. Board layout (place controls that fit over 1000 and route) software places components into a door- components according to mounted casing. At Kaba, their footprint – essentially, Electronic Development a 2D view. A comprehensive Department Supervisor 3D description of all the Stefan Wyss, describes components – not just a how the company uses maximum-profile figure – is Full 3D image of the complete assembly showing the separate circuit Altium Designer not only needed to ensure that when for the functional design boards and flexible interconnects. the product is assembled, of the circuitry, but also to there are no parts that touch or interfere with any others. develop and refine the mechanical configuration and assembly A full path from initial concept to confidence in the physi- processes of its products. cal layout – that the design fits together, and that there are no One of the assemblies that Kaba has developed with Altium components that unexpectedly clash or overlap when translated Designer comprises three separate circuit boards, interconnect- from the virtual to the real environment – has existed for some ed by flexible PCBs that fold in two separate directions in order time. However, it has not always been particularly user-friendly. to fit into the barrel of one of the company’s locking products. There is the necessity to export and import files in a suitably- In a single design environment, Stefan, and the members of readable form, between packages; this usually also involves his team, can not only move from the electrical design of the transferring the project to an engineer with mechanical-CAD flex-rigid construction, into the mechanical, but can quickly see experience. But the impediments go beyond that; for example, a full 3D image of the complete assembly that can be freely there is the need to source good physical models of compo- rotated in space to view it from any direction. nents to generate an accurate 3D view of a PCB. In contrast to shifting into a 3D mechanical CAD package to In the past, the path of least resistance has been to build view geometry – or of exporting data to yet another package in early prototypes of both PCB and housings and to manually the form of a file viewer - 3D exploration in Altium Designer is confirm (or otherwise) that one fits within the other and that no achieved simply with a change of viewing mode. A 3D ortho- collisions occur. Among the downsides to this approach are that graphic projection reveals hidden components, with precise re-spins of either PCB or case, or both, are very likely, at con- dimensions and positions, in a totally realistic view. Addition- siderable cost – time as well as money. Or, to avoid that hazard, ally, Kaba’s engineers make use of Altium Designer’s facility to designers build in margins – based on little more than experi- animate the process of folding the PCBs into their final configu- ence or intuition – that result in a design which does not achieve rations. Because the software “understands” the mechanical parameters of the flexible connections, the animated view is Robert Huxel is Technical Marketing Manager for also a completely realistic view of how the folding process will Altium Europe GmbH - www.altium.com proceed. Kaba can verify clearances and eliminate the possibil-

40 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com A8E_EE-Times-Eur_2-375x10-875_A8.qxd 1/26/15 10

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Audio Transformers Assembling the actual Kaba door locks with integrated electronics. Impedance Levels 10 ohms to 250k ohms, Power Levels to 3 Watts, Frequency Response ity of conflicts, even while the assembly is being folded. ±3db 20Hz to 250Hz. All units manufactured and tested to MIL-PRF-27. QPL Units available. Stefan Wyss confirms, “One of Altium Designer’s latest features is the rigid-flex technology: the flex technology allows us to show the radius of a bended board in Power & EMI Inductors 3D. We can also recognise collisions between board and housing parts in the early Ideal for Noise, Spike and Power Filtering development stages in order to estimate if the flex connectors of the actual product Applications in Power Supplies, DC-DC Converters and Switching Regulators are going to be reliable or not.” Flex-rigid construction can be adopted for a number of reasons. A product can Pulse Transformers have parts or sections that are required to move repeatedly, while maintaining electri- 10 Nanoseconds to 100 Microseconds. ET Rating to 150 Volt Microsecond, Manufactured cal connections between them. Alternatively, there may be no movement involved and tested to MIL-PRF-21038. after final assembly, but separate circuit blocks may be positioned with different orientations in a complex housing, where there is insufficient flat surface area to Multiplex Data Bus locate a single, conventional PCB. A variant of this is where the final arrangement of Pulse Transformers Plug-In units meet the requirements PCBs is so space-constrained that the best way of completing its assembly is to fold of QPL-MIL-PRF 21038/27. it up. Flex-rigid PCBs offer an elegant solution that can be more reliable than connec- Surface units are electrical equivalents of QPL-MIL-PRF 21038/27. tors and wiring looms, take up less space and deliver more predictable interconnect performance. DC-DC Converter Designing such interconnects as part of a single board demands extensive know- Transformers ledge of how the “flex” part of the PCB behaves; what bend radius it can accept, how Input voltages of 5V, 12V, 24V And 48V. Standard Output Voltages to 300V (Special it terminates, how much space must be allowed for strain relief, and for the changing voltages can be supplied). Can be used as self geometry of the flex itself, as it moves. Conventionally, this has been handled by a saturating or linear switching applications. All units manufactured and tested to MIL-PRF-27. mechanical engineer, skilled in the use of a general-purpose 3D CAD package – or, perhaps more often, by an experienced engineer drawing on his or her knowledge of 400Hz/800Hz how such interconnects behave. With Altium Designer, all of the behaviour of flex-rigid Power Transformers constructions is handled within a single design environment, all the way from defining 0.4 Watts to 150 Watts. Secondary Voltages 5V to 300V. Units manufactured to MIL-PRF-27 Grade 5, the copper pattern and the layer structure (with total integration to the netlist informa- Class S (Class V, 1550C available). tion in the electrical design context) through to reserving 3D space in the product’s enclosure for any repetitive flexing. to one week Delivery-Stock Kaba was also able to exploit a further feature for 21st-century prototyping: 3D quantities printing. Altium Designer can output print files that will quickly generate (non-functio- for sample nal!) space models on a 3D printer. Even when the design files and on-screen displays have verified that all necessary clearances are met, having a physical model avail- able at very low cost that precisely mimics the final PCB assembly/enclosure – and that can be handled and evaluated for ergonomics – adds a further dimension to the PICO Electronics, Inc. 143 Sparks Ave. Pelham, N.Y. 10803 design process. E Mail: [email protected] With growing confidence in the combined electrical/mechanical virtual representa- www.picoelectronics.com tion, can come further benefits to the design process and in particular, to the all- Pico Representatives important design cycle time and time-to-market. Traditionally, there have been several Germany ELBV/Electronische Bauelemente Vertrieb points in the evolution of a product when a physical model has had to be produced E mail: [email protected] (working or otherwise): At the product concept stage to convince management or a Phone: 0049 (0)89 4602852 client to proceed; or at major design revisions and reviews. The time taken to produce Fax: 0049 (0)89 46205442 England a work-in-progress prototype – or even a space model – is time that could be spent Ginsbury Electronics Ltd. progressing the design. With the certainty that what the software shows in a 3D view E-mail: [email protected] Phone: 0044 1634 298900 will be accurately reproduced in physical and functional terms, that time can be saved Fax: 0044 1634 290904 or greatly reduced. www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 41 FLEXIBLE ELECTRONICS

Flexible organic circuit makes fever alarm

By Peter Clarke

esearchers from the University corporates organic components of Tokyo have developed a fever that can be inkjet printed on a alarm armband, a flexible, self- polymer film. poweredR wearable device that includes The fever alarm armband a temperature sensor and sounds an includes the first organic circuit alarm in case of high body temperature. able to produce an audible out- The armband, developed by research put, and the first to incorporate groups lead by Professor Takayasu an organic power supply circuit, Sakurai at the Institute of Industrial the researchers claim. The Science and Professor Takao Someya thermal sensor detects when the at the Graduate School of Engineering, temperature reaches a pre-set combines a flexible amorphous silicon value in the range 36.5 to 38.5 solar panel, a piezoelectric speaker, degrees C. temperature sensor, and a power supply “Our fever alarm armband circuit created with organic components demonstrates that it is possible in a single flexible, wearable package. to produce flexible, disposable The organics circuits are based on devices that can greatly en- CMOS FETs that operate at 12V. The hance the amount of information armband is for the monitoring of health available to carers in health- indicators, such as heart rate and body care settings,” says Professor temperature, in infants and the el- Someya. “We have demon- derly and in patient care. Such sensors The armband is 30 cm long and 18 cm wide, and can strated the technology with a need to be light, flexible and wireless be worn either directly on the skin or on top of clothing. temperature sensor and fever for patient comfort and low-cost so The device is designed so that the thermal sensor is alarm, but the system could also they can be disposable for reasons of be adapted to provide audible located between the arm and the body. The organic hygiene. Conventional sensors on rigid feedback on body temperature, power supply circuit is located under the piezo film printed circuit boards do not meet those or combined with other sensors objectives the researchers said. The speaker to reduce surface area. Source: 2015 Sakurai to register wetness, pressure or University of Tokyo’s flexible solution in- Lab/Someya Lab. heart rate.” Printed OLEDs make large advertising more communicative

By Julien Happich he VTT Technical Research Centre of Finland is now able of an LED’s luminosity, but is has one advantage: OLED emits to print large Organic Light-Emitting Diodes (OLEDs) to light throughout its entire surface, whereas LED is a spotlight create patterned and flexible light-emitting surfaces on technology. advertisingT displays, info signs and lighting fixtures, using con- Today, VTT’s plastic OLED film will only emit light for around ventional screen printing techniques. a year, since light-emitting polymer Placed between two electrodes, one materials are susceptible to oxygen and of which is transparent, the organic light- moisture. In the future, the film’s lifespan emitting semiconductor produces light is expected to increase as better screen as electric current is conducted through protectors and oxygen barriers are devel- the component. The 0.2mm thin stack of oped. electrodes and polymer layers can now be “The plastic film is optimally suited to printed not only onto glass or steel sur- advertising campaigns, in which large faces but also onto flexible plastic films, light-emitting surfaces can be used to enabling significantly larger light surfaces draw significantly more attention than can and expanding the usage possibilities of the A large-surface light-emitting plastic film be gained through mere printed graphics technology. developed by VTT is based on OLED or e--type black-and-white displays This type of light-emitting plastic film and that do not emit light,” said Head of technology. (Photo: Juha Sarkkinen). processing in ambient atmosphere had not Research Area Raimo Korhonen from VTT. been created before on this scale, according to the research The OLED light could not only be used for advertising or center. Production of such electroluminescent surfaces could signalling, it could also be operated as a wireless communica- now be done in facilities such as traditional printing houses. tion link, subrepticely pushing data to IoT applications on top of The luminosity of OLED (lm/W) amounts up to around one third its visible message.

42 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com More IP blocks in line for plastic electronics By Julien Happich DC-DC Converters lthough PragmatIC Printing’s CEO Scott White would not reveal to what extent ARM Holdings invested in his company (which was initially funded by the Transformers & company’s management together with private investors), the extra £5.4 million Afunding round led by Cambridge Innovation Capital (CIC) and other existing share- holders does not give any exclusive control to ARM. Inductors “It is simply a way for ARM to steer some of our activities and give some meaning- DC-DC Converters ful and useful input to 2V to 10,000 VDC Outputs the business, helping guide what we do”. 1-300 Watt Modules When asked if ARM • MIL/COTS/Industrial Models could come up with • Regulated/Isolated/Adjustable Programmable Standard Models specific IP to leverage • New High Input Voltages to 900VDC PragmatIC Printing’s • AS9100C Facility/US Manufactured process design rules • Military Upgrades and for flexible electronics, Custom Modules White didn’t want to speculate. Transformers “We are broade- Paper-thin electronics becoming reality (L-R) Victor ning our circuit design & Inductors activities on several Christou, Senior Investment Director of Cambridge fronts, from re-using Innovation Capital and Scott White, Chief Executive Officer Surface Mount & Thru Hole standard circuit archi- at PragmatIC. • Ultra Miniature Designs tectures to developing new functionalities and architectures that are a better fit for the • MIL-PRF 27/MIL-PRF 21308 type of applications envisaged with our customers.” • DSCC Approved Manufacturing The funds will help the company ramp up its production capacity from a few million • Audio/Pulse/Power/EMI printed circuits units today to a hundred million flexible integrated circuits later this Multiplex Models Available year (each circuit typically consisting of a few hundred gates). • For Critical Applications/Pico Modules, Over 45 Years’ Experience “We are aiming at a ten-fold capacity expansion. The market for flexible electronics is still developing and could represent a few tens of millions units for us in the near For full characteristics of these and the future, but building a higher capacity is also about building more confidence, so we entire PICO product line, see PICO’s can go where our customers may want to go in terms of volumes”, said white. Full line catalog at For PragmatIC Printing, the higher throughput will also mean faster design itera- www.picoelectronics.com tions and shrinking delivery times for new circuits, with the ability to run a mix of designs concurrently, fulfilling customer orders while still being able to fine tune its processes and characterize new circuit blocks. PICO ELECTRONICS, Inc. “Currently, the feature size of the transistors we pattern on flexible substrates (on a 143 Sparks Ave., Pelham, New York 10803 sheet-basis) is in the single-digit micrometre range”, told us White, “but we know that Call Toll Free 800-431-1064 both our process and materials could work at much smaller scales, we have proven FAX 914-738-8225 workable design rules down to 50nm and we have our own version of Moore’s law E Mail: [email protected] already mapped out” he added. “In fact, we expect our design rules to shrink much faster than Moore’s law”. Pico Representatives “Commercially, we are today at a stage comparable to what semiconductor com- Germany panies were doing in the 80s and 90s, with some of our designs packing well over ELBV/Electra Bauemente Vertrieb 10,000 transistors, in fact well beyond anything else we’ve seen so far in the plastic E mail: [email protected] Phone: 49 089 460205442 electronics industry or even in academia” boasted White. Fax: 49 089 460205442 The CEO would not reveal the footprint of such designs, “It will become clearer as England we announce both products and commercial engagements later this year” he con- Ginsbury Electronics Ltd E-mail: [email protected] cluded. Phone: 44 163 429800 What is also clear is that both ARM and PragmatIC Printing see low-cost plastic Fax: 44 163 4290904 electronics fill a chunk of the wearable and IoT bubble.

www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 43 FLEXIBLE ELECTRONICS

IoT speeds printed electronics development

By Christoph Hammerschmidt fter years of pre-announcements and technology studies, organic electronics is about to arrive in the world of com- mercial production. At the LOPEC congress and trade Afair, visitors could have a close look at products and production machinery. One of the accelerators might be the reason that its creators now blend it with conventional silicon technologies. A small card of paper the size of a business card, the writing on it shines in a bright turquoise as soon as it is connected to a battery. No, this is not an OLED, it is an electroluminescence display, applied to the paper in a printing process and manufac- tured on the Demo Line, the demonstration production line at the exhibition. Though small, this electroluminescence display is illuminating the progress that has been achieved in organic and printed electronics in the recent past. Organic electronics are a growth industry. The Organic and Printed Electronics Association (OE-A) expects sales with ma- chinery and products to grow another 11 percent in 2015; the prediction is based on a poll among its 3100 member compa- nies primarily in Europe but also in Asia and North America. Flashing business cards become possible with printed electroluminescence displays, manufactured on the LOPEC And the products generated with organic and metallic inks demo line in a near-industrial process. are gaining more usefulness. Examples could be viewed at the OE-A product and demonstrator contest whose results have In future vehicle generations, more organic devices will be been awarded a prize at LOPEC which took place in the first seen, explained Kai Hohmann, Technical Expert Automotive week of March in Munich. Among the contenders was Belgian Displays for automotive supplier Continental. According to company Quad Industries. Its temperature sensing labels can Hohmann, curved OLED displays as well as curved sensor sur- be attached to the packaging of perishable food or drugs and faces will be the next printed devices users will see in vehicles. monitor the chill chain during the transport. The stored tempera- “OLEDs are very important elements for car interiors”, Hohmann ture data can be read out through an NFC reader. These labels said. “We are already in the prototyping phase”. are at the same time an example that manufacturers of organic The industry however admits that the physical performance / printed electronics have cast off their earlier shyness and now does not yet meet the goals. “Performance remains a chal- combine conventional electronic circuits with printed elements. lenge”, said Stephan Kirchmeyer from technology and equip- In the case of the temperature sensor, the batter- ies and antennas are created in a printing process while the data storage and NFC functionality has been implemented in a classic silicon chip. Such hybrid products are believed to be an important trend for printed electronics technology. What’s more, NFC functionality integrated in product labels enables vendors to establish an online connection between the products and the user’s smartphone and thus address the consumer directly. Products thus become integrat- ed into the Internet of Things.

During a panel discussion at the exhibition, it be- came apparent that yesterday’s future trends in printed electronics are today’s applications. In particular in the automotive industry, printed electronics have made their way into real-world production. “We already see the first printed devices in cars”, said Wolfgang Mildner, General Chair of the LOPEC. Examples are This electronic label, developed by Norwegian company Thin Film antennas in the interior and heating inlays for seats. “These applications are not overly sophisticated but Electronics, has NFC functionality. It opens a broad range of application the products are already meeting the quality standards options, from brand protection to directly addressing the customer with - and they are cost-savers.” advertising messages.

44 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com ment vendor Heraeus. One of the reasons might be Printing equipment and the fact that this technology yet has to develop an organic electronics technology n-semiconductor. company Novacentrix showed Thus, transistors comparable to conventional what perhaps will become a ones with their pnp or npn layer sequence are fashion trend in the coming not (yet) possible. Another problem is the lack of years: T-shirts with integrated standardisation. “We are aware of this challenge”, electric conductors and LEDs. Mildner said. Upon initiative from Asian market participants, a standardisation process has been launched. “The process is on its way.” Despite the lack of a p-semiconducting material, the industry has seen progress in the field of materials over the past couple of years. For instance, metallic inks increas- ingly are complementing the spectrum or organic materials. Cynora GmbH was dis- playing its emitter materials and OLED demonstrators. The company, based in Bruch- sal (Germany) is said to be pioneer in materials that make expensive and exotic metals like platinum and iridium redundant and enable cost-effective printing processes.

Stick a PUF to your hardware The Fraunhofer Institute for Applied and Integrated Security (AISEC) is developing a very versatile and flexible form of Physically Unclonable Function (PUF), one that can wrap an entire circuit board to secure it from physical attacks. The foil-based solution consists of patterned metal electrodes embedded into a polymer film with a self-adhesive backing. The electrodes are connected to the board to be protected and special read-out soft- ware IP running on the board’s controller can extract the PUF from the film as it has been wrapped around or stuck to the board. Try to remove the PUF sticker, stretch it, pinch it to probe through it, scratch it or unseal it and the PUF will be altered. By detecting that change, the circuit board will be able to take any -measure it will have been programmed for, for example sending an alert message and disabling itself at run-time, or wiping out all of its embedded software. Showing a demo at Embedded World, Fraunhofer AISEC’s head researcher on the so-called PEP project (Protecting Electronic Prod- ucts, maybe with a pun intended on Polyethylene Plastics), Sven Plaga didn’t want to say too much about the internals of the film. “Now we are exploring electrode patterns of different shapes and complexities as well as correction algorithms to ensure the PUF’s stability over time and across different temperatures as the film could shrink or expand”. For the researchers, it is all about finding the right trade-off between PUF complexity and stability, but they are investigating different sizes and they expect the PUF foil to be produced cheaply in a roll-to-roll printing process. “The advantage over silicon-based PUFs is that one foil could protect an entire board or system, it is also much cheaper and simpler to implement”, he added, saying such a PUF sticker may be commercialized within the next two to three years. Like at the booth demonstration, the foil could even extend outside an electronic enclosure or be part of a seal to detect its opening. In that case the plastic PUF provides not only a unique key for securing on-board communications, it can also serve for early external tamper detec- tion (maybe to launch different and more subtle pre-programmed routines based on its status, such as fake board operation).

Add capacitive touch to a panel with a flexible, rollable film Zytronic has applied its projected capacitive touch sensing technology to the form factor of a rollable and extremely flexible touch film – complementing its range of glass touch sensors. The flexible film uses the company’s Multi-touch Projected Capacitive Technology (MPCT), and is aimed at retail and other digital signage applications that require large, eye-catching interactive displays. The film gives designers the option of creating their own touch screen displays by laminating the film on to the rear of a transparent substrate – such as a shop window – and combining it with a projector or LCD. Available in sizes up to 85 inches (2.15m), the polyester touch foils can be deployed in semi-permanent and permanent appli- cations when correctly laminated to a suitable substrate. Used in conjunction with Zytronic’s ZXY200 and ZXY300 multi-touch controllers, the touch foils are capable of detecting up to 40 simultaneous touch points through glass thicknesses of 10 mm. This results in a cost effective interactive solution with, the company says, class-leading touch performance. The thinner construction of the new ZYFILM touch foils mean that they can be packed in tubes when shipped in small quantities – minimising transportation costs. When mounted on the rear surface of a protective substrate, the projected capacitive sensor is well protected and resilient to public use. This, coupled with its one time calibration and absence of drift, translates into high levels of reliability. Zytronic www.zytronic.co.uk

www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 45 Reader Offer Pressure sensor measures height to +/-5cm 5 RIoTboards for your Infineon Technologies AG, has launched a MEMS (Micro Electro connected applications Mechanical Systems) pressure sensor for use in mobile and wearable gadgets and IoT (Internet of Things) devices. The Following up on its previous reader offer, DPS310 is a barometric pressure sensor that can measure Freescale is now giving away five RIoTboards, worth $74 relative vertical each, for EETimes Europe’s readers to win. position to Designed to run Android operating systems efficiently or to within +/-5cm run under Linux, the board is based on the Freescale i.MX and thereby 6Solo processor; us- enables ing the ARM Cortex- enhanced A9 architecture. navigation, location, well- The RIoTboard being, gesture platform also in- recognition cludes a rich set of and weather peripherals includ- monitoring ap- ing a 10M/100M/Gb plications. The Ethernet port, 1 USB ability to calculate elevation gain and vertical speed suits activ- 2.0 OTG High Speed and 4 USB 2.0 High Speed 2.0 Hosts, ity tracking in mobile and wearable health and sports gadgets, LVDS, HDMI and Parallel RGB interfaces, micro TF and while ultra-precise pressure measurement opens up new possi- SD card interfaces, analog headphone/microphone jacks, bilities for gesture recognition and the detection of rapid weath- camera interface, serial ports, JTAG and boot configuration er changes. The Infineon DPS310 pressure sensor is based on interfaces. the capacitive sensing principle rather than the piezo-electric principle employed in most other digital pressure sensors. This This together with a low power consumption makes it fit for guarantees high precision across a broad range of temperatures the design of IoT data hubs. The BOM-optimized platform even when temperature changes rapidly. The DPS310 operates includes not only the Freescale i.MX 6Solo processor run- at a supply voltage of 1.7V to 3.6V and icomes in a package ning at speeds up to 1GHz, but also the Freescale Kinetis measuring 2.0mm by 2.5mm by 1.0mm. Current consumption K20 MCU, the Freescale MMPF0100Power management is 3-microamps at one measurement per second, falling to just integrated chip, 1GByte of 32-bit wide DDR3 at 800MHz less than 1-microamp in standby mode. An integrated FIFO that and a 4GB eMMC. stores the last 32 measurements helps to further reduce overall Freescale system power consumption by extending the time that a host www.freescale.com processor can remain in sleep mode between sensor readouts. The DPS310 measures pressures from 300hPa to 1200hPa and Check the reader offer online at at temperatures from -40°C to 85°C. Infineon Technologies AG www.electronics-eetimes.com www.infineon.com

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46 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com Altera Ships 20nm SoCs 250°C silicon capacitor lines Altera Corporation is now shipping its second-generation SoC take 11V to 450V family, the Arria 10 SoCs combining ARM processors with 3D silicon passive components provider IPDiA has launched a 20nm FPGA fabric. The Arria 10 SoCs are fully software the ETSC (200°C) and EXSC (250°C) silicon capacitor ranges compatible with Altera’s previous 28nm SoC product family to expand its product offering to higher voltage MCM ap- for seamless software migration plications. In modern high tempera- between generations. The SoCs ture electronics, where equipment is provide up to 50 percent higher becoming extremely expensive and performance and up to 40 percent where cost of operation is a key driv- lower power than the company’s er, everyone is looking for a “must not previous generation. Altera’s fail” capacitor, offering high reliability SoC portfolio also includes a (no early failures, low FIT) and a long 3rd-generation 14 nm Stratix 10 operating lifetime, even at 250°C. SoC with a 64-bit quad-core ARM To cope with the increasing lifetime requirements, MLCC Cortex-A53 processor for embed- technologies involve very high de-ratings, leaving no room ded developers that demand the highest performance and for miniaturization. Furthermore, these large devices generate power efficiency. Altera SoC FPGAs enable smarter embedded extra failures due to ceramic cracks during assembly (unpre- systems by enabling single-chip product differentiation in both dictable early failures). Compared with MLCC, IPDiA MOS hardware and software. Combining ARM processors with FPGA technology offers a fully modelled reliability model, which fabric provides greater system value through reductions in makes the reliability predictable during the lifetime of the ap- power, costs and board space. Arria 10 SoCs are optimized to plication. For example, when best in class MLCC offers max deliver the performance, power, security and cost requirements 1000 hours at 250°C, IPDiA Xtreme capacitor range can offer for next-generation embedded applications within wireless up to 84 000 hours under the same conditions. Furthermore, infrastructure, wireline communications, computer and storage, electrical tests at end of production avoid all early failures, and broadcast equipment. Arria 10 SoC samples are currently hence offering a unique reliability capacitor throughout the shipping to select early access customers. Customers can lifetime of the application at high temperature. The IPDiA begin their Arria 10 SoC designs by using Quartus II software Xtreme temperature 3D structure offers a unique density of and the Altera SoC Embedded Design Suite featuring the ARM 250 nF/mm², with values from 10pF up to 4.7µF. IPDiA 250°C Development Studio (DS-5™) Altera Edition toolkit. SiCaps can achieve 100 nF in a 0402 package, when 10x10 Altera nF capacitors in 0603 mounted in parallel are required with a www.altera.com Type I dielectric such as NPO. IPDiA InvenSense upgrades six-axis www.ipdia.com sensor motion processor OmniVision shrinks image sensor pixel Fabless MEMS firm InvenSense Inc. has announced it will soon introduce a six-axis component that combines sen- to 1-micron sor, digital processor and software for activity classification, The OV16880 is a 16-megapixel CMOS image sensor from gesture detection, pedometer function and run-time calibra- OmniVision Technologies Inc. with a pixel size of 1-micron. The tion. InvenSense (San Jose, Calif.) claimed that the use of its sensor uses PureCel-S stacked die technology and supports digital motion processor (DMP) and proprietary algorithms phase detection autofocus (PDAP). The OV16880 captures 4672 results in a power saving of up to 50 percent compared with by 3504 resolution images at 30 frames per second (FPS), thus competition. As a result, with a 300mAH battery, the ICM- allowing burst photography and zero shutter lag at full resolu- 20648 could run a classifier for up to two months and pe- tion. Additionally, the sensor is capable of capturing 4K video dometer for up to four months. The InvenSense ICM-20648’s at 30 FPS, 1080p video at 90 FPS, and 720p video at 120 FPS. embedded motion hub solution is designed to offload the The OV16880 supports interlaced high dynamic range (iHDR) protocol processing and event filtering necessary to provide timing functionality to further ensure high quality image and “always on” contextual awareness. The ICM-20648 SoC has video capture under varying lighting conditions. The OV16880 been designed to meet the Android Compatibility Test Suite fits into a 8.5mm by 8.5mm module with a z-height of less than (CTS) sensor requirements for power, performance, and tim- 5mm. The sensor is currently available for sampling, and is ing accuracy in Android 5.0. “Included in the new ICM-20648 expected to enter volume production in 3Q15. “Industry observ- is InvenSense’s advanced FSYNC solution, which improves ers expect the 1/3-inch image sensor market for 13-megapixel image stabilization, measuring true movement of the camera to 16-megapixel resolution segments to double within the next and enables hardwarebased timing alignment of imaging and two years, driven mostly by the proliferation of higher resolu- motion subsystems to synchronize timing such that motion tion mainstream smartphones and tablets,” said Kalai Chin- compensation of the image is more accurate, reducing the naveerappan, senior product marketing manager at OmniVision, software complexity for the OEM, and generating a bet- in a statement. “The OV16880 is the industry’s first 1/3-inch ter imaging experience for the end user,” said Ali Foughi, 16-megapixel image sensor, putting it in the forefront of this vice president of marketing and business development at high-growth market segment. The sensor enables slim devices InvenSense, in a statement. to transition from a 13-megapixel to 16-megapixel camera while InvenSense Inc. maintaining excellent image quality and pixel performance.” www.invensense.com OmniVision www.ovt.com www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 47 Sensirion debuts multi-pixel gas sensor Eight-channel, pin-by-pin-configurable, Sensor vendor Sensirion AG is set to debut its multi-pixel gas data converter adds design flexibility sensor at the 2015 Mobile World Congress in Barcelona, Spain. Configurable as any combination of 12-bit ADC, 12-bit DAC The company announced it had developed a multi-gas sensor or GPIO, this ADC/DAC/GPIO combination IC gives desi- that it was planning to sell to smartphone makers back in No- gners great flexibility to meet their system monitoring and vember 2013 (Sensirion preps control needs: Analog Devices’ eight- multi-gas sensor ‘nose’ for channel data converter combination, smartphones). The company “unlocks new levels of design freedom will also show a barometric in a tiny package”. The 12-bit, 8-chan- pressure sensor suitable for nel ADC/DAC/GPIO combination chip use for indoor navigation ap- is user-configurable in any functional combination; AD5592R plications. Sensirion (Staefa, includes a 400-ksample/sec ADC, 6-μsec settling time DAC, Switzerland) has focused digital inputs/outputs, and a reference, on a single chip. The on humidity and temperature sensors but is now expanding its device can be user-configured in any combination of up to range of environmental sensors to include gas and pressure eight devices, allowing designers to use a single IC to com- sensors. The gas sensor is the first in the world to be based on plete multiple system monitoring and control functions. The multiple gas-detecting pixels. This allows the sensor to perceive combination of on-chip features allows system designers to its surroundings using various receptors that using pattern reduce bill of materials costs and increase design portability recognition is able to interpret different concentrations on dif- and reuse with only minor software changes. The single-chip ferent sensors in terms of type and concentration of a wide AD5592R saves up to 85% of the space required by discrete range of gases. The sensor is housed in a package measuring implementations by using a small 2 × 2-mm WLCSP pack- 2.45mm by 2.45mm by 0.75mm. This will enable mobile devices age. The small package suits the device for high-density and to sense their surroundings in a way that was never possible space-constrained applications such as wired and wireless before, for example in order to measure indoor air quality, communications, building control or any general monitoring determine the alcohol content of a person’s breath, or recognize or control application where size and design flexibility are key smells. Together with the gas sensor, Sensirion is also unveiling requirements. The new device not only simplifies system ar- a barometric pressure sensor capable of detecting altitude dif- chitectures but enables greater system functionality through ferences of as little as ±1 Pa, equivalent to the height of a single extra control and monitoring capabilities. step on a stairway. This sensor measures 1.4x1.0x0.6mm. Analog Devices Sensirion AG www.analog.com www.sensirion.com

800 MHz universal quad clock Four-channel video encoder addresses for complex timing solutions parking assist systems XR81411 is a quad output, high frequency LVCMOS/LVDS/ High integration at the chip level, combined with excellent video LVPECL configurable clock synthesiser that generates any quality is what Intersil is offering with its TW9984 four-channel frequency in the range of 10 MHz to 800 MHz with four analog video encoder for surround-view parking assist and independent PLLs, using a flexible backup camera applica- delta-sigma modulator and a wide tions. With its high integra- ranging VCO. The clock outputs have tion, the chip replaces up to very low phase noise jitter of sub 0.2 nine separate components. psec while the part uses extremely The device integrates four low power. The chip can be used with analog video decoders a standard crystal or an external system clock and each (NTSC / PAL standards) with 10-bit analog-to-digital convert- independent output can be configured to select from four dif- ers (ADCs) to support four analog camera inputs simultane- ferent frequency multiplier settings to support a wide variety ously. The on-chip analog video encoder provides the ability of applications. Each clock synthesiser includes an integer/ to transmit the combined video as a standard analog compos- fractional divider allowing output frequency resolution of less ite signal to the head unit display. The automotive-qualified than 2 Hz intervals. “The XR81411 extends our universal TW9984 also incorporates analog anti-aliasing filters on each clock family to multioutput solutions for various end applica- channel input to further reduce component count. The high level tions,” said James Lougheed, vice president, component of integration helps to simplify the system design and minimize products. “The ability to independently configure each output the solution footprint to preserve critical board space. With a as LVCMOS, LVDS or LVPECL at any frequency makes this power consumption of about 100 mW per channel, the TW9984 an ideal solution for switches/routers, AV timing and FPGA consumes some 20 percent less than comparable solutions. clocking.” Crystal input frequency is 10 MHz to 60 MHz, par- Supporting the 108MHz time-multiplexed ITU-R BT.656 format allel resonant crystal. Output frequency range covers 10 MHz allows the chip to output four channels over a single 8-bit data to 800 MHz, while the VCO range is 2 GHz to 3 GHz. The bus. Besides the four decoders, the TW9984 also integrates chip has configurable outputs either as a differential LVPECL/ an analog video encoder to re-encode the video signal to the LVDS pair or as a single-ended LVCMOS. CVBS format. The TW9984 four-channel analog video decoder Exar and encoder is available now in a 10x10mm, WQFN package. www.exar.com Intersil www.intersil.com

48 Electronic Engineering Times Europe March 2015 www.electronics-eetimes.com Acal BFi to supply Bosch’s combo sensors IoT development board is Sigfox-ready Acal BFi now distributes the BME280 integrated environmental Arrow Electronics has announced the introduction of an unit from Bosch Sensortec to the European market. Combining Internet of Things (IoT) development board that offers a wide three sensors in one miniature package – humidity, pressure and range of sensor and communication interfaces while sup- temperature, this unique sensor has a best-in-class response porting simple, low power, low cost connection to the Cloud. time of less than a second for humidity de- Based on the popular Arduino termination, excellent ambient temperature form factor, the board includes measurement and low energy consumption. A a Telit SIGFOX module and GPS precise altitude measurement function makes with embedded antenna for this sensor a perfect match for applications localization. It also leverages such as indoor navigation with floor tracking, Telit’s M2M device management where exceptional accuracy, low tempera- software to facilitate quick and ture drift and high resolution are required. efficient connection of devices Designed specifically for mobile and battery powered applica- to the Cloud. Sigfox uses a UNB (Ultra Narrow Band) based tions where space is limited and low power consumption is key, radio technology to connect devices to a global network. the BME280 has a small footprint of just 2.5x2.5x0.93mm in a UNB requires very low energy usage and UNB devices oper- space-saving 8-pin LGA package, and a current consumption ate within globally available ISM bands. of only 3.6 µA at 1HZ, and 0.1uA in sleep mode. Arrow Electronics Acal BFi www.arrow.com www.acalbfi.com MSC Technologies to distribute Silica adds Huawei wireless modules Panasonic’s WLAN-Modules to M2M/IoT programme MSC Technologies, a business group of Avnet Electronics Silica has announced a franchise agreement with Huawei; Silica Marketing EMEA, is one of the first European Panasonic is marketing multi-standard 3G and 4G wireless modules in Distributor to introduce the company‘s PAN90x Series of a number of form factors, including LGA, PCIe and PCI-SIG Wi-Fi modules based on M.2. Based on Huawei HiSilicon Marvell chipsets. At the in- chipset technology, the new troduction of this new WLAN modules offer features specific module family, two modules for M2M communication. Silica are offered, PAN90x0 Series provides in-depth technical sup- supporting only the 2,4 GHz port including software support Wi-Fi and a second PAN90x5 for Huawei modules for their ArchiTech evaluation boards. Silica Series supporting 2.4 GHz WLAN/BT combo module. Both has indicated that it intends to offer a full range of M2M and IoT- modules support 802.11 b/g/n while the combo module can oriented connectivity products, including sourcing cost-effective be used with Bluetooth v4.0 Smart Ready in addition. air-interface tariffs and connective options that will ensure that MSC Technologies wireless data links can be maintained in all circumstances. www.msc-technologies.eu Silica www.silica.com Mouser and TI to sponsor 4-core Haswell-cpu runs Innovation Challenge Design Contest 3HE-PXI controller module For the third year in a row, Distributor Mouser Electronics spon- Distributor Acceed (Germany) has Adlink’s PXIe-3985 sors Texas Instruments’ Innovation Challenge European Design controller, which is based around an Intel i7-4700EQ 2.4 Contest, designed to encourage engineering students to submit GHz quad core processor with up to 16GB DDR3L memory design projects that utilize TI technol- operating at 1600 MHz. This high ogy. Prizes will be awarded to the best performance controller is suitable for entries as determined by the judges. demanding of tasks in multitasking The contest is open to individuals and environments with several simultane- teams of up to five undergraduate ous and independent measurement and graduate students all accredited or testing tasks. Developed for use in universities in Europe, the Middle East hybrid PXIe-based test systems, this and Africa. To compete, students must use two or more TI 3HE controller can be booted in single core mode with turbo analogue ICs and a TI Processor in their student design project. boost up to 3.4 GHz. If the system is configured accordingly, Mouser is also sponsoring the North American competition: data throughput of up to 8 GB/sec is possible. It has two see http://www.mouser.com/ti-innovation-challenge-2014. The USB 3.0 ports, two Gigabit Ethernet ports (one for LAN and European contest already is under way: deadline for registration the other for controlling LXI measurement instruments), two is 11:59 p.m. on February 28, 2015. monitor connections and an integrated GBIP controller. Mouser Electronics Acceed http://uk.mouser.com www.acceed.com

www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 49

PUBLISHER André Rousselot Save me from overbearing +32 27400053 [email protected]

Editor-in-Chief IoT analytics Julien Happich +33 169819476 By Peter Clarke [email protected]

EDITORS ill Internet of Things analytics Christoph Hammerschmidt drive us all to drink? +49 8944450209 Almost everything we do of [email protected] significanceW is becoming electronically Peter Clarke enabled and recorded. And with the +44 776 786 55 93 advent of the Internet of Things that is [email protected] trickling down to even the most basic Paul Buckley things — like opening a bottle. +44 1962866460 A printed tag on a bottle that can be [email protected] read wirelessly to check whether the Jean-Pierre Joosting bottle is sealed or opened, its position in +44 7800548133 the supply chain and pass the informa- [email protected] tion up to the cloud: is this technology looking for a problem to solve? Circulation & Finance I am sure there are legitimate cost- Luc Desimpel and energy-saving applications for such [email protected] technology. But the most excited praise Thinfilm’s OpenSense tag Advertising Production & from the company developing the tech- implementation. Reprints nology, Thin Film Electronics ASA (Oslo, Lydia Gijsegom Norway), is reserved for the idea that will be in the data that is analyzed and [email protected] early customer Diageo plc, the vendor of acted upon. But some of the more frivo- Johnnie Walker Blue Label Scotch Whis- lous applications of this technology feel Art Manager key, can use the information to send like an intrusive waste of energy. Jean-Paul Speliers texts and emails to consumers. Accounting Thin Film says Already we Ricardo Pinto Ferreira Diageo likes the are hearing about OpenSense tech- consumer distrust Regional Advertising nology because it of televisions that Representatives can send marketing eavesdrop on all Contact information at: messages encourag- living room conver- http://www.electronics-eetimes.com/en/ ing consumers to: sations and pass about/sales-contacts.html them up the cloud A) hurry up and to act as training open the bottle they information for ELECTRONIC ENGINEERING TIMES EUROPE have bought which better vocal com- is published 11 times in 2015 is as yet unopened, mand recognition. by European Business Press SA pointing out up- Similarly the idea is 7 Avenue Reine Astrid, coming occasions out there that social 1310 La Hulpe, Belgium when whisky could media flows are Tel: +32-2-740 00 50 be drunk. machine-monitored Fax: +32-2-740 00 59 OR “There’s no doubt the Internet so that when you european email: [email protected]. business press changes everything but I say you are heading www.electronics-eetimes.com B) hurry up and out to eat, some VAT Registration: BE 461.357.437. finish the opened doubt that humans will adapt Internet-based Company Number: 0461357437 bottle of whisky with that quickly to being forever service can suggest RPM: Nivelles. tips on what to mix restaurants close the whisky with etc. to you. Volume 17, Issue 3 EE Times P 304128 monitored by their possessions.” It is is free to qualified engineers and managers AND There’s no doubt the Internet changes involved in engineering decisions – see: everything but I doubt that humans will http://www.electronics-eetimes.com/subscribe C) seamlessly buy their next bottle of adapt that quickly to being forever moni- © 2015 E.B.P. SA Scotch whisky or some other tipple sold tored by their possessions. To be honest All rights reserved. P 304128 by Diageo. it is enough to make me turn to drink — Many people have said that the mo- but I want an alcoholic beverage that is ney to be made in the Internet of Things “off the grid.”

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