Capacitance Meter MUDIT AGARWAL

Nasiha Ali

The principle of operating is counting the pulse oscillator during a fixed time interval produced by another lower frequency oscillator. This oscillator uses the being measured as the timing element. The measurement is proportional during pulse counting during a fixed time interval. The astable oscillator formed by IC1c K K K K K K K K K K K K K K K K K K K K K 1 1 1 1 1 1 1 9V 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + + 9V produces a pulse train of constant frequency. Gate 13 12 11 10 9 15 14 3 3 13 12 11 10 9 15 14 13 12 11 10 9 15 14 3 IC4 IC5 IC6 4 4 8 8 4 IC1a also form oscillator whose oscillation period 4511 4511 8 4511 16 5 6 2 1 7 16 16 5 6 2 1 7 6 2 1 7 5 is given approximately by the equation: T=0.7RC.

1C1c Period T is linearly dependent on the capacitance 4093 9 6 5 4 3 2 14131211 10 8 6 5 4 3 16 2 IC2 IC3 10 1 1 C. This period is used as the time interval for one 4518 4518 8 9 7 15 7 15 9 1.5M measurement. The differentiator network following

2K C1 the oscillator creates the negative spikes shaped in 1C1a 9V + 220pf 4093 14 K

1 5 1 9 3 4 R

K narrow pulses by IC1b NAND Schmitt trigger. The

3

f 9

u 3 f 2 8.2 K

6 n

e 1

.

c 1C1b d 1 1

n differentiator formed by R1 and C1 produces a e

r 1K 1K 4093 a

t BC548 u i s c a a e p 56pf negative spikes which resets the counters. The a M C 1M 1.5M display shows the number of high frequency oscillator pulses entering the counter during the number derived from a constant Frequency measurement period. [CIRCUIT IDEAS]

Bug Detector MUDIT AGARWAL

Sameer Ali

The circuit, built around a single integrated circuit nearby power lines or line cords located in and (MC3403P quad op-amp), three transistor (Q1- around building and homes. From the High Pass Q3), and a few support components, receives its filter, the signal is applied to transistor Q1 for amplification. Resistor R2, R3 and R4 form the C1 biasing network for Q1. The amplified signal is 0.01uf R20 100 C1 then ac coupled, via capacitor C4 and resistor R7 R3 R4 R22 C1 Y

0.01uf R 39K 470 10uf 22 E wiper, to the inverting input (pin 2) of op-amp(a). T

C1 R9 C1 T A

0.001uf C1 1MEG 0.01uf B Op-amp(a) is configured as very high gain 0.01uf V R8 9 Q1 R6 R7 220 4 R10 amplifier. With no signal from ANT1, the output of C2 BFR90 2 560 5K - MC3403P 100K 0.01uf D1 op-amp(a) at pin 1 is near ground potential. 1SS99 3 + 1 R1 R5 When a signal from the antenna is applied to the R2 C1 11 220 1.5K R17 R16 100K 0.01uf 10K 10K R21 R11 470 base of Q1, it turn on, producing a negative- 47K going at the cathode of D1. That voltage is applied to pin 3 of op-amp which amplifies and

6 C8 R18 - inverts the signal, producing a positive going R13 0.0047uf 47K 7 47K MC3403P 5 13 - + output at pin 1. Op-amp (b,c) along with C8, R10 14 MC3403P 12 C9 + 4.7uf through R18 and Q2 are arrange to form a MC3403P 9 R14 - 8 voltage-controlled oscillator(VCO) that operates R12 10K 47K 10 SPKR1 + Q2 R19 over the audio-frequency range. As output of op- R23 R15 2N2222 10K 1K 100K Q3 amp(a) increases, the frequency of the VCO 2N2222 increases. The VCO output at pin 8 of op-amp(c) is fed to the input of op-amp(d), which is configure input from the antenna . The signal is fed through a as a non-inverting unity gain amplifier. The output high pass filter, formed by C1, C2 and R1, which of op-amp(d) is used to drive Q3,which in turn, eliminates bothersome 50 HZ pickup from any drives the output speaker.

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