SLAC-TN-69-18 R. Baird, D. Horelick August 1969

NEW SHIFT REGISTER

TO REPLACE SDS DX52

A replacement has been designed and built to replace the SDS’ DX52 discrete component printed circuit boards used in the accumulator portion of the ESA to- 2 roidal charge monitor.

I. INTRODUCTION The SDS DX52 printed circuit boards used in the ESA toroidal charge monitor are composed of 35 transistors plus associated discrete components. In this crit- ical application the reliability has been less than desirable and periodically erratic behavior has been observed. Based upon the inherent reliability of integrated circuits (IC), the following IC register was designed as a replacement. The block diagram is shown in Fig. 1.

II. OBJECTIVES The object was to design a 12-bit IC shift register that would identically re- place the DX52. It must perform the same shift register operation, fit into the SDS system of logic, and be fabricated on a printed circuit board that will plug into the space previously occupied by an SDS DX52. Obviously connector pin as- signments are to be the same as for the SDS DX52, so that no chassis re-wiring is necessary.

III. SPECIFIC REQUIREMENTS

SDS logic is at the 8-volt level whereas registers in general operate at 5 volts. This necessitates an 8-volt to 5-volt interface at the input and 5-volt to 8- volt interface at the output. The SDS Register has a specified clock rate of 1.5 MHz and the clocking takes place on the negative going slope of the clock pulse. Existing power supplies of + 8 V and f 25 volts must be used. IV. DESIGN COMMENTS (a) Input Interface (8 V to 5 V) The Amelco 361CJis used. This chip has two circuits, one for the data and one for the clock. Each of these circuits has a choice of inverting or non- inverting input. The data input is applied to the non-inverting terminal of one half of the IC and the clock pulse is applied to the inverting terminal of the other half via a two input diode AND gate. The inversion was necessary to get the circuit to trigger at the same time the DX52 triggers, which is on the negative going edge of the clock pulse. The IC shift register used in this design triggers on the positive going edge of the clock pulse. It was hoped that the Amelco 361CJ would operate with a Vcc of 8 volts, since 8 volts was available; this did not prove to be the case, so an additional resistor and zener diode were necessary to drop the 25-volt supply to 12 volts. This put a total load of 8 mA on the 25volt supply. (b) Shift Register The National DM8570N is used. This is an 8-bit shift register, so l-1/2 are used. Clock and data pulses come from the input interface. The DM857ON comes with two data input connections which are tied together, a “clear” ter- minal which is connected to + 5 V, and a clock terminal. The parallel outputs feed into inverters. In order to achieve non-inversion two inverters in cas- cade are needed. The register operates at 5 volts supplied through 4 silicon power diodes in series with the 8-volt supply, filtered with a 120 pfd electrolytic and a ufd monolithic capacitor in parallel. The voltage was observed to be constant at 5.05 volts for 8 volts supply voltage. (c) Hex Inverter No. 1 MC836P hex inverters are used. They operate on 5 V as de- scribed in b. (d) Hex Inverter No. 2 and Output Interface (5 V to 8 V) Signetics N8T90A high voltage hex inverters are used to transfer back to the 8-volt logic output in the proper polarity. 2.7 k pull-up resistors to + 8 V are used on each output, requiring =3 mA/output.

-2- (e) Set and Reset Outputs The original SDS DX52 has “set” and ?esetl’ outputs, Pin 20 and Pin 15, on the last stage with much higher drive capability. Since these outputs were not used in the ESA charge monitor they were omitted for simplicity. In ad- dition the final 12th stage was not separated as in the SDS DX52. The auxiliary data input, Pin 40, was not provided.

V. GENERAL REQUIREMENTS Power : 5Vat150mA, and25Vat8mA minimum clock level: 5.0 V mimimum data level: 5.5 V (8-volt logic supplied from system)

VI. CONCLUSION The prototype unit has been bench tested up to clock frequencies of 1.3 MHZ, and has been plugged into the actual system in place of an SDS I%%?. Tests in- dicate satisfactory operation. After reliability has been established all DX52 Is in the ESA charge monitors will be replaced. If anyone is interested in obtaining these boards for replacement use, contact the Counting Electronics Group.

VII. REFERENCES 1. Digital logic circuit boards manufactured by , Santa Monica, California. 2. R . Larsen and D. Horelick, “A Precision Toroidal Charge Monitor for SLAC ,11 Report No. SLAC-PUB-398, Stanford Linear Accelerator Center, Stanford University, Stanford, California (1968).

If anyone is interested in obtaining these boards for replacement use, contact the Counting Electronics Group.

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