2017 International Conference on Microelectronic Devices, Circuits and Systems (ICMDCS 2017)

Vellore, India 10-12 August 2017

IEEE Catalog Number: CFP17L10-POD ISBN: 978-1-5386-1717-5

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IEEE Catalog Number: CFP17L10-POD ISBN (Print-On-Demand): 978-1-5386-1717-5 ISBN (Online): 978-1-5386-1716-8

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2017 International Conference on Microelectronic Devices, Circuits and Systems ( ICMDCS) 10th to 12th AUGUST 2017, VIT University, Vellore-632014, TamilNadu, India.

1. Nano-scale Device Modelling and process Technology

1.1 Source Material Assessment of Heterojunction DG-TFET for Improved Analog Performance 1 Jaya Madan, Skanda Shekhar and Rishu Chaujar

1.2 Reliability of High-k Gate Stack on Transparent Gate Recessed Channel (TGRC) MOSFET 6 Ajay Kumar, Divya Kaur, M. M. Tripathi and Rishu Chaujar

1.3 Impact of Geometry Aspect Ratio on the Performance of Si GAA Nanowire MOSFET 10 Tarun Kumar Sharma and Subindu Kumar

1.4 FinFET Based Adiabatic Logic Design for Low Power Applications 15 L Dileshwar Rao, Soumya Dixit, Kavita Pachkor and Aarthy M

1.5 A Novel FinBOX EHBTFET for low power applications 21 Ashita Kumar, Sajad Ahmad Loan and Mohammad Rafat

1.6 Modeling the Impact of Gate Misalignment in Tunnel Field Effect Transistors 25 Upasana Kardam, Mridula Gupta, Sakshi Gupta, Rakhi Narang and Manoj Saxena

1.7 Influence of Interface Trap Charge Density on Reliability Issues of Transparent Gate Recessed Channel (TGRC) MOSFET 30 Ajay Kumar, Madan Mohan Tripathi and Rishu Chaujar

1.8 An Ambipolar immune Si/GaAs Hetero-junction Doping-less TFET 34 Mohd Haris, Sajad A. Loan and Mainuddin

1.9 Enhanced Subthreshold Characteristic in SOI MOSFET With Non-Uniform Drain Doping Profile 38 M. Ehteshamuddin, Sajad A. Loan, Mohd Haris and M. Rafat 2. Emerging Technologies in IOT

2.1 A Hybrid Arbiter to Accelerate Performance of High Speed SoC 42 Abhilash Bedre and Nithish Kumar

2.2 Restaurant Rating Based on Textual Feedback 48 Sanjukta Saha and Dr. Ajit Kumar Santra

2.3 Home automation using Web Application and Speech Recognition 53 Cyril Joe Baby, Nalin Munshi, Ankit Malik, Kunal Dogra and Rajesh R.

2.4 Novel and Secured Multi-Agent based Distributed Architecture for E-learning Environment 59 Shantha Visalakshi and Dr Shyamala Kannan

2.5 IoT based Smart Home Management to enhance the services to the Occupancies and minimized energy demand by controlling appliances using Wireless Motes 66 Sajal Kanta Das and A Mukherjee

2.6 Metacarpus flexion and palmar prehension using wrist movement based MEMS accelerometer 72 Munyaradzi Charles Rushambwa, Asaithambi Mythili and Mavis Gezimati

2.7 Event Driven Distributed Cluster Computing Technique for Internet of Things System 78 Anagha Rajput and Vinoth Babu K

2.8 IoT Based Rail Track Health Monitoring and Information System 83 Chellaswamy Chellaiah, Balaji L, Vanathi A and Saravanan L

2.9 Automated Car Parking System with Visual Indicator Along with IoT 89 Debopam Dey, Sarthak Mendiratta and Deepika Rani Sona

2.10 Merged Arbitration and Switching Techniques for Network on Chip Router 92 Vinodhini Manickaraj and Nagavolu Murty

2.11 A Survey: Smart Agriculture IoT with Cloud Computing 98 Mahammad Shareef Mekala and P. Viswanathan

2.12 A Review on Communication Protocols Using Internet of Things 105 Saurabh Kumar, Sneha Poddar, Marimuthu R, Balamurugan S and Balaji.S 2.13 TinyOS based WSN Design for Monitoring of Cold Storage Warehouses using Internet of Things 111 Chandanashree V C, Prasanna Bhat U, Prasad Kanade, Arjun K M, Gagandeep J and Rajeshwari Hegde 3.Communication Technologies and Circuits – 1

3.1 Distribution of Achievable Rate in a Cellular Environment 117 Parth Sarthi Srivastava, Md Waris Khan and Balaji S

3.2 Reliable File Sharing in Distributed Operating System using Web RTC 120 Rajesh Dukiya, Shubhankar Sharma, Srinivas Koppu and Madhusudhana Rao

3.3 Vertical Handover Activate Condition Algorithm for Device-to-Device communication 124 Meenakshi S and Vinoth Babu K

3.4 Polymer Optical Waveguide for Optical-Electrical Printed Circuit Board 129 Vajresh Kumar.N and T.K.Ramesh

3.5 A Comparative Study on Calibration Technique for SFCW Ground Penetrating Radar 134 Shweta Thomas and Lakshi Prosad Roy

3.6 Efficient Wireless Channel Modeling Using Stochastic Method 138 Gowthami Gangisetty and Ravi Shankar S

3.7 An Efficient Differential Evalutionary Algorithm Based Localization in Wireless Sensor Networks 142 Visalakshi Annepu and Rajesh A

3.8 Measurement of Rain Attenuation in DTH Services 147 Swaminathan Subramanian, Srinivasan Anandan, Narasimhan Devadoss and Sai Likitha Kotha

3.9 FFT Implementation Using Floating Point Fused Multiplier with Four Term Adder 152 Killadi Baboji and Sriadibhatla Sridevi

3.10 Visual-MIMO for Vehicle to Vehicle Communications 158 Manikandan Chinnusamy, A. Aldrin Wilfred and Neelamegam Periyasamy 4.Analog and Mixed Signal Design – 1

4.1 Twin Gate Rectangular Recessed Channel (TG-RRC) MOSFET for Digital-Logic Applications 164 Ajay Kumar, Samarth Singh, Balark Tiwari and Rishu Chaujar

4.2 A Comparative Study of Direct Digital Frequency Synthesizer Architectures in 180nm CMOS 168 Rushank Suryavanshi, Sridevi Sriadibhatla and Bharadwaj Amrutur

4.3 Design of Reconfigurable Tri-Band Antenna on Chip 173 Rahul Pandey and Sakshee Pandey

4.4 Reduced Comparators for Low Power Flash ADC using TSMC018 179 Rahul P V, Anusha Kulkarni, Sohail Sankanur and Raghavendra M

4.5 Design of CNTFET-Based Ternary Control Unit and Memory for a Ternary Processor 184 Karthikeyan Sugumaran, Chandra Karan Reddy and Reena Monica

4.6 Smart Weight Based Toll Collection & Vehicle Detection During Collision using RFID 188 Akshay Bhavke and Sadhana Pai

4.7 Design of Recycling Folded cascode Amplifier Using Potential Distribution Method 194 Sudheer Raja Venishetty and Kumaravel Sundaram

4.8 A low power area efﬁcient 10-bit SAR ADC with parasitic insensitive capacitive DAC 199 Bibin Raj B and Devi Sreekumar

4.9 A PCell Design Methodology for Automatic Layout Generation of Spiral Inductor using SKILL Script 203 Sobhana Tayenjam, Venkata Narayana Rao Vanukuru and Kumaravel S

4.10 An Area-Efficient 32-Bit Floating Point Multiplier Using Hybrid GPPs Addition 207 Jean Jenifer Nesam and Sivanantham S 5.Communication Technologies and Circuits – 2

5.1 A Compact Passive Beam Forming Network for Base Station Antenna 211 Deeksha Singh, M.Ganesh Madhan, Kamalaveni A and Suresh Kotapati

5.2 Switched Capacitor Circuit Simulator for Noise Analysis Using Adjoint Network Approach 217 Vani Mrudula Magapati and Binsu Kailath

5.3 Design and Analysis of C - Band Directional coupler 222 Veadesh B, Aswin S and Shambavi K

5.4 Cross polarization reduction using DGS in Microstrip patch antenna 227 Husna Khouser and Dr.Yokesh Kumar Choukiker

5.5 Decision Process for Vertical Handover in Vehicular Adhoc Networks 231 Suganthi Evangeline C and Vinoth Babu K

5.6 Impact of base station location in clustering schemes of WSN 236 Yuvaraj P and Manimozhi Muthukumarasamy

5.7 Design of Multiband Planar Antenna for Mobile Devices 241 Sneha Tk Ac and Navin Kumar

5.8 Optical Mode Calculation and Review of Graphene on Rib Waveguide 246 Prakhar Gupta and Devi Dhubkarya

5.9 Analysis of GDI Logic for Minimum Energy Optimal Supply Voltage 252 Kishore Sanapala and Sakthivel Ramachandran 6.Technology and Modelling for Micro Electronic Devices

6.1 Delay Characteristics Dependency on Type of Wire Segments in FPGA Routing 255 Krishna Chaitanya Nunna, Usha Maddipati, Swami Naidu Gummadi and Rama Vara Prasad Reddy

6.2 Study of Pull-in voltage of a perforated SMA based MEMS Switch 260 Shivashankar A. Huddar, B. G. Sheeparamatti and Ajay Sudhir Bale

6.3 Efficient CAM cell design for low power and low delay 264 Satti V V Satyanarayana and Sri Adibhatla Sridevi

6.4 A Capacitive sensor readout circuit with low power mode and variable gain operations 269 Rohan Srinath, Prasannapatil G N, Prathiksha Shetty S, Venkatesh Pampana and Shashidhar Tantry

6.5 Effect of Cheese and Fill Procedures on the Manufacturability and Yield of RF Integrated Circuits 274 Mayank Chakraverty, Krishna Arla Prabhu and Pallavi Veeraje Urs

6.6 Calculation of Electronic and Transport Properties of Phosphorene Nanoribbons using DFT and Semi empirical models 281 Santhia Carmel, Adhithan Pon, Ramesh Rathinam and Arkaprava Bhattacharyya

6.7 Design and Analysis of AlGaAs/GaAs/Si Multi junction Solar cell using PC1D 285 Sathya P and Supriya P 7.Analog and Mixed Signal Design – 2

7.1 Design of Boolean Chaotic Oscillator using CMOS Technology for True Random Number Generation 291 Sundararaman Rajagopalan, Sivaraman Rethinam, Amirtharajan Rengarajan, Jyothirmai Manepalli, Deepika Aekula Navya and Priyadarshini Ambati

7.2 Electronically controlled water flow restrictor to limit the domestic wastage of water 297 Ankith Menon, Anisha . and Archana Prabhakar

7.3 Investigation on light intensity and temperature distribution of Automotive’s Halogen and LED headlight 302 Rammohan Arunachalam and Rameshkumar Chidambaram

7.4 Design and Analysis of a Symmetric Phase Locked Loop for Low Frequencies in 180 nm Technology 308 Prakriti Arya, Dinesh Jangid, Shree Prakash Tiwari and Mahima Arrawatia

7.5 Channel and Gate Engineered Dielectric Modulated Asymmetric Dual Short Gate TFET 314 Ramesh Rathinam Adhithan Pon and A. Bhattacharyya

7.6 Effects of Parametric Variation on SET based Inverting Buffer Stability 318 Arpita Ghosh and S.K Sarkar

7.7 A Systematic method to find an Optimized Quad-Quadrant Random Walk Sequence for reducing the Mismatch effect in Current Steering DAC 322 Rajesh K. Srivastava, Sreedhar Vineel R. Kaipu, Aditi Rampal, Aneesh Vellathu and H. S. Jattana

7.8 Microfluidic Micro-Well (Size And Shape) by Numerical Optimization for Single Cell Applications: Vertical Trapping Approach 328 Jasper James A, Sushmitha M, Vigneswaran Narayanamurthy, Premkumar R and Kalpana R

7.9 Low power divide-by-16/17 prescalar using PowerPC flip flop 334 Vikas Balikai and Harish Kittur

7.10 Design of Low Phase Noise Voltage Controlled Oscillator for Phase Locked Loop 339 Srivatsa M P, M Vineeth Bhat, Siddanth Jain, M Nithin and Harish M Kittur

7.11 Area, Power and Performance Analysis of High Speed Sample and Hold Circuit 343 Jithin P V and Shekhar G 7.12 High level Computation Technique for Characterization of Sigma-Delta A/D Converter 347 Anil Sahu, Dr. Vivek Kumar Chandra and Dr G R Sinha

7.13 Hardware Malicious Circuit Identification using Self Referencing Approach 351 Priya S R, Srigayathri D, Swetha P, Nuthi Sumedha and Priyatharishini M

7.14 An area efficient termination resistance calibration mechanism for LVDS transceiver in 55nm CMOS 356 Nithinnath V K and Shekar G 8.VLSI Testing and Verification

8.1 Segmented Studies on Urban Driving Cycle and Traffic Patterns 361 Skanda Kalgal, Niranjana Mallesh, Ajjayya Vadakannavar, Rajeshwari Hegde and Nagabhushana B. S.

8.2 Validation of Transactions in AXI Protocol using System Verilog 367 Prasanna Deepu Mutyala, Dhanabal R and Madhav Kumar Appari

8.3 Test Suite for SoC Interconnect Verification 371 Sincy Ann Saji and K.Sivasankaran

8.4 ASIC Flow Implementation Over Multi Clock Processor Block On 32 nm Node 377 Nikhil Pathrabe and Rajeev Pankaj Nelapati

8.5 Diffused Bit Generator model for TRNG Application at CMOS 45nm Technology 381 Sundararaman Rajagopalan, Sivaraman Rethinam, Govindu Lakshmi, Police Mounika, Ravulapenta Vani and Dasari Chandana

8.6 Design of Efficient Programmable Test-per-Scan Logic BIST Modules 386 Devika K N and Ramesh Bhakthavatchalu

8.7 Design of High Performance Double Precision Hybrid ALU for SoC Applications 392 Ravi S, Adig Z and Harish M Kittur

8.8 Memory Testing and Fail Bitmap Generation for Fault Correlation 398 Sumit Soin, Y. Ram Kishore and Gurvinder Singh

8.9 Fault Diagnosis of Engine Lubrication System 404 Avinash Pavashe, Siddharth Kalkundri, Chetan Chavan and A. Rammohan

8.10 Design and Implementation of Optimal Soft-Programmable Logic Controller on Multicore Processor 410 Vasu P, Dr.Harish Chouhan and Nitin Naik 9. Digital Design for Signal, Image and Video processing – 1

9.1 An Efficient Hybrid Integer Coefficient-DCT Architecture using Quantization Module for HEVC Standard 414 Ganapathi Hegde and Akhil P. G.

9.2 An Efficient Hardware Realization of Diamond Search Algorithm for Motion Estimation Task in Video Coding Applications 420 Ganapathi Hegde and Vijay Bichu

9.3 Fir Filter Implementation Using Compressor Based Adder-Tree Structure 426 Jeevita N M, Salomie Elezabeth John, Neha Singh and Sridevi Sriadibhatla

9.4 Secure Medical Image Sharing – A Hardware Authentication Approach 432 Sundararaman Rajagopalan, Sivaraman Rethinam, Lakshmi V, Mahalakshmi J, Ramya R and Amirtharajan Rengarajan

9.5 Priority based Traffic Balancing Routing Protocol for WDM Optical Networks 436 Sindhuja Rao P L, Santosh K V V N D and Ramesh T K

9.6 Retina Based Biometric Identification Using SURF and ORB Feature Descriptors 440 Shalaka Haware and Alka Barhatte

9.7 Design of IoT based Generic Health Care System 446 Alamelu J V and Mythili A

9.8 Investigation of effect of air filter clogging on performance and emissions from engine 450 Vishal Randive, Adarsh Nashte, Omkar Katkar and A Rammohan

9.9 Implementation of a Novel 2-stage DFT structure for CMOS Pixel Sensors utilizing on-chip CP-PLL clock (For Retinal Implant System) 456 Ashish Tiwari and R.H. Talwekar 10. Digital Design for Signal, Image and Video Processing – 2

10.1 A Blind Source Separation with Fractional Calculus for Noise Reduction in Speech Enhancement 462 Pramodini Talware, Vanita Tank and S. P. Mahajan

10.2 Kernelized Intuitionistic Fuzzy C-Means Algorithms Fused With Firefly Algorithm for Image Segmentation 468 Srujan Chinta, Balakrushna Tripathy and Govinda Rajulu K

10.3 Direction of Arrival Estimation for Narrowband and Wideband Underwater targets 474 S. Ashwin Srinath, C P Harihar Prasad and Valarmathi J

10.4 Design of an Optimized MAC Unit using Integrated Vedic Multiplier 481 Monisha Yuvaraj, Nandita Bhaskhar and Binsu Kailath

10.5 ASIC Implementation of Shared LUT based Distributed Arithmetic in FIR Filter 487 Grande Nagajyothi and Sriadibhatla Sridevi

10.6 Advent of Memristor based synapses on Neuromorphic Engineering 491 Vidya S and Mohammed Riyaz Ahmed 11. Electronics for Green Technology

11.1 Power Efficiency and Delay Reduction of Self Gated Resonant (SGR) Clocked Flip Flop With H-Tree 497 Pudi Ashish, S Satheesh Kumar and Dr.S.Kumaravel

11.2 Generation of Magnetic Field from Heat in Thermomagnet by Magnetic Seebeck Effect 503 Manoj Aravind Sankar and Prasanna Ram

11.3 Design of Smart Waste Management System 508 Balamurugan S, Abhishek Ajith, Snehal Ratnakaran, Balaji S and Marimuthu R

11.4 Energy Management System For Microgrid With Power Quality Improvement 512 Prajakta Borase and Sonali Akolkar

11.5 An optimal Medium Access Slot Allocation for WiMedia Medium Access Control Protocol using Firefly algorithm 518 Umadevi K S and Arunkumar Thangavelu

11.6 Highly Efficient and Symmetric Stacked Transformers for Millimeter-wave ICs 521 Venkata Vanukuru

11.7 Alternate Layer Wound Symmetrical Inductor with High-Q Characteristics for Differential RFICs 525 Venkata Vanukuru

11.8 Energy Efficient Street Light Controller for Smart Cities 528 Nikhil Khatavkar, Apurva Naik and Balaji Kadam

11.9 Design of Digital PID Controller for Voltage mode control of DC-DC Converters 534 Kartik Sharma and Dheeraj Kumar Palwalia

11.10 Multiple control parameters and Functional Mode considerations for Gasoline EMS Engine Control Unit - A survey 540 Supriya Kalyankar-Narwade, C. Ramesh Kumar and Sanjay A. Patil

11.11 Simulation of High Efficiency InGaP/InP Tandem Solar Cells Under Flat Plate and Concentrator Conditions 545 Krishanu Dey and Trupti Ranjan Lenka

11.12 Condition Monitoring of Wind Turbine Gearbox Using Electrical Signatures 550 Karanvir Singh, Hasmat Malik and Dr Rajneesh Sharma 11.13 An Enhanced Three-Layer Clustering Approach and Security Framework for Battlefield Surveillance 556 Dhanushik R Macharla and Suhas Tejaskanda 12.Posters 12.1 Hardware Implementation of Template Matching Algorithm and its Performance Evaluation 562 Satish Bhavanari and Jayakrishnan P

12.2 SEU Hardened DFF and 4 bit Johnson Counter using Quatro latch in 45 nm technology 569 Pankaj Katkar, Satheesh Kumar and S Kumaravel

12.3 A Bio-medical compatible Self bias opamp in 45nm CMOS technology 575 Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Nabil Yassine, Saddam Zourob and Sridevi Sriadibhatla

12.4 Smart Shopping Cart 579 Akshay Kumar, Abhinav Gupta, Balaji S, Balamurugan S and Marimuthu R

12.5 A PVT Insensitive Programmable amplifier for Bio-medical Applications 583 Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine and Sridevi Sriadibhatla

12.6 Multilevel ingress scheduling policy for Time Sensitive Networks 587 Umadevi K S and Kannamma R

12.7 A Modeling and Analysis of delay sensitive scheduling in wireless network 591 Umadevi K S, Mahima Gupta and Somani Siddhant Subodh

12.8 Predictive Load Balancing Algorithm for Cloud Computing Environment 595 Umadevi K S and Pranav Chaturvedi

12.9 A Hybrid Cryptography Algorithm for Cloud Computing Security 600 Divya Prathana Timothy and Ajit Kumar Santra

12.10 A Brief Review of closed curve approximation technique using iterative point elimination 605 Mangayarkarasi Ramaiah and Bimal Ray

12.11 Analysis of Radio Over Fiber Link Based On Optical Carrier Suppression 611 Revathi S, Ravipravin G, Rajesh C, Mohanapriya S and Raghavee N S

12.12 An Alternative metric to preserve self -tracing portion on the digital planar curves 616 Mangayarkarasi Ramaiah and Bimal Kumar Ray

12.13 A SAD Architecture for Variable Block Size Motion Estimation in H.264 Video Coding 621 Chukka Santosh, Prayline Rajabai C and Sivanantham S