A Nybble .on the Apple

capabilities, I suggested that we sit down and implement a "Color Eater" algorithm with Apple-II's integer BASIC interpreter with color graphics extensions. I had first seen the Color Eater program demonstrated in an advanced graphics research laboratory late in 1975 (the idea of the program is not original with me, and I will provide the source upon request). The Color Eater always lives in the matrix in the color TV display at some point. The Color Eater is a very simple animal. It looks at its nearest neighbors in the color matrix, searching in a clockwise direction for its current "digestible" color. If it finds this color, it moves its location to the matrix position oJ that color, digests it into a new color, and reiterates its search. Occasionally, the Color Eater becomes a very frustrated little animal. It eats itself into a corner and no longer is able to find any digestible colors . . When this catastrophe happens, it throws a fit and turns itself into another variety of Color Eater which can eat itself out of the frustration point. The result is a constantly changing random color pattern on the screen, illustrated in one state in this photo made with the Apple-II computer's output to a standard color television. That evening last November, Steve Jobs, Steve Wozniak and I sat down and Notes by Carl Helmers proceeded to use the Apple-II BASIC (which is a 5 K interpreter with 16 bit integer arithmetic) to program the Color Eater Next month, we'll have an article by Steve game. After perhaps 30 to 45 minutes, we Wozniac, designer of the App le-II computer, had a working BASIC langu age version describing this beautiful new conception of which used the Apple-II's graphics facilities. the small computer. As a taste of the Since it was done interpretively, the program Apple-II, here is one frame of the "Color ran a bit slow in this version, but it certainly Eater," an interesting program which illus­ illustrated the concept. Later, Steve Wozniak trates the faci liti es of the Apple-II. recoded the program using the 6502 The Apple-II , whi ch is to be introduced in processor's assembly language facil ity as April at the first West Coast Computer Faire implemented in the Apple-II, and reports in San Francisco, may be the first product to that the Color Eater now runs like lightning, fully qualify as the "appliance computer." wh ich is its normal mode of operation these An "appliance computer" is by definition a days as a demonstration program for the completed system which is purchased off the Apple-II. retail shelf, taken home, plugged in and If you attend the first West Coast used . I first saw the Apple-lion November Computer Faire, stop by the Apple Com­ 20 1976 when Stephen Wozniak and puter booth and take a look at this Stephen Jobs stopped by a motel room in interesting ·processor; if you don't see it in Palo Alto where I was staying at the time. person, then you'll have to wait until next They brought along the prototype Apple-II month's BYTE for a more complete to give a demonstration. description of the design concepts of the To serve as an interesting challenge to its machine as explained by Steve Wozniak.-

10

Photo 7: A color test chart showing the 75 shades of hue available fro m the Apple-II as presented on a typical commercial color set, using one of several RF modulators available on the mar/?et. Th e Apple BASIC program used to generate this color is shown in the text portion of this split screen (graphics and text) System Description display.

Stephen Wozniak Apple Computer Co The Apple-II 20863 Stevens Creek Blvd B3-C Cupertino CA 95014

To me, a perso nal co mputer should be space for 8 K bytes of 4 K dynamic memory small, reli abl e, co nven ient to use an d in ex­ chips, and its shared video generation and pensive. dynami c memory refresh logi c. App le- I was Th e Apple-I, my first video oriented so ld as a completely asse mbl ed and tested single board computer, was des igned late in processor board with a price under $7 00 at 1975 and sold by word of mouth through­ the retail level. out California and later nationwid e through The latest result of my design activities is retail computer stores. I think that the the Apple-II which is the main subject of Apple-I co mputer was the first micropl"Oces­ th is system description article. The Apple-II sor system pl"Odu ct on the market to co m­ builds upon this idea by providing a co m­ pl etely integrate the display generation cir­ puter with more memory capability, a read cuitry, microprocessor, memory and power only memory (ROM) BASIC in terpreter, supply on the same board. Thi s mea nt that color video graphics as well as point graphics its owner could run the Apple BASIC and character graph ics, and extended sys­ inter preter with no add itional electroni cs tems software. other than a keyboard and video mon itor. The Apple-I video co mputer board was originally intended as a television terminal Integral Graphics product which could also operate in a stand A key part of the Apple-II design is an alone mode with out much in the way of integral vid eo displ ay generator which di­ memory, although it did have a processor, ~ec tly accesses the system's programmabl e

34 memory. Screen formatting and cursor co n­ maril y by the software sc rollin g routines in tro ls are rea li zed in my design in the form of th e system read on ly memory, about 200 bytes of read onl y memory whi ch Since the App le- II incorporates this di s­ are bu ilt into the Appi e-Il's mask pro­ play ge nerator as a part of its des ign, its text grammed 8 K bytes of read only memory. A mode beco mes the term in al for the system. 'I K byte segment of th e processor's main The displ ay has 24 rows of 40 characters memory is dedicated to the display ge ner­ disp layed on an ordinary bl ac k and wh ite or ator, although it is also accessibl e to pro­ color telev ision sc ree n. Eac h character in the gra ms , The di spl ay transfe r rate is th e time it Apple-II des ign is a 5 by 7 dot matrix, so the takes to fu ll y define the contents of th is present version of the system only imple­ segment of memory, and averages about ments upper case characters of the 6 bit 1000 characters per second, limi ted pri- ASCI I sub set, as we ll as the usual numbers

------, I V IDEO GENERATOR / MEMORY / PROCESSOR T IMING AND CON TROL I I

SERIAL SERIAL VIDEO 8 MEMORY A VIDEO (C HAR) ./ DATA OUT (GRAPHICS) PROCESSOR BIDIRECTIONAL SYSTEM BUS ( SERIALIZER V 8 8

"MUX"o MULTIPLEXER

SOFTWARE / VIDEO MODE CONTROL ~ CONTROLLED VIDEO MUX _____ ..J

tlAVIDEO OUT TIMING : .

~ ~ V IDEO ACCESS PROCESSOR AND MEMORY ACCESS AND REFRESH PROGRAM EX ECUTION

Figure 1: A block diagram of the Apple- I I display generator. The generator sneaks into memory on the externally unused phase of the 6502 processor's 2 phase clock. The output of the memory is processed (after a I clock cycle delay) to produce a net video output through a software controlled video multiplexer. The three major modes of operation are: Color graphics, in which each 4 bit nybble of the byte is treated as a color definition code by the color generator. Character generation in which the 8 bit code is processed with a read only memory to generate a dot matrix pattern which is serialized and sent to the video multiplexer. Blacl?-white point graphics in which the 8 bit word from memOlY is used to control the contents of a segment of a 280 by 160 point grid. The timing diagram shows how the basic I iJ.S processor cycle period is split up into a video memory cycle and a microprocessor me mOlY cycle. Since the processor is engaged in in ternal house/?eeping operations during the first (high level) half of a ipl period, this segment of time can be used by the video generator to sneak into memory. Since all of memory is continuously being scanned by the low order bits out of video generator, the entire 48 K byte field (maximum) of dynamic memory is refreshed by the video portion of the cycle. (Refreshing of dynamic memory means scanning through all possible low order addresses to recharge the internal memory capacitors of the chips.)

35 Photo 2: This series of photos shows the steps in writing an animated BASIC game using the Apple-II com­ puter's BASIC interpreter. This se­ quence highlights the process of writing a paddle versus "wall" game where the object of play is to knock bricks out of the wall and eventually get the ball to go all the way through. This game is similar to many seen in amusement parks and arcades, and is typical of the kind of game which can be implemented with Appie-ll's BA­ SIC software. Using the split screen Photo 2a: The first step in any game is Photo 2b: Then we must add a liberal graphics and text display mode, the to generate the uniform color back­ dose of obstacles and field pieces to BASIC statements are shown at the ground for the action of the game. mal?e the problem interesting. For this bottom of each picture. Here we use a blue field. game, the major obstacle is a brick wall of orangish (color 73) and green­ ish (color 72) bricks. Later 017, since we can look at the contents of the and graphics ava il ab le in stand ard character screen directly, the game algorithm generator read onl y memory parts. Assuming will be manipulating these bricks. that the video display is the currently assigned syste m output device, the display is accessed through our system software in any point as set by X and Y coordinate read only memory by using a subroutine integer values. Photo 1 shows a color scale called COUT which adds text to the sc re en for the ·15 colors possible, and a simp le using an automatic sc rollin g technique. This BASIC program which generated the display. is typical of the many read only memory Here the scrolling window featur es are used routines which I've in corporated into the to set the color graphics mode in the fixed ROM to provid e complex features with portion of the screen (above) and set the relatively simple user interfaces. Another text mode of operation in the scrolling examp le of such a softwal"e feature is a user portion (below). This mi xed mode provides definable scrolling window. This mea ns that a 40 by 40 color graphics grid plus four lines the user of th e system can pick any of four of scrolling text at the bottom of the sc reen. coordinates defining any rectangular subset A routine in the system I·e ad on ly memory of the viewing area of the video screen as the selects this mode and sets up th e scrolling current scrolling zone. The remaind er of the window corresponding to the text portion. display will remain fro zen and data in the I've found this mode especial ly usefu l to window will sc roll normally when COUT is BASIC programmers who can write anim a­ accessed . This is a most useful feature: For tion games like Pong while holding a tradi" exampl e, the user can set up a game back­ tional BASIC conversation in the text region gro und or in stru ction menu in one pal"t of of the screen. This sp lit scree n mode of the screen while using the remainder of the viewing is us ed fo r all the color graph ics of sc reen for scro ll in g the variab le data. photo 2 as well. In the text mode, each character position The same display memory region that is may be displayed in normal (white character used for the text display is used for the color on black background) or inverse, or flashing graphics. System software rout ines supp li ed mod es. This infol·mation is spec ified by the in the read only memory of the processor hi gh order bits of each character stored in allow users to simply clear the di sp lay, se lect the display memory. The cursor position, for colors, plot points, draw hor izo ntal and exampl e, is indi cated by fmcing the charac­ vertical lin es, and sense the color va lu es ter at the cursor location to be in the presently at spec ified screen positions. I like flashing mode with in verse video. to think of these system software sub rou" User ap plication programs may switch the tines as en hance ments to the 6502 instruc­ display mod e from character to co lor graph­ tion set for the purposes of display co ntrol. ics with a singl e instruction, dividing the High reso lution graphics is the remaining screen in sta ntly into a patchwork of co n­ Apple-II displ ay mode. This mode of display trollable color · on a grid of 40 horizo ntal is set up by system software routines which locations by 48 vertical location s. Each cell are delivered with the computer, but are not in the gr id may be one of ·15 co lors, and built into the system read only memory. software built into the system I"ead only (Even with 8 K bytes for the read only memory can be used to define the co lor of memmy space, there sometimes isn't enough

38 Photo 2c: Next, we must of course Photo 2d: Then, since no video court Photo 2e: Finally, the last add a paddle, here created with a game is complete without a ball we steps in finesse are the deeper yellowish orange (color 9) hue. must add a square "ball" to the score displays and related program, and set up some of the captions which complete parameters of its motion. the game. This game is controlled by using one of the analog inputs of the room to fit all the needed features.) In the didn't ex ist at all . Because the integrated Apple-II to determine the high resolution mode, 8 K bytes of main display design uses this direct memory access index of the current loca­ memory store the data for a display of technique without stealing processor cycles, tion of the paddle, so that 280 horizontal dot positions by 192 vertical it is possible to program accurate and pre­ by twisting the pot the dot positions; so to allow enough room for dictable timin g loops in software as if no paddle is moved,. the some BASIC software to play games with DMA were prese nt in the system. speaker output is used to this mode the system requires at least 12 K generate a sound burst Memory of memory. If a color television is used with when the ball hits the pad­ this high resolution mode, the available It is all eged in the Santa Cl ara (Silicon) dle or wall. co lors are black, white, violet and green. A Valley th at the microprocessor was invented mixed mode with 160 rows of 280 dots plus to se ll programmable and read on ly memory four lin es of scrolling text can also be set up. chips. It certainly has been the case that one App lications of the high resolution graphics microprocessor in the past would often modes include game boards, mazes, maps, support hundreds of memory chips, but plots and histograms, user defi nable char­ times change. Technology has sin ce acter sets, and games like Space War in its bestowed upon us the 4 K bit and 16 K bit original an imation graphics versions. dynamic programmable memory ch ip s. Apple- II was designed to operate with the Some Details 16 pin dynamic programmable memory parts, wh ich come in 4 K and 16 K versions All the Apple-II video modes work iden­ which are (with some SUbtleties) pin for pin tically, using a common clock timing chain compatible. wh ich is shared by the processor, memory The App le- II board is supp li ed with refresh and video generation logic. During sockets for three blocks of memory, each of each microprocessor clock cycle's 1 clock which may be configured to use either 4 K pulse, an address is specified by the video or 16 K dynamic programmable memory circuits and directed to the programmable parts, with intermixing a ll owed. This means memory of the system through the address that if you were to pUI·c hase an App le with multiplexor (MUX) of figure ·1. Display data 4 K bytes of memory and later want to add is received by the three forms of video data 16 K bytes, there is no need to scrap the 4 K generators toward the end of the <1>2 pulse, ch ips. and this data is then latched for use during Dynamic memories have one design the entire next clock cycle. Since all this characteristic which is not present in the action occurs during the <1>, pulse which simp ler (but more ex pensive) static memo­ lasts 500 ns, the video generator is ab le to ries. Thi s is the fact that th ey use capacitive take over the access to the memory at a time storage elements built into the chips whi ch when the 6502 processor is busy wi th must be periodically recharged ("re­ internal housekeeping and processing opera­ freshed ") to prevent the information from tions which leave the data bus free. During disappearing. the <1>2 pulse, when the processor takes One of the elegant simplifi cations command of the bus, the programmable provid ed by a system such as the App le- II memory of the system is used by the with its bu il t- in display is the fact that executing program as if the video ge nerator refreshing th e entire memory address

39 (a) (b)

}LIST 5 OSP APPLE 10 FOR 1=1 TO 10 20 IF 1)5 THEN 40 30 APPLE=I: GOTO 50 40 APPLE= 100+ I 50 NEi\T I 60 PRINT "DONE": END )RUN #30 APPLE=l #30 APPLE=2 #30 APPLE=3 #30 APPLE=4 #30 APPLE=5 #40 APPLE=106 #40 APPLE=107 #40 APPLE=108 #40 APPLE=109 140 APPLE=110 DONE ~

Photo 3: Two examples of the Apple BASIC interpreter, in the form of programs with several lines of execution results. (a) Th e interpreter has a symbolic trace feature which allows dumping of named variables whenever a change occurs. This simple program illustrates this "DSP" command with a simple computational program. (b) A similar debugging feature of Steve Wozniak's Apple BASIC interpreter is a method of running the interpreter with a statement number trace, by giving a TRA CE command instead of RUN in the command mode of the interpreter. This enables one to fairly quickly debug a BASIC program by exam'ining its effect on variables or its course of evolution through statement numbers.

space of dynamic memory ch ips is inherent dual slots so that multiple bit address de­ in the operation of the vid eo display ge nera­ coders are not required on peripheral boards. tor. On successive pulses of the video dis­ The Apple-II cassette interface is simple, play, it cycles through all the low order fast, and I think most reliable. The data addresses of the memories as the memory is transfer rate averages over 180 bytes per scanned to ge nerate the video image. But second, and the recording scheme is com­ scanning through the addresses with in the patible with the interface used with the maximum all owable time is the algorithm Apple- I. This tape recording method can be used to accompli sh the required refreshing used with any inexpensive recorder, but as of the memories; so with this video ge nera­ with any such use of audio media o nl y high tor integral to th e computer, refreshing of quality tapes shou ld be used in order to the memories happens to come for free and avoid problems due to dropouts from poor is totally transparent to the user with no ox id e coatings on the tapes. In the App le extended, missing or delayed cycles. This audio cassette interface, timing is performed characteri stic is sometimes ca ll ed "hidden by software which is referenced to the refresh." system clock, A zero bit is defined as a fu ll cycle of a 2000 Hz signal (500.us long), while Standard Peripherals a one bit is defined as a full cycle of a I designed the App le- II to come with a set 1000 Hz signal (1 ms long). While read ing data, of sta nd ard peripherals, in order to fit my full cycles are sampled, never half cycles, a concept of a personal computer. In ad dition method which tends to provide immunity to to the video display, co lor graphics and high DC offset and other forms of distortion. All resolution grap hi cs, this design includes a the cassette management routines are ava il ­ keyboard in terface, audio cassette interface, ab le to user programs as subroutine calls four ana log game padd le inputs (for user from asse mbl y language directly, or through supplied potentiometers wh ich vary a re­ hooks in the BASIC interpreter. sistance which the processor measures), The Apple-II analog game control paddle three switch inputs, fo ur 1 bit annu nciator circu its are based upon inexpensive timer outputs, and even an audio output to a chips of the 555 type. I've used a quad timer speaker. Also part of the App le- II design is of this type, called the 553, as shown in an 8 slot motherboard for 10 which has a figure 2. To read the value of resistance on fully bu ffered bus, prioritize d in te rrupts, the padd le's potentiometer, the timer is two prioritized direct memory access (DMA) strobed under software control using rou­ schemes, and address decod ing at the indivi- tines in the system read only memory. The

40 (a) (b)

t:F700L

F700- Fe.J' 4C CF SBC $CF4C,'Y F703- F6 B5 It~C $B5 .. :": F705- .-.etiti BF~I< F706- 0 __1 t10 STA :tQ~ .. B~ LDA ;f1j1 .• ':-:. F70S- ,-.r::-'-' 01 F70A- 0...1 0i STA $0i F70C- 60 RTS F70D- A5 ti0 LOA :H:W Qt:" F70F- _" --I 00 :::TA $(10 .. :": F7il- A~'-' 0i LOA $01 F713- 95 01 STA $0L::~ F715- 60 IHS F716- A9 1'if:"1 LOA #$~)0 F718- 85 01 STA $01 F71A- 8~.J 10 STA $10 F71C- Al 00 LOA ($00, X) F71E- 85 00 STA $00 F720- F6 00 HIe $00,X F722- D0 02 SHE $F726 F,24- F6 131 IHe $01 .. x * Photo 4: Far from being limited to interpretive integer BASIC, the Apple-II includes some powerful debugging and software development aids at the machine language level. Here at (a) is an example of its dissassembler mode of operation, invoked by the L command following an address in hexadecimal. A corresponding nonsymbolic assembler program will perform transformations in the other direction from text sources. Here at (b) is an example of the instruction trace command, which allows a machine language program to be followed mnemonically via dynamic disassembly, with register and condition code contents indicated after each instruction. input routine then enters a loop which programmable memory for it. It's always counts the length of the timer output pulse, there and it is impossible to accidentally which is a function of the paddle potentiom­ clobber it. This BASIC is essentially similar eter's setting. To prevent endless loops if a to any BASIC with the exceptions that it wire breaks, the paddle scan routines exit at only implements 16 bit fixed point arithme­ the maximum count of 255. The resolution tic. It also features some unique language of the loop is 12 flS per count. extensions to take advantage of the Apple-II One memory address is dedicated to the hardware features such as color gra;Jhics and audio output port which drives a speaker. to provide cor.veniences in the form of When this memory location is referenced debugging aids. It is intended primarily for from a program, with either a read or a write games and educational uses. operation, the speaker drive line is toggled . A monitor command puts you into Generating tones requires continuous BASIC mode, which is indicated on the speaker toggling by this method, at an screen by a prompt character, ">". audible rate. The cassette output port works Memory limits for BAS IC source programs in a similar (toggle) fashion to generate and data are set automatically at the time of audio tones for the tape. The annunciator entry, but these limits may be varied by user outputs each have two corresponding ad­ commands. While in BASIC mode, state­ dresses, with one used to set the output and ments are entered on the current system the second used to clear the outputs. Switch, input device, which is normally the key­ paddle and cassette inputs place their data board. on the system bus in the sign bit position Apple-II BASIC is impl emented as a when their corresponding addresses are refer­ translator-interpreter combination. When a enced; this choice of wiring enables software line is read from the input device, the to test the state of the bit directly with a translator analyzes it and generates a more conditional branch instruction of the 6502 efficient internal language facsimile. Syntax processor. errors are detected at this time. The "nouns" of this internal langu age are variable names, integer constants (preconverted to binary for Apple BASIC execution speed enhancement), and string Apple-II comes with an Apple BASIC constants. The "verbs" are 1 byte tokens interpreter in the mask programmed read substituted for keywords, operators and only memories of the system. There is no delimiters. Because the translator dis­ need to load it off tape, nor to dedicate any tinguishes syntax, different verbs are as-

41 ONE SECTION, 553 QUAD TIMER variables in immediate mode, then continue execution at the point of interruption by typing the CONtinue command. BASIC pro­ ONESHOT vides the line number of the statement as the FROM I BIT TO I BIT OUTPUT PORT ------..j TRIGGER OUT I------INPUT PORT point of interruption when this sequence is CONTROL used. The entire variable space is cleared to zero when BASIC is initialized by the CLR USER SUPPLIED command, and prior to executing the RUN +V I VARIABLE RESISTANCE command. (It is possible to carry variables L:Ji from one program to another, but to initiate I APPLE I the second program a GOTO command must I I be used instead of RUN in order to override the automatic clear at the beginning of execution of a new program.) The interpreter consists of a standard Figure 2: How to make a 7 bit measurement of an analog parameter for expression evaluator and a symbol table games (or perhaps we should say "2 bit"). Basically, a 555 style timing rou tine for allocating variable storage similar element is set up so that it can be triggered by a 7 bit output port. After to those described by Prof Maurer in his 2 triggering the oneshot, the processor enters a timing loop continuously testing part series 'in the February and March 1976 the 7 bit input port until the end of the oneshot's cycle, which is controlled issues of BYTE. As statements are scanned, by the game parameter potentiometer. The result is an integer count nouns and verbs are encountered. Variable developed by the timing loop which gives a measure of how long the oneshot names result in calls to the symbol table pulse lasted, and hence a measure of the position of the input potentiometer. routine which pushes address and length Apple-II implements four of these resistance measuring ports (which have information on the noun stack (operand plenty of accuracy for game contexts with graphics display feedbacl? but are stack). Constants are pushed directly onto hardly not to be interpreted as having any absolute accuracy independent of this stack. Verbs are pushed onto the verb hand-eye coordination). stack (operator stack) after popping and executing any verbs of greater priority. A verb is executed by ca iling its associated signed to different usages of the same subroutine. Tables define priorities and rou­ symbol. For example, three distinct verbs tine entry addresses for all verbs. Keywords represent the word PRINT, depending on such as THEN or STEP, and delimiters such whether it is immediately fo ll owed by a as commas and parentheses, are dealt with string source, an arithmetic expression or just as though they were arithmetic opera­ nothing. Thus th is distinction need not be tors. Verb routines obtain their arguments made at execution time. For each verb there from the noun stack. Because verb~ such as exists a subroutine to perform that specific parentheses tend sometimes to be of low, action. Listing a program actuall y involves and other times of high priority, each verb is decompiling the internal language back to actually ass igned two priorities (left hand­ BASIC source code. Those statements with right hand). One represents its tendency to line numbers are stored as part of the user force execution of other verbs, the second program, while those without line numbers its tendency to be executed. are executed imm ed iately. If desired, the Interactive Monitor Apple BASIC interpreter's editing functions can be set to generate lin e numbers auto­ The entry into BASIC, as well as other matically. Although some commands are user oriented features of the Apple-II, is valid on ly for imm ediate execution and provided by an interactive keyboard monitor others on ly for programmed execution, most which serves as an aid to writing and can be employed in both ways . In the debugging machine language programs for Author's Note BASIC source programs, multiple statements the 6502 processor of the system. The user enters commands from the keyboard speci­ 50 as not to slight their may reside on the same line, separated by fying data and address parameters in hexa­ efforts, I would like to colons (':'). decimal. Multiple commands are permitted thank Allen Baum for BASIC language statements are stored in user memory as they are accepted and on the same line and editing features facili ­ originating the Apple-I I tate error correction. I completely wrote and debug software, Doug variables are allocated space the first time debugged Apple BASIC using the monitor as Kraul for helpful sugges­ they are encountered during immediate or my on ly software development tool. I twas tions on the 10 structure, programmed execution. When a program terminates, whether by completion, inter­ of course the first hand assembled program I and Randy Wigginton and wrote for the system. In addition to the Chris Espinosa for many ruption or error conditions, all variables are preserved. Programs may be interrupted in direct monitor commands, a number of long and late hours testing subroutin es were included in the Appie-ll's the Apple BASIC. ... SW execution by typing an ASCII control C; it is then possible to examine and modify a few mask programmed system read only memory

42 Sweet Sixteen Calling Sequence:

20 89 F6 ~ ~~------~~~------~ JSR SWEET16 6502 SWEET16 OP CODES SWEET16 CODE RETURN (leave 6502 OP CODE direct execution) (reenter di rect 6502 execution)

SWEET16 OP CODES (16 Bit Operands, 2's Complement Arithmetic)

Op I nstr Op Code Length D escription Code Length Description

00 1 Return to 6502 mode ------01 2 Branch always 1R 3 R~2 byte constant (Load register immediate) 02 2 B ranch no carry 2R 1 ACC~R 03 2 Branch on carry 3R 1 ACC---- R 04 2 Branch on positive 4R 1 ACC-@R, R+- R+1 05 2 Branch on negative 5R 1 ACC--->@R, R+-R+1 06 2 Branch if equal 6R 1 ACC+-@R double 07 2 Branch not equal 7R 1 ACC----@R double 08 2 Branch on negative 1 8R 1 R+-R-1, ACC-@R (pop) 09 2 Branch not negative 1 9R 1 R+-R - 1, ACC--->@R OA 1 Break to monitor AR 1 ACC-@R (pop) double OB 1 No operation BR 1 COMPARE ACC to R OC 1 No operation CR 1 ACC-ACC+R The Apple-II monitor read 00 1 No operation DR 1 ACC+-ACC-R OE 1 No operation ER 1 R:'-R+1 only memory also contains OF 1 No operation FR 1 R+-R-1 an interpreter program called SWEET/6 which Notes. can be used from machine 1. All branches are followed by a 1 byte relative displacement. Works identically to language programs to im­ 6502 branches . 2. Only ADD, SUB and COMPARE can set carry. plement 76 bit arithmetic 3. Notation: operations. This facility R = a 16 bit "register" operand designation, one of 16 labelled 0 to 15 can prove quite useful) for (decimal), 0 to F (h exadecimal). ACC = register operand RO . example, in calculating ad­ @R = indirect reference, using the reg ister R as the pointer. dresses, and serves as an : } = assignment of val ues. extension of the instruc­ 4. Length of instructions:. tion set of the 6502 which Branches are always two bytes: op code followed by relative displacement. is reached by the jSR Load register immediate (1 R) is three bytes: the hexadecimal op code 10 to 1 F followed by the 2 byte literal value of a 16 bit number. SWEET/6 escape sequence All other instructions are one byte in length. in code.

to provide easy access to hardware features. user accesses SWEET16 with a subroutine These are the service routines which are used call to hexadecimal add re ss F689. Bytes by the monitor, as wel l as BASIC and any stored after the subroutine ca ll are thereafter user routines you care to code. interpreted and executed by SWE ET16. One of SWEET16's comillands returns the user The Story of Sweet Sixteen back to 6502 mode, even restoring the While writing Apple BASIC, I ran into the original register contents. problem of manipulating the 16 bit po in te r - Implemented in o nl y 300 bytes of code, data and its arithmetic in an 8 bit machine. SWEET16 has a very simp le instruction set My so lution to this problem of handling tailored to operations such as memory '16 bit data, notably pointers, with an 8 bit moves and stack manipulation. Most op Illicroprocessor was to implement a non­ codes are on ly one byte long, but since she existent 16 bit processor in software, inter­ runs approximately ten times slower than preter fashion, whi ch I refer to as SWEET16. eq ui va lent 6502 code, SWEET16 should be SWEET16 contains sixteen internal 16 bit employed on ly when code is at a premiulll registers, actually the first 32 bytes in main or execution speed is not. As an exaillple of memory, labell ed RO through R15. RO is her usefulness, I have estimated that about defined as the accumulator, R15 as the 1 K bytes could be weeded out of Illy 5 K program counter, and R14 as a status reg­ byte App le- II BAS IC interpreter with no ister. R13 stores the result of all COM­ observable performance degradation by PARE operations for branch testing. The se lectively applying SWEET16.-

43

You've just run out of excuses for not owning a personal computer.

Clear the kitchen table. Bring cassette interface, so you can swap Apple IITM is a completely self-contained in the color TV. Plug in your new with other Apple II users. computer system with BASIC in ROM, Apple II~ and connect any standard You can create dazzling color color graphics, ASCII keyboard, light­ cassette recorder/player. Now you're displays using the unique color gra­ weight, efficient switching power supply ready for an evening of discovery in phics commands in Apple BASIC. and molded case. It is supplied with the new world of personal computers. Write simple programs to display BASIC in ROM, up to 48K bytes of RAM, and with cassette tape, video and Only Apple II makes it that beautiful kaleidoscopic designs. Or game I/O interfaces built-in. Also in­ easy. It's a invent your own games. Games like cluded are two game paddles and a PONG-using the game paddles. demonstration cassette. supplied. You can even add the dimen­ sion of sound through Apple II's SPECIFICATIONS built-in speaker. • Microprocessor: 6502 (1 MHz)_ But Apple II is more • Video Display: Memory mapped, 5 modes - all Software-selectable: than an advanced, infinitely · Text-40 characters/line, 24 lines flexible game machine. Use upper case_ it to teach your children · Color graphics-40h x 48v, 15 colors arithmetic, or spelling · High-resolution graphics-280h x for instance. Apple II 192v; black, white, violet, green makes learning fun. (12K RAM minimum required) . Apple II can also · Both graphics modes can be selected manage household finances, to include 4 lines of text at the bottom chart the stock market or of the display area. · Completely transparent memory complete, ready to use computer, not a index recipes, record collections, even access. All color generation done kit. At $1298, it includes video gra­ control your home environment. digitally. phics in 15 colors. It includes 8K bytes Right now, we're finalizing a • Memory: up to 48K bytes on- board ROM and 4K bytes RAM -easily peripheral board that will slide into RAM (4K supplied) expandable to 48K bytes using 16K one of the eight available mother­ · Uses either 4K or new 16K dynamic RAMs (see box). But you don't even board slots and enable you to compose memory chips need to know a RAM from a ROM to music elec­ · Up to 12K ROM (8K supplied) use and enjoy Apple II. For example, tronically. • Software And there · Fast extended integer BASIC in ROM it's the first personal computer with with color graphics commands a fast version of BASIC permanently will be other peripherals · Extensive monitor in ROM stored in ROM. That means you can • I/O begin writing your own programs the announced · 1500 bps cassette interface first evening, even if you've had no soon to · 8-slot motherboard previous computer experience. allow your · Apple game I/O connector The familiar typewriter-style Apple II to · ASCII keyboard keyboard makes it easy to enter your talk with another Apple II, or to inter­ · Speaker instructions. And your programs can face to a printer or teletype. · Composite be stored on - and retrieved from­ Apple II is designed to grow video audio cassettes, using the built-in with you as your skill and experience output with computers grows. It is the state of the art in personal computing today, and compatible upgrades and peri­ pherals will keep Apple II in the fore­ front for years to come. Apple II is also Write us today for our detailed available in board-only brochure and order form. Or call us fonn for the do-it-yourself hobbyist. Has for the name and address of the all of the features of the Apple II system, Apple II dealer nearest you. (408) but does not include case, keyboard, 996-1010. Apple Computer Inc., power supply or game paddles. $598. 20863 Stevens Creek Boulevard, PONG is a trademark of Atari Inc. Bldg. B3-C, Cupertino, *Apple II plugs into any standard TV using California 95014. an inexpensive modulator (not supplied). ~L pplcz computczr Inc:

BYTE November 1977 35 Order your AppleII now. from anyone of the following authorized dealers:

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Team Electronics Morristown 539·4077 Milwaukee 354-4880 San franci sco 431 ·0 640 4444 first Avenue N.E. Thunderbird Mall 41st Street & Western Avenue lindale Plaza Virginia 74 1·5919 Com pUler ma rt Western Ma ll Team Electronics Electric Brain Cedar Rapids 393-895 6 501 ROllte 27 Sioux falls 339·1421 396 Park Avenue 3038 N. Cedar Ave . Team Electronics Iselin 283-0600 Oshkosh 233·7050 fresno 227·8479 Tea m Electronics Apache Plaza Team Electronics Rainbow Compulinn. Inc. 320 Kimberlv Road Si lver Lake Road NEW YORK Sioux Empire Mall WYOMtNG Northpark Shopping Cenler St. Anthonv 789·4368 4001 West 41st Street 10723 White Oak Davenport 386·2588 Computerland Te am Electronics Granada Hill s 360 ·2171 161 2 Niagara falls Blvd. Sioux falls 339-2237 Team Electronics Cenler Strawberry EleCllonics Tea m Electronics 1733 S. Robert Street Bulfalo 836·6511 Te am Elect ronics ~~~oS. S~g~f~~~ 2300 Kennedv Road 71 Glenn Way ~9 West St. Paul 451-1765 Computerland 223 Nin th Avenue S.E. Casper . 235·6691 Dubuque 583·9195 Wate rto wn 886·4725 Belmont 595·0231 Team Electronics 225 Elmira Road CANADA Team Electronics Ithaca 277 ·4888 COLORADO 2640 Hennepin Avenue S. Future Byte Room 120 - Space 18 Min neapolis 377·9840 Bvte Shop The Mall Co-op El ectron ics 2274 Rockland Iowa City 338·3681 9148 Main Street Montreal, Du e. 731 ·4638 3464 S. Acoma St. Clarence 634·2193 Englewood 761-6232 Te am Electronics Team Electronics 2015 E. fourth Street 3275 28th Street Sioux City 252·4507 Boulder 447·2368 Te am Electronics If you would like to be an Apple dealer, call Gene Carter, Team ElectfOnics K·D Stockyards Station The Citadel 2001 Leech Avenue Director of Dealer Marketing, 408-996-1010_ Colorado Springs 596-5566 Sioux City 277·2019 Team Electronics Team Electronics 107 S. College Wa~~rl~~ive2W_t~8~ue Fort Collins 484·7500 ~applC! computczr Inc: Team Electronics KANSAS Teller Arms Shopping Center 2401 Norlh Avenue Te am Electronics 20863 Stevens Creek Boulevard, B3-C Grand Jun ction 245-4455 215 W. Kansas Avenue Gar~en City 276·2911 Team Electronics Cupertino, California 95014 Tea m Electronics 2045 Greelev M.II 14 S. Main Street Greelev 356·3800 Hutchin so n 662-0632 (408) 996-1010

Circle 4 on inquiry card_ Stephen Wozniak Apple Computer 20863 Stevens Creek Blvd, B3C Cupertino CA 95014

SWEET16: The 6502 Dream Machine

While writing Apple BASIC for a 6502 registers called RO to R15, actually imple­ microprocessor I repeatedly encountered a mented as 32 memory locations. RO doubles variant of Murphy's Law. Briefly stated, any as the SWEET16 accumulator (ACC) , R15 as routine operating on 16 bit data will require the program counter (PC), and R14 as the at least twice the code that it should. Pro­ status register. R13 holds compare instruc­ grams making extensive use of 16 bit tion results and R12 is the subroutine return pointers (such as compilers, editors and stack pointer if SWEET16 subroutines are assemblers) are included in this category. In used. All other SWEET16 registers are at the my case, even the addition of a few dou ble user's unrestricted disposal. byte instructions to the 6502 would have SWEET16 instructions fall into register only slightly alleviated the problem . What I and non register categories. The register oper­ really needed was a hybrid of the MOS Tech­ ations specify one of the 16 registers to be nology 6502 and RCA 1800 architectures, a used as either a data element or a pointer to powerful 8 bit data handl er complemented data in memory depending on the specific by an easy to use processor with an abun­ instruction. For example, the instruction dance of 16 bit registers and excellent INR R5 uses R5 as data and ST @R7 uses pointer capability. My solution was to imple­ R7 as a pointer to data in memory. Except ment a nonexistent 16 bit "metaprocessor" for the SET instruction, register operations in software, interpreter style, which I call only require one byte. The nonregister oper­ SWEET16. Th is metaprocessor was sketched ations are primarily 6502 style branches at the end of my article in May 1977 BYTE, with the second byte specifying a ±127 byte and the purpose of this article is to fill in displacement relative to the address of the the details of SWEET16. following instruction. If a prior register SWEET16 is based around sixteen 16 bit operation result meets 'a specified branch condition, the displacement is added to SWEET16's program counter, effecting a branch. SWEET16 is intended as a 6502 enhance­ 300 B900 02 LDA IN, Y Get a char. ment package, not a stand alone processor. 303 C9 CD CMP "M" "M" for move? A 6502 program switches to SWEET16 305 D009 BNE NOMOVE No, skip move. 307 2000 08 JSR SW16 Yes, call SWEET16. mode with a subroutine call, and su bsequent MLOOP LD @R1 R1 holds source address. code is interpreted as SWEET16 instruc­ W{'"A"i= 30B 52 ST @R2 R2 holds dest. address . tions. The non register operation RTN re­ w 30C F3 DCR R3 Decrement length. turns the user program to the 6502's direct ~ 30D 07 FB BNZ MLOOP Loop until done. Cf) 30F 00 RTN Return to 6502 mode. execution mode after restoring the internal 310 C9 C5 NOMOVE CMP "E" "E" char? register contents (A, X, Y, P and S). The 312 DO 13 BEQ EXIT Y~s, . exit. example of listing 1 illustrates how to use 314 C8 INY No, continue. SWEET16 in some program segment. Note: Registers A, X, Y, P and S are not disturbed by SWEET16. Instruction Descriptions Listing 7: Use of SWEET76 within an assembly language program is accom­ The SWEET16 op code list is short and plished by executing a subroutine call to the SWEET76 entry point (address uncomplicated. Excepting relative branch 307 here). This call preserves the processor registers at the time of entry and displacements, hand assembly is trivial. All begins interpretive execution. End of interpretive execution is signaled by a register op codes are formed by combining RTN operation code of SWEET76, at which point all the processor registers two hexadecimal digits, one for the op code will be restored. and one to specify a register. For example,

150 BYTE Novemoer 1977 op codes 15 and 45 both specify register RS Listing 2: SWEET76 assembly. The SWEET76 program, assembled to reside whi le codes 23, 27 and 29 are al l ST (store) at location 800 hexadeCimal, is presented by this listing. The primary entry operations. Most register operations of point is at the beginning, location 5 W7 6. An alternate entry point if there SWEET16 are assigned to numerically adja­ is no need to save processor registers is at location 803 in this assembly, cent pairs to facilitate remembering them. SW76+3. Thus LD and ST are op codes 2n and 3n SWEET16 INTERPRETE~ respectively, while LD @ and ST @ are codes II: 18 A.Hol THUI MAY 12 , 1977 00001 ••••••••••••••••••••••• 4n and Sn . 00002 .. 00003" A~pl..E -ll PSEUDO Operation codes 00 to OC (hexadecimal) 00004 .. MACHINE INTERPRETER .. 0ee·G 5 • are assigned to the 13 nonregister opera­ 00006" S. t·l0!NlAK tions. Except for RTN (op code 0), BK 00007 APPLE COl1PlJTER 1 role 00008 00009 ~ •••••••••••• *.* ••••••• (OA) , and RS (B), the nonregister operations 00~10 TITLE "51,.,1££TI6 INTERPRETEq" 000 I I ReL EPZ 100 are 6502 style rel ative branches. The second 00012 ~0H E?~!ol 001313 RI4H Ep?; ~lD byte of a branch instruction contain s a 00014 R 15L EP! So I E 00015 n l SH EPZ $IF ±127 byte displacement value (in two's 00016 S16PAG ECU .t.F7 00017 ORG '800 complement form) relative to the address of 0600: 20 74 09 00018 5\.1 16 JSA SAVE PRESERVE 6502 RLG CONTENTS 0803: 66 00019 PLA the instruction immediately following the 0604: 85 IE 00020 STA P.15L INIT SW'E.ETI6 PC 0806: 68 00021 PLA fROM RETl'~N branch. If a specified branch condition is 0807: 85 IF 00022 STA R 15H ADDRE.SS 0809: 20 0F 08 00023 Sl.J 16B JSR SWl6C I NTEqP!=IET AND E~ECtTTf.: 080C: 4C 09 08 00024 JMP SW168 ONE SW'EETI6 IN STR· met by the prior register operation result, 080F: E6 IE 90025 S'Jl6C INC R ISL 0811: D0 02 00026 BNE SW 16D INCA Sw EET16 PC FOR FETCH the displacement is added to the program 08 I 3: E6 IF 00027 INC RISK 0815: A9 F7 00028 SW I6D LDA ISI6PAG counter effecting a branch. Except for BR 0817: 48 00029 PHA PUSK ON STACK FOR RTS 0818: A0 00 00030 LDV ISI2I (Branch always) and BS (Branch to Sub­ 081A: BI IE 00031 LDA (R I SL),Y fETCH INSTR 081 C: 29 0F 00032 AND '$f MASK REG SPECIFICATION routine), the branch operation codes are 1218 IE: SA 1210033 ASL A DOUBLE FOR 2-BYTE REG ' 5 081F: AA 00034 TAX TO X - ~EG fOR INDEXING assigned in complementary pairs, rendering 0820: 4A 00035 LSR A them easily remembered for hand coding. 0821: 51 IE 90936 [DB

BYTE November 1977 151 Listing 2, continued: memory locations li ke 6502 instructions, The main loop at SW '16B repeatedly ca ll s 08761 DC 00098 OFB OCR- I CFX> 0877t 5£ 00099 OPB NUL-I (El the "execute in struction" routine at SW16C 0878 : SE 00100 OPB NUL-I ( trN U5ED> 0819. SE 00101 OFB NUL- ) (Fl which exam ines one op code for type and 081A. 10 CA 00102 SET BP~ SEE. ALWA'!"$ TAKEN 081 C. BS 00 00103 ~ O ~OA P,0 L .. X branches to the appropriate subroutine to 30104 BK EQU '- 1 081 E. 85 00 00105 STA R0L execute it. 0880. 85 0 1 00 106 LOA P,0H .. X MOVE. RX TO Re 0882. 85 01 00101 STA R0H Subroutine SW16C increments th e pro­ 0884 . 60 00 108 PoTS 1!l88S1 AS 00 00109 ST ~ OA H0L gram co unter (R15) and fetches the ne xt op 0881' 95 00 00110 STA R0L .. X MOVE R e TO RX 0889: AS 3 1 00111 ~OA ~0H code which is eithel- a registe r operation of 13888: 95 31 00112 STA n0H .. x 0880. 60 00113 RTS the form OP REG (2 hexadecim al digits) 08SE. AS 00 00114 STAT ~OA R0 ~ 0890. 81 00 001 15STAT2 STA (R0L .. X) STORE BYTE IN DIflE.CT with OP between hexadecim al 1 and F, or 0892 : A0 03 00116 ~DY 1$0 3894: 84 10 00117 STAT3 STY R 14H INDI CATE H0 I S RES ULT ~EG a nonregister operation of the form 0 OP 0896. F6 00 00 11 8 1NR INC R0L .. X 0898. 00 02 00 11 9 BNE I NR2 INCR RX with OP between hexadecimal 0 and O. 0e9A: F6 31 001 20 INC R0H .. X B8ge, 60 00121 I"R2 qTS Assuming a register operation, the reg ister 3690: A l 00 00122 LDAT ~OA (R0L .. X> L OAD INDI RECT (RX) 089F. 85 00 00123 STA n0~ TO R0 spec ification is doubled to acco unt for th e BBAl: A0 03 00124 LDY "0 "BAJI 64 01 00125 STY P.0H ZE~. O HIGH-ORDE-R A0 BYTE 2 byte SWEET16 registers and placed in th e 0BASI Fe ED 00 126 BEQ STAT 3 ALWAYS TAKEN 0BA7: A0 013 00 121 POP ~DY "0 HIGH ORDE-A BYTE 2 " X register for ind exing. Th en the instruc­ 08A9. F0 06 00128 BEQ pQp2 ALWAYS TAKEN 08AB. 20 OD 08 00 129 POPO J SR Dcn, DECR RX tion type is determined. Register operations 08AEI Al 00 00130 ~O A (peL .. X ) POP H I GH-ORDER BYTE. i RX 08B0. A8 00 131 TAY SAVE IN Y-REG pl ace th e doubled register specificat ion in 08B1 , 20 DD 08 00132 POP2 JSR DCR DECP. RX 08B4. Al 00 00133 ~OA en0L .. X) L 01. .,r - OR.DER BYTE the hi gh ord er byte of R14 indi cating the 08B6. 85 00 00134 ST A P.0~ TO R0 0BB8: 84 01 00135 STY R0H " pri or result register" to subseq uent branch 08BA. A0 00 00136 POP3 ~ DY "0 IN DI CATE R0 AS ~A ST 08BC. 84 I D 00131 STY R 14H RESUL T REG ins tructions. Nonregister operations treat the 08BEI 60 00138 RTS "BBF; 20 9 D 38 00139 ~OO AT JSR LOAT LOW BYTE TO R0 .. INCR AX register specification (right·hand half-byte) 08C2 . AI 00 00143 ~OA ( R0L .. X> HIGH-ORDER BYTE TO R0 08C4, 85 01 00141 5TA R0H as their op code, increment the SWEET16 08C6, 4C 96 08 00142 JMP INR I NCR RX 08C9, 20 8E 08 30143 STOAT JSR STAT STORE INDIRECT LOU - ORDER PC to poin t at the displ ace ment byte of 08CC. AS 01 00144 ~OA R0H BYTE AND INCR RX· THEN 08CE, 81 00 00145 STA (R0L .. X> STORE HIGH-ORDER BYTE. branch in structions, load the A- Reg with the 0800. 4C 96 08 00146 JMP INR INCR RX AND RETURN 08D3, 20 00 08 00147 S TPAT JSR OCR DECR RX " pri or res ult register" index for branch 0806, AS 00 00148 ~OA R0L 0808 , 81 00 00149 STA (A 0L .. X> STORE R0 ~OU BYTE 'RX condition testing, and clear the V-Reg. 080A. 4C BA 08 00150 JMP POP3 INDICATE R0 AS ~AST 0800, BS 00 0 0 151 OCR ~OA R0L .. X ~ESl' L T REG 080F, 00 02 00152 BNE DCn2 DECR RX 08EI, 06 01 00153 DEC R0H .. X When Is an RTS Really a JSR? 08E3. 06 00 00154 OCR2 DEC R0 ~. X 08 E S. 60 00155 RTS 08E6. A0 00 00156 SUB ~D':" 1$0 RESULT TO R0 Eac h instruction type has a con'espond ing 08£8, 38 00151 CPR SEC NOTE Y-REG = 13.2 fOR CPR 36E91 AS 30 00158 ~OA R0~ subroutin e. Th e subroutine entry points are 08E81 F5 013 00159 SBC R0L .. X 08EO. 99 00 00 00160 STA R0L .. y Re- AX TO RY stored in a table which is directly indexed by BSFel AS 01 00161 ~OA R0H 08F2. FS 01 00162 SBC R0H .. X the op code. By ass igning all the entries to a 08f4: 99 0 1 00 00 163 SUB2 STA P0H .. Y 0SF7; 98 00 164 TYA L AST RESULT PEG.2 common page, on ly a single byte of add ress 08F8. 69 00 001 65 ADe 1$0 CARny TO LSB eBFA: 85 1 D 00 166 STA R 14H need be stored per routine. Th e 6502 in· 08FC. 60 00161 RTS 08FO. AS 00 00 168 ADO LOA R0 ~ direct jump mi ght have been used as follows 08FF. 15 00 00 169 AOC R0L .. Y 0901. 8500 00 17 0 STA R0L to transfer co ntrol to the appropriate 09031 AS 01 00111 ~DA P0H 0905. 150 1 00112 AOC R0H .. X subroutine: 0907: A0 00 00113 ~OY "0 R0 fOR RE SUL T 0909: Fe E9 00 114 8£" SUB2 fIN 1 SH ADD LOA #AORH Hi gh order address byte 0900. AS IE 00 115 BS ~OA P: I SL NOTE X- REG I S 12.21 0900: 20 90 06 00116 J SA STAT2 PUSH L Oi.' PC BYTE V IA nl2 STA INO+l 09101 AS If 00177 ~OA PI5H 0912. 20 90 08 00 11 8 J SR STAT2 PUSH H I GH-ORDE~ ~C EY TE LOA OPTBL,X Low order byte 091 S. 18 00119 BP C ~ C 0916 . B00E 00180 BNC BCS BNC2 NO CARRY TEST STA INO 09 18: 81 IE 00181 B"I ~OA "~ISL> .. Y DISPLACENENT DYTE 091A. 10 01 00 182 BP~ BR2 JMP (INO) 09 I C, 88 00 183 DEY 0910. 65 IE 00184 Bq2 AOC R I SL ADD TO pC 091 FI 85 IE 00185 STA R ISL To save code the subroutine entry address 0921: 98 00186 TYA 0922. 65 IF 00 187 AOC R I SH (minus 1) is pu shed onto the stack, hi gh 0924. 85 IF 00188 STA P ISH 0926. 60 00 189 ONC2 RTS order byte fi rst. A 6502 RTS (ReTurn from 0921. B0 EC 00190 BC BCS B~ 0929. 60 00 19 I RTS Subroutine) is used to pop the address off 092A: 0A ~0 1 92 BP ASL A DOUBL E. RESUL T- R EG INDE.X 0928: AA 00 193 TAX TO X -REG FOR IN DEX I NG the stack and into the 6502 progra m coun te r 092C: 85 01 00 1 9/~ ~OA 110B .. X TEST FOR PLUS 092E: 10 E.8 00195 BP~ BRI BnANCH I f SO (after incrementi ng by 1). Th e net res ult is 0930. 60 00 196 RT S 093 1: 0A 00197 Bli AS~ A DOUBL E. RESULT - REG I NDEX that th e des ired subroutine is reached by 3932: AA 0~198 TAX 0933. BS 01 00199 ~D A P.0H .. X T£.5T fOn t'1lNUS executing a subroutin e retu rn instruction! 09351 3121 El 00200 BMI Bn I 0931. 60 0020 1 r:TS [This ironic situation is an example of what 09381 0A 00202 BZ AS~ A DOllBLE RESULT- REG INDEx 0939: AA 00203 TAX is commonly referred to as "cleverness. "] 093A: 85 00 00204 ~OA R0L .. X TEST FOP. 7. ERO 093C. I S 01 00205 ORA R0H .. X (SO TH BYTES) 093E. F0 08 00206 DEQ O? I BRANCH 1 F s o 0940: 60 00207 RT S Op Code Subroutines 0941: 0A 00208 BN~ AS~ A DO UBL E nESlILT - !'H.G I NDE.X 0942: AA 00209 TAX Th e register operation routines make use 0943: 85 03 0021~ ~ DA P0L .. ~ TEST FOR NDN~ EnD 0945: 15 0 1 00211 ORA R0H .. ':( (BOTH BY T ES > of the 6502 "zero page indexe d by X" and 0941: 00 CF 0321 2 ON E SR I BPANCH I F SO 0949: 60 00213 ? T 5 "indexed by X indil'ect" addressing mod es 094A: 0A 002148M1 AS~ A DOUBLE Qr:C;II1...T - I"lEG IN DEX 0948: AA 00215 TAX to access the spec ified I-egisters and in di rect 094C: 85 013 002 16 L UA R0L .. X CUEC I{ BOTH EYTl:.S 11I94E: 35 01 00211 AND R0H .. Y, fOR liff (MINUS I) data. The "result" of most register ops is left

152 BYTE Novemher 1977 Listing 2, continued: in the specified register and can be sensed by subsequent branch instructions since the

0950: 49 FF 00218 EOP. ~ !IFF register specification is sayed in the high 0952: F0 C4 00219 BEQ Bn I BRAN CH I F SO 0954: 60 00220 nTS order byte of R·14. Th is specification is 0955: 0A 00221 8NM I ASL A DOUBLE RE5ULT- PE.G INDEX 09561 AA 00222 TAX changed to indicate RO (ACC) for ADD and 09511 B5 00 00223 LOA R0 L~ X 0959: 35 01 00224 AND R0H .. X CHK 80TH RYTES fOR NO iFF SUB instructions and R13 for the CPR 09581 49 fF 0022S ~OR It.FF 0950. 00 B9 00226 BNE BRI BPANCH If NOT MINUS I (compare) instruction. 095F. 60 00227 NUl. RTS 0960: A2 18 00228 ns LOX 1$1 B 12* 2 FOR 1'12 AS STK PNTR Normally the high order R 14 byte holds 0962. 20 DO 08 00229 J SR OCR DEeR STACK POINTER 0965: AI · 00 00230 LOA (R0L .. x) PO? HI GH P.ETURI~ ADR TO PC the "prior resu lt register" index times 2 to 0961: 85 If 00231 STA RI5H 0969: 20 DO 08 00232 JSR OCR SAME FO? LOV-ORDER BYTE account for the 2 byte SWEET16 registers, 096C: AI 00 00233 LOA (R0L .. X > 096E: 85 IE "0234 STA R I SL and thus the least significant bit is zero. If 0910: 60 00235 RTS 0911. 4C 3E 08 00236 RTN JMP RTN~ ADD, SUB or CPR instructions generate 00237 * 00238 • RJ,.G SAVE/RESTORE ROUTINE:5 carries, then this index is incremented, set­ 00239 • FOR NON-APPLE-II SYSTEMS 00240 • ting the least significant bit, which becomes 0024 1 ASAV EPZ $45 00242 XSAV EPZ $46 a carry flag. 00243 YSAV EPZ $41 00244 PSAV EPZ $48 The SET instruction increments the pro­ 09741 85 4S 00245 SAvE STA ASAV 0916: 86 46 00246 STX XSAV SAVE 6S02 REG CONTE.NTS. gram counter twice, picking up data bytes 0918: 84 41 00241 STY YSAV 091 A: 08 00248 PHP for the specified register. In accordance with 091 B: 68 00249 PLA 997CI 85 48 00250 STA PSAV 6502 convention, the low order data byte 097 £1 60 00251 RTS 097 Fl AS 48 00252 RESTORE LOA PSAV precedes the high order byte. 0981: 48 00253 PHA 09821 AS 45 00254 LOA ASAV Most SWEET16 nonregister operations 09841 A6 46 00255 LOX XSAV RE.STOP.E 6502 REG CONTENTS. 09861 A4 47 00256 LOY YSAV are re lative branches. The corresponding 0988. 28 00251 PLP 09891 60 00258 RTS subroutines determine whether or not the "prior res ult" meets the specified branch Table 7: condition and if so update the SWEET16 program counter by adding the disp lacement SWEET16 OP CODE SUMMARY value (-128 to +127 bytes). Register Ops Nonregister Ops The RTN operation restores the 6502 register contents, pops the subroutine I'eturn 00 RTN (Return to 6502 mode) 1n SET Rn Constant (Set) 01 BR ea (Branch always) stack and jumps indirect through the 2n LD Rn (Load) 02 BNC ea (Branch if No Carry) SWEET16 program counter register. This 3n ST Rn (Store) 03 BC ea (Branch if Carry) transfers control to the 6502 at the instruc­ 4n LD @R n (Load indirect) 04 BP ea (Branch if PI us) 5n ST @Rn (Store indirect) 05 BM ea (Branch if Minus) tion immediately following the RTN in­ 6n LDD @Rn (Load double indirect) 06 BZ ea (Branch if Zero) struction. 7n STD @Rn (Store double indirect) 07 BNZ ea (Branch if NonZero) 8n POP @Rn (Pop indirect) 08 BM1 ea (Branch if Minus 1) The BK operation actually executes a 9n STP @Rn (Store pop indirect) 09 BNM1 ea (Branch if Not Minus 1) 6502 break instruction (BRK), transferring An ADD Rn (Add) OA BK ea (Break) control to the interrupt handler. Bn SUB Rn (Sub) OB RS (Return from Subroutine) Cn POPD @Rn (Pop double indirect) OC BS ea (Branch to Subroutine) Any number of subroutine levels may be On CPR Rn (Compare) 00 (Unassigned) implemented within SWEET16 code via the En INR Rn (I ncrement) OE ( Unassigned) BS (Branch to Subroutine) and RS (Return Fn OCR Rn ( Decrement) OF (Unassigned) from Subroutine) instructions. The user must initialize and otherwise not disturb SWEET16 Operation Code Summary: T able 1 summarizes the list of SWEET16 opera­ tion codes, which are explained in further detail one by one in the descriptions which R12 if the SWEET16 subroutine capability follow t he table. The program of listing 2 implements the execution of these interpretive is used since it is utilized as the automatic codes after a call to the entry point SW16. Return to the calling program and normal subroutine return stack pointer. noninterpretive operation is accomplished with the RTN mnemonic of SWEET16. Memory Allocation and User Modifications SWEET16 - REGISTER OPERATIONS The only storage that must be allocated

SET Rn, Constant (Set) for SWEET16 variables are 32 consecutive locations in page zero for the SWEET16 constant registers, four locations to save the 6502 The 2 byte constant is loaded into Rn (n ; 0 to F, hexadecimal) and branch condi­ register contents, and a few leve ls of the tions set accordingly. The carry is cleared . 6502 subroutine return address stack. If you Example : don't need to preserve the 6502 register 15 34 AO SET R5, A034 R5 now contains A034 contents, delete the SAVE and RESTORE subroutines and the corresponding sub­ routine calls. This will free the four page 2 (Load) LD Rn zero locations ASAV, XSAV, YSAV and The ACC (RO) is loaded from Rn and branch conditions set according to the data PSAV . transferred. The carry is cleared and the contents of Rn are not disturbed. You may wish to add some of your own Example : 15 34 AO SET R5, A034 25 LD R5 ACC now contains A034 Text continued on page 159

154 BYTE November 1977 Circle 81 on inquiry card. FINALLY. A State-of-the-Art 1hoiForLearniug Software Design. And at an affordable price. Th e ST Rn 3 (store) Modu-Learn™ home study cou rse from Logica) Services. The ACC (RO) is stored into Rn and branch conditions set according to the data Now you can learn microcomputer transferred. The carry is cleared and the ACC contents are not disturbed . programming in ten comprehensible Example: lessons. At home. In your own time. At 25 LO R5 Copy the contents your own pace. 36 ST R6 of R5 to R6 . You lea rn to so lve complex problems by breaking them down into easi ly programmed modules. Prepared by LO @Rn 4 (Load indirect) professional design eng in eers, th e Modu-LearnTM cou rse presents sys­ The low order ACC byte is loaded from the m emory location whose address resides tematic software design techniques, in Rn , and the high order ACC byte is cleared . Branch conditions reflect the final stru ctured program design, and prac­ ACC contents which will always be positive and neve r minus 1. The carry is cleared. tical examp les from real 8080A After the transfer, Rn is incremented by 1. micro-computer appl ications. All in a Example: modular sequence' of 10 lessons . . 15 34 AO SET R5, A034 more than 500 pages, bound into one 45 LO @R5 ACC is loaded from practical notebook for easy reference. memory location A034 and R5 is incremented Yo u get diverse examples, problems, to A035. and so lutions. With thorough back­ ground material on micro-computer architecture, hardware/software trade­ offs, and useful reference tables. All ST@Rn (Store i ndi rectI for only $49.95. The low order ACC byte is stored into the memory location whose address re sides in For $49.95 you lea rn design tech­ Rn. Branch conditions reflect the 2 byte ACC contents. The carry is cl eared . After niques that make software work for the transfer, Rn is incremented by 1. you . Modu-LearnTM starts with the Example : basics. Our problem-solution ap­ 15 34 AO SET R5, A034 Load pointers R5 and R6 proach enables you to "graduate" as 16 22 90 SET R6, 9022 with A034 and 9022 . a programmer. 45 LO @R5 Move a byte from location See Modu-LearnTM at your local com­ 56 ST @R6 A034 to location 9022. Both puter store or order now using the pointers are incremented. coupon below . •••••••••••••••••••••••••••••••••••• T Please send the Modu-Learn " course for: LOO @Rn 6 n (Load double byte indi rectI me to examine. Enc losed is $49.95 (plu s : I $2.00 postage and handling) or my: The low order ACC byte is loaded from the memory location whose address resi des Mastercharge/Bankamericard authori za- : in Rn , and Rn is then incremented by 1 . The high order ACC byte is loaded from the t~n . E memory location whose address resides in the (incremented) Rn and Rn is again incremented by 1. Branch conditions reflect the final ACC contents. The carry is Name : ~ ______·: cleared . Address: ______·: Example : City: ____ State: ______: 15 34 AO SET R5, A034 65 LOO @R5 The low order ACC byte is Card # ______loaded from location A034, Expiration date: ______the high order byte from location A035. R5 is incre­ Signature: ______m en ted to A036.

STO@Rn 7 (Store double by te indi rectI

The low order ACC byte is stored into the m emory location whose address resides in Rn, and Rn is then incremented by 1. The high order ACC byte is stored into the memory location whose address resides in (the incremented) Rn and Rn is again incremented by 1. Branch conditions reflect the ACC contents which are not dis­ turbed. The carry is cleared. Example: .711 Stierlin Road 15 34 AO SET R5, A034 Load pointers R5 and R6 : Mountain View, CA 94043 16 22 90 SET R6, 9022 with A034 and 9022. Move : (415) 965-8365 65 LOO @R5 double byte from locations : ...... 76 STO @R6 A034 and A035 to locations 9022 and 9023 . Both pointers are incremented by 2. LOGICAL SERVICES INCORPORATEO

BYTE November 1977 155 Circle 98 on inquiry card.

IT ALL ADDS UP TO EDUCATIONAL

The cre,ltors of the onglnalUJ POCker Calcula(Qr Game Book now presenr two fun·fl ll eci new gil me books for use WI(ll thelt Increrlll)le IllilChlne (/lilt Il clS found ,1 POP@Rn 8 (Pop indirect) plilce In illmost every home The low order ACC byte is loaded from the memory location whose address resides in Rn after Rn is decremented by 1 and the high order ACC byte is cleared . Branch condi t ions refl ec t the fi nal 2 byte ACC contents which will always be positive and ne ver minus 1. The carry is cleared . Because Rn is decrel')1ented prior to load ing the ACC, single byte stacks may be implemented with the ST @Rn and POP @Rn opera­ tions (Rn is the stack pointer). Example : 15 34 AO SET R5,. A034 Init stack pointel·. 10 04 00 SET RO, 4 Load 4 into ACC. 35 ST @R5 Push 4 onto stack. 10 05 00 SET RO, 5 Load 5 into ACC. 35 ST @R5 Push 5 onto stack. 10 06 00 SET RO , 6 Load 6 into ACC. 35 ST @R5 Push 6 on to stac k . 85 POP @R5 Pop 6 off stack into ACC. 85 POP @R5 Pop 5 off stack . 85 POP @R5 Pop 4 off stack.

STP @Rn 9 n I (Store pop indirect) The low order ACC byte is stored into the memory location whose address resides in Rn after Rn is decremented by 1. Then the high order ACC byte is stored into the memory location w hose address resides in Rn after Rn is again decremented by 1. THE KIDS' POCKET CALCULATOR Branch conditions will reflec t the 2 byte ACC contents which are not modified. STP GAME BOOK @Rn and PLA @Rn are used together to move data blocks beginning at the greatest by Edwin SCillOSsberg and John BroCkma n address and working down. Additionally, single byte stacks may be implemented A qUICk tnp through elementClry mathe· with the STP @Rn and LOA @Rn ops. matiCS - fun and games with real purpose Example: The first lXJok of Its kind for kids from klnderg;:Jrten through college .llIlIstrClted 14 34 AO SET R4, A034 Init pointers. with li ne draWings and cartoons 15 22 90 SET R5, 9022 $695 hardcover $395 paperbound 84 POP @R4 Move byte from A033 95 STP @R5 to 9021. 84 POP @R4 Move byte from A032 95 STP @R5 to 9020.

ADD Rn (Add)

The contents of Rn are added to the contents of the ACC (RO) and the low order 16 bits of the sum restored in ACC. The 17th sum bit becomes the carry and other branch conditions reflect the final ACC contents. Example: 10 34 76 SET RO, 7634 Init RO (ACC) 11 27 42 SET R1, 4227 and R1 . A1 ADD R1 Add R 1 (sum = B85B, carry clear) AO ADD RO Double ACC (RO) to 70B6 with carry set.

SUB Rn B (Subtract)

The contents of Rn are subtracted from the ACC contents by performing a t wo's THE POCKET CALCULATOR complement addition: GAME BOOK # 2 by Edwin SCh lOssbe rg and ACC ACC + Rn + 1 John BroCkman Even more popular In approach than Its The low order 16 bits of the subtraction are restored in the ACC. The 17th su m bit f amous predecessor, this bOOk IS becomes the carry and other branch conditions reflect the final ACC contents. If the Simpler, more accessib le, and ItS games 16 bit unsigned ACC contents are greater than or equal to the 16 bit unsigned Rn are more mathematically baSIC contents then the carry is set, oth erwise it is cleared . Rn is not disturbed. Ill ustrated with line drawings and ca rtoons. Example : $695 hardcover $3 .95 paperbound 10 34 76 SET RO, 7634 Init RO (ACC) 11 27 42 SET R1, 4227 an d R1 . A1 SUB R1 Subtract R 1 (diff = 3400 ffiJWILLIAM MORROW with ca rry set) AO SUB RO Clears ACC (RO)

156 BYTE November 1977 Circle 16 on inquiry ca rd,

POPD @Rn C (POP Double byte indirec t) , '~\\"'~ " \ Rn is dec remented by 1 and the high order ACC byte is loaded from the memory location whose address now resides in Rn . Then Rn is aga in decremented by 1 and , '.\ "',\' the low order ACC byte is loaded from th e corresponding memory location . Branch .\ .. "\ ....., conditions reflect th e final ACC contents. The carry is cleared. Because Rn is decre­ mented prior to loading eac h of the ACC halves, double byte stacks may be imple­ Shopping for a computer mented with the STD @ Rn and POPD @ Rn operations. (Rn is the stack pointer). Example: at the ByteShop 15 34 AO SET R5, A034 Init stack pointer. is almost as 10 12 AA SET RO, AA12 Load AA 12 into ACC. 75 STD @R5 Push AA 12 onto stack. much fun as building one. 10 34 BB SET RO, BB34 Load BB34 into ACC. Compulel'S are fun. And afford­ 75 STD @R5 Push BB34 onto stack. ab le. Thousa nd s of people Me 10 56 CC SE T RO, CC56 Load CC56 into ACC. a li-ca dy using pe rso nal co mpuh~ rs 75 STD @R5 for TV ga me s, video co lol' C5 POPD @R5 Pop CC56 off stack. grap hi cs, digila lmusic and lots of C5 POPD @R5 Pop BB34 off stack. thi ngs nobody ever dreamed of POPD @R5 Pop AA 12 off stack. C5 -till now. Until we ca me along the to ughes t pa rt about ge tting started with co mputers was shopping fo r CPR Rn (Compare) one. Now you ca n visit a By te Shop and put your hands on a w ide The ACC (RO) conten ts are compared to Rn by performing the 16 bit binary sub­ va riety of persona l, hobby and traction ACC-Rn and storing the low order 16 difference bits in R13 for subsequent business co mputers. branch tests. If the 16 bit unsigned ACC contents are greater than or equal to the 16 bit unsigned Rn contents then the carry is set, otherwise it is cleared. No other Arizona B!lll ld l'f registers, including ACC and Rn, are disturbed. I'llIll:ni.\ ""l SI 2040 J011 1 SI. XI 3 N.Scol1Sil:ill' Rd . Florid;t Example : Ph ol'n i.\ \V~' Sl CU\,'\I" lho: ll' h 126 ." 4 N. 2X lh J>ri w 1325 N, J\1 1:1I1I ic AVl'., S ui tl' 4 15 34 AO SET R5, A034 Pointer to memory. TlI L'S ( .ll 1' 1. 1. ;llHiL'rd :il l' 16 BF AO SET R6, AOBF Limit address . 26 12 I: , llr,);.d w :Jkl:l1lu Pa rk r..'li ;lIl1i 10 00 00 L OOP SET RO, 0 Zero data. Cllifc)rlli:l Ikrk('k'v 7X25 Hi rd Rnad 75 STD @R5 Clear 2 locs, incr R5 by 2. IS I4 Uilivl:rs il }' -"Vt', Indiana 25 LD R5 Compare pointer R5 Burh'lnk Ind i;1I1;q'"lis N .. rth D6 CPR R6 to limit R6. IXl l W. Burha nk Blvd. 5947 I'" H2 nd 51. Camphdl Ka nsas 02 F8 BNC LOOP Loop if carry clear. 2626 Uninn I\w. Missil tn Dia hln Va ll ,,'y 5X 15 .I ll hns .. n Driw 29H9 N. M:dn SI. Minm'sola !-alrnl'lli l : a~;JIl 11 90:1" StH'l'! 1434 Y;lIlk~'~' I> tltldk Rd . INR Rn (Increment) I fl' Sll o Mo nlJna 3 139 1:.. . ~h'K illk y I\w. Billin ~~ The contents of Rn are incremented by 1. The carry is cleared and other branch IlaY\\ilrd 120 1 (;r;IIHI J\Vl'., Suill' 3 11 22 " U" Sl rl' I,.' ! N('w York conditions reflect the incremented value. Los A nJ,:l' Ics 1 , l'vill~tWll 3030 W. Oh'1l1pi c Blvd . 272 1 Hcmpsll'ad Tu rnp ike Example: r.:lwndah: i{oclll'S\l'r 15 34 AO SET R5, A034 Init R5 (pointer) 1650H !-!il w lh!lrll \,' Bl vd. 264 I';Hk Awnlh' Lone Ikal'll Ohio 10 00 00 SET RO, 0 Zero to RO . 54 33 I'. . Sll'arns Sl. Rllck\' Ri vl'r 55 ST @R5 Clears loc A034 and incrs ~'l:irin;1 Dr! R ~'y 19524 ('cn ll' l Rid ~l' Rd . 46 5R B Ort.'gon R5 to A035. Admiralty \\1(1), Ik"vl' r tlill E5 INR R5 Incr R5 to A036 Mu ulll a in V inv 34R2 5W CL'd;l f Hill s Il lvd. 1063 \V. 1-: 1 C lIllinu R ~;d 55 ST @R5 Clears loe A036 (not A035) I'o rtbnu l'aloAllo 2033 SW 4 th 2233 t-:I Cam ino Ih'al I'l' nllsylvania 1' ; l s:J d ~ lI a Br}' 11 M;J\\r 496 \\I. J\w . La h' 1045 W. 1.:II lt'asll'r AVl'. Pla ce nlia (Decrement) Norlh Ca rulin a DCR Rn IF 123 L Yo rh;J Lil1d a n I R;Iil-i !!ll S"er.lnl\,·n ll t 12 1 3"lIiJls hnrllu!! h 5trl'd 604 1 (;rcCn h;Jl' k Lane The contents of Rn are decremented by 1. The carry is cleared and other branch SOllih CarolillJ San Diq.!1l conditions reflect the decremented va lue . H250 ViL'kers- 11 ('u lulll hi;t 201 H l;r l~l'n 51. Example: (Clear nine bytes beginn'ing at loc A034) Sa n l 'l'rnillH lo V;dk'), I H424 Vl' l1lllril Bl vd. Ulah 15 34 AO SET R5, A034 In it pointer. Sa n [:r.l1ldsl'lI 5:11 1 Lakl' ('il }, 261 S. SIOI ll' SI. 14 09 00 SET R4, 9 Init count. 32 1 l'al'il'k J\Vl' . Santa Barbara Wa shinglo n 10 00 00 SET RO, 0 Zero ACC. 4 Wes l Missilln IkllL-Vlll' 55 LOOP ST @R5 Clear a mem byte. 5 11)(:klon ,1470 1 NF 20l h Ave. F4 DCR R4 Decr count. 79 1() N. Eldur:tdu SI. Can:uJa T ho us;lIlu (h ks V:'IlI.:II UVCr 07 FC BNZ LOOP Loop until zero. 2707 Thollsand O;Jks Bl vd. 2 15 1 Hurr;ml 51. Ve n tu ra Will1lipt'!!, 1555 Mllrs\,' AVl'. 665 CCIi I tI (}' SI. SWEET16 Nonregister Instructions Westm in ster Japan 14 300 Bl';u:h Ul vd. 1'o k "l1 Colorado T {l\\:;1 Bid!.!., 1-5-9 RTN I 0 I 0 I (Return to 6502 mode) Arapahol' County 5olol\

BYTE November 1977 157 Circle 135 on inq uiry ca rd. WARBLE ALARM CAR-VAN CLOCK E LAPSED TIMER SECONDS DISPLAY SW IT CII WITH HEADLIGHT ALARM d d (B ra nch Always) 9 MINUTE SNOOZE ALARM BR ea o

SIMP LE 4 WIRE IIOOK·UP An effective address (ea) is calculated by adding the signed d isplace ment byte (dd) JU MBO Y," l ED DISPLAY to the program counter. The program counter contains the address of the instruction

1 TO 59 MINUTE COUNTDOWN immediately following th e BR. or the address of t he BR operation plus 2. The dis­ TI MEr "' IN S SIMUL TANEOUSl Y pl acement is a signed two's complement value from - 128 to +127. Branch conditions WITH CLOCK! are not changed. Note th at effective address ca lcul ation is identical to that f or 6502 RUGGED ABSCASE relative branches . COMPLETE KIT $35.9~. QUAR TZ CRYSTAL Some examples: ACCURACY ASSEMBLED $45.95 dd ; $80 ea ; PC + 2 - 128 dd ; $8 1 ea ; PC + 2 - 127 DIGITAL AUTO INSTRUMENTS dd;$F F ea ; PC+2 - 1 . 1 TACH OMETE R SEVEN MODE LS! dd ; $00 ea ; PC + 2 + 0 .2 WATE R TEMP. KIT INCLUD ES : .3 FUEL LEVEL • CASf & All IIAAII\'Io\H[ dd ; $01 ea ; PC + 2 + 1 .4 SP EE DOMETE R' • PRESSUR[f. TEMP SlIIO[RS dd ; $7E ea; PC+2+ 126 .5 OIL PRESS URE • ASS£MYUU Mo\I/1 PC BOARO _6 Oil TE MP . FEATU RES : dd ;$7F ea ; PC+2+127 • 1 BA TT ER Y MONITO R • 4',,' ,4 ' . 1" AII$ CAS( Example: "ADO S ID FOR REOUIR ED SpEED SENDER . S15 FOR SPEED SE NOeH ALON E KIT: $49.95 ...... ASSEMBLED: $59.95 $300 : 01 50 BR $3 52 ELECTRONIC 'PENDULUM' CLOCK

SW ING PENDULUM BN C ea (Branch if No Carry) r HOURS AND MINUTES DISPLAY TIME SET PUSH BUTTONS A branch to the effec tive address is taken only if th e carry is clear, otherwise execu­ A L ARM FEAT URE tion res umes as normal w ith the ne x t instruction . Branch conditions are not changed. KIT·UNFINISHED CASE ...... $59.95 ASSEMBLED·STAINED CASE ...... $69.95 QUARTZ DIGITAL AUTO CLOCK BC ea o 3 d d (Branch if Carry set) DR ELAPSED TIMER! ELAPSED TI MER : HRS. MINS & SECS SIMP LE PUSHBUTTON RESET & A branch is effected only if the carry is set. Branch conditions are not changed . HOLD TOGGLE SWIT CH KIT INCLUDES EVERYTHING, NOTHING ELSE TO 8UY I 4 " LEOS! INTERNAL 8ATTERY 8.1CKUP! NON POLAR INPUT! (Branch if Plus) D IMENSIONS 4 ','. 4 " x:2" BP ea d d KIT : $27.95 ...... ASSEMBLED : $37.95 A branch is effected only if the prior "result" (or most recently transferred data) was NOWWITH positive . Branch conditions are not changed . ELAPSED Example: (Cl ear m em from loc A034 to A03F) TIME! 15 34 AO SET R5, A034 Init pointer. 3% DIGITAL CLOCK 14 3 F AO SET R4, A03F Init limit. • J DIGIT K IT $49.95 'DIGIT ASSEMB LED . $59.95 10 00 00 LOOP SET RO, 0 • 6 DIG IT K IT $69.95 • 6 D IG IT ASSEMBLED . $79 .95 55 ST @R5 Cl ear mem by te, incr R5. 11 1 VAC 12 OR 24 HR MOOE ' KIT COMES COMP LETE ' 24 LO R4 Compare limit to 6 OIGI T VERSION 21" ~ 5" II l V/' . . 4 DIGI T VE RSI ON : I e" II 5" ~ I\!/' 0 5 CPR R5 pointer. TV -WALL CLOCK 04 F8 BP LOOP Loop until done. 15 ' VIE WING DISTANCE

.6" HOUR S & MINUTES BM ea o d d (Branch if Minus) , .3" SECONDS CO MP LETE WITH WOOD CASE A branch is effected only i f the prior "result" was minus (negative, MSB ; 1). Branch conditions are not changed. KIT : $34.95 . _ ... .. ASSEMBLED : $39 .95 ECONOMY CAR CLOCK y." LEO MO DULE ! BZ ea o 6 d d (Branch if Zero) COMPLETE WITH CASE . BRACKET & TI ME SET A branch is effected only if the prior "result" was zero. Branch conditions are not PUSH BUTT ONS changed. ALARM OP TI ON KIT : $19 .95 ...... ASSEMBLED: $26 .95 BNZ ea 7 d d (Branch if NonZero) PE ND U l UM G ' V[ "OUf~Dig l ~2~L~~D~~ ,~:~~~~ \'u MSW I N G o SIMPLE HOOK UP ro ANY CI.OCK A branch is effected on ly if the prior " result" was nonzero. Branch conditions are not changed.

$14.95 CASE WITH BRACKET $3.75 MARK FOSKETS' BM1 ea o 8 d d (Branch if Minus 1) A branch is effected onl y if the prior "res ult" was minus ($ FFFF hexadecimal). SOLID STATE TIME Branch conditions are not changed . !iiI P.O. BOX 2159 DUBLIN, CALIF. 94866 5 ORDERS (415) 828-1923 BNM1 ea o 9 d d (Branch if Not Minus 1) A branch is effec t ed only if the prior "result" was not minus 1 ($FFFF hexa­ IH: ... ~ ". decimal). Branch conditio ns are not changed. PHONE24HR 1:1"1:1,. CALIFORNIA RE SIDENTS · ADD 6% SA LE S TA X 158• BYTE November 1977 Text continued from page 154 BRK A ( Break) in stru ctions to thi s im plementation of A 6502 BR K (break ) instruction is executed. SWEET16 may be reentered non­ des tructi ve ly at SW16D after correcting ·the stack pointer to its value prior to SW EE T1 6. I f you use the un ass igned op ex ecuting the BR K. codes $OE and $O F, I'e membel' th at SWE ET1 6 treats these as 2 byte in stru ctions. You may wish to handl e the break in struc­ (Return from ti on as a SWEET1 6 ca ll , sav in g two bytes of RS o B SWEET16 Subroutine) co de each time you transfu in to SWEET16 RS t ermin ates execution of a SWEET16 subroutine and returns to the SWEET16 mode. Or yo u may wish to use the calli ng pro gram w hich re sumes ex ecution (in SWEET16 mode). R 12, which is the SWEET1 6 BK (Brea k) opel'ation as a SWEET16 subroutine return stack pointer, is decremented twice. Branch conditions are n ot change d. "CHAROUT" ca ll in th e in te rrupt handl er. You can perform abso lute jumps within SWEET1 6 by loading th e ACC (RO) with the Branch to address yo u wish to jump to (minu s 1) and BS ea o C d d SWEET16 Subroutine executin g a ST R 15 in stru ct ion. A b ran ch to the effecti ve address (PC + 2 + d) is taken and execution is resumed in And as a fin al thought, th e ultimate SWEET16 m ode. The current PC is pushed onto a "SWEET16 subroutine return modi fication fo r th ose wh o do not use th e address" st ac k whose pointer is R12, and R12 is incremented by 2. The carry is cleared and branch conditions se t to indicate the current ACC contents. 6502 processor wo uld be to impl ement a Example: (Calling a " m emory move" subroutine to move A034-A03B vers ion of SWEET1 6 fOI' so me oth el' mi cro­ to 3000-3007) processo r des ign. Th e id ea of a low leve l 300: 15 34 AO SET R5, A034 Init pointer 1. interp re ti ve processor can be fruitfull y 303: 14 3 B AO SET R4, A03B Init limit 1. impl emented fo r a numbu of purposes , and 306: 16 00 30 SET R6, 3000 Init pointer 2. 309 : OC 15 BS MOVE Call move subroutine. achieves a limited sort of machine ind e­ pend ence for the in te rpretive execution 3 20 : 45 MOVE LD @R5 Move one strin gs. I found this technique mos t useful 32 1 : 56 ST @R6 byte. for the impl ementati on of mu ch of the 3 22: 24 LD R4 software of the Appl e II co mputel'; I leave it 3 23: 05 CPR R5 Test if done. 324: 04 FA BP MOVE to readers to ex pl ore further poss ibiliti es for 326 : OB RS Return. SWEET16.-

The Best 01 BYTE, Volume I

The volume we have all been waiting for! The answer to those unavailable early issues of BYTE. Best of BYTE, edited by Carl Helmers Jr and David Ahl. This 384 page book is packed with a majority of material from the first 12 issues. I ncluded are 146 pages devoted to "Hardware" and how-to articles ranging from TV displays to joysticks to cassette interfaces, along with a section devoted to kit building which describes seven major kits. "Software and Applications" is the other side of the coin : on-line debuggers to games to a complete small business accounting system is included in this 125 page section. A section on "Theory" examines the how and why behind the circuits and programs. "Opinion" closes the book with a look ahead, as to where this new hobbY is heading. It is now available through B ITS I nc for only $11.95 'and 50 cents postage. ------. Name

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Circle 12 on inquiry card. BYTE Nove m be r 1977 159 A Pair of New Terminals

PERIPHERALS

Apple II Features Built-in Color integer BASIC language in cludes special Capabi li ty functions re lated to color vid eo display programming. In both the color graphics mode and in the high resolution graphics mode, four lines of text may be optionally displayed at the bottom of the sc ree n to annotate displays. The Ap:J le II also features a built-in cassette interface. Minimum memory configuration ava il able includes 4 K bytes of program­ mable memory and 8 K bytes of read only memory. A 2 K byte monitor provides debug commands, a mini­ assemb ler, disassembler, floating point package and software-simulated 16 bit arithmetic capability. The unit comes complete with a switching power supply which requires no fan. The computer is housed in a The Apple II is Apple Computer Inc's plastic case with dimensions of 18 by e ntry in the home computer market. The 15.25 by 4.5 in ches (45.72 by 38.74 by Infoton, Second Av, Burlington MA unit uses the MOS Technology 6502 11.42 cm). It comes with two game 01803, (617)272-6660, has introduced processor and can disp lay alphanumeric paddles and a . demonstration cassette this pair of video terminal products. The characters a nd video graph ics in 15 for $ 1298. I t is also availabl e in board Model 200 is the low end version, a colors using an y standard color tele­ only brrll, without case, keyboa\d, Teletype replacement with multiple vision set. power supply or accessories for $598. additional features and 80 character by A BAS IC la nguage package is per­ Contact Apple Computer Inc, 20863 24 line display. The Model 400 is a manently stored in 6 K bytes of read Steve ns Creek Blvd, Bldg B3-C, Cuper­ model with more features, including only memory; execution speed is fast tino CA 95014 .• upper and lower case display, additional enough to run many video games. The Circle 512 on inq uiry card. keyboard functions, etc. Both models feature RS-232, 20 mA current loop and 60 mA current loop serial interfaces at An Altair Bus Compatible Music Board The Music Board comes assembled 16 switch selected data rates to 19,200 and tested. Features in cl ude selectable bits per second. No price was given in output port address decoding, a latched the documentation from which this note 6 bit digital to analog converter, a udio was abstracted .• amplifier, speaker, volume control and RCA phono jack for connection to Circle 515 on inquiry card. external audio systems. It employs a glass epoxy printed circuit board with plated through holes and go ld plated 'Several Gimix for the SwTPC 6800 Bus fingers. A users manual, which is supplied We received a sales brochure for three with the board, includes a BASIC products available from Gimix Inc, 1337 Newtech Computer Systems' Model 6 language program for writing musical W 37th PI, Chicago IL 60609, (312)927- Music Board is designed to enable ex­ scores and an 8080 assembly language 5510, which plug directly into the South­ perimenters having Altair (S-100) bus' routine for playing them. The price is west Technic~1 Produ~ts Corporation's computers to produce music and sound $59.95. Contact Newtech Computer 6800 bus. One of these products is a effects. Applications in clude generati ng Systems In c, 131 Joralemon St, Brook­ $119 read only memory board which melodies, rhythms, sound effects, Morse lyn NY 11201, (212) 625-6220. . - holds up to 8 K of 2708 E ROM parts code and touch tone synthesis. Circle 513 on inquiry card. (not supplied), and can be placed on any eV,en 8 K memory address boundary (ie: 0600, 2000, 4000, 6000, 8000, AOOO , A CT-1024 Scroll Mod COOO, or EOOO) using switches. A second product is a $25 extender board for use Lenwood Computer Systems, POB when troubleshooting or debugging a 67, Hiawatha IA 52233, has an nounced prototype card. The third product is a a modification to Southwest Technical video output board which contains a 1 K Products Corporation's CT-1024 termi­ by 8 bit volatile programmable memory nal product. The Model SM-2 scrolling region which can be connected at any modification board is avai lab le at $19 1 K boundary in memory address space plus $ 1.50 postage and handling, and using jumpers. This $249 generator can converts the CT-1 024 style display from be set up for 16 lines of 32 characters or a page oriented display to a scrolling 16 lin es of 64 characters; output is EIA display. The photo shows the board video with adjustable "density"(?) and mounted on the CT-1024 main board left-hand margin. These products are usin g a stand off stud.= fully assembled .•

Circle 514 on inquiry card. Circle 516 on inquiry card.

252 BYTE November 1977