Programmed Introduction to MIPS Assembly Language

Total Page:16

File Type:pdf, Size:1020Kb

Programmed Introduction to MIPS Assembly Language Programmed Introduction to MIPS Assembly Language Bradley Kjell, Central Connecticut State University Revised Draft, June 2002 This is a course in assembly language Assembly Language is normally taken the programming of the MIPS processor. It semester after a course in a high level emphasizes the topics needed for study of programming language (such as Java or C). This computer architecture: bits, bit patterns, course assumes that you have this background, operations on bit patterns, and how bit patterns although no specific programming language is represent instructions and data. This course is required. equivalent to a semester-long junior college or university course (except, perhaps, for the Read the pages of this course actively. Think emphasis on bit patterns). about and answer the question at the bottom of each page. (This style of tutorial is called The only equipment you need for this course is a programmed learning. It is very effective for PC. The only software you need is the SPIM technical material). Most questions call for just a simulator of the MIPS R2000 processor, and a little thought. Some call for pencil and paper. text editor. The simulator is available by free Keep a pencil and a scrap of paper next to your download (see appendix A). Example programs keyboard. Each chapter is about 15 pages long. are presented using an MS Windows operating Spend several minutes per page. You can read system. However, you can use any platform that each chapter in about 30 minutes. runs SPIM. (There are many). Works best with IE 5.0 at 800 by 600 Part 1: Prelude to Assembly Language Assembly language: what it is, why it is studied, and where it is used. ● Chapter 1 — Computer Architecture and Assembly Language. ● Chapter 2 — Analog and Binary Signals. ● Chapter 3 — Bits and Bit Patterns. http://chortle.ccsu.edu/AssemblyTutorial/tutorialContents.html (1 of 4) [7/8/2545 18:08:56] Programmed Introduction to MIPS Assembly Language ● Chapter 4 — Computer Organization. Part 2: Data Representation Data: characters and integers. The binary addition algorithm. ● Chapter 5 — Characters. ● Chapter 6 — Number Representation ● Chapter 7 — Binary and Hex Representation. Flash Cards ● Chapter 8 — Binary Addition and Two's Complement Representation. Part 3: Running SPIM; Bitwise Logic Running SPIM. MIPS programming. Bitwise logic operations. ● Chapter 9 — A Simple SPIM Program. ● Chapter 10 — MIPS Programming Model ● Chapter 11 — Bitwise Logic with Immediate Operands ● Chapter 12 — Shift Instructions and Logic Instructions Part 4: Integer Arithmetic and Memory Access Integer arithmetic. Moving data to and from memory. ● Chapter 13 — Integer Addition and Subtract Instructions ● Chapter 14 — Integer Multiplication, Division, and Arithmetic Shift ● Chapter 15 — Memory Access: Loading and Storing Registers ● Chapter 16 — More Memory Access: Bytes and Halfwords Part 5: Branches, Decisions, and Loops Program flow: branch, jump, and set instructions; loops, and decisions. ● Chapter 17 — Jump and Branch Instructions http://chortle.ccsu.edu/AssemblyTutorial/tutorialContents.html (2 of 4) [7/8/2545 18:08:56] Programmed Introduction to MIPS Assembly Language ● Chapter 18 — Set Instructions and more Branch Instructions ● Chapter 19 — Structured Programming ● Chapter 20 — Loop and Branch Examples Part 6: Extended Assembly Language The assembler extends bare machine language. Registers have mnemonic names. Pseudoinstructions extend the bare hardware. ● Chapter 21 — Pseudoinstructions and the Pseudocomputer ● Chapter 22 — The SPIM Trap Handler ● Chapter 23 — Instructions for Bitwise Logic and Math ● Chapter 24 — Branch Instructions, Set Instructions, and Indexed Addressing Part 7: The Stack and Subroutine Linkage ● Chapter 25 — The Run-time Stack ● Chapter 26 — Simple Subroutine Linkage ● Chapter 27 — Stack-based Calling Convention ● Chapter 28 — Frame-based Calling Convention, Variables, and Recursion Part 8: Floating Point Data ● Chapter 29 — Binary Fractions ● Chapter 30 — IEEE 754 Floating Point ● Chapter 31 — Floating Point Arithmetic on MIPS ● Chapter 32 — Floating Point Comparison Instructions Part 9: Data Structures in Assembly Language. ● Chapter 33 — Future Work. ● Chapter 34 — Future Work. ● Chapter 35 — Future Work. ● Chapter 36 — Future Work. http://chortle.ccsu.edu/AssemblyTutorial/tutorialContents.html (3 of 4) [7/8/2545 18:08:56] Programmed Introduction to MIPS Assembly Language Appendices ● Appendix A — Downloading and Installing SPIM ● Appendix B — Register Use Chart ● Appendix C — MIPS Assembly Instructions ● Appendix D — MIPS Machine Language Format ● Appendix E — Binary Addition Calculator (Java applet) ● Appendix F — ASCII Chart ● Appendix G — SPIM Trap Handler Services Index ● Index Main Tutorial Menu http://chortle.ccsu.edu/AssemblyTutorial/tutorialContents.html (4 of 4) [7/8/2545 18:08:56] CHAPTER 1 — INTRODUCTION created: 06/25/96; 2nd edition: 03/17/01 CHAPTER 1 — INTRODUCTION This is a tutorial in assembly language for the MIPS R2000 processor chip using the SPIM simulator. Assembly language is used to write programs in terms of the basic operations of a processor. The architecture of a computer is a logical description of its components and its basic operations. In "pure" assembly language the architecture of the processor chip is clearly visible: one assembly language statement corresponds to one basic operation of the processor. With assembly language the programmer is clearly aware of the processor that will run the program. "Pure" assembly language is rare. Usually, for programmer convenience, assembly language is extended with statements that correspond to several basic machine operations. MIPS assembly language does this, but the processor chip is still visible. Programs in high level languages such as C or Pascal are (mostly) independent of the processor they run on. The processor is not visible in the language. This chapter starts out a tour of assembly language. Chapter Topics: ● The Basic Computer Cycle. ● Machine Instructions. ● Machine Language. ● Assembly Language. ● Language Translation. ● Emulation. ● Object Modules and Load Modules. ● Separate Assembly. QUESTION 1: Do all processor chips have the same architecture? http://chortle.ccsu.edu/AssemblyTutorial/Chapter-01/ass01_1.html [7/8/2545 18:09:03] Different Processor Architectures Do all processor chips have the same architecture? A good answer might be: No. Each family of processor chip (MIPS, PIC, SPARC, Alpha, Motorola, Intel, et al.) has its own architecture. Different Processor Architectures The architecture of a computer is a description of its components and its operations. Each processor family has its own architecture. Assembly language is a programming view of the architecture of a processor. So each type of processor has its own assembly language. When you study an assembly language, you study the architecture of a particular processor. The study of any assembly language increases your professional understanding of computers These notes are about the MIPS processor, which is a nice processor to study. The concepts in MIPS assembly are universal. These notes discuss assembly language from a computer science perspective. They explain what is going on in a computer system at the assembly language level. This is a view that is above the electronic view of computer architecture, but is below the operating systems view of the computer system. Computer scientists understand computers at many levels. They understand how the many levels are built one on top of another. Each of these levels corresponds to one or more courses in a computer science degree program. QUESTION 2: (Rhetorical) Does your understanding of computers depend on which assembly language you study? http://chortle.ccsu.edu/AssemblyTutorial/Chapter-01/ass01_2.html [7/8/2545 18:09:16] Fundamentals A good answer might be: No. Probably a well-designed modern assembly language is best, but any one is OK. Fundamentals The MIPS architecture is modern and well-designed. MIPS chips were designed from the ground up in 1985. The design includes the best ideas of computer architecture. An assembly language program describes exactly what the hardware should do, step by step, in terms of the basic operations of the computer. In a high level programming language like C or Java a programmer is mostly unaware of computer architecture. The same source program can run (after compiling) on any processor family. These notes are about fundamental assembly-level computer architecture. To do this effectively, it is necessary (in my view) to acutally learn the assembly language and details of a particular processor, and to write programs for it. This is somewhat like those experiments you did in high school chemistry. Their goal was to teach you the fundamentals of chemistry, not to teach you how to make test tubes full of colorful water. But without the colorful experiments your understanding of chemistry might remain abstract and vague, and would soon be forgotten. QUESTION 3: At the time of this writing (Spring 2001) tens of thousands of dot.com workers have been laid off. 1. How many of them were making car payments on a Jaguar? 2. How many of them knew assembly language? http://chortle.ccsu.edu/AssemblyTutorial/Chapter-01/ass01_3.html [7/8/2545 18:09:25] Basic Machine Cycle A good answer might be: 1. How many of them were making car payments on a Jaguar? Must Sell! Make Offer! ❍ Many of them. 2. How many of them knew assembly language? ❍ Few of them. Employment is still strong for computer scientists. It is weak for technicial workers. The used car lots of Silicon Valley are full of repossessed Jaguars (according to a recent news story). Basic Machine Cycle http://chortle.ccsu.edu/AssemblyTutorial/Chapter-01/ass01_4.html (1 of 2) [7/8/2545 18:09:41] Basic Machine Cycle Most processors endlessly repeat three basic steps. Each machine cycle results in the execution of one machine instruction. A modern processor performs millions of machine cycles per second. A machine instruction is a pattern of bits that corresponds to a fundamental operation of the processor, such as adding two 32-bit integers together, or testing if a value is zero. The details of the machine cycle differ between processor families.
Recommended publications
  • SPIM MIPS Simulator
    SPIM MIPS Simulator SPIM A MIPS32 Simulator James Larus [email protected] Microsoft Research Formerly: Professor, Computer Sciences Department, University of Wisconsin-Madison spim is a self-contained simulator that will run MIPS32 assembly language programs. It reads and executes assembly language programs written for this processor. spim also provides a simple debugger and minimal set of operating system services. spim does not execute binary (compiled) programs. spim implements almost the entire MIPS32 assembler-extended instruction set. (It omits most floating point comparisons and rounding modes and the memory system page tables.) The MIPS architecture has several variants that differ in various ways (e.g., the MIPS64 architecture supports 64-bit integers and addresses), which means that spim will not run programs compiled for all types of MIPS processors. MIPS compilers also generate a number of assembler directives that spim cannot process. These directives usually can be safely deleted. Earlier versions of spim (before 7.0) implemented the MIPS-I instruction set used on the MIPS R2000/R3000 computers. This architecture is obsolete (though, has never been surpassed for its simplicity and elegance). spim now supports the more modern MIPS32 architecture, which is the MIPS-I instruction set augmented with a large number of occasionally useful instructions. MIPS code from earlier versions of SPIM should run without changes, except code that handles exceptions and interrupts. This part of the architecture changed over time (and was poorly implemented in earlier versions of spim). Code of this sort need to be updated. Examples of the new code are in exceptions.s and Tests/tt.io.s.
    [Show full text]
  • MIPS Assembly Language Programming Using Qtspim
    MIPS Assembly Language Programming using QtSpim Ed Jorgensen, Ph.D. Version 1.1.50 July 2019 Cover image: MIPS R3000 Custom Chip http://commons.wikimedia.org/wiki/File:RCP-NUS_01.jpg Spim is copyrighted by James Larus and distributed under a BSD license. Copyright (c) 1990-2011, James R. Larus. All rights reserved. Copyright © 2013, 2014, 2015, 2016, 2017 by Ed Jorgensen You are free: To Share — to copy, distribute and transmit the work To Remix — to adapt the work Under the following conditions: Attribution — you must attribute the work in the manner specified by the author or licensor (but not in any way that suggests that they endorse you or your use of the work). Noncommercial — you may not use this work for commercial purposes. Share Alike — if you alter, transform, or build upon this work, you may distribute the resulting work only under the same or similar license to this one. Table of Contents 1.0 Introduction...........................................................................................................1 1.1 Additional References.........................................................................................1 2.0 MIPS Architecture Overview..............................................................................3 2.1 Architecture Overview........................................................................................3 2.2 Data Types/Sizes.................................................................................................4 2.3 Memory...............................................................................................................4
    [Show full text]
  • Computer Architectures an Overview
    Computer Architectures An Overview PDF generated using the open source mwlib toolkit. See http://code.pediapress.com/ for more information. PDF generated at: Sat, 25 Feb 2012 22:35:32 UTC Contents Articles Microarchitecture 1 x86 7 PowerPC 23 IBM POWER 33 MIPS architecture 39 SPARC 57 ARM architecture 65 DEC Alpha 80 AlphaStation 92 AlphaServer 95 Very long instruction word 103 Instruction-level parallelism 107 Explicitly parallel instruction computing 108 References Article Sources and Contributors 111 Image Sources, Licenses and Contributors 113 Article Licenses License 114 Microarchitecture 1 Microarchitecture In computer engineering, microarchitecture (sometimes abbreviated to µarch or uarch), also called computer organization, is the way a given instruction set architecture (ISA) is implemented on a processor. A given ISA may be implemented with different microarchitectures.[1] Implementations might vary due to different goals of a given design or due to shifts in technology.[2] Computer architecture is the combination of microarchitecture and instruction set design. Relation to instruction set architecture The ISA is roughly the same as the programming model of a processor as seen by an assembly language programmer or compiler writer. The ISA includes the execution model, processor registers, address and data formats among other things. The Intel Core microarchitecture microarchitecture includes the constituent parts of the processor and how these interconnect and interoperate to implement the ISA. The microarchitecture of a machine is usually represented as (more or less detailed) diagrams that describe the interconnections of the various microarchitectural elements of the machine, which may be everything from single gates and registers, to complete arithmetic logic units (ALU)s and even larger elements.
    [Show full text]
  • Pipenightdreams Osgcal-Doc Mumudvb Mpg123-Alsa Tbb
    pipenightdreams osgcal-doc mumudvb mpg123-alsa tbb-examples libgammu4-dbg gcc-4.1-doc snort-rules-default davical cutmp3 libevolution5.0-cil aspell-am python-gobject-doc openoffice.org-l10n-mn libc6-xen xserver-xorg trophy-data t38modem pioneers-console libnb-platform10-java libgtkglext1-ruby libboost-wave1.39-dev drgenius bfbtester libchromexvmcpro1 isdnutils-xtools ubuntuone-client openoffice.org2-math openoffice.org-l10n-lt lsb-cxx-ia32 kdeartwork-emoticons-kde4 wmpuzzle trafshow python-plplot lx-gdb link-monitor-applet libscm-dev liblog-agent-logger-perl libccrtp-doc libclass-throwable-perl kde-i18n-csb jack-jconv hamradio-menus coinor-libvol-doc msx-emulator bitbake nabi language-pack-gnome-zh libpaperg popularity-contest xracer-tools xfont-nexus opendrim-lmp-baseserver libvorbisfile-ruby liblinebreak-doc libgfcui-2.0-0c2a-dbg libblacs-mpi-dev dict-freedict-spa-eng blender-ogrexml aspell-da x11-apps openoffice.org-l10n-lv openoffice.org-l10n-nl pnmtopng libodbcinstq1 libhsqldb-java-doc libmono-addins-gui0.2-cil sg3-utils linux-backports-modules-alsa-2.6.31-19-generic yorick-yeti-gsl python-pymssql plasma-widget-cpuload mcpp gpsim-lcd cl-csv libhtml-clean-perl asterisk-dbg apt-dater-dbg libgnome-mag1-dev language-pack-gnome-yo python-crypto svn-autoreleasedeb sugar-terminal-activity mii-diag maria-doc libplexus-component-api-java-doc libhugs-hgl-bundled libchipcard-libgwenhywfar47-plugins libghc6-random-dev freefem3d ezmlm cakephp-scripts aspell-ar ara-byte not+sparc openoffice.org-l10n-nn linux-backports-modules-karmic-generic-pae
    [Show full text]
  • QEMU As a Platform for PLC Virtualization an Analysis from a Cyber Security Perspective
    QEMU as a platform for PLC virtualization An analysis from a cyber security perspective HANNES HOLM, MATS PERSSON FOI Swedish Defence Research Agency Phone: +46 8 555 030 00 www.foi.se FOI-R--4576--SE SE-164 90 Stockholm Fax: +46 8 555 031 00 ISSN 1650-1942 April 2018 Hannes Holm, Mats Persson QEMU as a platform for PLC virtualization An analysis from a cyber security perspective Bild/Cover: Hannes Holm FOI-R--4576--SE Titel QEMU as a platform for PLC virtualization Title Virtualisering av PLC:er med QEMU Rapportnr/Report no FOI-R--4576--SE Månad/Month April Utgivningsår/Year 2018 Antal sidor/Pages 36 ISSN 1650-1942 Kund/Customer MSB Forskningsområde 4. Informationssäkerhet och kommunikation FoT-område Projektnr/Project no E72086 Godkänd av/Approved by Christian Jönsson Ansvarig avdelning Ledningssytem Detta verk är skyddat enligt lagen (1960:729) om upphovsrätt till litterära och konstnärliga verk, vilket bl.a. innebär att citering är tillåten i enlighet med vad som anges i 22 § i nämnd lag. För att använda verket på ett sätt som inte medges direkt av svensk lag krävs särskild överenskommelse. This work is protected by the Swedish Act on Copyright in Literary and Artistic Works (1960:729). Citation is permitted in accordance with article 22 in said act. Any form of use that goes beyond what is permitted by Swedish copyright law, requires the written permission of FOI. FOI-R--4576--SE Sammanfattning IT-säkerhetsutvärderingar är ofta svåra att genomföra inom operativa industriella informations- och styrsystem (ICS) då de medför risk för avbrott, vilket kan få mycket stor konsekvens om tjänsten som ett system realiserar är samhällskritisk.
    [Show full text]
  • Philip Machanick
    MIPS2C programming from the machine up Philip Machanick MIPS2C: PROGRAMMING FROM THE MACHINE UP First edition, 2015 Minor corrections: March 2017, April 2019, October 2020 Copyright © Philip Machanick 2014, 2015, 2016, 2017, 2018, 2019, 2020 Published by Philip Machanick in the RAMpage Research imprint under an Attribution-NonCommercial 4.0 International (CC BY-NC 4.0) licence: http://creativecommons.org/licenses/by-nc/4.0/ The quick summary: free to use however you like but not for commercial purposes. SPIM documentation: Appendix E is copyright to the author as indicated on the first page and using this material does not imply endorsement by James Larus of this book. Picture credits: all illustrations are either by the author or from public domain sources, as acknowledged in the text. Author: Machanick, Philip, 1957- Title: Mips2C: programming from the machine up / Philip Machanick Edition: 1st ed. Publisher: Grahamstown, South Africa : RAMpage Research, 2015. ISBN: 978-0-8681048-7-4 (pbk.) LoC classification : QA76 Last typeset 27 October 2020 Preface HY THIS BOOK? Some years ago I took part in a panel discussion titled “Programming Early Considered Harmful” at the SIGCSE 2001 W conference [Hitchner et al. 2001]. Once of those present was Yale Patt, whom I had met briefly on a sabbatical at University of Michigan, where he was at the time a professor working in computer architecture. His role on the panel was to proselytise his book, Introduction to Computing Systems: From bits & gates to C & beyond [Patt and Patel 2013], which introduced programming from the low level up. I found the idea intriguing particularly as I also was concerned with the problem that students tend to stick with the first thing they learn.
    [Show full text]
  • Simmips a MIPS System Simulator
    SimMips A MIPS System Simulator ; ; Naoki Fujieday, Takefumi Miyoshiy z, and Kenji Kisey z yGraduate School of Information Science and Engineering, Tokyo Institute of Technology zJapan Science and Technology Agency (JST) fujieda, miyo @arch.cs.titech.ac.jp, [email protected] f g Abstract rectly, so it is a merit that users do not need to build a cross development environment. But now this merit gets smaller, We have developed SimMips, a simply coded MIPS sys- because building the environment is not so hard work as in tem simulator written in C++, to meet increasing demands the past by using tools like Buildroot [1]. Instead, the de- for embedded system education. In this paper, we show the merit of not being able to accept compiled binary files is simplicity of SimMips by describing its concept and imple- relatively growing. mentation. And we show the comprehensibility, taking ex- We have developed a system simulator named SimMips, amples of using it as a lecture material. We designed and whose target computer system includes a MIPS32 ISA pro- implemented SimMips considering the hardware organiza- cessor, as a practical simulator for embedded system edu- tion of the target computer system. We introduce a palm- cation and research. SimMips is implemented simply with top hardware embedded system named MieruPC which in- 4,500 lines in C++, and Linux runs on it without modifica- cludes a MIPS-like soft processor based on SimMips, to re- tions. Though there is a tradeoff between readability and veal flexibility of SimMips. simulation speed, processor speedup now enable simulators to satisfy high readability and sufficient speed at the same time.
    [Show full text]
  • SPIM & MIPS Programming
    Islamic University – Gaza Engineering Faculty Department of Computer Engineering ECOM 3010: Computer Architecture Discussion Lecture # 1 SPIM & MIPS Programming Eng. Eman R. Habib September, 2013 2 Computer Architecture Discussion SPIM Spim is a self-contained simulator that runs MIPS32 programs. It reads and executes assembly language programs written for this processor. Spim also provides a simple debugger and minimal set of operating system services. Spim does not execute binary (compiled) programs. Spim implements both a terminal and windows interfaces. On Microsoft Windows, Linux, and Mac OS X, the spim program offers a simple terminal interface and the QtSpim program provides the windowing interface. QtSpim The newest version of Spim is called QtSpim, and unlike all of the other version, it runs on Microsoft Windows, Mac OS X, and Linux—the same source code and the same user interface on all three platforms! QtSpim is the version of Spim that currently being actively maintained. It has a modern user interface, extensive help, and is consistent across all three platforms. When you open QtSpim, A window will open as shown in Figure 1. The window is divided into different sections: 1. The Register tabs display the content of all registers. 2. Buttons across the top are used to load and run a simulation 3. The Text tab displays the MIPS instructions loaded into memory to be executed. (From left-to-right, the memory address of an instruction, the contents of the address in hex, the actual MIPS instructions – where register numbers are used, the MIPS assembly that you wrote, and any comments you made in your code are displayed.) 4.
    [Show full text]
  • Exceptions and Interrupts (New Version1- by Robert Britton – [email protected])
    CHAPTER 9 Exceptions and Interrupts (New version1- by Robert Britton – [email protected]) How much do pirates pay for ear rings? A Buccaneer. 9.1 Introduction This update is a work in progress, so users of my book “MIPS Assembly Language Programming” http://www.pearsonhighered.com/educator/product/MIPS should check back occasionally to determine if they have the latest version. QtSpim is a new user interface for spim built on the. Qt is cross-platform, so the same user interface and same code will run on Windows, Linux, and Mac OS X. For more information go to: http://pages.cs.wisc.edu/~larus/spim.html . This new version is highly recommended. You have observed that under normal circumstances anytime the mouse button is pushed or the mouse is moved, or a key on the keyboard is depressed, your personal computer responds. The natural question to ask is, “What feature of a computer is needed to provide this kind of interactive response?” The answer is that the CPU must have the capability to respond to exceptions. Interrupts from external devices are classified as exceptions. Internal CPU situations such as an arithmetic overflow or address error are classified as exceptions. An exception is an event that initiates a change in the normal flow of program execution. Exception capability eliminates the need to constantly poll the keyboard and mouse. This is obviously an essential capability because if the computer were constantly polling external devices it would not be doing any other work. The key to building a computer system that provides superior processing throughput and provide an interactive response is to include within the hardware design some method for interrupting the program currently running when an exception occurs.
    [Show full text]
  • Improving Usability of Pedagogical Computer
    IMPROVING USABILITY OF PEDAGOGICAL COMPUTER EMULATION INTERFACES By Stephen D. Williams ([email protected]) Submitted to the Faculty of the College of Arts and Sciences of American University in Partial Fulfillment of the Requirements for the Degree of Master of Science In Computer Science Chair: Michael Black, PhD Mohammad Owrang Ojaboni, PhD Chris Powell, DM Dean of the College Date 2013 American University Washington, D.C. 20016 c COPYRIGHT by Stephen D. Williams ([email protected]) 2013 ALL RIGHTS RESERVED ii IMPROVING USABILITY OF PEDAGOGICAL COMPUTER EMULATION INTERFACES by Stephen D. Williams ([email protected]) ABSTRACT Computer emulations, simulating real or imagined computer systems, are a valuable tool to quickly gain understanding of computer architecture and software. Existing computer emulation systems offer useful but limited visualization and in- teraction. This paper addresses improving usability of pedagogical computer em- ulator interfaces with the application of published design principles informed by research into visuospatial ability. The results include a survey of promising tech- niques addressing similar problems and suggestions for application. Along with sup- porting work extending a publicly available Java-based PC emulator to enable use of the popular Processing visualization development environment, this provides a well-developed design and implementation framework for future improvements by interested parties. iii ACKNOWLEDGEMENTS I want to thank my committee for their time, diligence, and attention. I want to particularly thank Dr. Michael Black for attention, patience, flexibility, and enthusiasm for this subject. I appreciate the opportunity to be involved in an interesting project that promises to develop into an effective, useful, and fun asset to computer architecture, computer science, and human computer interaction education and practice.
    [Show full text]
  • TABLE DRIVEN ADAPTIVE, EFFECTIVELY HETEROGENEOUS MULTI-CORE ARCHITECTURE by SURPRIYA TIKE Bachelor of Science in Electronics
    TABLE DRIVEN ADAPTIVE, EFFECTIVELY HETEROGENEOUS MULTI-CORE ARCHITECTURE By SURPRIYA TIKE Bachelor of Science in Electronics and Telecommunication Pune University Pune, India 2007 Submitted to the Faculty of the Graduate College of the Oklahoma State University in partial fulfillment of the requirements for the Degree of MASTER OF SCIENCE December, 2011 TABLE DRIVEN ADAPTIVE, EFFECTIVELY HETEROGENEOUS MULTI-CORE ARCHITECTURE Thesis Approved: Dr. James E. Stine Jr. Thesis Adviser Dr. Chris Hutchens Dr. Louis G. Johnson Dr. Sheryl A. Tucker Dean of the Graduate College ii TABLE OF CONTENTS Chapter Page 1. INTRODUCTION .............................................................................................................. 1 2. BACKGROUND ................................................................................................................ 1 2.1. Processor based platforms ........................................................................................... 1 2.1.1. OpenSPARC ..................................................................................................... 1 2.1.2. SimpleScalar .................................................................................................... 2 2.1.3. SPIM ................................................................................................................ 2 2.1.4. Simics ............................................................................................................... 2 2.2. Other Related Work ...................................................................................................
    [Show full text]
  • Assemblers, Linkers, and the SPIM Simulator
    A APPENDIX Assemblers, Linkers, and the SPIM Simulator James R. Larus Microsoft Research Microsoft Fear of serious injury cannot alone justify suppression of free speech and assembly. Louis Brandeis Whitney v. California, 1927 A.1 Introduction A-3 A.2 Assemblers A-10 A.3 Linkers A-18 A.4 Loading A-19 A.5 Memory Usage A-20 A.6 Procedure Call Convention A-22 A.7 Exceptions and Interrupts A-33 A.8 Input and Output A-38 A.9 SPIM A-40 A.10 MIPS R2000 Assembly Language A-45 A.11 Concluding Remarks A-81 A.12 Exercises A-82 A.1 Introduction A.1 Encoding instructions as binary numbers is natural and efficient for computers. Humans, however, have a great deal of difficulty understanding and manipulating these numbers. People read and write symbols (words) much better than long sequences of digits. Chapter 2 showed that we need not choose between numbers and words because computer instructions can be represented in many ways. Humans can write and read symbols, and computers can execute the equivalent binary numbers. This appendix describes the process by which a human-readable program is translated into a form that a computer can execute, provides a few hints about writing assembly programs, and explains how to run these programs on SPIM, a simulator that executes MIPS programs. UNIX, Windows, and Mac OS X versions of the SPIM simulator are available on the CD. Assembly language is the symbolic representation of a computer’s binary machine language Binary rep- encoding—machine language. Assembly language is more readable than machine resentation used for communi- language because it uses symbols instead of bits.
    [Show full text]