IBM Zenterprise 114 Technical Guide

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Front cover IBM zEnterprise 114 Technical Guide Explains virtualizing and managing the heterogenous infrastructure Describes the zEnterprise System and related features and functions Discusses zEnterprise hardware and software capabilities Bill White Octavian Lascu Erik Bakker Parwez Hamid Fernando Nogal Frank Packheiser Vicente Ranieri Jr. Karl-Erik Stenfors Esra Ufacik Chen Zhu ibm.com/redbooks International Technical Support Organization IBM zEnterprise 114 Technical Guide September 2011 SG24-7954-00 Note: Before using this information and the product it supports, read the information in “Notices” on page xiii. First Edition (September 2011) This edition applies to the IBM zEnterprise 114. © Copyright International Business Machines Corporation 2011. All rights reserved. Note to U.S. Government Users Restricted Rights -- Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Notices . xiii Trademarks . xiv Preface . .xv The team who wrote this book . .xv Now you can become a published author, too! . xviii Comments welcome. xviii Stay connected to IBM Redbooks publications . xviii Chapter 1. Introducing the IBM zEnterprise 114 . 1 1.1 zEnterprise 114 highlights. 3 1.1.1 Models . 4 1.1.2 Capacity on Demand . 5 1.2 zEnterprise 114 models . 5 1.2.1 Model upgrade paths . 6 1.2.2 Concurrent processor unit conversions. 7 1.3 System functions and features . 7 1.3.1 Overview . 7 1.3.2 Processor . 8 1.3.3 Memory subsystem and topology . 9 1.3.4 Processor drawer . 9 1.3.5 I/O connectivity, PCIe, and InfiniBand . 10 1.3.6 I/O subsystems . 10 1.3.7 Cryptography . 13 1.3.8 Parallel Sysplex support . 15 1.4 IBM zEnterprise BladeCenter Extension (zBX). 16 1.4.1 Blades . 17 1.4.2 IBM Smart Analytics Optimizer solution . 17 1.4.3 IBM WebSphere DataPower Integration Appliance XI50 for zEnterprise . 18 1.5 Unified Resource Manager . 18 1.6 Hardware Management Consoles and Support Elements . 19 1.7 Reliability, availability, and serviceability. 19 1.8 Performance . 19 1.8.1 LSPR workload suite. 20 1.8.2 Fundamental components of workload capacity performance . 21 1.8.3 Relative nest intensity . 22 1.8.4 LSPR workload categories based on relative nest intensity . 23 1.8.5 Relating production workloads to LSPR workloads . 24 1.8.6 Workload performance variation . 25 1.9 Operating systems and software. 26 Chapter 2. Central processor complex hardware components . 27 2.1 Frames and drawers . 28 2.1.1 The z114 frame. 28 2.1.2 I/O drawers and PCIe I/O drawers . 29 2.1.3 I/O cabling. 30 2.2 Processor drawer concept . 31 2.2.1 Processor drawer interconnect topology. 32 2.2.2 Oscillator . 33 © Copyright IBM Corp. 2011. All rights reserved. iii 2.2.3 Pulse per second . 33 2.2.4 System control . 34 2.2.5 Processor drawer power . 35 2.3 Single-chip module . 35 2.4 Processor units and storage control chips . 36 2.4.1 PU chip . 37 2.4.2 Processor unit (core) . 38 2.4.3 PU characterization. 39 2.4.4 Storage control chip . 40 2.4.5 Cache-level structure . 40 2.5 Memory . 41 2.5.1 Memory subsystem topology . 42 2.5.2 Redundant array of independent memory (RAIM) . 43 2.5.3 Memory configurations . 44 2.5.4 Memory upgrades . 46 2.5.5 Pre-planned memory . 47 2.6 Reliability, availability, and serviceability (RAS) . 47 2.7 Connectivity. 48 2.7.1 Redundant I/O interconnect . 49 2.8 Model configurations . 51 2.8.1 Upgrades . 52 2.8.2 Concurrent PU conversions . 52 2.8.3 Model capacity identifier . 53 2.8.4 Model capacity identifier and MSU values . 53 2.8.5 Capacity Backup . 54 2.8.6 On/Off Capacity on Demand and CPs . ..

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