The Journal of Horsham Amateur Radio Club March 2018
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Club Call G4HRS Est. 1938 The Journal of Horsham Amateur Radio Club March 2018 Affiliated to: Sponsored by: 1 Contents In this issue 3. Notes from the Editor Time for a quiz 4. And which gate? Alistair experiments 7. Portable contesting Radio sport 8. Bring and buy A trip to South London 9. Hunt the noise John does some DF-ing 13. URL Alistair’s radio wx forecast 14. Square eyed From MHz to GHz 17. Listen here David’s latest reports 20. Diary of events Full listings for the month Cover picture: QSL for Canadian time signal station ‘CHU’ on 7850 kHz Published by Horsham Amateur Radio Club HARCNEWS is produced at home by G4JHI 2 Editorial Readers of this magazine have introduced a quiz ‘spot the difference’. You will have noticed that shortly after having received the February edition another version arrived. What happened was that one page had an image that was not visible in the final creation of the PDF file. Having resolved that and multiple copies floating around another page got ‘corrupted’ and initially unnoticed which was sent out. I then sorted that out and emailed the correct version. I then had several emails from those readers who couldn’t find any different at all. Suggestions included ‘Must have been one of the pieces I didn’t read’ from Michael G4CCA and ‘Was the content of the second version the same as the first, the difference being in the layout of two pages per screen?’ from Richard G3ZIY. The Editor never tells his secrets but will advise you all that there was a difference! David G4JHI Copy deadline for emailed items for April edition 20th March - For written items the deadline is 17th March. For items sent by email please send to this address: [email protected] 2018 Subscriptions Subscriptions are now due for the 2018 Club membership. Please forward £15 to the Treasurer Paul G4TMC. Payment can be by cash, cheque (payable to H.A.R.C.) or via electronic transfer. Anyone wishing to pay electronically should send an email: paul.g4tmc<at>@gmail.com You will then receive by return the HARC bank details. Postal address: Paul Barnett, 8 Parsonage Road, Horsham, RH12 4AR. 3 February Meeting FPGAs by G3ZBU FPGA PCB top side FPGA PCB under side The talk started with some examples of analogue electronic circuits e.g. amplifiers and radios, digital circuits e.g. alarms, keyers and digital frequency meters and finally circuits that used both techniques such as SDR ( Software Defined Radio ). FPGAs ( Field Programmable Gate Arrays ) are digital integrated circuits that comprise of a large number of logic gates that may be programmed to perform the required function. They are much faster than microprocessors because the internal speed is typically over 250MHz and logic functions may be performed in parallel. A modern SDR will be expected to have a 12/14/16-bit ADC ( Analogue to Digital Converter ) sampling that comes down an HF aerial at a rate of about 150MSPS ( Million Samples Per Second ) . Samples are fed into the SDR's FPGA which are then down-converted and filtered. Concurrently, the same sample can be fed into another part of the gate array and processed as a spectrum for a graphical display. In fact the same samples can be fed to multiple converters and filters if the FPGA is large enough. The FPGA board demonstrated, including its programmer module, was purchased from China via a well-known online auction site for under £30, a couple of years ago. The master plan was to build an organ keyboard to MIDI interface, when I got the time. Each key would be fed into one of the FPGA's input pins. MIDI serial data would come out. This would generate far less QRM compared with the previous multiplexed scanning techniques. This tiny board has an Altera/Intel Cyclone II EP2C5 FPGA, power supply regulators, 50MHz oscillator, boot E2ROM and connectors. The re-programmable boot ROM contains the fuse map information as is read into the FPGA on start-up. Inside the FPGA are 4,608 logic elements, 2 PLLs, 119,808 memory bits and 13 multipliers. Logic Gates Logic gates have a number of input pins and an output pin. The state of the output pin may be TRUE or FALSE, or perhaps 3V or 0V, and it depends on the state of the inputs to generate the logical function. The common functions are AND, OR, NOT, NAND, NOR and XOR: NAND is an AND gate with an inverted output. 4 Before microprocessor and micro controllers became popular, most electronics consisted of boards of the gates. Designers had to learn about the available chips e.g. 7400, 7447 and 7490, and their variations in speed and voltage e.g. 74HCT00, 74AC00 etc. As many of these ICs had 14 or 16 pins, multiple gates were put in each IC. The 7400 has 4 NAND gates. This can lead to wasted components as you may only need one NAND gate but you have to buy 1 and get 3 more free. In 1978 the Programmable Array Logic chip was invented. It had a larger pack with fuses used to select the logical functions of each output pin individually. So a designer could have an IC configured with a programmer to his exact specification. Instead of having loads of drawers of different ICs, one could almost reduce that to one large box. There were a few disadvantages though: high power supply current, not re-programmable and the blown internal fuses would sometimes reform which was a disaster. Various improvements were made over the years so the latest programmable logic devices could be driven from the power of a grapefruit! FPGAs take the programmable logic device up several key steps: firstly the addition of internal functions such as PLLs, memory, multipliers and even CPUs, and secondly a far greater amount of programmable logic gates. The EP2C5 is the smallest of the Cyclone II series and that has 4,608 internal gates! Designing with FPGAs For the EP2C5 one can use Quartus II V13.0 SP1, 32-bit version. This is free, but large. In fact everything in the FPGA world is large: the IC manual is 450 pages and the Simulation manual is 1,500 pages. The exception to large is the ( surface-mount ) leg spacing, so it is best to get a ready- made board. There is a 64-bit version of the software but that was not working with the Byte-Blaster USB programmer. If you buy the board plus programmer now, it may well have been updated. Anyway, the 32-bit software works perfectly well on this 64-bit PC. Quartus II allows you to enter designs in many ways, but the three most popular are VHDL, Verilog and Schematic entry. The Verilog is a bit like 'C' so Arduino-users will be happier with that as opposed to the ADA-based VHDL language. Schematic entry is the easiest and I showed a design that was made of AND and OR gates to control a pump to water the garden. A pull-down window offers all logical functions such as OR, AND etc and also all the 7400-family parts. Very useful indeed. Just as one can download useful things to run on the Arduino and Raspberry-Pi, FPGAs are the same. To prove this; I downloaded a Verilog Keyer by KG8IH. This 'software' was cut and pasted into Quartus II. I also cut and pasted a piece of demo software to flash the leds and divide the 50MHz clock down to approx 1kHz for the keyer. Finally I told Quartus II pin planner which pins I had wired the 'dot' and 'dash' key to, and its output for a speaker. It all worked perfectly. In fact by performing a 'cut and paste' on just one line of the top level Verilog file, you can get two keyers. Every subsequent paste will make the compiler generate yet another keyer instance. In fact you could easily run 20 keyers simultaneously in this FPGA, and each would run at full speed. As to speed, I estimate the maximum speed each keyer could run at as being about 100 million words per minute! Finally, SDRs seem to require about 10,000 logic elements and this is the size to use if you wish to try a soft CPU, where some of the internal logic elements are configured to behave like a processor. Boards that are suitable are generally over £100. The Zync family look quite useful. 5 The evening ended with a short film about the current work project which will cut off the domestic water supply in the event of an 'escape of water'. Veroboard with FPGA pcb mounted and Button for keyer and / or garden water wire-wrap connections controls Byte-blaster programmer 6 CQ Contest I have been asked by a couple of HARC club members if we are going to take part in a portable field day style contest this year as we have in the past. At the moment the HARC committee have an open view regarding portable contest this year. Although in recent years HARC have been successful in the QRP section in HF NFD (CW contest) thanks to Peter G3LET operating the contest single handed for 24 hours and of course the HARC team who set up the stations before and after the contest, this year, Peter is taking a well-earned rest and as a result HARC currently are not proposing to enter HF NFD in June this year.