(Microsoft Powerpoint

Si Photonics Design

Yoshimi Kitagawa Cadence Japan Custom IC & PCB Field Engineering & Services Integrated Photonics Growing and diversifying

Diversifying (Sensors,…) Growing

• High-end communication (rack to rack, datacenter) – Lot of recent activity in SerDes design team 

• Sensors – Lidar (driven by automotive market) – Bio sensors and environmental

• Neural networks and photonic RF

• The mind of a designer does not scale to the size of the circuits that are designed today (# channels, size of switch arrays)

• Sequential simulation (E -> O -> E) does not allow dealing with feed- back loops

• The time scale of a EO optical system-level simulation is LARGE compared to that used to characterize optical elements, and abstraction is required not only to “hide” some of the details of the physical fabrication, but simply to enable circuit-level simulation with reasonable hardware requirements

Virtuoso Schematic Editor Spectre

Electrical Circuit Simulation Virtuoso Analog Design Environment

Verilog DPI INTERCONNECT API

INTERCONNECT interface co-simulation

Photonic Circuit Simulation

– Allow INTERCONNECT (an optical simulator) and Spectre® APS (and electrical (SPICE) simulator) to simulate their own domain specific representations

– Communicate (bi-directionally, i.e., push and pull) simulation data between all the specified connecting nodes by using DPI and API

– For each time step in the Spectre ® simulation, data is pushed to and pulled from INTERCONNECT through the DPI and API interface

– Spectre simulation can use either adaptive or equal time step

Equal timestep mode Adaptive timestep mode

• Quadrature phase shift keying (QPSK) transmitter – Photonic building blocks : laser, QPSK transmitter, QPSK receiver – Electronic building blocks : 25G drivers, TIA

Electronic Driver Digital Source Transimpedance Amplifier

Optical QPSK Transmitter

Optical QPSK Receiver

Received Signal Constellation Transmitted Digital Bitstream Diagram at TIA Outputs (Analog) (Digital)

Electronic Driving Signals and Received I&Q Signals at TIAs Transmitted Optical Signal Phase Output (Analog)

• Generation of curvilinear layout – Optimization of discretization – Matching facets of waveguides

• Automation placement, routing – Simulation of waveguides (optical interconnect)

• DRC, LVS – “false” errors – Parameter extraction on curvy linear layout

14 © 2018 Cadence Design Systems, Inc. All rights reserved. Curvilinear Editing • Virtuoso ® support multiple method – Native SKILL ® implementation (such as the one in production for GLOBALFOUNDRIES 90/45nm) PDKs – Third-party tools

• We continue to improve the SKILL support for curvilinear shapes, to provide the most efficient and most maintainable solution

• 3D IC traditional issues – Thermal – EM coupling –…

• Packaging – Models for optical connectors

• Photonics ICs are usually used in RF (high-frequency) type system • The feature we are looking at is not specific to PIC, but is used for hybrid PICs • Extraction of the S-parameter matrix at the coupling point between the CMOS chip and the PIC

• Design automation still has a lot to do to enable true electro-optical co-design • But we have strong foundations, and are engaged with the leaders • LARGE integrated photonics designs are being made today! • Strong collaboration with Lumerical – Including several delivered features (co-simulation, ADE integration)

All screenshots used as illustrations in this presentation are from released (existing, available) software

How Photonics Impacts the Way We Live • Day-long seminar featuring industry and academic experts • Proceedings available on cadence.com

Special Hands-On Photonics Workshop • Learn to design, implement, and verify a photonics IC for lidar

22 © 2018 Cadence Design Systems, Inc. All rights reserved. © 2018 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. Accellera and SystemC are trademarks of Accellera Systems Initiative Inc. All Arm products are registered trademarks or trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. All MIPI specifications are registered trademarks or service marks owned by MIPI Alliance. All PCI-SIG specifications are registered trademarks or trademarks of PCI-SIG. All other trademarks are the property of their respective owners.