A Metadata-Enhanced Framework for High Performance Visual Effects

Total Page:16

File Type:pdf, Size:1020Kb

A Metadata-Enhanced Framework for High Performance Visual Effects Imperial College London Department of Computing A metadata-enhanced framework for high performance visual effects Jay L. T. Cornwall April 2010 Submitted in partial fulfilment of the requirements for the degree of Doctor of Philosophy in Computing of Imperial College London. The work within this thesis is my own except where explicity cited. Abstract This thesis is devoted to reducing the interactive latency of image processing computations in visual effects. Film and television graphic artists depend upon low-latency feedback to receive a visual response to changes in effect parameters. We tackle latency with a domain-specific op- timising compiler which leverages high-level program metadata to guide key computational and memory hierarchy optimisations. This metadata encodes static and dynamic information about data dependence and patterns of memory access in the algorithms constituting a visual effect – features that are typically difficult to extract through program analysis – and presents it to the compiler in an explicit form. By using domain-specific information as a substitute for program analysis, our compiler is able to target a set of complex source-level optimisations that a ven- dor compiler does not attempt, before passing the optimised source to the vendor compiler for lower-level optimisation. Three key metadata-supported optimisations are presented. The first is an adaptation of space and schedule optimisation – based upon well-known compositions of the loop fusion and array contraction transformations – to the dynamic working sets and schedules of a runtime- parameterised visual effect. This adaptation sidesteps the costly solution of runtime code gen- eration by specialising static parameters in an offline process and exploiting dynamic metadata to adapt the schedule and contracted working sets at runtime to user-tunable parameters. The second optimisation comprises a set of transformations to generate SIMD ISA-augmented source code. Our approach differs from autovectorisation by using static metadata to identify parallelism, in place of data dependence analysis, and runtime metadata to tune the data layout to user-tunable parameters for optimal aligned memory access. The third optimisation comprises a related set of transformations to generate code for SIMT architectures, such as GPUs. Static dependence metadata is exploited to guide large-scale parallelisation for tens of thousands of in-flight threads. Optimal use of the alignment-sensitive, explicitly managed memory hierarchy is achieved by iden- tifying inter-thread and intra-core data sharing opportunities in memory access metadata. A detailed performance analysis of these optimisations is presented for two industrially de- veloped visual effects. In our evaluation we demonstrate up to 8.1x speed-ups on Intel and AMD multicore CPUs and up to 6.6x speed-ups on NVIDIA GPUs over our best hand-written imple- mentations of these two effects. Programmability is enhanced by automating the generation of SIMD and SIMT implementations from a single programmer-managed scalar representation. ii Acknowledgements The road to this thesis has been shaped by many people to whom I am indebted. Some I have never had the pleasure of meeting: their lives’ work is trivialised in citations and off-hand remarks littered throughout these chapters with little more than a nod of acknowledgement. To you I am eternally grateful for allowing me to stand on your shoulders. The view is breathtaking. I hope that I am one day able to return the favour. To my supervisor, Paul Kelly, I owe much of my success and all of my gratitude. His patience, enthusiasm and insights helped to carve this path of research and navigate its many obstacles with deft ability. The incredible network of minds and personalities he has built throughout his distinguished career has had an invaluable effect on the research contained within in this thesis. To my second supervisor, Tony Field, I am grateful for his guidance on writing good papers, which I hope has influenced the text you are now reading. Of course, we did not work alone. The input of our researchers, past and present, in the Software Performance Optimisation group, and many of my colleagues in the Computer Systems group, ensured that success was the only possible outcome of our research endeavours. I must name those to whom I worked especially closely and enjoyed many academic and technical con- versations with: Lee Howes, Ashley Brown, Francis Russell, Will Osborne and Michael Mellor. I am beholden to my colleagues at The Foundry for the ideas and discussions we shared in finding common ground between our goals. In particular, I would like to thank Phil Parsonage and Bruno Nicoletti for stepping far beyond their lines of duty and endeavouring to believe that our daring academic–industrial collaboration could succeed. I owe thanks to Bill Collis for proposing the collaboration and arranging the funding to realise it. I must also thank the Engineering and Physical Sciences Research Council (EPSRC) for partly funding our work through an Industrial CASE award. This was a completely new experiment for our research group and we were very pleased with the outcome. I hope the results of our research have met the funding goals spot on. To my family, who supported me throughout this period of my life while I was unable to give them the time they deserved, I am more grateful than I am able to show. Amidst personal tragedy, my father and sister stood beside me with a devotion that gave me adamant resolve to complete this thesis. To my mother, I am grateful for life. I hope you find peace in your next. iii Contents 1 Introduction 1 1.1 Motivation . .1 1.2 Objectives . .2 1.3 Contributions . .2 1.4 Publications . .3 1.5 Thesis Organisation . .4 2 Visual Effects Optimisation 6 2.1 Introduction . .6 2.2 Visual Effects . .6 2.2.1 Digital Image . .6 2.2.2 Digital Composition . .7 2.3 Software Optimisation . 11 2.3.1 Memory Hierarchy Management . 11 2.3.2 Component-Based Programming . 13 2.3.3 Generative Programming . 15 2.3.4 Metadata-Guided Optimisation . 16 2.3.5 Polyhedral Schedule Transformation . 16 2.4 Software Parallelisation . 19 2.4.1 Symmetric Multiprocessing (SMP) . 19 2.4.2 Single Instruction, Multiple Data (SIMD) . 21 2.4.3 Single Instruction, Multiple Threads (SIMT) . 21 2.5 Related Work . 23 2.6 Concluding Remarks . 26 3 Metadata-Augmented Single-Source Framework 28 3.1 Introduction . 28 3.2 Constraints upon the Visual Effects Domain . 28 3.3 Metadata Definition . 31 3.3.1 Primitive Context . 32 3.3.2 Data Dependence . 32 3.3.3 Memory Access . 34 iv CONTENTS v 3.4 Framework Design . 35 3.4.1 Visual Primitive Representation . 36 3.4.2 Visual Effect Construction . 37 3.5 Execution Strategy . 39 3.5.1 DAG Serialisation . 39 3.5.2 DOD Propagation . 40 3.5.3 Cache-Aware Iteration . 41 3.5.4 Multicore Parallelisation . 42 3.6 Code Generation . 43 3.6.1 Static Specialisation . 44 3.7 Performance Analysis . 45 3.8 Concluding Remarks . 53 4 Space and Schedule Optimisation 54 4.1 Introduction . 54 4.2 Schedule Optimisation . 54 4.2.1 Constructing the Constraint Matrices . 55 4.2.2 Minimising Polyhedral Scanning Complexity . 57 4.2.3 Constructing the Scattering Matrices . 60 4.2.4 Impact of Schedule Optimisation on Parallelisation . 61 4.2.5 Optimising the Polyhedral Schedule . 64 4.3 Space Optimisation . 66 4.4 Performance Analysis . 67 4.5 Concluding Remarks . 75 5 SIMD Code Generation and Optimisation 76 5.1 Transformation Phases . 77 5.1.1 Strip Mining . 78 5.1.2 Scalar Promotion . 80 5.1.3 Divergent Conditional Predication . 83 5.1.4 Memory Access Realignment . 85 5.1.5 Contracted Load/Store Rescheduling . 89 5.2 Performance Analysis . 90 5.3 Concluding Remarks . 95 6 SIMT Code Generation and Optimisation 98 6.1 Transformation Phases . 99 6.1.1 Syntax-Directed Translation . 100 6.1.2 Constant and Shared Memory Staging . 102 6.1.3 Memory Access Transposition . 103 6.1.4 Memory Access Realignment . 105 CONTENTS vi 6.1.5 Maximising Parallelism . 107 6.1.6 Scheduling Overhead Reduction . 108 6.2 Thread Block Size, Shape and Count Selection . 108 6.3 Challenges in SIMT Space/Schedule Optimisation . 110 6.4 Performance Analysis . 112 6.5 Concluding Remarks . 117 7 Conclusions and Further Work 120 7.1 Review of Objectives . 120 7.2 Technical Achievements . 121 7.3 Critical Analysis . 122 7.4 Further Work . 123 7.4.1 Compiler-Assistive Metadata . 123 7.4.2 Dynamic Runtime Optimisation . 124 7.4.3 Heterogeneous Multiprocessing . 125 7.5 Conclusions . 125 A Framework Ontology 127 A.1 The Functor Class . 127 A.2 The Indexer Class . 129 Bibliography 131 List of Tables 2.1 A condensed matrix representation of the systems of linear equations defining two convex hulls in a two-dimensional iteration space, as shown in Figure 2.4. 18 3.1 Hardware specifications for the three benchmarking platforms used throughout the performance analyses in Section 3.7. The Xeon was in 2-chip SMP configuration. Both Intel chips share partitions of the L2 cache between pairs of cores. 45 3.2 Image resolutions tested in the benchmarks throughout this thesis to identify cache spills and row-to-row memory aliasing effects. 46 4.1 Constraint matrices for the loop nests shown in Listing 4.1. Each loop nest has one constraint matrix, bounding its.
Recommended publications
  • Software Optimization Guide for Amd Family 15H Processors (.Pdf)
    Software Optimization Guide for AMD Family 15h Processors Publication No. Revision Date 47414 3.06 January 2012 Advanced Micro Devices © 2012 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices, Inc. (“AMD”) products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. The infor- mation contained herein may be of a preliminary or advance nature and is subject to change without notice. No license, whether express, implied, arising by estoppel or other- wise, to any intellectual property rights is granted by this publication. Except as set forth in AMD’s Standard Terms and Conditions of Sale, AMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. AMD’s products are not designed, intended, authorized or warranted for use as compo- nents in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD’s product could create a situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make changes to its products at any time without notice. Trademarks AMD, the AMD Arrow logo, and combinations thereof, AMD Athlon, AMD Opteron, 3DNow!, AMD Virtualization and AMD-V are trademarks of Advanced Micro Devices, Inc.
    [Show full text]
  • Motmot Documentation Release 0
    motmot Documentation Release 0 Andrew Straw June 26, 2010 CONTENTS 1 Overview 3 1.1 The name motmot............................................3 1.2 Packages within motmot.........................................3 1.3 Mailing list................................................4 1.4 Related Software.............................................4 2 Download and installation instructions5 2.1 Quick install: FView application on Windows..............................5 3 Full install information 7 3.1 Supported operating systems.......................................7 3.2 Download.................................................7 3.3 Installation................................................7 3.4 Download direct from the source code repository............................8 4 Gallery of applications built on motmot packages9 4.1 Open source...............................................9 4.2 Closed source............................................... 12 5 Frequently Asked Questions 13 5.1 What cameras are supported?...................................... 13 5.2 What frame rates, image sizes, bit depths are possible?......................... 13 5.3 Which way is up? (Why are my images flipped or rotated?)...................... 13 6 Writing FView plugins 15 6.1 Overview................................................. 15 6.2 Register your FView plugin....................................... 15 6.3 Tutorials................................................. 15 7 Camera trigger device with precise timing and analog input 25 7.1 camtrig – Camera trigger
    [Show full text]
  • AMD Accelerated Parallel Processing Math Libraries Are Software Libraries
    OVERVIEW AMD Core Math Library (ACML) provides a no-cost set of math routines for high performance computing (HPC), scientific, engineering, and related compute-intensive applications, thoroughly optimized and threaded for use on OTHER AMD PERFORMANCE AMD processors. ACML is ideal for weather modeling, computational fluid dynamics, financial analysis, oil and gas LIBRARIES applications, and more. APPML: AMD Accelerated Parallel Processing Math Libraries are FEATURES software libraries containing FFT and BLAS functions written in > 100% compatible BLAS library including all standard Level 1, Level 2, and Level 3 subroutines OpenCL and designed to run on > Highly optimized kernels for GEMM routines and other Level 3 AMD GPUs. matrix-matrix operations BLAS > Highly optimized for Level 1 BLAS vector operations AMD LibM: a software library > Support for AMD-K8TM, AMD Family 10h, AMD Family 15h and various containing a collection of basic Intel processor families math functions optimized for x86- > OpenMP support for Level 3 BLAS routines 64 processor-based machines. > Derived from Mark 22 NAG Library for SMP and Multicore LAPACK > Multithreading optimizations in many routines AMD String Library: standard > Complex, Real-Complex, Complex-Real transforms GNU C Library (glibc) string > 1D, 2D, and 3D transforms FFT functions optimized for AMD > Expert interfaces provide more control over scaling, in-place/out-of- processors. place, array layout > Optimized versions of most critical libm functions Vector Math Library Framewave Project: a collection > Scalar, Vector, and array versions of popular low-level software > 5 base generators routines beginning with simple > NAG Basic, Wichmann-Hill, L’Ecuyer, Mersenne Twister, arithmetic and extending into Blum-Blum-Shub rich domains, such as image and > 26 distribution generators Random Number Generators signal processing.
    [Show full text]
  • Downloaded and Freely Modified to Meet Our Additional Requirements Related to Result Logging
    INVESTIGATING TOOLS AND TECHNIQUES FOR IMPROVING SOFTWARE PERFORMANCE ON MULTIPROCESSOR COMPUTER SYSTEMS A thesis submitted in fulfilment of the requirements for the degree of MASTER OF SCIENCE of RHODES UNIVERSITY by WAIDE BARRINGTON TRISTRAM Grahamstown, South Africa March 2011 Abstract The availability of modern commodity multicore processors and multiprocessor computer sys- tems has resulted in the widespread adoption of parallel computers in a variety of environments, ranging from the home to workstation and server environments in particular. Unfortunately, par- allel programming is harder and requires more expertise than the traditional sequential program- ming model. The variety of tools and parallel programming models available to the programmer further complicates the issue. The primary goal of this research was to identify and describe a selection of parallel programming tools and techniques to aid novice parallel programmers in the process of developing efficient parallel C/C++ programs for the Linux platform. This was achieved by highlighting and describing the key concepts and hardware factors that affect parallel programming, providing a brief survey of commonly available software development tools and parallel programming models and libraries, and presenting structured approaches to software performance tuning and parallel programming. Finally, the performance of several parallel programming models and libraries was investigated, along with the programming effort required to implement solutions using the respective models. A quantitative research methodology was applied to the investigation of the performance and programming effort associated with the selected parallel programming models and libraries, which included automatic parallelisation by the compiler, Boost Threads, Cilk Plus, OpenMP, POSIX threads (Pthreads), and Threading Building Blocks (TBB).
    [Show full text]
  • VSM Cover Snipe
    0808vsm_RdrsChoice_C2_final 8/14/08 11:55 AM Page 1 SPECIAL SECTION: 2008 BUYERS GUIDE 2008 Buyers Guide Readers Choice Awards 4 Product Listings 6 Third-Party Tools Put the “Rapid” in RAD 2 Project3 7/10/08 1:32 PM Page 1 Project3 7/10/08 1:33 PM Page 2 0808vsm_BGEdNote_2.final 7/24/08 2:05 PM Page 2 Editor’s Note THIRD-PARTY TOOLS BY PATRICK MEADER PUT THE “RAPID” IN RAD editor in chief Welcome to the Visual Studio Magazine 2008 Buyers Guide supplement! Every year, the editors of Visual Studio Magazine survey include anything that covers DVD- or online-based training. the third-party market of tools and services for Visual Studio We think K-Source is intriguing for several reasons, not least and compile a list of relevant products in areas that are of the because it brings the notion of suites of controls that have most interest to Visual Studio developers. This year we com- proven so popular in the VS market to the area of training. K- piled a list of more than 400 products and services across 22 cat- Source gives you the ability to package together a wide range egories (these begin on p.6).Note that you won’t see any prod- of online training subjects for your entire development team ucts from Microsoft listed in the categories; this is a survey of (see VSM’s review of K-Source on p.12 of the August issue). third-party solution providers, which by definition excludes The listings in the print version of this supplement provide Microsoft’s offerings.When compiling the list,we allow a prod- the product name,company,and a Web site for each of the prod- uct to be listed in only one category.In cases where a product fits ucts within a given category.You can find a more detailed version more than one category (and this is frequently the case), we of these listings at VisualStudioMagazine.com (Locator+ attempt to choose the closest category fit for that product.
    [Show full text]
  • Nova.Simd - a Framework for Architecture-Independent SIMD Development
    nova.simd - A framework for architecture-independent SIMD development Tim BLECHMANN [email protected] Abstract extended to integer data and double-precision floating point types with SSE2, and literally Most CPUs provide instruction set extensions each new CPU generation added some more in- to make use of the Single Instruction Multi- structions for specific use cases1. Some ven- ple Data (SIMD) programming paradigm, ex- dors provide specific libraries, but unfortunately amples are the SSE and AVX instruction set most of them have specific restrictions, only ab- families for IA32 and X86 64, Altivec on PPC stract once specific instruction set or work only or NEON on ARM. While compilers can do lim- on a specific platform. ited auto-vectorization, developers usually have Nova.simd was designed to provide a generic to target each instruction set manually in order and easy to use framework to easily write SIMD to get the full performance out of their code. code, which is independent from the instruction Nova.simd provides a generic framework to set. It provides ready-to-use vector functions, write cross-platform code, that makes use of but also an generic framework to write generic data level parallelism by utilizing instruction vector code. It is a header-only C++ library sets. that makes heavy use of templates and tem- plate metaprogramming techniques and cur- 1 Introduction & Motivation rently supports the SSE and AVX families on Most processors provide instructions to make IA32 and X86 64, Altivec on PPC and NEON use of data-level parallelism via the Single In- on ARM.
    [Show full text]
  • Source Code for Biology and Medicine Biomed Central
    Source Code for Biology and Medicine BioMed Central Research Open Access Motmot, an open-source toolkit for realtime video acquisition and analysis Andrew D Straw* and Michael H Dickinson Address: Bioengineering, California Institute of Technology, Mailcode 138-78, Pasadena, CA 91125, USA Email: Andrew D Straw* - [email protected]; Michael H Dickinson - [email protected] * Corresponding author Published: 22 July 2009 Received: 2 April 2009 Accepted: 22 July 2009 Source Code for Biology and Medicine 2009, 4:5 doi:10.1186/1751-0473-4-5 This article is available from: http://www.scfbm.org/content/4/1/5 © 2009 Straw and Dickinson; licensee BioMed Central Ltd. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Abstract Background: Video cameras sense passively from a distance, offer a rich information stream, and provide intuitively meaningful raw data. Camera-based imaging has thus proven critical for many advances in neuroscience and biology, with applications ranging from cellular imaging of fluorescent dyes to tracking of whole-animal behavior at ecologically relevant spatial scales. Results: Here we present 'Motmot': an open-source software suite for acquiring, displaying, saving, and analyzing digital video in real-time. At the highest level, Motmot is written in the Python computer language. The large amounts of data produced by digital cameras are handled by low- level, optimized functions, usually written in C. This high-level/low-level partitioning and use of select external libraries allow Motmot, with only modest complexity, to perform well as a core technology for many high-performance imaging tasks.
    [Show full text]
  • COMPASS: a Community-Driven Parallelization Advisor for Sequential Software
    COMPASS: A Community-driven Parallelization Advisor for Sequential Software Simha Sethumadhavan Nipun Arora Ravindra Babu Ganapathi John Demme Gail E. Kaiser Department of Computer Science, Columbia University, New York, 10027 E-mail: {simha, kaiser}@cs.columbia.edu Abstract driven Parallelization Advisor for Sequential Software – proffers advice to programmers based on information col- The widespread adoption of multicores has renewed the lected from observing a community of programmers paral- emphasis on the use of parallelism to improve performance. lelize their code. The utility of COMPASS rests in part on The present and growing diversity in hardware architec- the premise that the growing popularity of CMP systems tures and software environments, however, continues to will encourage expert programmers to parallelize some of pose difficulties in the effective use of parallelism thus de- the existing sequential software, and COMPASS can quickly laying a quick and smooth transition to the concurrency era. deploy capabilities to capture their wisdom (including any In this paper, we describe the research being conducted at gained through trial and error intermediate steps) for the Columbia University on a system called COMPASS that aims multicore software engineering community. to simplify this transition by providing advice to program- COMPASS observes (Table 1) expert programmers mers while they reengineer their code for parallelism. The (henceforth called gurus) parallelize their sequential code advice proffered to the programmer is based on the wisdom using parallel programming patterns and other techniques collected from programmers who have already parallelized for parallelization, records their code changes (before and some similar code. The utility of COMPASS rests, not only after), summarizes this information and stores it in a central- on its ability to collect the wisdom unintrusively but also on ized Internet-accessible database.
    [Show full text]
  • D1.2 Mathisis Exploitation Plan M24
    Managing Affective-learning THrough Intelligent atoms and Smart InteractionS D1.2 MaTHiSiS Exploitation Plan M24 Workpackage WP1 – Exploitation, business planning and product development Editor(s): Andrew Pomazanskyi, Jens Piesk (NG); , Ana Maria Piñuela Marcos (ATOS); Vilma Ferrari, Donata Piciukeniene (IMOTEC) Responsible Partner: Nurogames GmbH Quality Reviewers ATOS – Ana Piñuela Status-Version: Final – v1.0 Due Date: 31/12/2017 Submission Date 19/12/2017 EC Distribution: PU Abstract: Exploitation plan in December 2017 provides major findings of the consortium with respect to possible business cases of the whole platform and individual components. It gives an overview of revenue streams and licensing considerations as well as provides a roadmap for joint exploitation by setting an exploitation agreement and separate MaTHiSiS tools distribution possibilities through third party platforms. Keywords: Exploitation, business, agreement, SWOT, AI, robotics Related Deliverable(s) D1.1 MaTHiSiS Exploitation Plan, D7.3 MaTHiSiS Platform 2nd release, D10.4 MaTHiSiS dissemination and communication activities report This document is issued within the frame and for the purpose of the MATHISIS project. This project has received funding from the European Union’s Horizon 2020 Programme (H2020-ICT-2015) under Grant Agreement No. 687772 D1.2 – MaTHiSiS Exploitation Plan M24 Document History Version Date Change editors Changes 0.1 14/06/2017 NG Initial Content. Review of the competitors, market and stakeholders 0.2 29/08/2017 NG/IMOTEC/ATOS Update on
    [Show full text]
  • X86 Assembly Language Reference Manual Oracle Documentation
    X86 Assembly Language Reference Manual Oracle Documentation If you are searched for a book X86 assembly language reference manual oracle documentation in pdf form, then you've come to the faithful website. We furnish the utter version of this ebook in ePub, txt, PDF, doc, DjVu formats. You may read X86 assembly language reference manual oracle documentation online or download. In addition, on our site you can read manuals and different artistic books online, either downloading them. We want draw on your attention what our website not store the eBook itself, but we grant ref to website wherever you can download either read online. If you have must to downloading X86 assembly language reference manual oracle documentation pdf, then you have come on to loyal site. We have X86 assembly language reference manual oracle documentation ePub, doc, DjVu, txt, PDF formats. We will be happy if you will be back us over. asm86 assembly language reference manual/122386 - Asm86 Assembly Language Reference Manual/122386 (Software Development Tools) on Amazon.com. *FREE* shipping on qualifying offers. x86 assembly language reference manual - oracle - x86 Assembly Language Reference Manual 2550 Garcia Avenue Mountain View, CA 94043 U.S.A. A Sun Microsystems, Inc. Business 1995 Sun Microsystems, Inc. 2550 download microsoft macro assembler 8.0 (masm) - is a tool that consumes x86 assembly language programs and generates corresponding binaries. Product documentation; How-to tutorials; Upgrading; Download x86 instruction reference, 32-bit edition: - X86 Instruction Reference, This x86 reference guide is the perfect companion to Ida Pro and Ollydbg because it helps you quickly find the assembly language oracle reports 25 reference manual - - ORACLE REPORTS 25 REFERENCE MANUAL X86 Assembly Language Reference Manual Oracle.
    [Show full text]
  • On the Effective Parallel Programming of Multi-Core Processors
    On the Effective Parallel Programming of Multi-core Processors PROEFSCHRIFT ter verkrijging van de graad van doctor aan de Technische Universiteit Delft, op gezag van de Rector Magnificus prof. ir. K.C.A.M. Luyben, voorzitter van het College voor Promoties, in het openbaar te verdedigen op dinsdag 7 december 2010 om 10.00 uur door Ana Lucia VARBˆ ANESCUˇ Master of Science in Architecturi Avansate de Calcul, Universitatea POLITEHNICA Bucure¸sti, Romˆania geboren te Boekarest, Roemeni¨e. Dit proefschrift is goedgekeurd door de promotor: Prof. dr. ir. H.J. Sips Samenstelling promotiecommissie: Rector Magnificus voorzitter Prof.dr.ir. H.J. Sips Technische Universiteit Delft, promotor Prof.dr.ir. A.J.C. van Gemund Technische Universiteit Delft Prof.dr.ir. H.E. Bal Vrije Universiteit Amsterdam, The Netherlands Prof.dr.ir. P.H.J. Kelly Imperial College of London, United Kingdom Prof.dr.ing. N. T¸˜apu¸s Universitatea Politehnic˜aBucure¸sti, Romania Dr. R.M. Badia Barcelona Supercomputing Center, Spain Dr. M. Perrone IBM TJ Watson Research Center, USA Prof.dr. K.G. Langendoen Technische Universiteit Delft, reservelid This work was carried out in the ASCI graduate school. Advanced School for Computing and Imaging ASCI dissertation series number 223. The work in this dissertation was performed in the context of the Scalp project, funded by STW-PROGRESS. Parts of this work have been done in collaboration and with the material support of the IBM T.J. Watson Research Center, USA. Part of this work has been done in collaboration with the Barcelona Supercomputing Center, and supported by a HPC Europa mobility grant.
    [Show full text]
  • Efficient Implementations of Machine Vision Algorithms Using a Dynamically Typed Programming Language
    Efficient implementations of machine vision algorithms using a dynamically typed programming language WEDEKIND, Jan Available from the Sheffield Hallam University Research Archive (SHURA) at: http://shura.shu.ac.uk/6633/ A Sheffield Hallam University thesis This thesis is protected by copyright which belongs to the author. The content must not be changed in any way or sold commercially in any format or medium without the formal permission of the author. When referring to this work, full bibliographic details including the author, title, awarding institution and date of the thesis must be given. Please visit http://shura.shu.ac.uk/6633/ and http://shura.shu.ac.uk/information.html for further details about copyright and re-use permissions. Efficient implementations of machine vision algorithms using a dynamically typed programming language WEDEKIND, Jan Available from Sheffield Hallam University Research Archive (SHURA) at: http://shura.shu.ac.uk/6633/ This document is the author deposited version. You are advised to consult the publisher's version if you wish to cite from it. Published version WEDEKIND, Jan (2012). Efficient implementations of machine vision algorithms using a dynamically typed programming language. Doctoral, Sheffield Hallam University. Repository use policy Copyright © and Moral Rights for the papers on this site are retained by the individual authors and/or other copyright owners. Users may download and/or print one copy of any article(s) in SHURA to facilitate their private study or for non- commercial research. You may not engage in further distribution of the material or use it for any profit-making activities or any commercial gain.
    [Show full text]