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DSP-Based Implementation of a Digital Radio Demodulator on the Ultra-Low Power Processor Coolflux BSP

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DSP-Based Implementation of a Digital Radio Demodulator on the Ultra-Low Power Processor Coolflux BSP Proyecto de Sistemas Informáticos. Curso 2009-2010. DSP-Based Implementation of a Digital Radio Demodulator on the ultra-low power processor CoolFlux BSP Authors: Elena Pérez-Toril Gracia Álvaro Martínez López Project Supervisor: Luis Piñuel Moreno Departamento de Arquitectura de Computadores y Automática. Facultad de Informática. Universidad Complutense de Madrid. Contents 1 Preliminary concepts in DAB 2 1.1 Signal Modulation . 2 1.2 Multipath Propagation . 5 1.3 QPSK (Quadrature Phase Shift Keying) . 10 1.4 FDM (Frequency Division Multiplexing) . 13 1.5 Orthogonal Frequency-Division Multiplexing (OFDM) . 14 1.6 Fast Fourier Transform (FFT) . 23 1.6.1 Overview . 23 1.6.2 Digital Implementation . 24 1.6.3 The Discrete Fourier Transform . 24 1.6.4 Computation of the DFT . 25 1.6.5 The Fast Fourier Transform . 26 1.6.6 Applications to DAB . 27 1.6.7 Complex Numbers . 28 1.6.8 Negative Frequencies . 29 1.6.9 Linearity of the transforms . 30 1.6.10 Combination of I and Q . 31 1.6.11 Addition of the Guard Interval . 33 1.7 Finite Impulse Response Filters(FIR) . 34 1.7.1 How to characterize digital FIR filters . 34 1.8 Error Measures . 36 i Contents 1.8.1 Bit Error Rate . 36 1.8.2 Modulation Error Rate . 37 1.9 Errors Detection and Correction . 38 1.9.1 Viterbi Decoder . 38 1.9.2 De-puncturing . 46 1.10 Digital Signals Processors (DSP) . 47 2 CoolFlux BSP Architecture 49 2.1 Overview . 49 2.2 Registers . 50 2.3 The Data Path . 50 2.3.1 Multipliers . 53 2.3.2 Arithmetic and Logic Units (XALU and YALU) . 54 2.4 Move Buses and RSS Units . 55 2.4.1 Xbus and Ybus Move Buses . 55 2.4.2 Moving to an Accumulator . 56 2.4.3 Moving from an Accumulator . 57 2.4.4 Round, Saturate and Select Units (RSS) . 58 2.5 Memories and I/O . 60 2.5.1 Individual Data Memory (X, Y) . 60 2.5.2 Dual Precision Memory (XY) . 60 2.5.3 I/O Memory Space . 60 2.6 X and Y Addressing Units . 61 2.6.1 Indexed Stack Pointer Addressing . 62 2.6.2 Indexed Pointer Addressing . 62 2.7 Program Control Unit . 62 2.7.1 Hardware Loop Stack . 63 2.8 Hardware Interface . 63 2.8.1 I/O Memory . 64 2.8.2 DMA . 64 ii Contents 2.9 Multi-Cycle Instructions and Delay Slots . 64 2.9.1 Multi-cycle Instructions . 64 2.9.2 Delay Slots . 65 2.10 Hardware Loops . 66 2.11 Debug Mode . 67 2.12 Interrupts . 67 2.13 BSP C Compiler . 67 2.13.1 Optimizations . 70 3 DAB Implementation on the CoolFlux BSP 71 3.1 Automatic Gain Control . 74 3.2 FFT . 76 3.3 Differential Demodulation . 77 3.4 Frecuency de-interleaving . 78 3.5 Quantization . 80 3.5.1 Hard Decision . 80 3.5.2 Soft Decision . 82 3.6 Time De-Interleaving . 83 3.7 Errors Detection and Correction . 87 3.8 Energy Dispersal Unscrambling . 89 3.9 Synchronization channel . 90 3.9.1 Null Symbol Detection . 91 3.9.2 TFPR symbol . 93 3.9.3 Coarse Frequency Correction . 96 3.9.4 Fine Frequency Correction . 98 3.9.5 Fine time synchronization . 100 3.10 Transport mechanisms . 102 3.10.1 Fast Information Channel (FIC) . 105 3.10.1.1 Fast Information Block (FIB) . 106 3.10.1.2 Fast Information Group (FIG) . 106 iii Contents 3.10.1.3 Calculation of the CRC word . 109 3.10.2 Main Service Channel (MSC) . 110 3.11 Audio Coding . 111 3.11.1 Formatting of the audio bit stream . 112 3.11.2 CRC check for audio side information . 114 4 Hardware implementation of the DAB demodulator 116 4.1 An overview to CoolFlux BSP . 116 4.1.1 Baseband Signal Processor(BSP) . 119 4.1.2 DAB as a Real Time Application . 120 4.1.3 DAB hardware definition . 120 4.1.4 Components Description . 124 4.1.4.1 Maxim 2172 v1.0.25 . 124 4.1.4.2 Tektronix TDS210 . 125 4.1.4.3 FPGA Board Virtex XC4VLX100 . 126 4.1.4.4 PE 1542 DC Power Supply Philips . 126 4.1.4.5 Hewlett Packard 8596E Oscilloscope . 126 4.1.4.6 CoolFlux simulator, CoolFlux debugger, Chess compiler . 127 4.1.4.7 Reception Antenna . 127 4.1.4.8 JTAG(Joint Test Action Group) . 127 4.1.5 DAB demodulator datapath . 129 4.1.6 Local memories . 131 4.1.7 Debug interface . 131 4.1.8 Interrupt interface . 132 4.1.9 Shared Buffers . 132 4.2 Description of the BSP instances . 134 4.2.1 BSP0: Synchronization, Time correction, Save OFDM symbols . 134 4.2.2 BSP1: FFT, Deinterleaving, Demapping . 139 4.2.3 BSP2: FIC and MSC Decoding. Audio decoding . 140 iv Contents 5 Conclusions 141 5.0.4 Start point . 142 5.0.5 Proposed and accomplished goals . 142 5.0.6 Future aspects . 142 5.0.7 Difficulties found within the development phase . 143 Appendices 144 A The Fourier Transform 145 A.1 Motivation . 145 A.2 Approximation by the minimum mean square error . 149 A.3 Orthogonality . 151 A.4 Fourier Transform in Periodic Complex Functions . 154 A.5 Integral Fourier Transform . 158 A.6 DFT . 160 A.7 Spectral Analysis . 163 A.8 Applications of the Fourier Transform . 166 A.8.1 Noise Filter . ..
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