DIGITAL SIGNAL PROCESSING Getting Around the Nyquist Limit

E MBEDDED

PC CIRCUIT MONTHLY SECTION CELLARINK®

T H E C O M P U T E R A P P L I C A T I O N S J O U R N A L # 9 9 O C T O B E R 1 9 9 8 DIGITAL SIGNAL PROCESSING Getting Around the Nyquist Limit

Doing Filters in Software

Signal Conversion Basics

PIC-Based Graphing Data Logger

$3.95 U.S. $4.95 Canada TASK MANAGER

Not Exactly a Binary World INK® verybody’s got their own way of looking at e things. Fortunately—yes, fortunately—we don’t all have exactly the same view of the world. It’s also T H E C O M P U T E R A P P L I C A T I O N S J O U R N A L

pretty clear that INK caters to a select audience. Not EDITORIAL DIRECTOR/PUBLISHER ASSOCIATE PUBLISHER everybody, nor even every engineer, you meet designs or works with Steve Ciarcia Sue Skolnick embedded computer systems for a living. But here’s my point: Even within MANAGING EDITOR CIRCULATION MANAGER our narrow slice of the engineering universe, there are plenty of different Elizabeth Laurençot Rose Mansella perspectives. It’s not all black and white, ones and zeros. TECHNICAL EDITOR BUSINESS MANAGER Michael Palumbo Jeannette Walters Over ten years ago, when Steve started INK, he was crafting a WEST COAST EDITOR ART DIRECTOR publication for hands-on engineers. And while a significant percentage of Tom Cantrell KC Zienka readers have been there since Day 1 (and among them will be those who CONTRIBUTING EDITORS ENGINEERING STAFF call themselves experimenters as well as others who will vilify me for even Ken Davidson Jeff Bachiochi Fred Eady suggesting it), INK has offered such an excellent range of editorial material PRODUCTION STAFF over the years that its appeal now runs from systems designers in NEW PRODUCTS EDITOR Phil Champagne Harv Weiner John Gorsky multimillion-dollar companies, to EE university students, to the engineering James Soussounis PROJECT EDITOR entrepreneur starting a brand-new company (that one day may in fact Janice Hughes become one of those multimillion-dollar powerhouses), and beyond. EDITORIAL ADVISORY BOARD INK finds itself in a unique position, and faced with a unique problem: Ingo Cyliax Norman Jackson David Prutchi how to meet the needs of such a varied group. And I do mean needs. Cover photograph Ron Meadows—Meadows Marketing Nobody here is interested in putting together a magazine that gets tossed in PRINTED IN THE UNITED STATES the Freebies-To-Be-Read-Someday (yeah, right) pile. You pay for INK; you ADVERTISING should get a magazine you want to read. ADVERTISING SALES REPRESENTATIVE But, of course, there’s only so much that can fit in a print magazine Bobbi Yush Fax: (860) 871-0411 each month. That’s why Design Forum is on INK’s web site. It’s still in its (860) 872-3064 E-mail: [email protected] infancy, but you know, sometimes, the more you give, the more you get. ADVERTISING COORDINATOR Valerie Luster Fax: (860) 871-0411 INK gives you Internet access to design hints, feature articles, abstracts (860) 875-2199 E-mail: [email protected] submitted to INK’s design contests (most recently, Design98, cosponsored CONTACTING CIRCUIT CELLAR INK by Microchip), as well as monthly columns—and when you get inspired, SUBSCRIPTIONS: you give back. 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All subscription orders payable in U.S. funds So, while INK is committed to its focus on providing high-quality only via VISA, MasterCard, international postal money order, or check drawn on U.S. bank. engineering editorial, it’s clear that we are determined to offer you a wider Direct subscription orders and subscription-related questions to Circuit Cellar INK Subscriptions, P.O. Box 698, Holmes, PA 19043-9613 or call (800) 269-6301. range of opportunities to experience it. No question: in the computing world, Postmaster: Send address changes to Circuit Cellar INK, Circulation Dept., P.O. Box 698, Holmes, PA 19043-9613. ones and zeros are a big part of the picture, but there’s a lot of value lurking Circuit Cellar INK® makes no warranties and assumes no responsibility or liability of any kind for errors in these in the middle. Take advantage of it. programs or schematics or for the consequences of any such errors. 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2 Issue 99 October 1998 Circuit Cellar INK® X-Y Graphing Data Logger 12 Alberto Ricci Bitti Time-Domain Filter Simulations Using C++ 24 Glenn Parker

Breaking Nyquist—Post-Sampling Antialiasing 30 Gerard Fonte

Digital Frequency Synthesis 36 Tom Napier

I MicroSeries 68 Digital Processing in an Analog World Part 1: Basic Issues David Tweed

76 I From the Bench Task Manager MIDI 2 Part 1: It Ain’t Just for Music Anymore Elizabeth Laurençot Jeff Bachiochi Not Exactly a Binary World 80 I Silicon Update Reader I/O 6 MegaMicro Card Tom Cantrell New Product News 8 edited by Harv Weiner

Advertiser’s Index/ 95 INSIDE November Preview Priority Interrupt 96 Steve Ciarcia ISSUE Banking on Bugs

44 Nouveau PC PC edited by Harv Weiner 9999 48 Networking with DeviceNet Part 2: A Weather-Station Application Jim Brady

55 RPC Real-Time PC The Need for Speed RTOS and PC/104 Ingo Cyliax 61 APC Applied PCs RF and Micros Part 2: A Low-Power System MBEDDED Fred Eady E

Circuit Cellar INK® Issue 99 October 1998 3 READER I/O

AN ANALOG EYE ON DIGITAL DESIGN the static correction factor were applied as the digital I am an analog-oriented EE, and Mike Smith’s article sum of the static trip point, and then the correction (“Unplanned Calibration Errors in Embedded Systems,” factor, calculated on bootup, and the resulting static INK 96) gave me an appreciation of the design consid- digital reference stored for comparison with the digi- erations for a software program for a digital instrument. tized transducer data? One would design an analog instrument to handle fail- I’m sure you agree that when the failure of a design safe conditions for all potential situations. The software could mean jail, or the poorhouse, the redundancy level code, its syntax, and the compilers used to mechanize for each catastrophic failure mode would be doubled or code handling add layers of potential ambiguity. tripled, or pass the job. I’m not denigrating digital In analog design, the simplest approach is usually design, but I want to point that it has peculiarities to the best, and I expect that it’s likewise in digital design. be considered. I think your examples were picked to be a demonstra- tion for your article, and it worked. Tom Callahan As an analog guy, I would be more likely to enter [email protected] the correction factor/calibration error for the transducer at a summing junction, with the reference trip level for the fail safe at the low/high trip, to generate Editor’s note: A corrected version of Figure 1 from a signal to be subsequently summed with that of the “Automotive Travel Computer” (INK 98, p. 67) is conditioned transducer signal to generate a trip alarm. available as a downloadable PDF file on the Circuit I would think that, in a software design review, the Cellar web site at ftp://ftp.circuitcellar.com/CCINK/ software would be simpler, more reliable, and faster if 1998/Issue_98/correction.zip.

October Design Forum password: Filter INK ON-LINE

Your magazine enjoyment doesn’t have to stop on PIC Abstractions the printed page. Visit Circuit Cellar INK’s Design Design Abstracts from our Design98 Contest Forum each month for more great online technical X-10 Temperature Sensor—Donald Blake columns and applications. Here are some of the great Compact Optical Image Scanner—John Luo new on-line articles: Heating Control System—Mark R. Wheeler

Columns Silicon Update Online: Microchip on the March— Tom Cantrell Missing the Circuit Cellar BBS? Lessons from the Trenches: Get an Embedded Micro Then don’t forget to join the Circuit Cellar INK and C Compiler off the Ground—George Martin newsgroups! The cci newsserver is the engineer’s place to be on-line for questions and advice on Forum Feature Articles embedded control, announcements about the One More Wireless Trick to Stuff Up Your Sleeve— magazine, or to let us know your thoughts about Hank Wallace INK. Just visit our home page for directions to Lost at C? Forth may be the Answer—Tom Napier become part of the BBS experience. www.circuitcellar.com

6 Issue 99 October 1998 Circuit Cellar INK® NEW PRODUCT NEWS Edited by Harv Weiner An innovative universal adapter system enables Mighty-Mouse antennas to mate with GPS receivers from different manufacturers. Supported connectors include SMB, SMA, BNC, TNC, and MCX. The Mighty-Mouse comes standard with a 5-m RG174/U cable and features magnetic and permanent mounting. The unit measures 58 mm × 48 mm × 15 mm and weighs 65 g. The GPS antenna is hermetically sealed and completely waterproof. It is manufactured with a die-cast metal baseplate, which acts as a ground plane, so you can mount the antenna anywhere without sacrificing signal-reception performance. A polycarbonate radome protects the antenna element, low-noise amplifier, band-pass filter, and buffer stage at operating temperatures from –30° to +85°C. Tri-M’s Mighty-Mouse antenna comes with GPS ANTENNA everything needed to attach to the user’s GPS re- Tri-M Systems’ Mighty-Mouse GPS integrates a high- ceiver. Pricing starts at $59 in OEM quantities, performance patch antenna and a state-of-the-art, low-noise, with a suggested list price $79. low-power consumption amplifier into a compact waterproof enclosure. Ideally suited for deployment as an exter- Tri-M Systems, Inc. nal antenna for hand-held or vehicle-based GPS receivers, (800) 665-5600 • (604) 527-1100 the antenna consumes less than 12 mA while producing Fax: (604) 527-1110 25 dB of signal gain. www.tri-m.com

REAL-TIME VIDEO IMAGE PROCESSING BittWare has announced a new video I/O mezzanine BittWare that interfaces NTSC/PAL video signals with SHARC (800) 848-0436 • (603) 226-0404 processors in real time. The bitsi-VIDEO captures and Fax: (603) 226-6667 displays composite and S-video signals, making it ideal www.bittware.com for real-time image-processing applications requiring rapid scanning and peak I/O performance. The bitsi-VIDEO mounts to SHARC-based host boards and uses a tightly integrated interface to transmit video signals to the processor on the host. Using square pixel or CCIR601 data formatting, the device encodes from, and decodes to, 8-bit YCrCb-format digital data. It delivers the signals to the SHARC processor on the host board for immediate processing or frame storage. Two link ports return processed video data to the bitsi-VIDEO for conversion back to analog video. The bitsi I/O mezzanine standard is optimized to match the SHARC DSP’s sophisticated I/O capabilities. A variety of off-the-shelf bitsi I/O mezzanines, including audio, control, video, and telephony interfaces, are available. The interface consists of 32 data bits, 26 address bits, 10 control signals, two DMA channels, four SHARC link ports, and three serial ports. Pricing for the bitsi-VIDEO starts at $1495.

8 Issue 99 October 1998 Circuit Cellar INK® NEW PRODUCT NEWS

VERSATILE SINGLE-BOARD COMPUTER The SBC2000-074 single-board computer is a compact, low-power unit that features a Microchip Technology PIC16C74 running at 20 MHz. It is equipped with two RS-232 serial ports that run to 19.2 kbps, a real-time clock, watchdog timer, an 8-KB EEPROM, and five 8-bit A/D inputs. It also includes five programmable DIO lines, a low- power sleep mode, a PWM generator, an LCD port, and a keypad port. All this comes on a 2.8″ × 1.3″ board. Expansion of the SBC2000-074’s hardware is facilitated by the board’s VAST (Vesta Addressable Synchronous Transfer) network connector, which lets the user select from over 20 peripherals. The SBC2000-074 includes Vesta Basic V.2, which is a Windows-based, IDE-driven compiled BASIC. The single-tasking software features floating-point HARDWARE SIMULATOR calculations with 16-bit precision. The unit operates The SIMICE hardware simulator provides low-cost at temperatures between –40°C and +85°C and system debugging for the Microchip Technology PIC- consumes 15 mA at 5 VDC. A low-dropout 12C5xx, ’12CE5xx, and ’16C5x eight-bit RISC micro- onboard voltage regulator creates optional direct controllers. It works in conjunction with Microchip’s connection to unregulated supplies ranging from MPLAB-SIM software simulator to provide non-real- 5.5 V to 24 VDC. time I/O port emulation. The SBC2000-074 sells for $64. SIMICE enables a developer to run simulator code for driving the target system. The target system can Vesta Technology, Inc. also provide input to the simulator code, enabling (303) 422-8088 simple and interactive debugging. SIMICE features Fax: (303) 422-9800 unlimited software breakpoints and PC communication www.sbc2000.com via serial interface at speeds up to 57 kbps. It also supports source-level debugging. The MPLAB Integrated Development Environment (IDE) gives users the flexibility to edit, compile, emulate, and program devices from a single-user interface. MPLAB software offers a project manager and program text editor, a user-configurable toolbar containing four predefined sets, and a status bar, which communicates editing and debugging information. A dynamic error capability creates rapid application development. MPLAB is available at no cost by downloading the software program from Microchip’s Web site. The complete SIMICE hardware-simulator system features a hardware I/O port emulator board, RS-232 cable, PICmicro target probe cables, and MPLAB IDE software. SIMICE is priced at $129.

Microchip Technology, Inc. (602) 786-7668 (602) 786-7200 Fax: (602) 899-9210 www.microchip.com

Circuit Cellar INK® Issue 99 October 1998 9 NEW PRODUCT NEWS LCD MICROTERMINAL The ILM-216L is an LCD mod- text, which is ideal for updating nu- tasks at startup—display a custom ule with a built-in serial interface. meric fields with minimal program- splash screen, define custom char- It works like a terminal, receiving ming overhead. acters, and turn on the backlight. text via RS-232 at 1200–9600 bps A unique feature of the ILM-216L The ILM-216L draws only 5 mA (8N1) and displaying it in large is its nonvolatile configuration mem- with the backlight off and 40 mA 5.9-mm (0.23″) characters on a ory (EEPROM). Users can set the ILM- with it on. The device measures supertwist 2-line × 16-character 216L to perform any of the following 80 × 50 mm (3.15″ × 1.97″), so it LCD. fits into most standard Formatting text for 2 × 16 LCD mounting the display is a simple locations with a small matter of using familiar overhang at the bottom. terminal-control charac- Pricing for the ILM- ters such as carriage 216L ranges from $49 returns, linefeeds, tabs, in single quantities to and so forth. Additional $29 in 100+ quantities. instructions control the backlight, position the Scott Edwards cursor, define custom Electronics, Inc. characters, and read four (520) 459-4802 switch contacts. The Fax: (520) 459-0623 ILM-216L automatically www.seetron.com right-aligns selected

10 Issue 99 October 1998 Circuit Cellar INK® NEW PRODUCT NEWS THICK-FILM SMART FORCE SENSOR The DX-300 is an all-metal, thick-film sensor designed for high-precision, multiaxis force sensing in harsh environments. Typical applications include coordinate measurement and robotics feedback controls, as well as precise multiaxis force measurement and fly-by-wire motion control. The DX-300 has a network of conductive thick- film strain-sensitive elements (on a steel substrate) to measure microscopic strain. This network creates a force-measurement device that produces many times the output of even the best ceramic-based sensors. Advantages of this construction include thermal stability, ESD protective design, high output, rota- tional accuracy, chemical stability with different cap chemistries, and no crack-propagation problems. So, control package that provides a 0–5-V output in all three the sensor circuitry will never fatigue or change output distinct axes of input. with time. The DX-300 features noncompliant palm- The DX-300 costs $165 in quantities of 500, and it is or finger-activated motion and force-sensing capabili- available with full signal-conditioning electronics for a ties in a high-output, precise smart-sensor design. slightly higher price. The sensors are offered in two smart-sensor systems— the cursor control Integrated Block system that pro- Bokam Engineering vides an RS-232 or a PS/2 sensor output for precise (714) 513-2200 • Fax: (714) 513-2204 cursor control, and the force measurement/motion www.bokam.com

Logic Analyzers

Circuit Cellar INK® Issue 99 October 1998 11 FEATURES FEATURE 12 X-Y Graphing Data ARTICLE Logger

Alberto Ricci Bitti 24 Time-Domain Filter Simulations Using C++

30 Breaking Nyquist

36 Digital Frequency Synthesis X-Y Graphing Data Logger

ike any other l designer, I have to With more data than cope with lots of data everyday. Raw data in he can handle (and need of analysis comes from every design phase and from all related always in some in- sites. From writing specifications to development, from production tests to convenient place), on-site verification, we end up with tons of measurements. Alberto constructed a A graph is often the best way to point out the key features of what you powerful, handheld, measure. It’s useful for instantaneous communications and easy to document programmable data for later reference. It’s accepted for corporate quality system records, too. logger from his Casio PCs are powerful graphing tools, and maybe that’s why almost all recent pocket calculator. And instruments have some kind of PC interface. So, you just take out your as a reward, Design98 dazzling new computer-interfaceable meter, connect it to nearest PC, and judges made it their start measuring. Right? Wrong. Sometimes you want to “first PIC.” take measurements in the field, and you can’t take the instruments out of the lab. Something other than the PC can collect the data, but it’s fooled by grounding problems. Other times you need a battery- operated instrument, but a laptop is

12 Issue 99 October 1998 Circuit Cellar INK® too expensive, or it has to be LCD voltmeters, wall-wart power a)Pin 8 (+5 V) b) Pin 8 (+5 V) used elsewhere, or the batteries 2 × 1N4148 supplies, and even a whole PC! + out 10 mV/˚C don’t last long enough. And LM35 Pin 1 (X) Is the componentware a good don’t forget that you have to – design technique? I think so. 100 nF LDR convert data to spreadsheet Pin 7 (Y) When you have a 16 × 2 LCD, 1 µF format to get the graphics. 10 k you don’t need to know the What if you need to collect Pin 9 (GND) Pin 9 (GND) details about LCD polarizers or data for a whole week? Can backlighting problems. Just your precious equipment be Figure 1—The unit can accommodate a variety of sensors. Up to eight leave these problems to LCD locked for such a long time? sensors can be read at the at the same time with 1-mV steps from 0 to specialists, and concentrate on My solution: a simple yet 4096 mV. a—This setup reads temperatures ranging 0–100°C with a your specific application. resolution of 0.1°C. b—The light sensor is placed in front of an LED to powerful graphical data-acquisi- nonintrusively monitor a device’s on/off status. The diodes reduce the Adding components together tion unit built from a pocket maximum output to a safe 3.6 V. increases the abstraction level calculator. I applied a compo- and, consequently, the designer’s nent-oriented approach that resulted data set, either by hand or through freedom and power. With so many prob- in a shortened development cycle and simple programs. lems already solved, you can concen- overall quality improvement. Statistical (e.g., linear, exponential, trate on solutions to new problems. The unit doesn’t just collect data. polynomial regressions, mean, or devia- All of this comes at no extra cost. It also displays it for further investiga- tion) and mathematical (e.g., integration, Most white-box components are derived tion, and it offers plenty of analytical derivation) analyses are only a few key- from high-volume consumer devices. and statistical built-in functions. strokes away. All of this can be done Everyone benefits from the optimized I applied low-power techniques and in the field with no other hardware price, industrial quality, uniformity, components to squeeze all the power except the logger itself—a capability and reduced time to market. out of a 9-V battery. By the way, I’ll not found in the most expensive data In this design, I go a step further also tell you how I found the communi- loggers available today. and use a graphic calculator as a cation protocol used by the calculator. The unit is battery powered and white-box component to build a data While this design doesn’t pretend works for more than 200 h on standard logger. Admittedly, thinking of a to solve all your measurement problems batteries while retaining more than pocket calculator as a component is a at once, it’s simple, cheap, and powerful 20 KB of data for at least one year. I little wild, and we may never see such enough to be useful in the situations I use separate batteries for the calculator a component as a standard. described above. and analog interface. Batteries make Nevertheless, the general approach Its flexibility makes it ideal for this device suitable for mobile use, as is effective, and the benefits can apply acquisition in the lab, on the produc- well as eliminating ground loops, which to a number of designs. For one thing, tion line, in the field, or wherever you is a common nuisance for PC users. it increases designer power, putting a need a clear, graphical, and immediate graphical LCD, a programming language, (yet sophisticated) data display. USING COMPONENTWARE lots of memory, and PC connectivity Componentware is a popular at your disposal. MACHINE MUSCLE buzzword in the IT community. It Using a calculator also cuts develop- The data logger consists of the stands for software entities (some- ment time, so it takes just days (not graphic calculator—with its 64 × 128 times as big as a full-featured word weeks or even months, if you include LCD screen and keyboard—and the processor) that you can reuse as analog interface. I left the calculator building blocks for other pro- untouched, and the analog interface grams without having to know fits in a small, separate plastic box too many details. (see Photo 1). They are joined only by What does componentware the umbilical serial data connection. have to do with hardware design? The interface enables me to read A lot. A 16 × 2 LCD, an RF tuner, the voltage at up to eight inputs with and a stamp-sized controller (e.g., 1-mV resolution in the 0–4096-mV Basic Stamp, Domino, PicStic, or range, thanks to a 12-bit ADC. The Basic Tiger) comprise the hard- data is converted to the right protocol ware counterpart of component- by a PIC microcontroller and sent to ware techniques. the calculator for display and storage. Once upon a time, we had Once the data is received by the libraries of subcircuits that graphing calculator, it’s immediately worked well. But today, we have Figure 2—Here is the main flow of the Casio communication protocol. Apart from reversed-TTL logic levels, it’s a familiar available for graphing, viewing, zoom- fat, white-box components. The half-duplex with 9600 bps, no parity, eight data bits, and two ing, panning, or listing. You can apply list goes on to include DC-to-DC stop bits. A level converter and inverter like the MAX232 is all all the calculator’s functions to your converters, modem on a chip, that's needed to interface the Casio to a PC serial port.

Circuit Cellar INK® Issue 99 October 1998 13 itself becomes important. Ordinary High impedance *SHDN regulators such as the 78L05 can eas- *CS ily drain more current than the whole > 1 ms > 1.5 µs > 10 µs circuit. You need specific low-dropout SCLK regulators like the LM2936 to get DOUT maximum battery life. The LM2936 MSB LSB has a quiescent current of only 9 µA, DIN 1XX and it’s internally protected from reverse battery connection.

Input Single differential Acquisition-mode selection ended (+) (–) selection FLASH RISC GLUE

0 0 0 channel 0 ch. 0 ch. 1 0 0 bipolar, differential An eight-bit RISC microcontroller 0 0 1 channel 2 ch. 2 ch. 3 from –2.048 V to +2.048 V glues the ADC to the Casio serial 0 1 0 channel 4 ch. 4 ch. 5 0 1 not allowed 0 1 1 channel 6 ch. 6 ch. 7 input. Because my goals included 1 0 0 channel 1 ch. 1 ch. 0 1 0 unipolar, differential 1 0 1 channel 3 ch. 3 ch. 2 rapid development time and low cost, 1 1 0 channel 5 ch. 5 ch. 4 1 1 unipolar, single ended I focused on small flash- or EEPROM- 1 1 1 channel 7 ch. 7 ch. 6 based RISC microcontrollers. The simplified RISC architecture is Figure 3—The analog inputs of the MAX186 can be switched to bipolar and pseudodifferential mode by changing the control word. In bipolar mode, the input spans between ±2.048 V instead of the usual 0–4.096 V. The last two bits easy to learn, and erasable parts let in the control word select the power-down mode. Here, they are overridden, forcing the shutdown pin (*SHDN) low. you concentrate on the problem instead of the UV eraser. As a bonus, the calculator math) to go from ideas to minimal external hardware and features these parts usually have simple, ultra- prototype. This technique also simpli- a nice internal 4.096-V reference that cheap PC-port-based programmers. fies the problem-solving path: a simple sizes each step to a handy 1 mV. I chose the PIC16C84 (an EEPROM concept, simple electronics, and simple The MAX186 sports eight single- part) and the newer PIC16F84 (an software yield a complex result. ended inputs, which is more than improved flash version) from Micro- You also get lower power consump- enough for most applications. The chip. A useful characteristic of the PIC tion (at least 200 h on standard batter- same inputs can be reconfigured as architecture is its support of data ies), which is more than 20 times a four bipolar and pseudodifferential tables that are as long as the program comparable PC-based solution. inputs by simply changing the com- memory. This characteristic is a result Also, using the calculator cuts cost. mand word. It’s suitable for reading of the RETLW instruction. Just one, off quantity, sells for the data directly from a large variety of These PICs are powerful enough to price of an LCD alone. Overall costs sensors (see Figure 1). handle serial communications entirely are more than 20 times less than any The MAX186 generates its clock in software with a 4-MHz clock. A PC-based solution of comparable power. internally, and the entire operation is faster part (you can find 50-MHz PIC You get increased flexibility, low controlled through a four-wire SPI, clones) is unnecessary. cost, and an easily replaceable flash- QSPI, or Microwire serial interface. The PIC draws only a few microamps reprogrammable input board, enabling The device is put in standby mode via when sleeping (even with the watch- you to retain the calculator. Plus, only a three-level input pin or with a soft- dog timer enabled), and best of all, it’s data acquisition and transmission need ware command word. cheap and available. MPLAB, a profes- to be tested, and you save on production It consumes 1.5 mA typical while sional grade assembler and simulator, costs because you don’t need compli- operating, which drops to a mere 2 µA is distributed for free by Microchip, cated plastics and electronics. in full power-down mode. There is along with lots of useful libraries. Documentation is simpler, too. also an interesting fast power-down Just add a “Capturing data” chapter to mode (not used in this design) that THE GRAPHIC ENGINE the calculator’s manual. consumes 30 µA with a wake-up time The Casio FX-9750G graphing Size and weight are also reduced. as short as 5 µs. calculator has 32 KB of RAM for data Even prototypes are handheld, weighing If 10 bits are enough for your taste, or programs and a 64 × 128 black and only 290 g (including batteries), and you can replace the MAX186 with the white LCD. The FX-9750G is a member series production sizes can be reduced MAX192. It’s fully pin- and software- of a larger family that includes mod- further. compatible with the MAX186. Price els with color LCDs and up to 64 KB aside, the only difference resides in the of memory. It’s a powerful and enjoyable LOW-POWER GUYS precision of the two lower bits, which math tool, but it costs about the same Every successful project relies on aren’t guaranteed for the MAX192. as a graphic LCD module alone. component selection, especially battery- The chip needs a single 5-V power It runs on four LR03 batteries for operated designs. Maxim’s MAX186 is supply. With such a low power require- 200 h, and sensitive data and programs a low-power 12-bit ADC. It needs ment, the drain of the power regulator are maintained for up to one year by a

14 Issue 99 October 1998 Circuit Cellar INK® Photo 1—The circuit fits inside a small plastic box just as large as the calculator. The micro jack connector hangs out, connecting to the calculator serial port. The box is stuck to the bottom of the calculator for operating. This arrangement gives the calculator a stable and comfortable slope.

separate lithium battery. I’m glad the Casio folks elected to use a standard miniature stereo jack as the serial port connector for external peripherals. The data protocol is built around a standard 9600-bps half-duplex serial stream, with one start bit, two stop bits, and eight data bits with no parity. grams to and from a PC. I found only Interfacing the FX-9750G to a PC is partial information about how to trans- a matter of adapting TTL–to–RS-232 mit or receive single variables instead levels. A MAX232 can do the job. I of programs, but it served as a good built one of the dozens of similar starting point. circuits I found on the Internet, I assumed that the variable transfer coupled with the FA-122 Windows format probably wasn’t so different backup software. from the program transfer format. I haven’t tested the compatibility Notably, even the official Casio FA-122 with other calculators (besides the backup software can be found online. FX9750G), but I don’t expect any I knew that the communication differences in the protocol between was a 9600-bps half-duplex TTL serial similar models. stream, and I knew communications should start with ACK/NACK-style, CASIO PROTOCOL single-character messages. Packets The Internet is now an invaluable follow, starting with colons ($3A) and resource for designers. After a night of terminating with checksums. browsing, I found some commented I also had PIC samples, some good programs for loading calculator pro- ready-made serial and BCD routines,

Photo 2—I used Visual Basic to discover the inner secrets of the Casio protocol. With VB5 it’s easy to set up a quick and dirty serial protocol debugger. Tasks responding automatically to a control character, trying various serial speeds, or sending packet strings are left to a simple program loop. Thanks to Visual Basic’s interpretative nature, you can stop the program, issue any other command manually, then continue execution. This way you avoid writing lots of code. Here, the characters sent by the Casio are in red, and the analog interface response is in black.

16 Issue 99 October 1998 Circuit Cellar INK® + 4 V Straightening Curves—Linearizing a Tank-Level Sensor Sensor Most sensors’ outputs are nonlinear. To use them practically, they must be output straightened using interpolation tables or analytical models. ∝ Float ∝ Span 35˚ Regression models are popular analytical tools for substituting data tables with clean, continuous functions that are elegant and practical. During calibration, Pump function substitutes require only three or four points to be measured, as compared niche to the many more points that tables require. The volume of liquid in the 25-l tank in Figure i is measured using a float Figure i and potentiometer. The output is proportional to the angle. The tank’s irregular shape makes an analytical approach impractical. It’s better to measure the sensor i) output at known liquid quantities. v) Photo i—The output is connected to the x input, and the program in Listing 1 is run. Each cycle, exactly 1 l of liquid is added until the tank is full. At the end, List1 stores the liters of liquid, and List2 stores the sensor’s output level. Successive data manipulation is done manually. Photo ii—Selecting STAT gives you the sampled data in its raw form, as it appears on the default entry page. Here, editing and sorting can take place. GPH1 lets you vi) ii) view data graphically, and SET lets you check the current graphing preferences. Photo iii—The preferences for GPH1 are set as a scatter graph with small box markers. I want to plot the liters over the sensor’s output, so I select List2 for x and List1 for y. Showing the inverse function is simply a matter of exchanging coordinates here. Exit goes to the previous menu. Photo iv—The display scales automatically to fit all the data, but you can zoom in or pan in each direction. The dotted grid iii) vii) is shown every 50 mV for x and 5 l for y. Note the gap at about 5 l (after the fifth marker), which is due to the pump niche. Photo v—To draw the first-order regression line, just press X. Other regression models (e.g., median-median, second- to fourth-order polynomials, logarithmic, and exponential) are obtained the same way. Photo vi—The first-order regression is too coarse for reliable measurements, but it’s easy to try other curves. The second- iv) order one, shown here, fits the data nicely. viii) Photo vii—Zooming shows that the error at the pump niche gap is negligible. Photo viii—Pressing X^2 brings up the coefficients and the regression formula, ready to be used for linearizing the sensor’s output. Thanks to the second- order characteristic, a full data table is no longer necessary. I can do the calibration with only three points.

18 Issue 99 October 1998 Circuit Cellar INK® and a microjack plug. That’s all I issued a 50-byte variable-address packet, Once reset (and for most of the time), needed to start experimenting. starting with :VAR. the device is left in sleep mode. It’s Using a TTL–to–RS-232 level con- I reiterated this process, continuously awakened by another WDT timeout or verter, I connected the calculator to reversing the sender with the receiver, by receiving a character. the PC serial port so I could monitor sometimes simulating Send(X) and In the former case, the device goes what’s going on. sometimes simulating Receive(X). back into sleep mode. In the latter After I issued the Receive(X) Packet after packet, the whole protocol case, the LED flashes, the ADC awak- command on the Casio, it sent out a was discovered, as depicted in Figure 2. ens, and the communication flow $15 character and, after 1 s, it aborted restarts. (a $22 character sent to the PC prior MAIN CODE When the micro sleeps, the ADC is to interrupt communications). The software copes with communi- left in full power-down mode. The I made a Visual Basic program to cation protocols over a serial line, shutdown pin is a three-level selection issue various characters after that combining sleep mode and watchdog input, and the MAX186 sleeps with attention request (see Photo 2). I techniques to achieve minimal power that pin at 0. quickly discovered that the calculator consumption, low-power ADC driving, It is awakened by putting the pin was waiting for a $13 character. and data conversion to the Casio format. in a high impedance state, which is A request packet from the calculator Complete packet templates are stored done long before the conversion starts follows this vital sign from the PC (50 in data tables in program memory. At to let the voltage reference capacitor bytes, starting with :REQ), where the this point, I found RETLW invaluable. charge completely. calculator defines the variable to be Only segments with variable val- The MAX186 input can be recon- sent. As expected, all nontrivial packets ues are replaced by real data read from figured to bipolar input mode (with start with a colon character and are the ADC in real time. Most parts of input spanning from –Vref/2 to +Vref/2) terminated by a simple negated check- the input packet are ignored, and only or pseudodifferential input mode by sum. With the exception of the last the variable name is stored to select changing the command word that is packet, all require an acknowledge- the right ADC input. When issuing ORed in the ReadADC code segment. ment message from the recipient ($06). Receive(X), you can specify any other Figure 3 shows the signals involved Since I didn’t know how a value variable name to select a different input. and how the control word is made. packet is made, I reversed the situation, Even the simpler communication The Casio needs variables in BCD making the Visual Basic program act protocol must deal with errors and format with separated exponent dig- as a Casio calculator issuing the interruptions. To keep program over- its. The most significant digits come Receive(X) command that was just head low, I set up the watchdog timer first. The BCD conversion and the bit- received. At the same time, the real to reset the device if it waits for an banging serial-port routines are de- Casio calculator issued Send(X). In answer from the calculator for more rived from public-domain Microchip this reversed setup, the calculator than 2 s. libraries.

Figure 4—Using a graphing calculator as the output and processing device results in a simplified circuit diagram. The 5-V power rail is brought to the input connector to feed external sensors. If the quiescent current does not concern you, then the popular 78L05 can replace the LP2950CZ.

Circuit Cellar INK® Issue 99 October 1998 19 INSIDE THE BOX However, it’s fully supported by soft- into account when estimating battery The final circuit diagram is shown ware, so if you need it, simply add an life. If the sensor sinks a significant in Figure 4. Since this is a low-power, input capacitor and feel free to use it. amount of current, consider powering unshielded, mixed A/D circuit, the Of course, power supply is critical it through one of the free PIC I/O pins, overall result depends on the quality in every battery-operated device. which will power off when not in use. of the layout. Power-up rise times must be short I assembled the whole circuit using Even though we’re all accustomed because there is no external reset a prototyping board, and it fits inside to 12-bit converters, you must take circuitry for the micro. The MCLR a small plastic box that’s only the size great care to correct grounding so you pin is tied directly to VCC. of the calculator. The box contains all have stable readings of the least sig- The low-power regulator is more the circuits and the battery. Only the nificant bits. The analog and digital delicate than a regular 78L05. It requires micro jack connector (connecting to grounds must be kept separate. They an output electrolytic capacitor—better the calculator serial port) hangs out. have to be joined only at one point (as if it’s tantalum. As you see from Photo 1, there’s a near as possible to the regulator ground). The required current is impulsive, lot of space left on the board. If possible, Bypass capacitors are mandatory, and consisting of a 50-µA offset (sleeping use a 90° jack to keep the unit even capacitors on the inputs are equally micro and ADC), 1.5 mA during serial more compact and rugged. necessary. communication with the calculator, a The MAX186 has a good pin layout, single pulse of 1.5 mA for a few milli- SETTING UP THE CASIO which helps separate input lines from seconds (A/D conversion), and a 1-ms While operating, the analog inter- data lines, and a stable readout is peak for LED flashing (current given face box is stuck to the bottom of the easily obtainable. But in noisy environ- by the LED series resistor). calculator, below the LCD, with ments, consider averaging in software The LED flashes once per conversion. TESA removable biadhesive strips. to further reduce uncertainty. I recommend a red LED because it This arrangement gives the calculator The eighth analog input is left produces more light with the same a stable and comfortable slope, and it unconnected on the prototype. This current. leaves the input connector in a handy arrangement enabled me to bring the I brought the power supply to input place, free from obstacles. power out to the nine-pin input con- pin 8 in case some sensor needs it. Be To reveal the micro jack socket, nector, thus powering external sensors. sure to take sensor power requirements remove the rubber cover that comes

20 Issue 99 October 1998 Circuit Cellar INK® with the calculator. If the jack is left selects a different input. Variables Casio world. Seq allocates the unconnected or the unit is powered supported are x, y, v, w, z, s, t, and u. memory space for a list and initializes off, a Com error message is displayed. Other names are seen as aliases and it. Here, two lists—one for the liquid You don’t need any particular pro- won’t cause errors. quantity and one for the sensor output— gramming skill to use the acquisition are created and filled with data in a unit. One instruction does it all. FIRST GRAPH simple for-next loop. Issuing Receive(X) directly (Recv Look at the real-world example in At each cycle, 1 l of liquid is added softkey in the PRGM I/O menu) displays the sidebar “Straightening curves— and a measurement is taken. This the value read from channel x. You Linearizing a Tank-Level Sensor.” process continues until the tank is can manipulate the x variable like any Here, a float drives a potentiometer full. When the program ends, the two other ordinary variable, exactly the sensing the liquid level in a 25-l, ir- lists hold the quantity of liquid as same way you would if you entered it regularly shaped tank. well as the sensor’s output level. manually. Value is expressed in milli- I want to figure out the relation- Even if data visualization commands volts, and ranges from 0 to 4095. ship between the sensor output and could be included in the program, it is Receive(X) is usually issued under the quantity of liquid left in the tank convenient to look at nonrepetitive program control, as in Listing 1. But, I and to gather enough data to build a tasks manually. like to manipulate graphs manually. It’s model for the control processor. The STAT menu lets you examine an instructive, highly interactive way. The complex relationship between the data tables. If you select the GRPH Nevertheless, every keystroke can angle, height, and volume makes an submenu and GPH1, Graph1 is then be replaced by a matching keyword to analytical approach impractical. It displayed as an x-y scatter graph of be issued under program control. would be better to measure the sensor List1 (liters) over List2 (sensor From the programming standpoint, output at known liquid quantities. output). complex tasks (e.g., displaying a The potentiometer output is brought Although nonlinear, it’s immedi- whole graph or computing a fourth- to input x. It’s powered at 4 V to avoid ately clear that the sensor output is order regression) count as only a damaging the inputs. suitable for measurements. An anom- single instruction. In Listing 1, you see the simple aly at about 5 l, due to the presence of You can specify other variable control program that’s required. List a pump niche that reduces the avail- names instead of x. Each variable is the equivalent of an array in the able volume, is equally evident.

Circuit Cellar INK® Issue 99 October 1998 21 MODELING DATA By means of regression, the measured Listing 1—This simple program makes 25 samples and places them in List2. Another list is filled with List data can be shaped into a function that ascending numbers used as x-axis values on an x-y graph. is the equivalent of an array in the Casio world. fits into a nice formula. Formulas are not only easy to implement, they also Seq(N,N,0,25,1) --> List1 give us a better understanding of the Seq(0,N,0,25,1) --> List2 data and can significantly reduce the For 1--> N To 26 Receive(X) number of points needed for calibration. X --> List2[N] In this example, the original data Locate 1,1, N set is made of 26 points. Knowing Locate 10,1, X that a sensor’s output is a second- While (Getkey): WhileEnd Next order function enables a three-point- only calibration without appreciable degradation. The calibration procedure can then be reduced to reading the plotting weather data, to shoving a REFERENCES output at three convenient positions waveform from an instrument and (empty, full, and halfway). monitoring a central heater’s operation, MPLAB IDE free assembler and On the Casio, complex regressions or counting people coming in a door. simulator software, 1997 technical are a single keystroke away. When a The number of possible applications library, www.microchip.com. graph is displayed, as in Photos v, vi, exploded. Built-in display and the capa- Casio, FA-122 software and PC link and vii in the sidebar, the softkey line bility of being programmed, combined schematics, members.tripod.com/ lists a variety of popular regression with very low cost, are the key factors. ~carolino/. functions to choose from. Pressing x I encourage you to expand the capa- Casio, FX9750G User Guide, brings out the coefficients for first-order bilities of the data logger. The code is A340606-27. regression line. DRAW puts a graph fully commented, and the PIC program Maxim Integrated Products, MAX186– over the sampled data. memory is only half full. MAX188 low-power, 8-channel, As you see from Photo vi, a simple I do have a couple suggestions. As a serial 12-bit ADC, Datasheet 19- straight line leaves a lot to be desired. first step, try adding a pulse-counter 0123, August, 1996. The shift-zoom combination brings up mode. There are lots of things worth Maxim Integrated Products, MAX192 the zoom menu, while pressing one of counting, and many sensors (e.g., Steve low-power, 8-channel, serial 10-bit the arrow keys pans the whole display and Jeff’s lightning sensor [INK 90]) ADC, Datasheet 190123, March, in the indicated direction. have pulse outputs. 1994. The X^2 softkey switches to the Secondly, drive outputs by imple- Microchip Technology, PICmicro second-order regression. This time, the menting the Casio command Send(X) mid-range MCU family reference graph is very near to almost all the to make the interface bidirectional. manual, Datasheet DS33023A, samples. The overall result doesn’t vary The Casio is slow but powerful enough December 1997. appreciably regardless of the regression to read in the input, make some com- order (e.g., x3, x4). Other regression putations, and send output to the SOURCES models (e.g., logarithmic, exponential) outside world. In this way, it would PIC16C84, PIC16F84 don’t give significantly better results. migrate from the world of monitoring Microchip Technology, Inc. You can interact with your data and and displaying events to the broader (602) 786-7200 try out as many functions as you like, world of (pocket) computer control. I Fax: (602) 786-7277 exploring the possibilities without www.microchip.com having to write a single line of code. It Alberto Ricci Bitti is a software de- is impossible to list here all the func- signer at Eptar, an industrial-control- MAX186 tions in the 425-page Casio FX9750G ler firm. He has written software for Maxim Integrated Products user guide. There’s also a full set of systems such as meteorological (408) 737-7600 statistical tools—useful when moni- equipment, specialized TV sets, pro- www.maxim-ic.com toring production sample parameters, fessional satellite devices, industrial FX9750G weather data, pollution, and so on. machinery controllers, and energy- Casio Electronics Co., Ltd. management devices. You may reach www.casio-usa.com A BROADER VISION Alberto at [email protected]. Since this design was announced in LM2936, MAX186, PIC16C84, INK 95, I’ve received lots of E-mail SOFTWARE PIC16F84 from interested readers. Each one had Digi-Key Corp. a different vision of what this little Source code in official Microchip (218) 681-6674 design can be used for—from tracking mnemonics is available via the Fax: (218) 681-3380 the accuracy of a GPS-locked PLL and Circuit Cellar web site. www.digi-key.com

22 Issue 99 October 1998 Circuit Cellar INK® For this reason, analog-filter specifications are typically given in the fre- FEATURE quency domain. Still, it’s important to consider the time-domain characteris- ARTICLE tics of analog filters whenever waveform distortion (e.g., in digital demodulation systems) or signal delay is critical.

Glenn Parker TRANSFER FUNCTIONS Analog-filter designers are undoubt- edly familiar with how the Laplace Transform relates continuous-time Time-Domain Filter with the frequency domain. There is a parallel relation between discrete time and frequency via the z-transform. Simulations Using C++ The coefficients of a function in the z-domain can be used to construct a constant-coefficient difference equation, which provides a direct method for time-domain simulation:

y[n] = 2x[n] + x[n – 1] – 3y[n – 1]

where y[n] is the output at time ∆tn, and x[n] is the input at time ∆tn. By n early every hard- iterating n, this system’s time-domain When you have to ware engineer (analog response to a changing input can be or otherwise) deals with calculated. The constant ∆t is simply work with filters— frequency selective circuits, or filters, the time interval between n − 1 and n. at some point in his or her career. Filters Once the difference equation coeffi- and what hardware are everywhere, and most electronic cients are found, a real-world signal systems can’t function without them. can be sampled with an ADC and engineer doesn’t at Circuit simulation is fairly straight- filtered by hardware with dedicated forward today, especially with readily DSP devices or microcontrollers or by some point?—you’ll available simulation software. But, some some other method implementing the engineers still write software (for speed difference equation. The same idea want to try out or to handle aspects of their application lies behind digital filters as well. not addressed by commercial software). The difference equation coefficients Glenn’s complete This article presents a complete C++ can be tweaked to realize nearly any class for simulating electronic filters. magnitude and phase requirement. C++ FILTER class. If you need a refresher course, check Or, you can take the coefficients and out the sidebar “Analog Filter Basics.” funnel them through a simulation He’s ready to prove The source code is implemented engine like the one presented here to for analog filtering, but you can easily see what the original analog filter how easy it is to adapt it to handle digital filters or any looks like in the time domain. analog system that can be characterized The only missing link is how the integrate this class by a transfer function in the frequency s-domain function gets into the z- domain. A Windows executable com- domain. There are several acceptable into embedded apps. plete with source code is also available methods for accomplishing this, each which uses the class to simulate various with benefits and pitfalls. The class I analog filters, including elliptic types. present here uses the bilinear transform. Digital or discrete-time filters are The nonlinear mapping inherent in implemented in software or through this transform compresses the frequency dedicated DSP hardware. Analog or response. The critical filter frequencies continuous-time filters are generated can be moved slightly to compensate by designing a network whose input for the magnitude response compres- impedance changes with frequency to sion, but in most cases, the phase realize a desired response curve. response is noticeably distorted.

24 Issue 99 October 1998 Circuit Cellar INK® Figure 1 shows a linear-phase filter Since each pole or zero only response before and after the bilinear contributes to the coefficients in T(jω) transformation. Because of its inevitable a single section, quantizing a phase distortion, this transform is not high-Q pole near the jω axis only suitable for modeling linear-phase or has an effect on one section flat group-delay filters. instead of the whole filter. Predistortion or prewarping is often While it’s true that any section applied to the original filter so the trans- in a cascade has an effect on the formed filter’s magnitude response overall system, the error contri- –2π 2π looks like the original. Prewarping is bution is much smaller than in a done by shifting the s-domain cutoff single-section filter realization. frequency before transformation to By cascading smaller sections force the transformed filter’s cutoff to (no more than two or four poles occur at the correct frequency. per section), the simulator can The new cutoff frequency is given by: handle larger filter orders, but Before transform After transform that’s at the expense of speed. ω × 1 × Ω The solution: use small sec- Figure 1—This graph shows the phase response of a linear =2fsample tan phase filter before and after applying the bilinear transform. 2 fsample tions and eliminate as many calculations per iteration as where Ω is the discrete-time frequency possible. The class I discuss handles The precalculation mode is used in and ω is the corresponding continuous- huge filter orders, and in benchmark cases where the input signal has been time frequency. tests, it was at least 100 times faster precalculated and placed in an array, than commercial simulators. (e.g., my sample application, where QUANTIZATION ERRORS Filter orders as high as 100 have data is fed through a filter only). Although a single section can be used been simulated using this example The second mode is used when to realize any filter order, coefficient application. Obviously you wouldn’t iteration is needed, and the input value quantization is an important consider- ever build such a filter, but it’s useful is only available in time steps. For ation. In a single-section filter, each pole for simulating a brick-wall effect. example, most feedback systems have or zero contributes significantly to the inputs that depend on outputs, so it’s coefficients of the difference equation. CALCULATION MODES not possible to know what the filter’s If one pole or zero experiences severe The class as presented is designed next input is until you know the cur- round-off problems, the entire filter is for use in a time-domain simulation rent output. affected. This situation is most easily engine. It operates in two calculation If this all seems confusing, don’t overcome by cascading low-order modes—precalculation and time-step worry. You can use the sample appli- sections to realize high-order filters. iteration. cation to simulate filters without ever digesting the source code.

USING THE FILTER CLASS The three most-used functions in the FILTER class are shown in Listing 1. The first two constructor arguments are set equal to #define constants given in the source file. They determine the filter type (e.g., low pass) and shape (e.g., Chebyshev). Table 1 defines the remaining arguments. As you might guess, calling either TransferFunc() or TimeStep() defines the simulation mode you’re operating in. TransferFunc() takes a pointer to the input and output data and the number of points in those arrays. TimeStep() takes a pointer to the input and output data and the current time step. Additional useful functions (e.g., GetEllipticRoots()) are given in Photo 1—This screen capture of the sample application shows a simulated response. the sample application, but only the

Circuit Cellar INK® Issue 99 October 1998 25 Analog Filter Basics According to a 1984 edition of Webster’s Dictionary, an electronic filter is “a device that rejects certain Pass band signals while passing others.” An analog filter is a circuit containing reactive elements and whose transfer characteristics vary with frequency.

Usually, a certain band of frequencies is allowed to Stop band Stop band pass, while other frequencies are attenuated or stopped altogether. Figure i shows a typical frequency Increased attenuation Transition bands response, along with an illustration of several com- Increasing frequency mon filter terms. The frequency (or frequencies) where the pass band Figure i—The pass-band response shown here illustrates common filter ends is called the cut-off frequency. There are four terms. common filter types:

• low-pass filters pass frequencies from DC to the A filter’s transfer function is defined as: desired cut-off frequency. All other frequencies are attenuated. V (s) • high-pass filters attenuate frequencies from DC to T(s) = out Vin(s) the desired cutoff and pass higher frequencies. where s is the Laplace Transform complex frequency

variable, Vout is the filter’s output voltage, and Vin is the Laplace Transform of the signal being input to 1 the filter. The magnitude response shown in Figure i is found by substituting 0

×ω –1 s=j

Butterworth –2 and taking the transfer function magnitude where Elliptic Chebyshev –3 j= –1

–4 and ω is 2π times the frequency of interest in hertz. 0.0 0.2 0.4 0.6 0.8 1.0 A filter’s order is equal to the degree of the de- Frequency (Hz) nominator polynomial in the transfer function. This Figure ii—Here’s the pass-band response of three popular filter types. These value is directly related to the complexity of the filters have been designed for –3-dB cutoff at 1 Hz. filter necessary to realize the transfer function. In

• band-pass filters pass a band of frequencies between 0 the two desired cut-off frequencies. All frequencies Butterworth below and above the pass band are attenuated. The –20 Elliptic Chebyshev response shown in Figure i is from a band-pass filter. –40 • band-stop or band-reject filters stop a band of frequencies between the cut-off frequencies. All fre- –60

quencies below and above the stop band are passed. Cut-off Frequency –80 Ideally, the stop band would border the pass band –100 exactly, and the transition band would have zero 0.0 1.0 2.0 3.0 4.0 width. However, in real filters, the transition band Frequency (Hz) always exists, and there are many factors involved Figure iii—This graph shows a stop-band comparison of the filters used in that control the response shape. Figure ii.

(Continued on page 28)

Circuit Cellar INK® Issue 99 October 1998 27 range anytime one of the order Filter order (number of low-pass poles) range prompts loses focus (Continued from page 27) ripple Pass-band ripple in dB. Used only for and the value changes. Chebyshev and elliptic filters. stopBandAtten Minimum stop-band attenuation in dB. other words, higher order filters Used only for elliptic filters. ARBITRARY SYSTEM require more parts to build. In fcl Lower cut-off frequency in hertz SIMULATION general, the higher a filter’s fcu Upper cut-off frequency in hertz. Used For each section, the order, the more narrow the only for band-pass and band-stop filters. FILTER sampleFreq Sample frequency in hertz. This value class constructor transition region, and the more should be several times greater than the calls the function: square the response shape. largest frequency specified above to There are three popular avoid aliasing. void CalcSection- magnitude response filter types gain Maximum pass-band gain. This para- Coeff(FILTER_SECTION meter is linear and specified in V/V. available. Butterworth filters *s, complex *pole, have a flat response in the pass complex *zero, int band and monotonically in- Table 1—Here are the definitions of the FILTER-class constructor filterType, double arguments. creasing attenuation into the wc1, double wc2) stop band. necessary functions for getting started Chebyshev filters have a are listed here. However, the FILTER- This function calculates the a and b smaller transition band than class source code is heavily commented coefficients used to calculate the cas- Butterworth for the same order and should be easy to follow. caded FILTER_SECTION responses. and better stop-band rejection. Instead of using the included func- However, this is at the expense A WINDOWS APPLICATION tions for calculating poles and zeros, of ripple inside the pass band. My Windows application uses the an array of poles and zeros could be Elliptic filters have a more FILTER class to simulate a variety of passed to the FILTER constructor for narrow transition band than analog-filter designs. Photo 1 shows a use in building the FILTER_SECTION Chebyshev for the same order, sample screenshot from the program. cascade. These poles and zeros should and better stop-band rejection An eighth-order elliptic low-pass be normalized, since CalcSection- by including zeros of transmis- filter with a cut-off frequency at 1 MHz Coeff() scales the roots by the two sion in the stopband. However, was simulated. The pass-band ripple is cutoff frequencies. elliptic filters require more set at 0.25 dB, and the minimum stop- parts to build than Butterworth band attenuation is set at 200 dB. The ADAPTING THE CLASS and Chebyshev filters. reference (input) signal is a square wave Listing 2 shows a portion of the These three response types at 100 kHz, and the sampling frequency FILTER and FILTER_SECTION classes. are compared in Figures ii and is 100 MHz. The FILTER constructor takes analog- iii. The filters are all fifth order The help prompt changes each time filter parameters and fills in each and have 3 dB of attenuation at the input focus moves to a new control. FILTER_SECTION accordingly. You the cutoff frequency (1 Hz). I tried to make the prompts self-explana- could say it designs digital filter coef- The elliptic and Chebyshev tory, but given onscreen space restric- ficients that realize the analog filter. filters were designed with tions, they may appear cryptic. I hope The FILTER constructor takes analog about 0.43 dB of pass-band the help prompt will clear up any ques- filter parameters and calculates the a ripple. The elliptic filter was tions. If you don’t understand a prompt, and b coefficients via the bilinear trans- designed to maintain at least you can change the number repeatedly form. These coefficients are the same 45 dB of attenuation in the stop and hit Simulate until it’s clear. ones used in a hardware implementation band. More attenuation could The only prompts that don’t require of an Infinite Impulse Response (IIR) have been requested, at the resimulating to take effect are the filter. expense of widening the transi- vertical range inputs. The calculated You can create a complete IIR-filter tion band. response is redrawn with the new simulation engine by adding over- Chebyshev and Butterworth filters are relatively easy to design and can be built from Listing 1—These are the three most used functions in the FILTER class. the same topology by simply changing component values. FILTER::FILTER(int filterType, int filterShape, int order, Elliptic filters require more double ripple, double stopbandAtten, double fcl, double fcu, complex structures to realize double sampleFreq, double gain); void FILTER::TransferFunc(double *input, double *output, int the stop-band transmission numPoints); zeros and can drastically increase void FILTER::TimeStep(double *in, double *out, int timeStep); both part count and component tolerance sensitivity.

28 Issue 99 October 1998 Circuit Cellar INK® Glenn Parker works for Eagleware FILTER Listing 2—This source-code snippet illustrates the use of the class. and has been writing circuit design and simulation software for five struct FILTER_SECTION{ years. He also teaches filter-design int numCoeff; double gainFactor; courses at several RF and microwave double *lastOutput, *lastInput, *a, *b; trade shows annually. You may reach FILTER_SECTION(){ him at [email protected]. a=b=lastOutput=lastInput=NULL; } }; SOFTWARE class FILTER{ private: Complete source code is available int numSections; via the Circuit Cellar web site. For FILTER_SECTION *section; }; a more theoretical description of the techniques and equations used to develop the source code, a complete Mathcad worksheet is available loaded FILTER constructors to calcu- PUT IT TO USE from the author. late the coefficients by other methods This C++ class is easily adaptable to (impulse and step invariance, or existing simulation software. You can REFERENCES matched-z). By truncating or rounding also expand the source code to include the coefficients to a given number of arbitrary IIR design and simulation. Oppenheim, V. and R.W. Schafer, bits, the simulation engine would My application uses it to simulate Discrete-Time Signal Processing, model the actual quantized response several popular analog-filter types. You Prentice-Hall, Englewood Cliffs, of an IIR structure. can use it to evaluate filters with sine- NJ, 1989. Beyond this, no further modifications or square-wave inputs, which is helpful Orchard, H.J. and A.N. Wilson, Jr., should be required. Simply call either for determining whether a given filter “Elliptic Functions for Filter De- TransferFunc() or TimeStep() as meets the rise or fall time or attenuation sign,” IEEE Transactions on Cir- you would for analog filters. specs for a particular application. I cuits and Systems, 44, April, 1997.

Circuit Cellar INK® Issue 99 October 1998 29 difference of the signal and the sample rate—in this case, 13 kHz and 7 kHz. Breaking FEATURE You can see that lowering the sampling rate to 8 kHz gives beat frequen- ARTICLE cies of 5 kHz and 11 kHz. At a sampling Nyquist rate of 6 kHz, the beat frequencies are 3 kHz and 9 kHz. In the latter example, the lower beat frequency is equal to Gerard Fonte the signal frequency (3 kHz), which is known as the Nyquist limit. The Nyquist limit is always one half of the sampling rate. This description isn’t the traditional defini- tion, but it lets us look at Nyquist from a different point of view. Post-Sampling Antialiasing As you’ll see, there’s an easier way to examine some important aspects of the Nyquist sampling theorem. And from there, you’ll see that the Nyquist limit can be sidestepped.

ELIMINATING ALIASING Now, let’s go back to measuring a 3-kHz signal at 10 kHz (samples per second). Suppose there is also a 7-kHz i t is generally be- signal present. What happens? You’d think someone lieved that digital Well, the 7-kHz signal beats with signal processing (DSP) the 10-kHz sample rate and generates would have figured it cannot remove or identify aliased 17- and 3-kHz signals. Obviously, the signals. For years, we’ve heard “Once 3-kHz beat frequency is the same as out by now: you can’t the aliased signal gets digitized, it the real 3-kHz signal, but it’s an alias. becomes indistinguishable from real Clearly there’s a problem: we can’t get away with chal- signals and cannot be removed.” tell the difference between a real 3-kHz But, this statement isn’t exactly true. signal and a 7-kHz signal. lenging an engineer. There is a method for identifying and The traditional method is to low-pass removing aliases after sampling, and filter the signal to eliminate any signals Gerard is set to dis- it’s even possible to identify and mea- (or signal components) above the Ny- sure signals above the sampling rate. quist frequency. In this case, since the prove the common sampling rate is 10 kHz, the Nyquist THE PROBLEM limit (and filter cutoff) is 5 kHz. belief that DSP can’t Aliasing is possible with any sampled However, filtering is more easily system, including ADCs, switched- said than done. The 7-kHz problem identify aliased sig- capacitor filters, sample-holds, and signal is only about twice the signal any other circuit that measures a signal of interest (3 kHz). A simple resistor- nals. According to at intervals. Aliasing doesn’t occur with capacitor (RC) filter (one pole) reduces continuous-time circuits like analog the 7-kHz signal by a little more than him, you can get filters, amplifiers, phase-locked-loops, 6 dB (50%). frequency-to-voltage converters, around Nyquist! or analog multipliers. An alias is created by mixing Real 3-kHz signal and dB (or beating) the sampling fre- 7-kHz signal aliased to 3 kHz. quency and the sampled signal, Sampling rate is 10 kHz hence another name for alias is beat frequency. 1 kHz 2 kHz 3 kHz 4 kHz 5 kHz Suppose you want to measure Figure 1—When sampling at 10 kHz, a real 3-kHz signal and a a 3-kHz sine wave, and you 7-kHz signal get mapped to the same spectral line of 3 kHz. sample it at 10 kHz. The beat The 7-kHz signal is aliased to 3 kHz. Traditional techniques are frequencies are the sum and unable to separate the two different signals from each other.

30 Issue 99 October 1998 Circuit Cellar INK® In a digital system, a 6-dB reduction Aliased signals track with the sam- Aliased signal is equivalent to shifting the alias pling rate, while real signals (below moves to 2 kHz when sampled Real signal stays at 3-kHz amplitude value one bit to the right. the Nyquist limit) remain fixed. In dB at 9 kHz when sampled at 9 kHz Most likely, this reduction won’t help. this way, aliased signals can be separated from real signals after sampling. FILTERING VS. BANDWIDTH 1 kHz 2 kHz 3 kHz 4 kHz 5 kHz The real world uses sharp-cutoff, GOING FURTHER low-pass filters of eight or more poles, Since there is a specific relationship Figure 2—By sampling a second time at a different which increases complexity. Addition- between the aliased signal and the rate, the alias signal is separated from the real signal. The amount of alias shift is directly related to the ally, the sampling rate is generally sampling rate, the aliased signal can change in rate. increased 4–10 times greater than the be calculated. Let’s look at an example highest frequency of interest, which from the DSP point of view. decreases bandwidth (relative to the What is the real frequency of a where Fa is the alias frequency, Fk theoretically possible). signal that appears at 3 kHz when equals the sampling rate, Fs represents Finally, the filters generally must sampled at 10 kHz, but shifts to 2 kHz the signal frequency, and n is any be analog types (or digital filters with when sampled at 9 kHz? Finding the positive integer. clock rates 10–100 times greater than answer is simple. There are exactly two aliases for the sample rate and with their own The 3-kHz beat frequency at 10 kHz each n, and as n increases, the alias analog antialiasing filters). means a real frequency of 13 or 7 kHz. changes by an identical factor. Also, Therefore, the performance of any The 2-kHz beat frequency at 9 kHz note that the alias is only created conventional sampled system depends means a real frequency of 11 or 7 kHz. when the signal frequency is greater on the filtering of the signal before Since 7 kHz is common to both sam- than half the sampling rate. the signal is sampled. The closer to pling rates, it must be the answer (i.e., Back to the problem of 3- and 13-kHz the theoretical maximum bandwidth the unknown alias frequency). signals sampled at 10 kHz and then you want (Nyquist limit), the closer It’s important to note that this again at 9 kHz. Let’s assume there is a to a perfect filter you need. simple procedure has measured and perfect low-pass filter at 50 kHz to Realistically, if the highest signal identified a signal above the Nyquist limit the number of possible aliases. of interest is 3 kHz, you may need a limit. But, you ask, suppose the addi- The 3-kHz signal creates no alias minimum sampling rate of 15–30 kHz. tional frequency was 13 kHz instead because it’s less than half the sampling So, you’ll need a faster (read: more of 7 kHz? What then? rate. It stays at 3 kHz when sampled expensive) ADC than what you might Let’s work it out. First, I cheated a at either 9 or 10 kHz. The 13-kHz have initially expected. little for simplicity. In the previous signal creates an alias at 3 kHz when example, there were many more pos- sampled at 10 kHz and an alias at THE SOLUTION sible alias frequencies than I implied. 4 kHz when sampled at 9 kHz. But, we can improve things. Let’s A 3-kHz alias signal from a 10-kHz If you didn’t know the additional reconsider the 3-kHz signal with 7-kHz sampled system could be 7, 13, 17, 23, signal was 13 kHz, how would you signal, sampled at 10 kHz (see Figure 1). 27, or 33 kHz, and so forth. There is determine it? The procedure is the As I stated, the 7-kHz signal gener- actually an infinite number of pos- same, except that there are more than ates an alias at 3 kHz and 17 kHz. sible signals that generate a 3-kHz two pairs of possible alias sources. Let’s assume the DSP system has an alias. At 10-kHz sampling, the 3-kHz internal Fast Fourier Transform (FFT) The calculation is: alias could come from a signal at 7, bandwidth from 0 to 5 kHz. So, you 13, 17, 23, 27, 33, 37, 43, or 47 kHz. can ignore the 17-kHz signal. Fa = (n × Fk) + Fs At 9-kHz sampling, the 4-kHz alias But, you still have two signals (3 or could come from a signal at 13, 14, and 7 kHz) mapped to one frequency Fa = (n × Fk) – Fs 22, 23, 31, 32, 40, 41, 49, or 50 kHz. (3 kHz). The solution is simple: The only common value be- sample again at a different rate. tween the two lists is 13 kHz. Let’s try 9 kHz. The real Therefore, the alias signal that 20 kHz 3-kHz signal is still mapped to creates a 3-kHz signal when 17-kHz Alias 3 kHz since it’s below the Sample rate sampled at 10 kHz, and a 4-kHz 13-kHz Alias Nyquist limit. But, the 7-kHz 10 kHz 15 kHz signal when sampled at 9 kHz, signal is shifted from 3 to 2 kHz 7-kHz Alias must be 13 kHz. This procedure (see Figure 2). Comparing the Nyquist has identified and measured a limit FFT spectra of two signals at two signal above the sampling rate. 0 kHz 1 kHz 2 kHz 3 kHz 4 kHz 5 kHz different sampling rates enables Note that other frequencies us to identify aliased signals. create a similar pattern. In this Figure 3—The Z map technique quickly illustrates where aliases will That’s the fundamental idea be mapped. You can see that the alias may increase or decrease with particular case, 67 kHz (like behind post-sampling antialiasing. increasing frequency. Sometimes this characteristic causes confusion. 13 kHz) produces a 3-kHz alias

Circuit Cellar INK® Issue 99 October 1998 31 Adaptive sampling In this case, the alias signal maps Input Filter Sampler (ADC) techniques can be used onto two real signals, which is different Memory at rate 1 DSP as well. The second from the ideal cases I just presented. Input Dual-rate Memory at rate 2 sampling rate (or third Since the alias can only add to a spec- sample clock rate, etc.) can be chosen tral line, the spectral-comparison Output by the system in response software must use the lowest value as Figure 4—Here’s a typical implementation of a system with a repetitive to the spectrum analyzed. the best estimate for the real signal. signal. There is no significant hardware difference from conventional sys- The spectrum taken With lots of signals above the Ny- tems, except that the sample clock must work at two speeds. at one sample rate can quist limit, many aliases map onto be examined, and the real signals and the spectral compari- when sampled at 10 kHz and a 4-kHz most appropriate second sample rate son software becomes more complex. signal when sampled at 9 kHz. (or third, etc.) can be implemented to Trying to map DC-to-50 kHz onto a This situation is expected. If we separate alias signals. Obviously, you’ll DC-to-5-kHz FFT bandwidth gives a don’t band-limit the system, we’re need more smarts in the software. ratio of nine alias signals for every mapping an infinite number of frequen- real signal. It may be theoretically cies onto the finite bandwidth of our LIMITATIONS possible, but it’s probably an exercise system. The more alias frequencies that are in futility. But, you can eliminate this problem, mapped onto real fre- too. Sampling the input signal again quencies, the more Input Filter Sampler (ADC) Sample at a third sample rate will resolve the complex the spectral Clock Memory at rate 1 13-kHz and 67-kHz signals. comparison software Input You just map out the possible needs to be. Suppose Sampler (ADC) DSP Output aliases created at the multiple sampling you had two real signals Sample Memory at rate 2 rates and determine common values. at 2 and 3 kHz: a 7-kHz Clock In theory, I could resample as many signal that was aliased times as needed to resolve, identify, to 3 kHz when sampled Figure 5—For nonrepetitive or one-shot systems, two clocks and two input and measure frequencies at any fre- at 10 kHz and to 2 kHz samplers are needed. Note that the samplers could be sample-holds feeding quency desired. when sampled at 9 kHz. a single ADC. The approach here is suitable for any application.

32 Issue 99 October 1998 Circuit Cellar INK® Up to now, I’ve (base line) identifies examined discrete 10-kHz sample rate 9-kHz sample rate 3 kHz the aliases mapped to Aliases Spectrum sum spectral lines and sig- 1 kHz 3 kHz 2 kHz 3 kHz 1 kHz 2 kHz of two samples that real signal. dB nals. However, noise is dB dB all spectral lines over 11-kHz Real 11-kHz Real Real alias Signal alias Signal Signal IMPLEMENTATION some bandwidth. If the There are two noise is limited to a basic methods of bandwidth less than Figure 6—Summing the spectra (instead of just examining them) has the effect of dispersing the implementation. The the difference of the alias. This dispersion reduces the alias amplitude relative to the real signal. first, shown in Figure sampling rates, it can 4, is like a conven- be isolated. to-one (alias to real) ratio when sampled tional A/D system with the addition Suppose there is a noise band from at 10 kHz. I discuss noise more below. of a variable sample clock. 7 to 8 kHz and a real signal at 2.5 kHz. The DSP software has to change We sample at 9 kHz and 10 kHz. Sam- ALIAS MAPPING slightly, with an additional FFT at the pling at 10 kHz maps the noise band To help identify alias mapping, I use new sample rate and an FFT spectrum to 2–3 kHz, which overlays the 2.5-kHz a method called Z mapping (which has comparison routine. Since the sample signal. Sampling at 9 kHz maps the nothing to do with the Z transform). rate affects the characteristics of the noise to 1–2 kHz, exposing the signal The Z refers to what the map looks FFT, the spectrum comparison routine of interest. (If the 2.5-kHz signal is like (see Figure 3). won’t be completely trivial. large when compared to the noise, it The base of the Z identifies the real This method is suitable for systems will still be measurable, but degraded, signals. It goes from DC to the Nyquist with constant or repetitive signals even when the noise is mapped onto it.) limit (half the sampling rate). The (rather than one-shot measurements). Broad-band noise (5–20 kHz) does return line goes from the Nyquist For example, an oscilloscope implemen- not appear to shift because another limit to the sampling rate. tation can sample a repetitive signal spectral line replaces every one that The third line is two times the base with even-numbered sweeps at one rate moves. Worse still, three times the values, the fourth line is two times and odd-numbered sweeps at another. noise is mapped onto the real spectrum the second line, and so on. Drawing a The second method, shown in (in this case) because there is a three- vertical line upward at any real signal Figure 5, is to use to separate front-end

Circuit Cellar INK® Issue 99 October 1998 33 samplers, such as two sample-holds or persed over 100 frequencies, which is a two ADCs. The input signal is simul- 40-dB reduction of the alias compared to Real 3-kHz signal taneously sampled at two rates, which the real signal (see Figure 7). Alias dispersed enables nonrepetitive one-shot signals Amplitude over 100 samples The dispersion of the alias energy to be measured. This method requires relates directly to the number of differ- the same software changes as above. 1 kHz 2 kHz 3 kHz 4 kHz 5 kHz ent sample rates. Note that direct FFT spectral comparisons aren’t needed. REAL-WORLD CONSIDERATIONS Figure 7—By summing the spectra of 100 samples, the This approach appears suitable for Let’s look at the expected perfor- aliases are dispersed by a like factor. The use of a ordinary digital filters. swept clock looks promising. mance of a conventional system and Another interesting aspect of this the proposed system with real-world generally be slightly less than the first method is that wide-band noise appears components, measuring from DC to sampling rate. to be reduced (relative to the real signal), 5 kHz with 12-bit resolution. To main- Let’s choose 9 kHz. The sum of the because when noise is summed, it tain this resolution, all aliases must A/D rates is 19 kHz, which is close to increases by the square root of the be less than one bit at any frequency. the conventional example of 20 kHz. number of summations. The conventional system requires a This example shows how input The real signal increases directly to low-pass filter of 12 poles set at 5 kHz filters change with similar A/D rates. the number of summations. With 100 to reduce the alias at 10 kHz to less In this case, the input filtering changes sample rates, noise can be reduced by than 1 bit. In other words, there must from a 12- to a 6-pole requirement. 20 dB (compared to 40 dB for a discrete be 72 dB per octave of low-pass input That’s significant because a 12-pole alias signal). filtering, starting at 5 kHz. filter is more than two times harder With this in mind, it becomes clear Since there is measurable alias energy and expensive to implement than a that using a swept-sample clock may up to 10 kHz, the sampling rate must 6-pole filter. (Consider the differences be useful. Using this clock has the effect be twice that, or 20 kHz. In short, even between 6- and 12-bit ADCs.) of sampling at many different rates. with a very sharp input low-pass filter Or, you could stay with a 12-pole It seems reasonable that, since the (which isn’t trivial to implement), the filter. The input signal is limited to swept-sample clock is well defined bandwidth is still only 50% of the 10 kHz (as specified above), and you and repeatable, you can make correc- theoretical maximum. can sample at 5 and 4.5 kHz, main- tions to the computations (to compen- The proposed system, however, has taining the spectrum-mapping ratio of sate for the swept-sample clock). This a much more flexible design. If you three to one. way, you can reduce post-sampling limit the input signal to 20 kHz, you However, the aliases from 2.5 to aliasing and maintain low sampling need to low-pass 72 dB over two octaves 5 kHz are not discarded. Instead, they rates, simple filtering systems, and (5–10 kHz and 10–20 kHz), not one. are identified and remapped to their simple sampling systems (see Figure 8). You need a six-pole low-pass input proper spectral positions. Unfortunately, the math corrections filter set at 5 kHz to reduce the input This approach means more software, aren’t trivial. Work is slowly progressing aliases to less than one bit at 20 kHz. but it’s not difficult, and it provides along these lines, but the use of That setup limits the spectrum mapping 100% of the bandwidth of the theoreti- swept-sampling may hold significant to a ratio of three aliases to one real cal maximum. So, you get twice the improvements in usable bandwidth, signal, and it makes the spectrum bandwidth of the conventional system. alias reduction, and noise reduction. comparison routines fairly simple. (There’s a tradeoff here: making the MORE SAMPLES GETTING AROUND NYQUIST comparison routines more complex Up to this point, I’ve shown you You can sidestep the Nyquist limit versus simplifying the input filter.) FFT spectra and removed or remapped by multiple sampling of the input signal Since you want the lowest alias-to- spectral lines. But, suppose you at different sample rates. Frequencies real ratio (stated as three to one), you summed the spectral lines (see Figure above the Nyquist limit, and even need to have one sampling rate at the 6) so the real-signal amplitude in- above the sampling rate, can be identi- Nyquist limit of 10 kHz. The second creases while the alias amplitudes fied and measured, reducing input sampling rate is arbitrary but should remain the same. Another way of filter requirements and increasing saying this is that the effective bandwidth. I energy of the alias is The procedure of multiple input sam- dispersed over two spec- Input Filter Sampler (ADC) pling for the identification and reduc- Sample Memory tral lines. DSP tion of aliases has been patented by Input The result leads to an Swept Output The PAK Engineers. sample clock interesting thought. Suppose you sampled at Gerard Fonte founded The PAK Engi- many rates—say, 100. neers in 1991 and still works as Prin- Figure 8—The hardware design for a swept-clock implementation is simple. However, the software must be significantly and fundamentally You’d see the alias en- cipal Engineer. You may reach him at changed (and this isn’t a trivial issue). ergy automatically dis- [email protected].

34 Issue 99 October 1998 Circuit Cellar INK® can get it to output an 8-bit sample FEATURE every 20 instructions, it will behave Digital like an NCO with a 250-kHz clock crystal. That should be good for an ARTICLE output frequency of getting on for Frequency 100 kHz, which is better than most audio generators can do. I followed up this idea and ended Tom Napier up with not so much a construction Synthesis project, but more a method of embed- ding a low-cost but accurate, tunable sine-wave generator into almost any product. This design doesn’t need a fancy NCO chip or a high-speed DAC. It uses an 18-pin PIC16C54 chip to drive a cheap, low-speed 8-bit DAC. In a pinch, you could wire up a bunch of 1% resistors as an R-2R ladder and do without the DAC. The only other things you need are a low- pass filter and an output amplifier.

WHY IT WORKS ometimes topics Let’s recap some theory. The idea s for articles crop up behind the NCO is this: Select a num- Some of the best by happenstance. I was ber proportional to your desired output designing a minimum frequency, and then add this number inventions happen shift keyed (MSK) transmitter to drive to an accumulator at regular intervals. a 25-kHz ultrasonic transducer, and The number in the accumulator by accident. At least, for simplicity, I wanted to use a small represents the phase of the output cycle. PIC chip as the transmitting modem. If you take its more significant bits, that’s how it is with I figured out several ways to generate do a sine conversion and feed them to the two output frequencies but one a DAC, you get one sine wave each Tom’s project. While method seemed simpler and more gen- time the accumulator wraps around. eral than the others. The frequencies The output frequency is a linear merely intending to were set by two constants and there function of the number you are adding. seemed to be little limit to what values The frequency precision is as good as beef up his NCO could be used. that of the crystal driving the addition, “Ah!” I said to myself, “This design while the frequency resolution can be generator, Tom found would work for any frequency shift made as fine as you wish by using a keying system, not just MSK.” That’s long enough accumulator. a way to embed a low- when I realized that I’d just reinvented The output from the DAC consists the numerically controlled oscillator of steps that occur at a fixed rate. If cost, accurate tunable (NCO). you select a small frequency control Someone who read my two-part number, you get a low-frequency sine-wave generator, article about building an NCO genera- output made up of many small steps tor (“Making Waves with an NCO,” and it will look quite smooth. As you using just a PIC. INK 89 and 90) asked if the PIC could select larger numbers, the output emulate an NCO. frequency rises, the number of steps Well, the short answer is yes, provid- per output cycle falls, and the output ing you don’t want to generate too begins to look jagged. high a frequency. I didn’t give the Appearances are misleading. The matter any thought until I discovered sine wave is still there, but it’s being that I had just created a design that distorted by the higher frequency aliases was happily generating 25 kHz using a arising from the sampling process. 6.144-MHz crystal. With a good enough output filter, you I thought, if I give the PIC a higher get a clean sine wave at the specified crystal frequency—say, 20 MHz—and frequency.

36 Issue 99 October 1998 Circuit Cellar INK® in 19 instruction times. With a 20-MHz Listing 1—By using a 65-entry sine table and a “fixed” return address, a 16-bit NCO can be emulated with crystal, the step rate is limited to a 19-instruction-cycle loop. 263 kHz. Pretty shabby by NCO standards, but it means you can generate ; 19-cycle loop, 16-bit accumulator GOTO DONE ;start output accurate frequencies up to about 90 kHz. RETX: CALL RETY There are two ways to approach GOTO LOOP the frequency-setting problem. One is RETY: RETLW 0 ;dummy to set return address to choose the accumulator length and DONE: CALL RETX ;set up fixed return address ; look-up return reenters at this point the update frequency such that the LOOP: BTFSS PHASH,INV ;test if inversion needed proportionality factor between the SUBWF ZERO,0 ;invert output wanted frequency and the frequency MOVWF PORTB ;output sample setting number is a small integer. BTFSC PORTA,DAT ;test for change flag GOTO NEW ;get new frequency That way, all the frequencies you set LP1: MOVF FREQL,0 ;get current frequency come out exactly right. ADDWF PHASL,1 ;increment phase In my MSK modem design, this BTFSC 3,0 ;skip if no carry factor was 300 Hz per unit. For lab use, INCF PHASH ;propagate carry MOVF FREQH,0 ;get frequency 1 Hz per unit would be handy, since ADDWF PHASH,1 ;increment phase reading and processing the user’s input MOVF PHASH,0 would only require a BCD-to-binary ANDLW 63 ;get sine table index conversion. BTFSC PHASH,REV ;test if reversal needed SUBWF MAX,0 ;reverse index Or, you can use such a long accumu- ADDWF PC,1 ;jump to table lator that any frequency can be set with ; one quadrant look-up table, 65 entries reasonable accuracy regardless of the RETLW 128 update rate. That buys you some design RETLW 131 RETLW 134 flexibility at the price of more input ; table continuation omitted processing and an output frequency which is rarely, if ever, exactly right. In both cases the proportionality factor, F, is equal to the update rate Nyquist’s Theorem says that, pro- CAN A PIC EMULATE AN NCO? divided by the length of the accumu- vided you don’t use fewer than two Real NCOs have accumulators with lator. If the PIC is driven by a crystal samples per cycle, a low-pass filter 24, 32, or 48 bits and make an output of C Hz and the loop requires L instruc- can take out the unwanted frequen- step every 15 ns or so. It takes a fast tions, the effective update rate is: cies and leave a pure sine wave. Well, and expensive DAC to keep up, but F= C Nyquist was an optimist. you can get output frequencies up to 4AL Two cycles is the theoretical mini- about 30 MHz. mum, and this assumes that you can If a ’16C54 really hustles, it can The accumulator length, A, is a power build a brick-wall filter at half the handle a 16-bit sum and a sine lookup of two, such as 65,536. sampling frequency. Three samples per cycle is a more realistic number. In any case, Nyquist’s samples were A PIC Trick infinitely narrow impulses, while the The usual way to make a look-up table in a PIC is to program a string output of the DAC is a step waveform. of RETLW N instructions and then make a CALL to a subroutine that adds Therefore, the output amplitude rolls the index to the program counter. If you want a 19-instruction-time off as the output frequency rises (see loop, you have to use a trick: Preload the two return address registers in INK 89, p. 74, Figure 4). the PIC with the address of the start of the loop. And at the end of the The output frequency is equal to loop, jump into the table. Each table entry loads a constant into the W the step frequency multiplied by the register and does a return. This puts you back at the beginning of the number you set and then divided by loop with a sine sample ready to output. the number of counts it takes to roll- This process saves executing a call to get to the table and a jump to over the accumulator. For example, if reenter the loop. It works because every time you execute a return, the you have a 16-bit accumulator, it first return address register is used and the second return address register takes 65,536 counts to roll it over. is copied into the first. You get a free branch address without anything If you add any number 65,536 times changing. The return address registers are loaded once at the beginning a second, each unit you add represents of the program by executing a call just above the loop code and then 1 Hz. To get a 10 kHz output, add executing a further call and a return. This process leaves a fixed return 10,000 at each step. Each output cycle address pending. would have just over 6.5 steps in it.

Circuit Cellar INK® Issue 99 October 1998 37 Listing 2—A 24-bit NCO can be emulated in 26 cycles. The 31-cycle loop shown here has a simple conversion factor and room for additions.

; three-byte accumulator, 26 cycles minimum GOTO DONE ;start output RETX: CALL RETY GOTO LOOP RETY: RETLW 0 ;dummy to set return address NOCRY: GOTO LP2 ;waste time if no carry DONE: CALL RETX ;set up fixed return address LOOP: NOP ;five spare instructions NOP NOP NOP NOP BTFSC PHASH,INV ;test if inversion needed SUBWF ZERO,0 ;invert output MOVWF PORTB ;output sample BTFSC PORTA,DAT ;test for change flag GOTO NEW ;get new frequency

LP1: MOVF FREQL,0 ;get current frequency ADDWF PHASL,1 ;increment phase BTFSS 3,0 GOTO NOCRY INCF PHASM,1 ;propagate carry BTFSC 3,2 ;skip if not zero INCF PHASH,1 ;further carry propagation LP2: MOVF FREQM,0 ;get frequency ADDWF PHASM,1 ;increment phase SKNC INCF PHASH,1 ;propagate carry MOVF FREQH,0 ;get frequency ADDWF PHASH,1 ;increment phase MOVF PHASH,1 ANDLW 63 ;get sine table index BTFSC PHASH,REV ;test if reversal needed SUBWF MAX,0 ;reverse index ADDWF PC,1 ;jump to table ; one quadrant look-up table, 65 entries RETLW 128 RETLW 131 RETLW 134 ; table continuation omitted

HOW HIGH CAN WE GO? steps of 4 Hz. It worked, but it needs The maximum output frequency is a pretty good filter to pass 100 kHz limited by two things. One is the sheer but stop the alias at 163 kHz. processing speed of the chip. The high- I doubt if the program loop for a est frequency can’t be higher than about 16-bit accumulator can be shorter a third of the number of times the than 19 instruction cycles. Even that loop is executed in 1 s. This fact limits takes PIC trickery (see sidebar, “A a ’16C54 to about a 90-kHz output. PIC Trick”). The loop will be longer if The other limit is a function of the you want phase or frequency modulation. accumulator length and the resolution The crystal frequency can’t be higher you want. The largest frequency control than 20 MHz. Since C = 4ALF and A number that a 16-bit accumulator can is a largish power of two, the crystal support is about a third of 65,536. frequency has to be divisible by a power Thus, if you want 1-Hz resolution, of two if the control factor is to be an you can’t go higher than a 22-kHz integer. Ideally, it would be a stock output. With 2-Hz resolution, you value, but in a production environment, could reach 44 kHz and so on. any oddball crystal frequency will work. In a fit of bravado, I tested a circuit The other approach uses a 24-bit or that could generate up to 100 kHz in higher accumulator. This technique

38 Issue 99 October 1998 Circuit Cellar INK® obviously requires more instructions MSK modem, you want a limited per loop, because in a three-byte addi- number of frequencies that are closely tion you have to allow for the once-in- related, you can use an 8-bit accumu- a-blue-moon occasion when adding the lator. This setup allows any frequency low bytes propagates a carry into both of the form: the middle byte and the high byte. N × loop repetitionrate The update rate is going to be at 256 most about 190 kHz, so you won’t be able to generate much over 60 kHz. On the other hand, if you want to set On the other hand, the resolution will a low frequency with very high resolu- be better than 0.01 Hz, so any frequency tion, you can make the accumulator you please can be set to that accuracy. 32 or 48 bits long. I stumbled on a good compromise: use a 20-MHz clock crystal and make the THE NCO CODE loop 31 instruction times long. If you Apart from initialization and the multiply the wanted frequency by 104, user input routine, the code consists you get a number that sets the output to of the sample loop and a sine look-up within 180 ppm, which may be better table. The table contains 65 entries than the error in the crystal frequency. and specifies one quadrant of a sine Since the basic three-byte addition and wave. If the two highest bits of the table look-up takes 26 instruction times, phase are both zero, the table is used you have five spare instructions to modu- directly. If the most significant bit is late the output if you want to. a one, the table output is inverted. You may be able to use a much When the next to most significant shorter accumulator. If, as I did in my phase bit is a one, the table index is

Listing 3—This practical 31-cycle loop shows one way of applying biphase modulation to the output. The full listing (NCOEMU.ASM) is available via the Circuit Cellar web site.

; 24-bit accumulator, biphase modulation via bit 3 of port A LOOP: NOP ;two spare instructions NOP BTFSC TEMP,INV ;test if inversion needed SUBWF ZERO,0 ;invert output MOVWF PORTB ;output sample BTFSC PORTA,DAT ;test for change flag GOTO NEW ;get new frequency LP1: ADDWF PHASL,1 ;increment phase BTFSS 3,0 GOTO NOCRY INCF PHASM,1 ;propagate carry BTFSC 3,2 ;skip if not zero INCF PHASH,1 ;further carry propagation LP2: MOVF FREQM,0 ;get frequency ADDWF PHASM,1 ;increment phase BTFSC 3,0 INCF PHASH,1 ;propagate carry MOVF FREQH,0 ;get frequency ADDWF PHASH,1 ;increment phase ; biphase modulation input SWAPF PORTA,0 ;put modulation in bit 7 XORWF PHASH,0 ;mask inversion bit MOVWF TEMP ;save inversion bit MOVF PHASH,1 ANDLW 63 ;get sine table index BTFSC PHASH,REV ;test if reversal needed SUBWF MAX,0 ;reverse index ADDWF PC,1 ;jump to table ; one quadrant look-up table, 65 entries RETLW 128 RETLW 131 RETLW 134 ; table continuation omitted

Circuit Cellar INK® Issue 99 October 1998 39 Figure 1—A 16C54, DAC, filter, and output buffer combine to make a tunable audio-frequency generator that you can drop into any project.

THE NCO HARDWARE The hardware consists of the PIC, an 8-bit DAC, a low-pass filter, an output amplifier, and some method of loading the subtracted from 64 to reverse the table My 19-instruction-time loop using a desired frequency into the PIC. Figure end to end. That’s why the table has 16-bit accumulator appears in Listing 1. 1 shows a typical system. 65 entries, not 64. There needs to be an It tests a bit of Port A, enabling the Some applications won’t need all of entry for the case where the index is user to tell the PIC that it’s time to it. My ultrasonic modem used a port bit zero and, when reversed, it becomes 64. load a new frequency. to select one of two preset frequencies. The DAC input is in offset binary— The output voltage stays fixed It didn’t need the low-pass filter since that is, 1 is negative full scale, 128 is during this, but in many cases the the frequencies being generated were zero, and 255 is positive full scale. effect isn’t noticeable. Reading a five- both within the pass-band of the trans- The table entries are seven-bit num- digit BCD frequency and converting it ducer and the alias frequencies were bers from 128 to 255, so the result of into binary takes only microseconds. well outside it. subtracting them from a register con- Listing 2 shows the more practical If you only want audio frequencies, taining zero is the negation of the 31-instruction loop using a 24-bit the filter needs to be little more than table entry. Two PIC registers are accumulator. Listing 3 shows one a capacitor across the DAC’s output preloaded with constants since the method of incorporating biphase mod- resistors out to get a clean output. In 16C54 has no immediate subtraction ulation via a bit of Port A. In all three the 50-kHz range, you need a filter instruction. listings, only the main loop is shown. that cuts off sharply above 50 kHz.

40 Issue 99 October 1998 Circuit Cellar INK® Figure 1 shows a four-pole quasi- button then becomes the Butterworth filter with a cutoff at serial data input pin. 70 kHz. This filter approximates a A third port pin sup- Butterworth filter by combining a plies the clock to the shift single-pole filter (the capacitor across registers to read all five the DAC output) with a three-pole switches. (The fourth pin Sallen and Key–style filter. of the 4-bit Port A pro- The two sections need to be isolated vides a modulation input.) from each other, either by buffering Since the highest BCD the DAC output or, as shown, by digit takes values from 0 making the resistors in the three-pole to 5, only 19 bits are read section about ten times larger than in. Three 19-byte look-up the DAC load resistor. The output tables store the three-byte amplifier doesn’t need to be anything weight of each bit. fancy because it only has to provide When a one bit appears unity gain up to perhaps 500 kHz. at the input, the correspond- To set the frequency, I wired a five- ing three-byte weight is digit thumbwheel switch to three looked up and added to the 8-bit shift register chips as shown in frequency register. If you Figure 2. The switches are ignored until embed this “NCO” in a the user presses the update button. larger system, you may be Feedback from the output stage of the able to arrange this com- shift register debounces the button. putation to be done else- One bit from the PIC port keeps where. the shift register in Load mode. When If you build this con- the update button is pressed, the PIC figuration, it is worth puts the shift register into its Shift setting the frequency to Figure 2—One way to tune the NCO is to connect five thumbwheel state. The bit that was sampling the 40,330 Hz, which gives a switches to some shift register chips.

Circuit Cellar INK® Issue 99 October 1998 41 frequency setting number that’s close two bits of the accumulator determine precision adjustable-frequency sine to a power of two so the DAC output which quadrant of the waveform is used, wave below 50 kHz. I is almost stationary. Compare the so you can generate quadratic phase Tom Napier has worked as a rocket filtered output to the raw output on modulation by modifying these bits. scientist, health physicist, and engi- pin 2 of the DAC to see how good a A 28-pin PIC would give you an neering manager. He has spent the last job the filter is doing. extra 8-bit port. The number applied to nine years developing spacecraft com- The DAC-08 is a former PMI part it could be added to the phase register munications equipment but is now a now made by Analog Devices. The or to the frequency register to generate consultant and writer. In his free time, DAC0800 from National Semiconductor virtually continuous phase or frequency he develops neat test instruments, is a direct replacement. modulation. debunks pseudoscience, and writes in The DAC’s outputs sink current to The DAC output is proportional to Forth on an Amiga 3000. the negative supply. The currents vary its reference current. Modulating this in opposite directions as the input code current produces amplitude modulation changes. Both have full-scale values of the output. SOURCES equal to the reference current (nomi- These techniques are a convenient PIC16C84 nally 2 mA). If the reference current way of generating low-frequency com- Microchip Technology, Inc. flowing into pin 14 changes, the output munication signals, and they can also (602) 786-7200 amplitude and its DC level change, too. be applied in the musical field. Fax: (602) 786-7277 This circuit’s output is about 1.5 Vp-p. www.microchip.com The DAC-08 does need a negative LOWER FREQUENCY, LOWER COST DAC-08 supply—ideally, –15 V. If you can accept My earlier article described how a Analog Devices a limited output swing, –5 V will work. PIC, a specialized NCO chip, and a fast (617) 329-4700 DAC could generate up to 10 MHz in Fax: (617) 329-1241 ADDING MODULATION a benchtop unit. But if you need lower The spare instructions in the 31- frequencies, this article may give you DAC0800 cycle loop let you add input tests to food for thought. With a parts cost National Semiconductor select either of two preset frequencies under $10, a PIC and a DAC may be (408) 721-5000 and generate FSK signals. The upper just the answer when you need a high- Fax: (408) 739-9803

42 Issue 99 October 1998 Circuit Cellar INK® 44 Nouveau PC edited by Harv Weiner 48 Networking with DeviceNet Part 2: A Weather-Station Application Jim Brady 55 Real-Time PC The Need for Speed RTOS and PC/104 Ingo Cyliax 61 Applied PCs RF and Micros Part 2: A Low-Power System Fred Eady Photo courtesy of Derivation Co. HIGH-SPEED A/D BOARD WITH DSP COPROCESSOR Datel Systems has announced the PC-430K, a NPC high-speed ISA ADC-DSP coprocessor data-acquisition board. With two simultaneous-sampling 5-MHz ADCs, the PC-430K is ideally suited for continuous Fast Fourier Transform (FFT) processing, communications-receiver signal collection to disk, and simultaneous graphics display of spectral data. Application areas include signal recovery from noisy channels, harmonic distortion analyzers, and vibration/resonance filter systems. The PC-430K can also be used for high-speed mapping and imaging, satellite channels, astrophysics, and seismology. Other uses include biomedical signals, array processing, control systems, simulators, engine analyzers, aerodynamics, and vehicle system applications. The PC-430K acquires two analog input channels, and digitizes and stores them in local memory, while DSP math processing and data transfer are done concurrently. The system is designed for preprocessing seamless A/D datastreams to mass storage. Its timer/counter uses an onboard crystal oscillator or an external C-PROGRAMMABLE CONTROLLER timebase for precision phase tracking. The ADC passes data The Z-World ZB4100 is a board-level C-programmable directly to a FIFO memory that decouples the precision timing of the controller that features an Intel ’386EX processor running at A/D section with the block transfers governed by the DSP. Some of 25 MHz. With 36 programmable DIO lines, one RS-232 the advanced features of the onboard DSP include single-cycle fetch channel, one RS-232 or RS-485 channel, and a parallel port, and execution, parallel instructions, zero overhead of looping the ZB4100 provides all the interfaces needed for a wide instructions, software variable wait states, block repeat, and 64-word variety of control applications. Its PLCBus support enables the internal instruction cache memory. user to expand these interfaces with their line of 4-bit The PC-430K sells for $4945 expansion boards, which include digital I/O, relays, and in single quantities. D/A conversion. The board is also available with up to 512-KB SRAM and 512-KB flash memory, a remote program- Datel Systems, Inc. ming port, battery-backed SRAM, and a real-time clock. (508) 339-3000 Programming is accomplished via Z-World’s multitasking Fax: (508) 339-6356 Dynamic Cx86. Based on C, Dynamic Cx86 offers keywords, www.datel.com software drivers, and library functions that meet the needs of control-system developers. Dynamic Cx86 integrates an editor, compiler, and interactive debugger in one package and eliminates the need for third-party debuggers or ICEs. The developer’s kit for the ZB4100 includes a development board, aluminum baseplate, power supply, programming cable, and manual with schematics. Because the development board is programmed via a remote programming port, both serial ports are available for the application’s use. The ZB4100 is priced at $245 in quantities of 100.

Z-World (888) 362-3387 (530) 757-3737 Fax: (530) 753-5141 www.zworld.com

NouveauPC edited by Harv Weiner 44 CIRCUIT CELLAR INK OCTOBER 1998 NPC

DSP DEVELOPMENT SOFTWARE IDE6000, a software development environment for the errors found at compile time. Or, using the TMS320C6x DSP, is available under Windows 95 or NT. This simple customization utilities, the developer can GUI-based development environment enables users to configure integrate his or her favorite editor. hardware systems and manage software projects via wizards and Other building blocks include host interface libraries dialog boxes. Configuration information provided to other elements for host-to-DSP communication and utilities for configuring of the IDE makes the development environment become system and accessing onboard resources (e.g., SCBus, MVIP, and flash aware. This awareness extends to all board resources including memory). A download monitor is provided for interactively processors, memory, host interface, and the I/O subsystem. debugging the DSP and host system. A choice of debugging environments is available with IDE6000, Two system test options are provided as well. Interactive Test, ranging from the Texas Instruments XDS510 with DB60, to Code a GUI-based utility, enables the developer to select board Composer running native on the board. When the IDE6000 features (e.g., memory or processor) and perform a test to confirm operates in native mode, the need for that they are functional. Built-In Test is an external XDS debugging system is used to test board functionality on removed. All debugging systems are startup. It is normally blown into flash launched from within IDE6000 with memory and runs on startup. A file of only a few button clicks. test results is generated for the user to Project Make is a utility that lets you interrogate. control software revisions and simplify The IDE6000 is priced at $1000 code building by abstracting the user per development seat with multiuser away from specific make file and and site licenses also available. linker issues. TI’s C compiler is fully integrated into Project Make, and the Loughborough Sound user can select command-line compile Images, Inc. options using a dialog box. An inte- (781) 860-9020 gral editor within Project Make en- Fax: (781) 860-0083 ables the user to jump directly to any www.lsi-dsp.com

COMPACT CPU MODULE Intelec’s PC104i is a compact, low-profile, low-power CPU module that works with S-MOS Systems’ ’586 and ’486 Card-PC, or Cell Computing’s Pentium and ’486 CardPC. Card-PCs have a standard pinout configuration and an EASI bus connector that make it easy to upgrade this PC/AT system by replacing one module with another (e.g., from a ’486DX4 to a ’586 module). The PC104i has a single PC/104 stack with IDE hard disk, floppy disk, and simultaneous CRT and LCD video. Other features include VGA or CGA video, two serial ports, LPT parallel port, PS/2 keyboard and mouse, flash (disk or memory), watchdog timer, and a CMOS/clock battery backup. The module offers 5-V-only operation (3.3 V generated onboard), power management, 90° connectors option, optional 2-MB flash memory, and stackable 16-bit PC/104 bus expansion. PC104i is compatible with Windows 3.11, 95, and NT, as well as DOS and ROM-DOS. Pricing starts at $250 in OEM quantities.

Intelec Technologies, Inc. (847) 517-1000 • Fax: (847) 517-1001 www.intelec-tech.com NouveauPC OCTOBER 1998 EMBEDDEDPC 45 DATA-ACQUISITION BOARD FOR CompactPCI Analogic has introduced the CPCI-14-1, a high- NPC speed, dual-channel, analog input board for CompactPCI. Its superb spectral characteristics position it for high-performance applications like I/Q quadrature demodulations, communications, radar, medical MRI receivers, and event capture. The CPCI-14-1 is designed to provide the highest possible signal-to- noise ratio and spurious-free dynamic range at sampling frequencies from 1 to 10 MHz in a 0–70°C range. Performance levels of 75-dB SNR and 90-dB SFDR are easily achieved with input signals as high as 5 MHz. As an optional means of high-speed transfer, the CPCI-14-1 includes a DSP link port that provides a direct interface to a SHARC-based DSP board. The SHARC link port can be used for applications that require continuous uninterrupted data transfers and real-time DSP. The 3U Eurocard format and its vertical installation in a protective card cage provide easy user access, excellent heat dissipation, and Analogic Data Conversion Products secure mounting—features that are required in rigorous industrial and (800) 446-8936 mobile applications. Fax: (781) 245-1274 Prices start at $2500 each in small quantities. www.analogic.com NouveauPC

46 CIRCUIT CELLAR INK OCTOBER 1998 NPC

AMD 5X86 SINGLE-BOARD COMPUTER The Little Monster VI features a 32-bit, the Monster VI mezza- low-voltage AMD 5x86 CPU that runs up to nine-style to make the entire 133 MHz on less than 7 W. Its 32-bit PCI system as compact as possible. and 16-bit ISA buses enable the computer to For enhanced reliablity, the pe- drive four PCI and eight ISA peripheral boards. ripheral boards connect via leaf- The Little Monster VI includes 16 or 32 MB spring connectors. of EDO DRAM (expandable to 96 MB), The Little Monster VI comes with SystemSoft 256 KB of level-2 fast asynchronous cache BIOS to enable booting from a floppy disk, memory, controllers for flat-panel VGA, PCI- hard drive, CompactFlash, or PCMCIA de- enhanced EIDE, and floppy-disk support for vice. The Monster supports Windows 95, 2.8-MB floppy drives. Also onboard are a NT, and CE in temperatures ranging from standard keyboard port, four serial (16550) –25 to +70°C. The board size is 4″ × 7″. ports, two bidirectional EPP- and ECP-com- The Little Monster VI starts at $400 in patible parallel ports (IEEE-1284 complaint), OEM quantities. and a watchdog timer. Options include a CompactFlash socket Zykronix, Inc. onboard and an advanced resistive pen- (303) 799-4944 and touchscreen controller. Peripheral boards Fax: (303) 799-4978 (PCMCIA, USB, sound, etc.) stack on top of www.zykronix.com NouveauPC

OCTOBER 1998 EMBEDDEDPC 47 nice tobeable to sendtheprogram remote debugger inflashmemory.Its linker togenerateROMablecode. way, youdontneedaspecial library and that runstheapplicationoutof RAM.That BIOS andaDOSrun-timeenvironment board, showninPhoto1.Itcomes with Micro/sys SBC1386,a25-MHz386EX available forPC/104,Iwentwiththe After surveyingthemanyprocessorboards tion statesandfragmentedmessaging. the mosttroubleerr funwithconnec- hand whentacklingthetrickyparts.Ihad make sureyouhavesomestrongcoffeeon specification andtranslateittocode.Just C++, allyouhavetodoisunderstandthe data andmemberfunctions,soifyouuse terms ofattributesandservices. oriented, witheachobjectdescribedin The DeviceNetspecificationisfullyobject- youre inforarealtreatwithDeviceNet. excitement writingcodeforafast32-bitCPUashegotfromhis67Camaro. With itsexcellentresponsetimesandadequateprogramsize,Jimgetsthe same Think programmingaDeviceNetinterfaceinC++istough?Jimdisagrees. I 48 f youlikeprogrammingasmuchIdo, The boardalsoincludesthe Borland Lets coverthePC/104hardwarefirst. These itemscorrespondtoC++class

Networking DeviceNet with EPC Part 2:AWeather-Station Application CIRCUIT CELLAR INKOCTOBERCIRCUIT CELLAR and leterrip.Myprogramiswritten board at115kbps,setsomebreakpoints, They have15or 16mailboxesplentyfor Its moremodular. rather thanonebigFIFOforall ofthem. vidual mailboxesforeachmessage type Intel 82527becauseIlikehaving indi- eral-type CANcontrollers.Iwent withthe CAN controller.Table1compares periph- CAN CHIPS some performancemeasurementslateron. standard CwithsmallCPUs.Illshowyou to DeviceNetinterfacesIvedoneusing application code.Thissizeiscomparable code space,includingtheweather-station for afast-responseDeviceNetinterface. devel ability ofC++forreal-timeembedded (large memorymodel). entirely inC++usingtheBorlandcompiler The Siemensparts alsoworkthisway. The programweighsinat45KBof A lotsbeensaidaboutthepoorsuit- The nextorderofbusinessispickinga opment. But,itsmorethanadequate J im Brady 1998 line andthechip selects.Tomakesurethe various processors. app notesforinterfacingthe82527 toa this slowinterface.Intelsweb sitehas use afastbus,youneedtoaccommodate 82527 hasa288-nsaccesstime. Ifyou access timesofthe82527. doesnt exceedtheratherlongcycleand glacial paceisactuallygoodbecauseit 720 nsforan8-bitreadorwrite.This as theISAbus,andittakesawhopping the 82527inmode3islimitedto8bits. face. Idpreferfaster16-bittransfers,but nous) makessenseforaPC/104inter- Only mode3(nonmultiplexedasynchro- your codewillrunoutofsteamanyway. with highmessagerates.Butatsomepoint, with themasterbeatingyourdoordown which has10connections. the DeviceNetpredefinedconnectionset, I useaPALtogenerate theR/Wselect In mode3,atmaximumclockrate, the The PC/104bushasthesametiming The 82527hasfiveoperatingmodes. A FIFOisgoodifyoureconcerned 49 EPC are None peekb() inline or 160 µsotherwise. None None wire, 5 MHz 4 wire, 5 MHz SAE 81C90 SAE 81C91 eight-bit ports peekb() So, my DeviceNet interrupt handler So, my DeviceNet handler in The DeviceNet interrupt By the way, check the disassembled These timing measurements show Intel, the 386EX has a the 386EX Intel, interrupt la- worst-case clock cycles, or tency of 63 ~2.5 µs at 25 MHz, neglecting wait states. for a maximum of 58.5 has to wait (i.e., µs runs. This situation 56 + 2.5) before it DeviceNet message happens when a BIOS clock tick. comes in just after a byte to Listing 1 reads the message-length message is and then find out how long the it needs to. Most reads only the data bytes are well under DeviceNet messages 8 bytes. The most frequent message, the has no data bytes at all! Poll Request, I/O machine instructions with your debugger to make sure functions like getting expanded inline. Depending on compiler settings, they may not be. For an 8-byte message, the duration of my DeviceNet interrupt handler is 100 µs with theres still plenty of time left for processing messages. DeviceNet recommends a response time of 1 ms for I/O Poll messages and 50 ms for Explicit messages. These measurements also show that a faster PC/104 bus wouldnt help much. Out of the 100-µs total time for the interrupt handler, only about 6 µs (eight bytes at 720 ns per bus cycle) is spent doing bus transfers. 7.30 $6 $5.30 NoneNone 4 2 Philips Siemens Siemens multiplexed multiplexed multiplexed 64-byte FIFO 16 mailboxes 16 mailboxes PC Intel 82527 SJA1000 QFP 44 SO 28 MBEDDED PLCC 44 DIP 28 PLCC 44 PLCC 28 E for mailbox 15 16-bit multiplexed 1 is double-buffered 0.2%, which is plenty for 0.2%, which is plenty Intel 82527 Architectural ± 1998 1998 provides information for this provides information There is a tradeoffyou want to let it want to let is a tradeoffyou There I ended up After a lot of calculation, I cant help but be excited about writing To make sure the 18.2-Hz BIOS clock When a DeviceNet message arrives, OCTOBER OCTOBER Overview jump as much as possible to accommo- as possible to jump as much you also tolerance, and date oscillator to the point to be close want the sample long bit time to accommodate end of the to jump so you cant allow it cables. But a bit time. goes past the end of much that it the way through a bit sampling at 87% of limit (SJW) equal to time, with the jump That accommodated 12% of a bit time. length, with a jump the worst-case cable to handle crystal width still large enough errors of about any crystal. The calculation. REAL TIME code for a fast 32-bit CPU after designing 8-bit systems for years. The feeling of power is like the feeling I got from my first car, a 67 Camaro with a 327 engine. interrupt wouldnt hurt me, I measured its duration by looking at how big a chunk it took out of a tight loop that pulsed an I/O pin. According to my scope, it is just 56 µs, including the time it takes to run my own timer interrupt at INT 1C, which is chained to the BIOS clock interrupt. I use this timer to update my DeviceNet connection timers. the 82527 pulls IRQ5 high. According to Package Parallel CPUInterfacetimeAccess multiplexed 8-bit InterfaceSerial I/O Ports 8-bit nonmultiplexed Organization 8-bit SPI, 8 MHz 288 ns 1 or 2 eight-bit ports 15 mailboxes; 8-bit 45 ns 8-bit 120 ns 120 ns Identifier mask registers 1 global for mailboxesIdentifier match registers 1 global Message timestamp 1–14, and 1 special currentDC Max. 1 per mailboxApprox. price No 1 global 50 mA $7.50 1 per mailbox 1 per mailbox No 15 mA $ 30 mA Yes 30 mA Yes messages in a FIFO, while other devices store messages in mailboxes based on their identifier. Table 1—Now you can compare various peripheral-type CAN controllers. The Philips device stores all The 82527 has 15 mailboxes for MEMR sets the latch and MEMW resets The 82527 also has a group of With no video board in my PC/104 In mode 3, the 82527 provides one board in front. transducer and thermistor are on the small the DeviceNet interface on top. The humidity tween the ’386EX CPU board on bottom and weather station board is sandwiched be- tirely powered from the DeviceNet bus. The Photo 1—The PC/104 weather station is en- CAN messages, each with 15 registers. Setting up a mailbox requires telling it what its message identifier is and if it is send or receive. Done properly, your program only gets an interrupt for a message directed to your device. registers that control message filtering, interrupt masking, data rate, and sample timing. There are some tricky ones that set the sample point within a bit time as well as the limit on how much that sample point can jump around. CHIP SETUP me plenty of I/O lines, including enough for a four-wire serial interface to the ADC on my weather-station board. it. The PAL design source file is available via the Circuit Cellar web site. The only glue logic is a couple of inverters to delay the 82527 chip select to make sure it doesnt go low until after R/W is valid. stack, theres plenty of memory space for the CAN controllers 256 bytes. I went with A0000. enough I/O for all my port. To get I/O switches and LEDs, I added an 82C55A at memory address A1000. That gave R/W line remains stable at the end of a bus cycle, the line is latched by an RS latch in the PAL. CONNECTIONS set theinitialconnectionstatetononexistent. ning of chose tocreatestaticobjectsatthebegin- allocation. Althoughyoucandothis,I connections dontexistpriortoallocation. connections itwantstouse.Technically, port, whichthemasterusestoallocate mines whichdatagoesintotheassemblies. assembly. Thedevicemanufacturerdeter- existing assemblyorcreatingasecond I cansendmoredatabyaddingittothe device status,temperature,andhumidity. Assembly objectandquicklysendit. grab preselecteddatafromabufferinthe object inthedevice.I/OPollmessages in themessageandcanaccessalmostany messages areroutedviathepathspecified in throughtheirrespectivemailboxes.Explicit system. ExplicitandI/OPollmessagescome MESSAGE FLOW µs, whichisstillplentygood. time to340 proach lengthenstheI/OPollresponse produce themessage.Thisorderlyap- Object, andcallsthelinkproducerto the message,getsdatafromAssembly exist, itcallsthelinkconsumertoconsume detects thisbitandnohigherprioritybits determines itspriority.Whenthemainloop transition diagram. Figure2combinesthe This setupisso confusing,Imadeastate are uniquetooneortheotherconnection. nonexistent andestablished, and some indicate amessageisin,andexits. buffer, setsabitin16-bitevent-wordto interrupt handlerputsthemessageintoa which runsinthemainloop.MyDeviceNet tent withmypriority-basedeventhandler, at aworstcaseof 140 µs. weather stationsI/OPollresponsetime send it.Withthisstrategy, I to controller CAN in, immediatelytellthe 50 to go.WhenanI/OPollrequestcomes The weather-stationsendsthreebytes Connections havestatesother than This situationimpliesusingC++dynamic Figure 1showsmessageroutesinthe The bitspositionwithintheevent-word I laterchangedthecodetobeconsis- At thetopofFigure1isunconnected chips mailboxaheadoftime,ready EPC main() you wanttosendintheCAN Poll messagesistoputthedata 1-ms responsetimeforI/O 1-ms andusetheconstructorto an easywaytogetthe If yourCPUisslow, measured the CIRCUIT CELLAR INKOCTOBERCIRCUIT CELLAR handy, but who wants to deal with 18.2 Hz? handy, butwhowants todealwith TIMERS the establishedstateifamessagecomesin. mode, itstaysaroundandgoesbackto if ittimesout,itsgone.Indeferred-delete deferred-delete mode.Inautodeletemode, whether theconnectionisinautodeleteor one oftwopossiblestatesdependingon to use.Theconnectiontimerstartsat10s. tions totheestablishedstateanditsready connection, theconnectionsimplytransi- using colorstotellthemapart. behavior ofbothtypesconnections, sending fragments. TheBIOSclockis out timer.Youalsoneeda timerfor begin handlingI/OPollrequests. Then itisintheestablishedstate andcan packet rateviatheExplicitconnection. wait forthemastertosetitsexpected it cannotprocessI/Omessagesandmust goes totheconfiguringstate.Inthisstate, } { void interruptfarcan_isr(...) // ThethreedotsarerequiredinC++mode // HandlesreceiptofincomingDeviceNetmessages UINT global_event; UCHAR global_CAN_buf[10]; #define CAN_BASE0xA000 time is100µs. 82527 intoabuffer,savesthelength,andfreesfornextmessage.Therun Listing 1TheinterrupthandlerforDeviceNetmessagescopiesthemessagefrom If ittimesout,theconnectiongoesto When themasterallocatesExplicit For eachconnection,youneed atime- The I/Oconnection,whenallocated, dr- //pointtocontrol0reg. //nonspecificEOI // clear NEWDAT outp(0x20,0x20); global_event |=0x0001<>4; length =peekb(CAN_BASE,addr); addr =6+(mailbox<<4); // computeaddressofconfigregisterinmailboxinterest for (i=0;i<10;i++)global_CAN_buf[i]=0; mailbox =int_source-2; if ((int_source<3)||(int_source>7))return; int_source =peekb(CAN_BASE,0x5F);//readinterruptsource UCHAR i,int_source,addr,mailbox,length; 1998 ANALOG INPUTPOINT an integer,float, orwhat.Fortheweather type tellsthemaster whetherthevalueis sensor status,anddatatype. Thedata implemented theonesforsensor value, tributes, manyofwhichare optional. I Listing 2showssomecodefor thisclass. object librarymodelsananalog sensor. comes in,theconnectiontimesout. If itreacheszerobeforeanothermessage dler thendecrementsitata20.0-Hzrate. connection, andmytimerinterrupthan- sage comesin,Ireloadthetimerforthat by themaster.WhenaDeviceNetmes- on theexpectedpacketrate,whichisset at amorefriendlyrateof20.0Hz. register resultedinBIOSclockinterrupts Loading 0xE884intothetimer0count divides by65,536,producing18.2Hz. timer 0inthe386EX.Timerfurther system clockisdividedby21todrive Thespecificationdefineseight at- The AnalogInputPointintheDeviceNet The connectiontime-outtimedepends 25-MHz With theMicro/sysboard, station, I use an unsigned char that corre- A type-one reset changes settable con- sponds to a data type of 2. figuration parameters back to their fac- My Analog Input Point class imple- tory default values and does a type-zero ments the DeviceNet Get Attribute Single reset. The weather station has no configur- service using a member function. Thus, the able settings, so both resets are identical. master can read any of the three attributes using an Explicit message. FRAGMENTED MESSAGES These attributes arent settable, so my The weather stations I/O Poll response class doesnt have the Set Attribute Single is just three bytesone byte each for service. In the future, I may allow the device status, temperature, and humidity. master to set the data type to a float, If I used floating point or added more switching my sensor value to floating point. sensors, the CAN message limit of 8 bytes would quickly be exceeded. Id need to IDENTITY OBJECT send the data in two or more fragments. Every device must be able to give its I/O message fragments are like nor- name, rank, and serial number. The Identity mal messages except the first byte pro- object holds this information. It also keeps vides a fragment flag and a fragment track of device state and does device resets. count. That leaves seven bytes for data. There are two types of resets. Type For maximum speed, I/O message zero simulates an off/on power cycle. To fragments are sent back-to-back with no do this, I send a response back to the acknowledge (ack) message from the mas- master and suspend writes to my watch- ter other than the CAN level acknowl- dog timer. edge bit.

Figure 1An Explicit message can DeviceNet Connections address any object in the system, while the I/O Poll message re- DeviceNet turns a specific set of data. Object Unconnected Port

Explicit Connection Object

Link Message To other objects Consumer Router Explicit Request

Ack Discard if bad message or connection Link not established Temperature Producer Sensor Explicit Response

I/O Poll Connection Object Holds copies of Link Assembly device status, Consumer Object temperature, and humidity I/O Poll Request

Discard if bad message or connection not established Link Producer I/O Poll Response

Receives dup MAC check Dup MAC messages from other devices Handler and sends response Dup MAC Check (bidirectional)

Startup Dup MAC Sends two dup MAC check Sender messages at startup

OCTOBER 1998 EMBEDDEDPC 51 Cellar website. and thenpowers theentireweatherstation.Transistor Q1protectsagainstmiswired networkpower.ThePALsource codeisavail Figure 3Asimple eight-bitinterfaceputstheIntel 82527CANcontrolleronthePC/104 bus.The24-VDeviceNet powerisdroppe of DeviceNetconformancetesting.My enough torequireit. number andproductnamearelong ing fragmentedExplicitmessages.Itsserial pable ofsendingandreceiv- ing fragments,andsoon. not anackwhileyouresend- sent, gettingamessagethats ber differentfromwhatyou master withafragmentnum- like gettinganackfromthe up tryingtosendthemessage. ment. Ifyoutimeoutagain,give takes toolong,resendthefrag- 52 the nextfragment.Ifack Fragmented messagesareabigpart The weatherstationisca- Many errorcasescanarise, ack message,andsend EPC a fragment,waitforan complex. Yousend message ismore ing anExplicit Fragment- events areshowningreen,I/OPollred,andsharedviolet. that causetheconnectionobjecttochangestate.Explicitstatesand Figure 2Thisstatetransitiondiagramforconnectionobjectsshowstheevents Deferred is deleted times outor I/O Poll CIRCUIT CELLAR INKOCTOBERCIRCUIT CELLAR tru Deletefromany state Startup ceivable bogusresponseandbreaksall ware. Thissoftwaregenerateseverycon- test usingtheODVAconformancesoft- program managedtopassaself-inflicted but thebestcode.Youlikechallenges,right? data Receives (deferred mode) times out Explicit request Explicit Allocate Receives attribute Get/Set Established Nonexistent (autodelete mode) times out Explicit data Send/Receive request Set EPR Receives times out I/O Poll I/O Poll request Receives Allocate 1998 Configuring Timedout I/O Poll Request Receives Allocate protection circuit,whichletsyoumixup wide input-rangeDC-to-DCconverter. sousea 25 VDC, varies between11and thing fromDeviceNetpower.Thevoltage DeviceNet alsoneedsamiswiring- attribute Get/Set attribute Get/Set (e.g., anRS-232port),you circuit togreen-wireground thing canreferenceyour 5 W,soIpoweredthewhole optoisolators. DeviceNet, soIdidntneed has noportsotherthan isolated fromgroundand 3. Theweatherstationis interface isshowninFigure must optoisolatethenetwork. GETTING PHYSICAL 1 M green-wire groundby and powerisolatedfrom to keepthenetworkdata Power consumptionis My PC/104 DeviceNet My DeviceNet requiresyou Ω orgreater.Ifany- able viatheCircuit d to5VbyU3 project are available via theCircuitCellar Complete sourcecode andschematicsforthisarticle SOFTWARE [email protected]. tems for15years.Youmayreach himat Jim Bradyhasdesignedembedded sys- times andreasonableprogram size. a littlecare,C++canprovidegoodresponse program aDeviceNetinterfaceinC++.With real-time softwareand which workswithLabVIEWandCVI. Also checkoutNationalInstrumentscard comes withalibrarythatmakesiteasytouse. APPLYING DeviceNet common-mode voltagerange. referenced tothispreventexceedingits V, soyourCANtransceivermustalsobe power, andoneforthedrainwire. pinstwo fordifferentialdata,two I usedthecircularmicrostyle.Ithasfive LED formoduleandnetworkstatus. I alsowentwiththerecommendedbicolor to setMACIDandonemorefordatarate. guidelines. IusedtwoBCDrotaryswitches DeviceNet cardfromSoftingGmbH.It speed andbuildunitsforotherlocations. sensors forbarometricpressureandwind Circuit Cellarwebsite.Ihopetoadd but theweatherstationsdetailsareon Supervisor, isdesignedtodothis. SEMI-compliant devices,theS-Device does resets.Astandardobjectusedfor object. Itkeepstrackofdevicestatusand jects, youmustlinkthemwiththeIdentity computes sensorvalues. Input Pointobject.ItreadstheADCand enough thatIjustextendedtheAnalog cation. Theweatherstationissimple DeviceNet, youneedcodeforyourappli- tection upto40Vcontinuous. 54 ceiver hasESDprotectionandlinepro- Aside frombeingafuncombinationof The datalinesarereferencedtopower Of thethreenetwork-connectorchoices, My networkmasterisa486with This articleismainlyaboutDeviceNet, If youhaveseparateapplicationob- In additiontoalloftheobjectsfor DeviceNet isfairlyspecificinitsinterface this. ThePhilips82C251CANtrans-

shows howstraightforward EPC specification includesacircuitfor or thenetwork.TheDeviceNet without fryingyourdevice tions inanypossibleway the networkconnec- hardware, itisto EPC this CIRCUIT CELLAR INKOCTOBERCIRCUIT CELLAR (218) 681-6674 Digi-Key www.embeddedsys.com Fax: (818)244-4246 (818) 244-4600 Micro/sys, Inc. SBC1386 www.odva.org Fax: (954)340-5413 (954) 340-5412 Open DeviceNetVendorAssn.,Inc. DeviceNet Information SOURCES } { UCHARresponse[]) void ANALOG_INPUT_POINT::handle_explicit(UCHARrequest[], // HandleexplicitrequesttoAnalogInputPoint }; class ANALOG_INPUT_POINT{ only, sotheSetAttributeserviceisnotsupported. Explicit messagehandlerallowsthemastertogetanyofthreeattributes.Theyareread- Listing 2HerestheAnalogInputPointclassfortemperatureandhumiditysensors.The } if (error)//returnerrorresponse{ } //clearresponsebuffer switch(service){ memset(response, 0,BUFSIZE); service =request[1];attribrequest[4];error0; UINT service,attrib,error; //alarmstatus //sensorvalue //datatypeofvalue //revisionofobject ANALOG_INPUT_POINT() {value=0;statusdata_type2;} void handle_explicit(UCHAR*,UCHAR*); static voidhandle_class_inquiry(UCHAR*,UCHAR*); public: static UINTclass_revision; BOOL status; UCHAR data_type; UCHAR value; private: response[LENGTH] =4; response[3] =NO_ADDITIONAL_CODE; response[2] =error; response[1] =ERROR_RESPONSE; response[0] =request[0]&NON_FRAGMENTED; default: error=SERVICE_NOT_SUPPORTED;break; break; } //returnrequestedattribute switch(attrib){ case GET_REQUEST: default: error=ATTRIB_NOT_SUPPORTED;break; break; response[LENGTH] =3; response[2] =data_type; response[1] =service|SUCCESS_RESPONSE; response[0] =request[0]&NON_FRAGMENTED; case 8://datatype break; response[LENGTH] =3; response[2] =(UCHAR)status; response[1] =service|SUCCESS_RESPONSE; response[0] =request[0]&NON_FRAGMENTED; case 4://status break; response[LENGTH] =3; response[2] =value; response[1] =service|SUCCESS_RESPONSE; response[0] =request[0]&NON_FRAGMENTED; case 3://value 1998 www.softing.com Fax: (987)557-5884 (978) 557-5882 ICT, Inc. Softing GmbH www.natinst.com Fax: (512)794-8411 (512) 794-0100 National Instruments,Inc. DeviceNet cards www.digikey.com Fax: (218)681-3380 to RPC 55 my PC/ The transfer speed prompted how fast things really are. You need 1050 µs to transfer eight bytes of data on PC/104, but encrypting a text block only requires 0.5 µs. me to look at PC/104 in detail and find a way to speed up the transfers in and out of 104-based DES engine. Sometimes its hard to relate At first, I thought something wasnt Although I knew that a hardware- read data from it, but I had the time base of the scope set too slow to even see the blip of activity while the hardware com- puted the DES. working, and I started to worry. Strangely, the data I was reading back from the board was encrypted correctly. based DES would be much faster than a software implementation, I didnt realize it spent so much time idling, waiting for the processor to poke the data into it. , I PC scope to PC could see the what it took to kind of unnerv- DES implementa- MBEDDED ime E T that load the device and 1998 1998 ngo Cyliax eal- I

R When I started testing this demo OCTOBER OCTOBER ing because I was using an oscillo FPGA board and decrypted the message to display on the Photo 2c. page shown in web tion was much faster than transfer data into it. This was see how fast it was running. I how fast it was running.I see I/O operations I/O noticed the FPGA-based RTOS and PC/104 RTOS

an NE2000 Ethernet card module and a PF2000 module on top. Photo 1—Our demo system consists of a CPU module on the bottom and Af-

he Need for Speed he Need T

ecently, our company went to the Next, the user specified the We used a 486DX4-100 SBC from A stand-alone web server I wrote in

same password to decrypt the ter the user input some plain text and a password on a web page (see Photo 2a), the web server loaded the DES encryption core into the FPGA board and encrypted the data into ciphertext (see Photo 2b). Versalogic to host our PC/104-based FPGA board. Photo 1 shows the setup. TCL was used to implement a simple message. The server loaded web the DES decryption core into the encryption/decryption experiment.

software. These cores were implementations of the Data Encryption Standards (DES), and this month, I want you to see how it worked. R Design Automation Conference in San Francisco, where we demoed verified FPGA cores we derived using our EDA When it comes to speed, more is betterexcept when youre considering When it comes to speed, speeding up transfers in and out of PC/104-based price. Ingos ideas about less expensive product with the same performance. DES engines give us a formed atzerowait-state speed. 16-bit memoryaccesses areessentiallyper- cycles forPC/104 andISAbus.Noticethat Table 1Heresasummaryofvarious bus word decryptsthemessage(c). crypted (b).Finally,thesamepass- well gowiththat. clocks andmysystemuses8.33MHz, one ofthecardsinsystem. because theISA-busclockissettoofastfor hardware failuresareoftenmisdiagnosed bus clockofabout8.33MHz.Bytheway, clock needstobedividedbyfourgeta tion oftheCPUclock.So,a33-MHz Bus Speed. Look foranitemcalledATBusClockor CMOS setup,underAdvancedSetup. CPU clock.Usuallyyoudothisinthe motherboard chipset,ratherthanthe ISA-bus clockisderivedfromthe But, itgetsworse. which matcheswhatmyboardisusing. and P996specifiesaclockof8.33MHz, clones evenused1012-MHzbusclocks. IBM ATwentupto8MHz.Some nal PCuseda4.77-MHzclock,whilethe clock speedtheyrecommend.Theorigi- was alsostandardizedbyIEEEasP996. pretation oftheoriginalIBM-ATbus.It Architecture bus,isastandardizedinter- wasnt. ISAbus,orIndustryStandard I thoughtthiswasgoingtobeeasy,butit CLOCKING IN 56 password (a),whichisthenen- W 2/2 5/5 5/5 5/5 7/7 0WS 2/2 4/4 16-bit DMAaccessI/O-Mem 8-bit DMAaccessI/O-Mem 16-bit I/Oaccess (read/write) 8-bit I/Oaccess 16-bit memoryaccess 8-bit memoryaccess Bus-Cycle Type OK, sincePC/104assumes8.33-MHz Typically, thebusclockissomefrac- On ISA recommendsaclockof8MHz, These definitionsmainlyvarybythe PC/104 usesISA-bussignalsandtiming. plain textmessageanda lar PC.Theuserentersthe

i RPC 386 and web browseronaregu- looks likeifyouusea the demosoftware shots showwhat i These screen 486 motherboards,the Photo 2 States a) CIRCUIT CELLAR INKOCTOBERCIRCUIT CELLAR to makethesetupnegligentincomparison. then telltheI/Odevicetostarttransfer. needs toinitializetheDMAcontrollerand program thatwantstosetupatransfer with 8-bitaccesses. DMA, itssloweronanISAbus,especially TIMING ISOFTHEESSENCE about inabit. measurements, whichIlltellyoumore mented withmysetupandtooksome still implementedastwobusstates.Iexperi- beginning memory addressofatransfer fer within64-KB segments.Unlessthe tion ofISA-busDMA.Youcan onlytrans- worth itunlessthetransferislarge enough involved justtosetupatransfer. Itsnot transfers. Althoughanydevicecando misnomer becausezerowaitstatesare state mode.Thislatteroptioniskindofa force thebustodotransfersinzero-wait- vices ordisablethedefaultwaitstatesand timing. but therearetwowaystomodifythe ber ofstatesittakestoperformtheaccess, Each accessmodehassomedefaultnum- accesses. I/O Im onlygoingtolookat let yousetthemintheCMOSsetup. to implementation.Somemotherboards recovery timevariesfromimplementation before thenextaccesscanhappen.The between busaccesses,afteroneendsbut theres arecoverytime.Thatsthetime needed toimplementaspecificbuscycle, or clockcyclesittakestoperformit. mode hassomedefaultnumberofstates several kindsofbuscycles,andeach what happensonthebus?ISAbushas Also, ISA-busDMAishardtouse.The And thatbringsmetothenext limita- So, acertainamountofprocessing is Table 1showsthestatetimesforDMA We canaddwaitstatesforslowde- Since weredealingwithI/Ocards, In additiontothenumberofstates How dowerelatetheclockspeedto 1998 c) b) at 8.33MHzseemstotakeforever. now, andevenatwo-stateISA-busaccess all, Pentiumsclipalongat300+MHz wait forarelativelylongI/Ocycle.After executing I/Oinstructionsandisforcedto cient becausetheprocessorgetstiedup space. register implementedintheI/O transfer thedatatoandfroma to transferdata.ForpolledI/O,you I/Othat great,somostdevicesusepolled devices stillusingISA-busDMA. why thefloppydiskisoneoffew though, 64KBisntmuch.Thatsprobably multimedia, networking,ordisktransfers, high interruptrateforlargetransfers.For data ratesanywayandwontgeneratea amount ofdata,sinceittransfersatlow- and restartedtodoanothertransfer. done, theprocessormustbeinterrupted than 64KB.Andwhenthetransferis the amountofdatayoucantransferisless lies atthebeginningofa64-KBsegment, normal ferring onebyteorwordatatimewiththe speed upI/Otransfers.Ratherthantrans- other instructionsinparallel. on, therestofcorecanstillprocess units. So,whileanI/Ooperationisgoing that areseparatefromtheload/store have pipelinesandseveralexecutionunits 32-bit processorsinembeddedPCstoday test someofthese assumptions. I/O mechanisms andPC/104,itstimeto amounts ofdata. only needoneinstructiontotransfer larger memory. Theprimeadvantage isthatyou or wordsbetweenanI/O port and transfers aprogrammablenumber ofbytes string-based instruction.Thisinstruction But, thatisntthewholepicture.Most You maythinkthistechniqueisineffi- The benefitsofISA-busDMAarentall For afloppy,thismightbesignificant Heres onetechniquethatcanhelp Now thatyouknowalittlemore about inp and outp instructions,trya control signalsnecessary. the highstate,indicatingthatitsready. I/O cardreleasesthelineanditreturnsto states andholdsthebusaccessuntil line aftersomedefaultnumberofwait not ready).TheCPUchipsetsamplesthe driver andpullthelinelow(aslongasits needs toimplementanopen-collector states forthatbustransaction. set assumesthedefaultnumberofwait remains inahighstateandtheCPUchip state. Ifacarddoesntusethesignal,it done orreadywiththedatatransfer. IOCHRDY toindicatewhenacardis generator. TheISAbususesthesignal expand myinterfaceto DES interface,soitwasprettyeasyto already didmostofthisfortheoriginal 58 responds to PC/104 I/Oaccesses.I responds toPC/104 To usetheIOCHRDYline,adevice Normally, thissignalispulledtoahigh The firstthingIaddedwasawait-state abled metoprogramhowthecard RPC ISA-bus I/O interface,whichen- ISA-bus I/O cided toimplementasimple are programmable,Ide- THE THREERS Because FPGAboards include theextra CIRCUIT CELLAR INKOCTOBERCIRCUIT CELLAR long IOCHRDY a no-wait-stateaccesstakestwostates. state cycletoaccessthecard.Remember, asserted, ittellstheCPUtouseano-wait- 0WS (a.k.a.ENDXFERorSRDY).When high forthebuscycle. dont wanttouseIOCHRDY,anditstays loading aregister.AzeroindicatesthatI shift registerinsidetheFPGA. deep 8-byte The 8-bitdataportconnectstoan controls theboardsresponsetobusaccesses. address map.Thestatus/controlport(CSR) Table 2Therearetwoportsintheregister being addressed. thats onlyenabledwhenthecardis high. Thislinealsohasatristatebuffer telling theCPUtoaddwaitstates. it assertsalowontheIOCHRDYline, While thecounterisnotinzerostate, a controlregisterandcountstozero. a counterloadsthewait-statevaluefrom erator. Whenthebus-accesscyclestarts, 0x273 0x272 Addr The othersignalIwanttoimplementis When itreacheszero,setsIOCHRDY I implementedaprogrammablegen- data port control/status register(CSR) What isassertedonthiscardby Now Icanprogramhow 1998 wait statesandthefunctionof0WS register thatletsmeprogramtheIOCHRDY card isimplemented.CSRan8-bit fined. Thisisfinefordoingaread. register.Theothersignalsareunde- 8-bit only givingtheCPUcontentsofone 16-bit card.Mycardthenrespondsby I canmaketheCPUthinktherereallyisa cycles transparentlytotheprogram. I/O instruction,itwouldperformtwo8-bit assert theIOCS16signal)withaword access an8-bitcard(onethatdoesnot using CPU thatthecardcansupportwordaccess the samewayas0WSsignal. buffer toimplementtheIOCS16signalin of 16-bitaccesses.So,Iusedatristate Iwantedtogetagriponthetimings 8 bit, a zero-wait-stateaccess. 0WS line,indicatingthatthecardcando register isset,thecardassertsalowon card isselectedandaflaginthecontrol mented viaatristatebuffer.Whenthe Table 2showshowtheregisteronmy With aprogrammableIOCS16signal, The IOCS16signalindicatestothe Finally, eventhoughmycardisonly The 0WSlineonmycardisimple- inpw and outpw . Ifyoutriedto RPC 59 ). This outsb / Also note that the 16-bit transfer modes Also note that the 16-bit is the fastest. But, In 8-bit mode, 0WS insb struction cache of the processor struction cache doing single-trans- (i.e., the loop is contained within fer instructions is little cache), so there the instruction of them. executing a bunch penalty to wait-state modes. do not implement default has the same That is, the 0WS mode IOCHRDY. timing as not asserting IOCHRDY wait states selecting 03 for the which implies that has no effect on timing, similarity is due to the in- similarity is ( ) per- PC outb / inb MBEDDED E 1998 1998 -axis shows the wait states, while -axis shows of opera- -axis shows the number x y I ran a series of tests with different wait- tests with different series of I ran a The The ( The single instructions OCTOBER OCTOBER state combinations and 0WS access and 0WS state combinations modes. The results are illustrated in Figure 2. results are illustrated modes. The 0 indicates asserting the 0WS signal and asserting the 0WS 0 indicates wait-state initializing the 18 indicate the value of 07. counter with which vary from tions per second, 472 kop/s second) (kilo-operations per to 893 kop/s system I tested with for the this board and software. string instructions form much like the Data 0 0 I016 0WS X/K Wait For 16-bit mode accesses, I only tested The data register is a port into an register is a port The data also implements My ISA-bus module I wrote a program To test this interface, To handle timing, I wrote another pro- 272 273 read words as string read single word interleave reading and writing a byte write bytes as string write single bytes read bytes as string read single byte • • reading the card, since the card is only an 8-bit card faking 16-bit cycles. Writing to my card alters the CSR, but reading it is OK. I ran the same number of access cycles to get a measurement. For 16-bit mode, we have: Figure 1In the register map for the PC/104 card, the lower bits (Wait) encode the number of states to assert the ICHRDY signal. If our card is being accessed, the 0WS and I/O16 bits control whether the 0WS or the IOCS16 signal gets asserted. The X/K bit selects whether the data port points to the X or K register. • • • • • signal. Figure 1 shows how these func- these 1 shows how Figure signal. to the register. tions are mapped 8-byte and writing the register. Reading in eight to be performed register needs a holdover 8-byte register is cycles. The needs implementation, which from the DES to hold the plain-text two 8-byte registers value and a key. register, which is the second 8-byte the bits in the CSR. switched with one of register bit. Figure 1 shows the my interface modes, that enables me to set 8-byte registers, and write patterns to the the read them back using I/O string- transfer instructions. If the data read back matches the written data, it goes on to the next pattern. Using the string instruction for testing should represent the worse case because it reads and writes the data. gram that reads and writes 8-bit values into the card by trying a variety of I/O- instruction mixes. To ensure that we get some good measurements, I ran one million accesses for each mode and measured the time it takes to run. The modes I ran are: Figure 2This plot shows how the different access modes perform. In par- I/O Rate vs. Wait States 900 ticular, note that the single instructions inb (inb/outb) perform about the same as outb 850 outb/inb the string instructions (insb/outsb). insb outsb 800 insw outsw 750

700

kops/s 650

600 this motherboard always inserts three wait states in 8-bit mode unless 0WS 550

is selected. 500 I only ran the test with one CPU 450 board, so Im likely to get different 02468 numbers for other boards. The big- Wait States gest difference will probably be the amount of recovery time implemented in using, and the DES would run at half the the chip set. Of course, some boards will speed (1 µs). Finding out something can be able to change the bus clock, which will be made cheaper is always nice. also affect the timing, but then it wont be In my case, it would have made the standard anymore. demo a bit cheaper, resulting in a nice fish dinner after the show. And of course, CATCH OF THE DAY having a less expensive product with the Now I know how to speed up transfers same performance can mean higher prof- to our DES engine. First Id use the 0WS its or being more competitive. RPC.EPC signal to force the CPU to use the fastest access mode possible. This technique Ingo Cyliax has been writing for INK for improves the access time from around two years on topics such as embedded 700 kop/s to close to 900 kop/s. systems, FPGA design, and robotics. He Also, I can double the throughput to the is a research engineer at Derivation Sys- DES engine via 16-bit transfers. Instead of tems Inc., a San Diegobased formal only getting close to 900 kBps, I can get synthesis company, where he works on almost 1.8-MBps throughput. formal-method design tools for high-assur- While I can more than double the ance systems and develops embedded-system original throughput to my board, this products. Before joining DSI, Ingo worked implementation is still I/O bound. Consider for over 12 years as a system and re- that the DES engine takes 500 ns to com- search engineer for several universities plete one encryption per 8-byte block. and as an independent consultant. You If the key stays the same, I have to may reach him at [email protected]. provide 8 bytes of data for the plain text REFERENCES and read 8 bytes of data back from the E. Solari, ISA & EISA: Theory and Operation, Annabooks, San Diego, CA, 1992. card. That takes 8 µs using 16-bit transfers L.C. Eggbrecht, Interfacing to the IBM Personal Com- and 16 µs in 8-bit mode. puter, SAMS, Carmel, IN, 1990. Although this application is severely SOURCES I/O bound, I now have some quantitative PF2000 and Verified DES FPGA cores Derivation Systems, Inc. ideas about what I need. One solution is (760) 431-1400 to find a faster bus, like PCI. At 500 ns, the Fax: (760) 431-1400 www.derivation.com DES core will need about 32 MBps of VSBC-1 and NE2000 modules bandwidth to stream data. Versalogic Corp. Luckily, speed wasnt an issue for the (800) 824-3163 (541) 485-8575 demo. Our main task was showing that we Fax: (541) 485-5712 could develop working FPGA cores, so I www.versalogic.com could switch to the slowest (and cheapest) FPGAs used on PF2000 Xilinx Corp. FPGA speed grade for this implementa- (800) 624-4782 tion. Slower FPGAs are up to three times (408) 559-7778 Fax: (408) 559-7114 less expensive than the speed grade I was www.xilinx.com

60 CIRCUIT CELLAR INK OCTOBER 1998 APC 61 American Advantech pro- Were going to use a touch- duces a number of embedded computer systems, and I just happen to have the PCM-4862 EMBEDDED INGREDIENTS ROM-DOS from Datalight, a thermal printer from Axiohm, and some Holtek-enhanced RF magic from DVP. screen as a source of input to key a transmitter that sends a message to one or more remote thermal printers. Again, our topic du jour is low-power ality is that both the blowgun and the high- tech card reader will, at various times in their useful life, need maintenance or maybe even replacement. RF the embedded way. So, lets lay the foundation for an RF/embedded application using a couple of American Advantech Corporation PCM-4862s, a touchscreen monitor powered by MicroTouch, some PC s PC MBEDDED E red Eady 1998 1998 pplied pplied F A In comparison, you and I swipe our My point? One mans high technology OCTOBER OCTOBER counter, the rain-forest dude uses a very, very long blowgun that propels a poison- ous dart into the chosen primate. You know the rest. debit card and realize the same result. Maybe not monkey meat, but meat, if thats your persuasion. is another mans blowgun. The common- F and Micros Part 2: A Low-Power System 2: A Low-Power Part Photo 1The SSD is contained in the three 29C040s right above the BIOS EPROM. R

e live in the land of gadgets. Our

Again, last month, I was lucky enough Anyway, small monkeys are What Im getting at is that W Freds taken to the airwaves again. Using a DVP transmitter/receiver pair, he again. Using a DVP transmitter/receiver Freds taken to the airwaves employed where wires previously dominatedwith shows us how RF can be to touch 256 printers over a single RF link. the amazing potential world depends on the electronic goodies that spew from electronic minds like yours. Only the far reaches of humanity in the deepest tropical rain forests have seen little, if any, of this type of technology. to get some TV time. I was watching TLC (The Learning Channel, of course) and stumbled on this documentary about a civilization that exists in the rain forests of some far off and remote piece of one of the south- ernmost continents. a staple in the diet of these indigenous people. They like grilled tarantula, too, but thats another story. the men and their sons go about the hunt every now and then. Sorta like you and me going on the grocery-store trail, the difference being that at the meat necessary filesfrom theROM-DOSfloppy installing thejumper, Imovedallofthe goes thewayofbitbucket. After the PCM-4862,Abecomesflash andC disk thatwouldnormallytake a Cseat). devices (thisissansaspinningdisk orvirtual Atmel 29C040512K×8flash-memory indeed afloppy,whiledriveCistrioof drive C.OnthePCM-4862,Ais is designatedAandthefirstharddisk Normally, thestandard3.5 bootable imageofROM-DOSontheSSD. fit thecodeplusDOSontoSSD. time around.ThankstoROM-DOS,Ican manipulate theDVPRFmodules. need theserialandparallelportsto faces forthedevelopmentphase.Illalso the onboardkeyboardandmouseinter- about moretimeontheship. ment. IvegottohaveatalkwithJean-Luc move thelittleballtoeffectcursormove- place themouseonapadandphysically mouse techniqueandstillfindImust bedded systemsIcomeintocontactwith. a mouseandkeyboardinterfaceforem- my telepathicabilities,andsoIstillneed Counselor Troy,Ihaventfullydeveloped interface, andabuilt-infloppydriveport. port, anenhancedIDEhard-diskdrive RS-232 serialports,amultimodeparallel tioned features.Aswell,ithasacoupleof you aboutwillusealloftheaforemen- disk. TheembeddedRFappIwanttotell Ethernet, SVGAvideo,andsolid-state board 486computerwithonboard provides areperfectforthisjob,too. previous applications,andthefeaturesit 16 MBofRAM.Iveusedthisboardin you seeinPhoto1,runsat100MHzwith in mypossession.MyPCM-4862,which 62 With theadditionofasinglejumper on The firstorderofbusinessistoinstalla I probablywontusetheIDElogicthis Meanwhile, Illemploytheservicesof Ive alsotriedScottystalktothe Although Ihavemydailysessionswith The PCM-4862isanall-in-onesingle-

out onthepowerend. APC a lonelyzenertohelp ter module.Itsupto the DVPtransmit- magic isinside All ofthe Figure 1 ″ floppydrive CIRCUIT CELLAR INKOCTOBERCIRCUIT CELLAR lowed bythefamiliar ROM-DOS 6.22bannerappearedfol- vices andfoundtheflashasdriveA.A and thePCM-4862lookedforbootde- files outontotheflash. SYS to theSSDandperformeda Actually, itsaboostto80 compatible, thissituationisnobigdeal. on themarkettodayarereally186 than withtrue8088compatibility. was compiledwith186instructionsrather DOSs kernelbelowthe48-KBmark,it sion ofstandardBillDOS.TokeepROM- DOS, itsessentiallytheembeddedver- always good. CONFIG.SYS This meansthe MRCI interface)arebuiltintoROM-DOS6. on goodoldDOS. embedded developerswhostilldepend (with theexceptionofcompression mitter module.The A POR(power-onreset)wasperformed, Since mostXT-compatiblemachines For thoseofyouunfamiliarwithROM- Hey, asmokelessbeginning.Thats shown here. collector outputsarent bit busierthanthe Figure 2Thisonesa All thefeaturesofBillsDOS6. commandputthenecessaryboot workasexpected.The [MENU] open- trans- A:\> commandsin xx prompt. and8048 SYS 1998 x

kernel C . The x a premium,ROM-DOSisperfectsubstitute. done withROM-DOS. embedded way,itmostlikelycanbe standard desktopDOSfunctioninan be knownthatifyouneedtohavea need totellyouaboutrightnow,butletit Theres alotmoretoROM-DOSthanI REMSERV REMQUIT utility, whichenablesauseronthe drive), and on theserverend(thethatsharesa might callamini-network. are theclientandserverendsofwhatyou end (whichwillgainanewdrive). a remotesystemviatheserialport. with adiskdriverthatcanaccesson does that,too.DatalightsROM-DOSships match thoseofDOS6. there, andalltheinternalDOSstructures standard BillyDOSinterruptinterfaceis disk. BillsDOSisgood,butifspaceat kernel, enablingbootingoffofanykind drivers canbeaddedtotheROM-DOS ROM, hard,orfloppydisk,butdevice ROM-DOS isnotonlyabletobootvia none atallforgreaterspacesavings. duced toDOS5level,3or ROM spacethatBillsDOSdoes. importantly, ittakesupaboutonehalfthe smaller inRAMthanBillyDOS,andmore the embeddeddeveloper.ROM-DOSis many featuresgearedspecificallytoward Another additionisthesmall REMDISK.EXE Remember Interlnk?Well,ROM-DOS CONFIG.SYS Datalights ROM-DOSalsocontains ontheoppositeendoflink. endtoterminateexecutionof REMDISK processingcanbere- and isrunontheclient x . REMSERV.EXE REMSERV REMQUIT isrun APC 63 encoder/decoder pair. encoder/decoder xx Oh, whats Oh, mod- With the DVP development that? You dont do that? You setup may RF, but this to that RF be your solution were assigned project you On my side of that to. Hmm . time it equates to quicker equation, I didnt have to to the page because for this appli- dig and design the RF all! cation. Goodness for So, lets look ules, the RF is a given. digital data at how we transmit our the ether. and receive it over Figure 3 is a representative layout of Rats! No matter how hard I try, I cant Rats! No matter how I could write code to effect the desired the Holtek hardware found on the demo boards. The Holtek encoder takes care of make this difficult. Figure 1 is typical of make this difficult. Figure side. It may not whats on the transmitter be rocket science, but if youre RF im- paired, this is a moon shot. Figure 2 shows us the receiver module. datastream, but again, why waste good engineering? Instead, all the hardware shown in Figure 1 is married to the onboard Holtek 60 DD V OSC R 18 17 16 15 14 13 12 11 10 PC DD D3 D2 D1 D0 VT V DIN OSC1 OSC2 SS Circuit A0 A1 A2 A3 A4 A5 A6 A7 V Receiver 1 2 3 4 5 6 7 8 9 MBEDDED E DD V R OSC R 1998 1998 18 17 16 15 14 13 12 11 10 Circuit DD D3 D2 D1 D0 OUT V Transmitter D *LED OSC1 OSC2 SS I have the raw DVP RF modules, but I have the raw DVP No board design, no soldering (ex- A0 A1 A2 A3 A4 A5 A6 A7 V OCTOBER OCTOBER 1 2 3 4 5 6 7 8 9 why waste good engineering? My DVP why waste good engineering? demo boards include the original RF modules, an integrated etched resonant loop antenna, and time-saving Holtek encod- ers/decoders. The guys and gals at DVP even take the outputs of the decoders to open collector mode, so you can interface to just about anything electronic on this planet. cept what you want to), no guesswork. Did you say quicker time to market? A CUP OF RF Figure 3Oscillator frequency is set by a single 5% resistor. Figure 3Oscillator frequency . Lets move on. INK Now weve established a base- a weve established Now As you know, I like C. Its disci- As you know, binary Ever try to manipulate I know what youre thinking, and youre The only problem Ive encountered This is good and bad. On the good Again, theres nothing wrong with C, Weve defined the capabilities of our line. DOS is in the house, and so is is in the house, and line. DOS its that can run under anything else Photo 2This diagnostic layout can be whatever your application demands. plined. Its fast. Its universal. So plined. Its fast. Its for this what? I chose PowerBASIC Its fast. It project. Its disciplined. PowerBASIC is compiles. In short, much like C. Not. PB has with standard BASIC? built in. This is due bit-banging capability of the PB command to the tight coupling routines. set to pure assembly right. Like C, you can do inline assembly with PB. Theres even a PB DLL compiler that does DLLs for every language that can use them. The code is tight and fast. with PB is that sometimes the routines arent very well behaved when interfacing with legacy applications written in native C. side, it forces you to rethink the logic of the coded solution to your problem. Unfortu- nately, you also have to rethink the logic associated with the coded solution to your problem. I just choose not to use it here. If you wanted old standards, you wouldnt be reading 16-bit influences. Again, Im in a no-C Again, Im in a 16-bit influences. for it comes to software zone when this job. hardware from the embedded aspect, and weve (Ive) decided what language we will speak in this embedded country. Now, lets take a close look at the main ingredient of our embedded application the DVP RF modules. shot ofthevirtualkeyboard. MicroTouch interface,andPhoto2isa sists ofPBcodesnippetsthatdealwiththe MicroTouch microcontroller.Listing1con- (COM 1)isusedtointerfacethe to aparticular the buttonsonscreenandequatethem mouse driverenablesmetosimplydraw support inconjunctionwithastandard event. UsingPowerBASICsMSMouse turning eachtoucheventintoamouse standard mousedriverisemployed,thus are transmittedseriallytothePCM-4862. LETS COOK A DASHOFAXIOHM and convertsitinto microcontroller sensesatouchontheCRT microcontroller complex.TheMicroTouch with acapacitivetouchpanelandintegral simple SVGAtubethathasbeenmodified A PINCHOFMICROTOUCH Touch monitor, andanAxiohmprinter. DVP receiverand transmitter,aMicro- the AdvantechPCM-4862,ROM-DOS, a youll undoubtedlyseeitagain and again. you goouttoeatorbuysome lumber, noid. printer canalsodriveacash-drawersole- the topcoveranddroppinginroll.This is thatyouloadpaperbysimplyopening Room asitis. enough noiseintheCircuitCellarFlorida it wassmallandquiet.Theresalready applications. IchosetheAxiohmbecause used asareceiptprinterinpoint-of-sale that operatesat9600bps.Itstypically aged orjustplainintheway. keyboards andmiceareapttobedam- application tomanyindustrialuseswhere With atouchscreen,Icanapplythis tion, butatouchscreenisbetterchoice. keyboard toselectthenecessaryinforma- 64 The PCM-4862serialportat0x3F8 Instead ofusingtheraw All theingredientsareoncounter One oftheneatfeaturesthisprinter The Axiohmisaserialthermalprinter The MicroTouch-enhancedmonitorisa I couldhaveusedakeypad,mouse,or this processindetaillasttime.

Now thatyouveseenithere,when APC and datalogicinputs.Idescribed tion takenfromtheaddress address anddatainforma- x - y data packetbyadding point. the buildingof x - y coordinatesthat x - y data,a CIRCUIT CELLAR INKOCTOBERCIRCUIT CELLAR nection tothePCM-4862. is detectedandpassedviaaserialcon- touch totheMicroTouch-enabledmonitor used wherewirenormallydominates.A signal status,andprintsatestmessage. Listing 1ThissnippetoftouchscreencodeopensaCOMport,checksthemodemcontrol close NOPRT2: nextx print#z,crlf$ forx=1to10 print#z,"CDCONTROL LINESTATUS==>";cd$ print#z,"CTSCONTROL LINESTATUS==>";cts$ print#z,"RTSCONTROL LINESTATUS==>";rts$ print#z,"DSRCONTROL LINESTATUS==>";dsr$ print#z,"DTRCONTROLLINESTATUS==>";dtr$ print#z,"RECEIPTPRINTERATCOM2ADDRESS= ";hex$(a) print#z,crlf$ nextx print#z,"PRINTTESTFORRECEIPTPRINTER" forx=1to10 ifnoprtflg=1gotoNOPRT2 showstatus endif cdstat=4 ifd=0then d=Carrier(2) cdstat=10 cd$="OK" endif ctsstat=4 ifc=0then c=CtsStatus(2) cts$="OK" ctsstat=10 rts$="OK" rtsstat=10 endif dsrstat=4 ifs=0then s=DsrStatus(2) srstat=10 dsr$="OK" endif noprtflg=1 qprint7,26,"<--COM2DIDNOTASSERTDTR",4 dtrstat=4 ift=0then t=DtrStatus(2) dtr$="OK" dtrstat=10 open"com2:9600,n,8,1"asz z=FREEFILE qprint7,3,"TESTRECEIPTPRINTER",9 qbox6,2,3,23,14,0 beep1 MsReleaseWait cleanup qprint7,3,"TESTRECEIPTPRINTER",15 qbox6,2,3,23,15,0 port=2 a=GetComAddress(2) noprtflg=0 showstatus showbuttons case 13to18 The ideahereistoshowhowRFcanbe 1998 placed ontheAdvantechparallelport. corresponding totheareatouchedis event asamouseevent.Abitpattern PowerBASIC programdecodesthetouch Under thecontrolofROM-DOS,a Figure 6Look Ma, no To LAN 1 To LAN 2 wire! DCM-4682 PCM-4682

Ethernet Ethernet DVP DVP Transmitter Receiver

Parallel Port Parallel Port COM1 COM1

MicroTouch Axiohm Monitor Printer

Attached to the parallel port is a Holtek Once the RF energy does its work, the encoder (on the DVP transmitter demo Ethernet capability of the Advantech PCM- board). The parallel port bit pattern sets 4862 could be employed to move the data address and data information to be trans- in a LAN environment. Instead of targeting mitted. The transmitter is keyed by a low on a printer, you could target specific LAN the encoder, and the 12-bit data pattern is segments. The Advantech PCM-4862 in- converted to RF energy. cludes a set of disks that include Ethernet At the receiving end, another PCM- drivers for all of the popular operating 4862 controls the printer. The receiving systems. decoder feeds the transmitted bit pattern to DVP has taken the mystery out of incor- the receiving PCM-4862 parallel port. The porating RF into legacy applications. This transmitted bit pattern is then decoded and time, its DVP, not me, who has once again translated into a message that is printed on proven that it doesnt have to be compli- the Axiohm thermal printer. cated to be embedded. If all of that sounds simple, it is. Figure 6 schematically depicts all the parts that Fred Eady has over 20 years experience make up the application. as a systems engineer. He has worked The power of this idea lies in the address- with computers and communication sys- ability of this encoder/decoder pair. Our tems large and small, simple and com- application uses only 8 bits of the parallel plex. His forte is embedded-systems de- port. Depending on how the address and sign and communications. Fred may be data bits are allocated, this could limit how reached at [email protected]. many printer complexes can be addressed over the RF link. SOURCES PCM-4862 But by adding some multiplexing and American Advantech Corp. latch glue, the entire address range can be (408) 245-6678 Fax: (408) 245-8268 accommodated. Up to 256 printers could www.advantech-usa.com be touched over a single RF link. 60xx encoder/decoder The Holtek parts take much of the code Holtek Microelectronics Inc. +886 35-784888 writing out of this application. By coding Fax: +886 35-770879 specific bit patterns for transmission, theres www.holtek.com no limit to the possibilities. RF modules DVP, Inc. The only requirement: follow the duty- (818) 541-9020 cycle rules that apply to these DVP devices. Fax: (818) 541-9423 www.dvp.com Writing our own bit-pattern code lets us Touchscreen Monitor interface to the transmitter and receiver via MicroTouch Systems, Inc. the PCM-4862 serial ports, freeing up the (800) 642-7686 (508) 659-9000 parallel ports for other purposes. Fax: (508) 659-9400 In putting this application together, I www.microtouch.com assumed that each end of the RF link would ROM-DOS Datalight embody massive embedded intelligence (360) 435-8086 as found in the Advantech embedded PC. Fax: (360) 435-0253 www.datalight.com If the targeted printer is in a stand-alone Serial thermal printer situation, you can use a smaller embedded Axiohm, Inc. solution like a Microchip PIC to decode the (612) 638-9856 Fax: (612) 638-0758 RF transmission. www.axiohm.com DEPARTMENTS Digital MICRO 68 MicroSeries Processing in SERIES

David Tweed 76 From the Bench an Analog World 80 Silicon Update Basic Issues

ignal processing s in the digital world requires that analog signals be converted to discrete units in both a Conversion measurement dimension (voltage, cur-

Part 11 rent, temperature, etc.) and time. of is always a The former is called quantization, 3 and the latter is known as sampling. 3 hot topic, While these conversions can be analyzed independently by a mathematician, a but David’s not talking real-world analog-to-digital converter deals with both simultaneously. religion here. Instead, Similarly, when digital processing is complete, it’s often necessary to he wants to fill us in convert the signal back to a continuous- measurement, continuous-time domain. on the basics of A/D That’s the job of the digital-to-analog converter. and D/A conversion, In this series, I discuss the funda- mentals of A/D and D/A conversion. so that we’ll be ready Part 1 covers the basics of reading and understanding specification sheets. to delve into the Part 2 introduces the most important conversion technologies as well as their deeper issues in the strengths and weaknesses, relative to the parameters I cover. In the final coming months. article, I delve into delta-sigma conversion and show you how to dither.

RANGE, RESOLUTION, AND ACCURACY An ADC maps an analog measurement to a set of digital codes that can be conveniently manipulated. In the ideal case, this mapping is perfectly linear and can be drawn as a straight line on a graph. However, the fact that

68 Issue 99 October 1998 Circuit Cellar INK® the analog domain is continuous and code to the next. In real applications, usually unbounded while the digital the end ranges are usually the same side has a finite set of codes creates size as the intermediate ranges, and a +2.5 two ways in which the graph deviates single value is associated with each +1.5 +0.5 from the straight line. range that is the midpoint of the range. –0.5 (Input) First of all, the converter’s range The size of each range is called the –1.5 has definite endpoints. All analog step size or quant (i.e., quantum or Analog Domain –2.5 values outside this range simply map smallest perceivable change). –3.5 to the highest and lowest codes. The corresponding three-bit DAC 100 101 110 111 000 001 010 011 Also, each digital code represents a produces the single value associated Digital Domain small range of analog values, creating with a range when given the digital +3.0 a stepwise mapping from the analog to code for that range. Together, the +2.0 +1.0 the digital domain, as Figure 1 shows. ADC and DAC form a system that +0.0 Similarly, a DAC maps digital codes has a stepwise linear transfer function. –1.0 into analog values. Given the finite The maximum difference (or error) –2.0 –3.0 set of digital codes, there must also be between input and output occurs when –4.0 a finite set of discrete analog values the input value is very close to a deci- the converter can generate. For an sion level, and as you can see, the ideal converter, these points lie along corresponding output value differs by Figure 1—In an ideal world, converters have transfer a straight line. half a quant one way or the other. functions that approximate straight lines. ADCs trans- Figure 1 shows the transfer functions The values associated with the end late ranges of input values to discrete codes, and DACs translate those codes to specific output values. for an ideal three-bit ADC and the ranges are known as full-scale values. corresponding three-bit DAC. The In a unipolar converter, the lower end However, to massage the noise dashed line represents the ideal straight- is usually zero and the upper end is a signal you need to know how much line transfer function that each unit positive value (e.g., 5 V). In a bipolar noise is generated (amplitude) and tries to approximate. converter, the end values are plus and what its spectral characteristics are As you see, the ADC divides the minus the same value (e.g., ±2.5 V). (i.e., in audio systems, what does it analog domain into a series of ranges The converter’s range is the difference sound like?). and assigns one digital code to each between the end values (here, 5 V). If the peak amplitude of the error range. The range on each end is open- The number of bits in the digital signal is limited to half a step size (in ended, while the six intermediate code determines how many codes an ideal converter), how much power ranges are the same fixed size. there are by a simple relation: (loudness) does this represent? Assum- The eight ranges are defined by seven ing that the error signal is a sawtooth decision levels or input values that codes = 2bits signal with a range equal to the step cause the converter to switch from one size, then its RMS value is: This equation gives the number of input ranges for stepsize Output 12 levels an ADC or the number of output values for a DAC. which is about 0.289 times the step Decision levels Since the input ranges are size. Original the same size, their size is The RMS value of a full-scale sine signal time given by: wave is:

2 range of converter 2 2bits or about 0.707 times its peak value. Output levels Think of the quantized For an n-bit converter, the ratio of the signal as the sum of the origi- sine-wave RMS voltage to the error nal signal and an error signal signal RMS voltage is given by: Quantized introduced by the quantizer, signal time as shown in Figure 2. Hori- range of converter 0.707 × zontal dotted lines represent 2 the decision levels. range of converter 0.289 × This error signal varies in 2n Error a complex way that depends signal time on the input signal, so it is The converter’s range cancels out, so Figure 2—A quantized signal can be represented as the sum of the usually treated and analyzed we are left with a simple expression original signal and an error signal. as a noise source in the ADC. that depends only on the number of bits:

Circuit Cellar INK® Issue 99 October 1998 69 a) b) c)

Value Value Best-fit line Value Ideal Ideal

Ideal Actual Actual Actual

Best-fit line

Code Code Code

Figure 3a—A typical uncalibrated converter curve deviates from the ideal. However, you can approximate the ideal by calibrating the endpoints (b), a simple method which unfortunately has a larger peak error, or by calibrating the best-fit line (c), which yields the lowest RMS error.

× –1 adjust the curve’s endpoints to the is another way to characterize distor- 0.707 2 =2.45× 2n–1 0.289 × 2–n desired values, letting the intermediate tion. An integral curve (see Figure 4b) = 1.225 × 2n points fall where they may (see Figure can be generated by integrating over 3b). This way, it’s easy to calibrate by the differential curve. Vendors usually This range is usually given in decibels examining two points on the curve. show one curve or the other, depend- (e.g., a logarithmic scale), which You can also find the best-fit ing on which characteristic of their works out to: straight line for the converter and device they want to emphasize. calibrate that to the desired range, as Which is more important? It depends 20 × log 1.225 × 2n =1.76+6.02× ndB shown in Figure 3c. This approach on your application. If absolute accuracy gives the lowest overall RMS error if is crucial (e.g., measuring a voltage or This 3-bit converter has a signal-to- the full range of the converter is used, current in an industrial process), the noise (S/N) power ratio of about 20 dB, but unfortunately, you need to exam- integral nonlinearity is more important. but an ideal 16-bit converter should ine a large number of points on the But in an audio application, integral achieve 98 dB. Adding a bit of resolution curve to find the best-fit line. nonlinearity represents an overall gain increases the S/N ratio by about 6 dB. In either case, the deviations from error that is, for all practical purposes, Figure 2 shows how the character- the straight-line characteristic (known irrelevant. Differential nonlinearity istics of the error signal vary over the as nonlinearity) distort the analog gives a better idea of the audible dis- full cycle of the sine wave, which is signal’s digital representation. These tortions the converter produces. often undesirable. distortions are the same as you’d find Another way to characterize an ADC For example, in an audio converter, in a purely analog nonlinear system is to feed in a full-scale sine-wave a low-frequency sine wave can notice- and are broadly classified as harmonic signal and make a mathematical histo- ably modulate background noise, (waveform) distortions and intermod- gram of the number of times the con- which is more annoying than a steady ulation distortions (e.g., interactions verter produces each code, as you see level. You can solve this problem by among simultaneous signals). in Figure 4c. adding a randomizing signal (i.e., Manufacturers have a number of An ideal converter produces a spe- dithering it) before you quantize it. ways to characterize their converters cific curve (related to arc sine) under The dither signal’s characteristics for distortion. One way, differential this test, and examining the way a are chosen to mask the effects of nonlinearity (DNL), is simply the varia- histogram deviates from the ideal is a quantization without becoming objec- tion of the step size for each digital quick way to find potential problems, tionable itself. I’ll discuss dither signals code from the ideal theoretical value. including missing codes that the con- and their application more in Part 3. For an ADC, this is the difference verter never produces. between successive decision points, Some ADCs have larger than average LINEARITY while for a DAC, it is the difference nonlinearities when a more signifi- A real-world converter isn’t going to between successive output values. cant bit changes state (e.g., going from have the perfect straight-line transfer Figure 4a graphically depicts these 00111111 to 01000000). In some characteristic of the ideal converter. results, placing the digital codes along cases, the decision level implied by Figure 3a shows some of the problems the x-axis and the error associated 00111111 is actually slightly higher you may find in a transfer curve. with that code along the y-axis. than that of 01000000. One way to get this converter work- Integral nonlinearity (INL), which A slowly rising signal generates a ing in an application would be to is just the transfer curve of the device, code sequence that jumps directly

70 Issue 99 October 1998 Circuit Cellar INK® quency in the signal. However, you a) LSB need to make the distinction since 0.3 there are systems in which the band- 0.2 width is considerably narrower than 0.1 the frequencies present (e.g., the IF 0.0 code stage of a digital radio receiver). –0.1 If a system fails to meet the Nyquist –0.2 criterion, then aliasing occurs, causing –0.3 signals at frequencies that originated outside the Nyquist bandwidth to have the same effect as a phantom signal LSB b) within the Nyquist bandwidth. Once 0.4 this happens, it’s impossible to separate 0.3 0.2 the undesired signal from the desired 0.1 code signal (but see Gerard Fonte’s article 0.0 in this issue). –0.1 If the signal is not known to lie –0.2 within the Nyquist bandwidth, it –0.3 –0.4 must be filtered in the continuous-time domain before sampling occurs. Let’s look at two basic approaches to this. c) probability You can place analog filters ahead 0.04 of the ADC that attenuate out-of-band signals at or near the quantization step size. But if signals just within the 0.03 Nyquist bandwidth are important to the application, you need high-order filters with steep skirts. These filters 0.02 tend to be complicated (high parts count) and difficult to adjust, and they introduce undesirable phase shifts. 0.01 The second approach minimizes these effects by oversampling (i.e., using a much higher sample rate ini- 0.00 code tially). This technique raises the Figure 4a—The differential nonlinearity curve shows the step-to-step error, while the integral nonlinearity curve Nyquist frequency, enabling you to shows the cumulative error (b). c—The histogram is a way to measure DNL (dashed line shows ideal shape). use a much simpler analog filter. Digital-filtering techniques that are from 00111111 to 01000001, and the speed converters used in digital radios easier to control and that have better code 01000000 is said to be missing. but can be important in other applica- phase characteristics can reduce the While this miss doesn’t cause large tions as well. bandwidth before resampling the problems in terms of the overall error signal at the desired final sample rate. or noise level, it can indicate an under- SAMPLE RATE AND BANDWIDTH Delta-sigma–based converters take lying problem, so, manufacturers like As mentioned, the codes in a DSP’s this to the extreme by using a one-bit to boast “No missing codes.” memory represent points or discrete converter at a very high sample rate to You can characterize the overall values along the measurement and achieve the performance of a multibit linearity of a converter by specifying time axes. Quantization gets us the conventional converter. I’ll cover the spur-free dynamic range (SFDR), first, and sampling gets us the second. delta-sigma conversion in Part 3. which is measured by applying one or Shannon and Nyquist showed that two full-scale sine waves to the con- a continuous-time band-limited signal SAMPLE TIMING AND JITTER verter and doing a spectral analysis can be perfectly represented by a set Just as there can be small errors in (e.g., FFT) of the output. of discrete samples as long as the the exact placement of decision points The SFDR is the ratio between the sample rate is greater than twice the in an ADC’s measurement domain or peaks representing the original signal(s) bandwidth of the signal. in the placement of output levels in a and the highest peak of any of the In many systems, the frequency DAC, both kinds of converters can harmonic or intermodulation distortion band of interest includes DC, so it is have small errors in the time the products. This performance measure- often stated that the sample rate must samples are taken or generated. This ment is most important in the high- be greater than twice the highest fre- error is called timing jitter.

72 Issue 99 October 1998 Circuit Cellar INK® However, it’s rare for opens and the capacitor holds the level a) even a relatively inexpen- of the input signal for that moment. A sive crystal oscillator to buffer amplifier with an high input

Error have 0.5 ns of jitter. It’s impedance keeps the voltage from pretty safe to ignore most changing until the switch closes again. of the breathless hype you When designing sample-hold circuits, read about the horrible jitter also pay attention to: problems of CD players. Figure 5b shows how • how long it takes for the output to Time Time Sample is played early timing errors that affect match the input once the switch b) when an ADC accepts its closes again samples have the same • whether there are any offsets be- effect when the samples tween the input and output values are played back through a • how long the circuit can hold the Error perfectly timed DAC. desired value to the needed degree of accuracy (droop rate) CONVERSION SPEED Except for flash convert- Sometimes the signal controlling ers, which do their work the switch feeds through to the circuit Time Time Sample is recorded early instantly, most ADC tech- output, making the offset with the nologies need a finite switch closed different than with the Figure 5a—A timing jitter in a DAC produces errors similar to quantiza- amount of time to com- switch open. It’s impossible to com- tion noise, and as you can see, a timing jitter in an ADC has much the plete a conversion. Many pletely eliminate these errors, but you same effect (b). assume the signal won’t minimize them as much as possible change significantly (more relative to the converter’s resolution. As Figure 5a shows, errors in the than the step size) over that period. As Figure 6c shows, track-hold horizontal (time axis) placement of However, some systems can’t circuits also have applications in con- samples by a DAC produce errors in make that guarantee inherently. A junction with DACs. Sometimes the the resulting waveform that are similar sample-hold or a track-hold circuit is output of a particular DAC has to quantization noise. The magnitude then placed in front of the converter glitches at the moment a new sample of the error in the measurement domain that samples the signal in analog form comes along, rather than moving is related to the size of the timing and holds it during the conversion. smoothly to the new value. error by the slope of the signal. For a Figure 6a shows this kind of circuit. These glitches tend to be short DC signal, timing jitter has no signifi- The input signal charges a low-leakage relative to the sample period, and cance, but signals near the converter’s capacitor, whose voltage tracks the sometimes you can control them by bandwidth limit have a serious effect. signal as long as the switch is closed. simple low-pass filtering at the output In the worst case, a converter will When conversion begins, the switch of the DAC—the same filter that slew over its entire range eliminates the images from one sample to the of the output spectrum. a) Buffer c) next, so a timing error B A If the glitch energy A ADC DAC B producing a one-quant (amplitude multiplied error equals the sample by duration) is high, period divided by the the heavy filtering number of steps. For b) d) required would cause Input DAC CD-quality audio (i.e., signal Output undesirable effects to 16 bits at 44,100 A A the signal, so a track- samples per second), Time Time hold circuit is used to this works out to 346 ps closed disconnect the DAC Switch closed (10–12 s), which is very control open Settling Switch from the output for the time control tiny indeed. open duration of the glitch. A more typical ex- Output Droop T/H ample is a full-scale signal Output ZERO-ORDER HOLD Time Time 1-kHz sine wave, which B Conversion B The mathematics of time has a maximum slew Settling time sampling theory assumes rate of 4669 steps per that the samples have Figure 6a—A sample-hold circuit holds a steady value while the ADC completes a conversion. sample. A 4.85-ns timing infinitesimal width. b—The settling time and the amount of droop during the conversion are important characteristics. error produces a one- c—A track-hold circuit can hide the output glitches of a DAC. d—However, the output signal is However, because an quant error here. delayed by the length of the settling time. impulse function has a

74 Issue 99 October 1998 Circuit Cellar INK® Figure 7—Fourier transform pairs show the relationship Time Domain Fourier Frequency Domain Transform between a time-domain a) signal and its spectrum for a single impulse, which has a flat spectrum (a), an im- Impulse function t f pulse train, which has a Flat spectrum periodic spectrum (b), a b) rectangular pulse, which ∆ T 1/∆T has a sin(x)/x spectrum (c), and a rectangular pulse Train of impulses t f Harmonics all the same height train, which has a discrete version of the sin(x)/x ∆T c) spectrum (d). e—The output

1/∆T of a DAC is a modulated train of rectangular pulses. Rectangular pulse t f sin (x) Function x ∆T2 1/∆T2 1/∆T2 d) ∆T1

t f Train of rectangular pulses Harmonics following sin (x) x

e) Period

Modulated pulses t 1/period Harmonics with sideband

flat frequency response (see Figure 7a), pulses wide enough to completely fill a train of such impulses has a spectrum the interval between the samples, as that is a discrete version of a single indicated in Figure 7e. Because ∆T1 pulse as illustrated in in Figure 7b. equals ∆T2, the nulls of the sin(x)/x As Figure 7c shows, a rectangular curve fall exactly on the harmonics of pulse has a sin(x)/x spectrum. As the the sampling frequency, causing them pulse narrows, the spectrum widens. to disappear. In the limit, the pulse becomes the However, the signal represented by impulse function and the spectrum is the samples shows up in the frequency infinitely wide or flat. Figure 7d presents spectrum as sidebands around those a train of rectangular pulses with a harmonics, and they are attenuated by discrete version of the same spectrum. the sin(x)/x curve as well. To recover What does this have to do with a the original flat spectrum, a filter with a DAC? As a designer, your concern is response opposite that of the sin(x)/x what the converter does in the time curve must be inserted into the path. between the instants defined by the Now that I’ve reviewed many of the samples. The math assumes the func- fundamental issues of A/D and D/A tion is zero between those instants, converters, you’re well equipped to but real-world converters do some discuss specific converter technologies kind of interpolation. next month. I First-order interpolation draws a straight line between one sample and David Tweed has been developing the next. Second-order interpolation hardware and real-time software for use a quadratic function, in which microprocessors for more than 22 higher orders of interpolation use years, starting with the 8008 in 1976. higher orders of polynomial functions. His system design experience includes In fact, most converters hold a computer design from supercomputers value until the next sample comes to workstations, microcomputers, along. This technique is called zero- DSPs, and digital telecommunications order interpolation, zero-order hold, systems. David currently works at or sin(x)/x correction. Aris Technologies developing digital Mathematically, you can treat the audio watermarking. You may reach DAC output as a series of rectangular him at [email protected].

Circuit Cellar INK® Issue 99 October 1998 75 generators, it wasn’t long before per- FROM THE formers were asking, “Why can’t all MIDI this stuff work together?” That’s how standards are born from BENCH the bottom up. The MIDI (musical instrument digital interface) standard was first discussed in the ’70s, yet it took almost 10 years to develop into a Jeff Bachiochi plan manufacturers could agree with.

MIDI PROTOCOL The MIDI protocol was designed to standardize the control of sound synthe- Part 1: It Ain’t Just for sis without encroaching on how manufacturers designed synthesis circuitry. Each manufacturer could recognize Music Anymore (or produce) control data complying with the standard. Pitch, note on/off, and pitch bending describe functions relating to sound modifiers without delving into the synthesis circuitry. The physical interface necessary Ever y first job in the for interconnecting MIDI devices is m electronics field was defined in the standard and is easily think of with one of the pioneer (and cheaply) implemented. It uses manufacturers of analog five-pin DIN connectors. turning synthesizers, Electronic Music Laborato- Three pins are used on the MIDI out ries. EML began producing laboratory- side. Pin 2 is the cable shield, pin 4 is your PC grade oscillators, filters, modulators, +5 V through a 220-Ω resistor, and pin and envelope generators in the late ’60s. 5 is an open-collector output from a into a Early analog synthesizers were pro- UART that can drive up to 50′ of cable. grammed with patch cords connecting On the MIDI in side, pin 4 (power) recording studio? This individual modules. The modules were connects to an optocoupler’s anode, controlled by turning knobs to raise or and pin 5 (serial data) connects to the month, Jeff starts a lower pitch, timbre, and loudness. cathode. The cable shield (pin 2) is left A natural progression led to using a unconnected to the MIDI in system, project that lets you more recognizable control device—the preventing ground loop problems. The keyboard—to alter sounds. You may be optocoupler’s output drives the MIDI identify the state of familiar with the Moog synthesizer. in’s UART and a second five-pin DIN Next, the personal-computer market (the MIDI thru). outputs through the began spreading its wings. Radio Shack The optocoupler prevents direct and Commodore released competing electrical contact between systems, sound you create computers. while the MIDI thru allows for the At this point, analog synthesizers daisy-chaining of instruments. using the MIDI and digital personal computers were MIDI transmissions are similar to about as far apart as possible. But, that standard asynchronous data transmis- sequencer program. gap narrowed until digital effectively sions of 8N1. The catch is the data replaced analog synthesizers. To this rate, which is 31.25 kbps. day, however, you find synthesizer If this rate doesn’t ring any bells, owners who swear by older analog I’m not surprised. It’s not a standard technologies, much like audiophiles data rate but somewhere between the who claim that LPs are superior to CDs. more familiar 19.2 kbps and 38.4 kbps. Digital synthesizers meant a com- Why this number? Remember the fortable marriage between the growing MIDI standard goes back to the infancy complexity of sound synthesis and the of personal computers. At that time, ease of controlling that environment. UART chips couldn’t do the high data With the abundant supply of various rates we’re accustomed to today. This computer platforms and digital sound rate was the fastest they dared.

76 Issue 99 October 1998 Circuit Cellar INK® and data bytes. The data format depends Status byte / 1st Data byte 2nd Data byte 3rd Data byte on the status byte. Table 1 gives a partial list of status and data bytes. 80…8F Chan 1…16 Note number 0–127 Note velocity 0–127 Many of the last status bytes (F0– Note off FF) are common real-time system 90…9F Chan 1…16 Note number 0–127 Note velocity 0–127 messages. They require no data bytes Note on A0…AF Chan 1…16 Note on, Note number Aftertouch 0–127 and are normally followed by a new Polyphonic 0–127 status byte. B0…BF Chan 1…16 Function 0–127 Value 0–127 Some meta-events also begin with Control/Mode change FF. But because they contain additional C0…CF Chan 1…16 Program 0–127 None Program change data, they can’t be confused with a sys- D0…DF Chan 1…16 Value 0–127 None tem message since the character after FF Aftertouch won’t have its most significant bit set. E0…EF Chan 1…16 LSB 0–127 MSB 0–127 When a header or track chunk Pitch wheel control F0 System exclusive Vendor ID Data...Data includes a length, a special format F1 Undefined None None called variable-length quantity is used. F2 Song position LSB MSB The value is represented by four bytes. F3 Song select Song 0–127 None All but the last significant data byte F4 Undefined None None F5 Undefined None None has its eighth bit set to a 1. F6 Tune request None None To determine the double word’s F7 End of System None None actual value, drop all four of the most exclusive (EOX) significant bits and right-justify the F8 Timing clock None None F9 Undefined None None remaining 7-bit data into a 28-bit FA Start None None value (talk about overcomplexity!). FB Continue None None FC Stop None None SOUND CARDS FD Undefined None None FE Active sense None None Chances are, your PC isn’t silent. FF System reset None None PCs have evolved into multimedia devices, so most have sound cards Table 1—MIDI commands include status bytes (i.e., the first data bytes) and potential second and third data bytes. installed. Adapted from D. Valenti, “MIDI by the Numbers,” Electronic Musician, February, 1988. That sound card came with a bunch of utilities. One of the first things you MIDI FILE FORMAT word describes how information is may have done was personalize your The sequence of events composing handled. If the division’s most signifi- PC with sound (.WAV) files—perhaps the mechanics of a performance—live cant byte is positive, the division value as simple as a dong when a file is with MIDI output or manually scored is the delta-times equal to a quarter opened, or as elaborate as Captain Kirk through a MIDI editor—can be saved to note. If it’s negative, it indicates the asking Scotty for more power. a file. These recorded instructions can number of frames per second. The least Sound cards let you play audio files recreate the performance whenever significant byte is the number of divi- and CD music from your machine’s CD they’re played into a MIDI instrument. sions in the frame. player. They also enable audio recording, The MIDI file format is an important Track chunks follow the header sampling the audio at a high rate, and part of the standard. I’ll just touch on chunk and contain status (function) producing memory-intensive .WAV files. some main points here so we can make use of it. For more information, Note Number examine the complete MIDI standard. Octave The MIDI file format consists of a Number C C# D D# E F F# G G# A A# B header chunk followed by track chunks. A chunk is a packet of information. –1 0 1 2 3 4 5 6 7 8 9 10 11 0 121314151617181920212223 The header chunk consists of the 1 242526272829303132333435 length (double word), the format (word), 2 363738394041424344454647 ntraks (word), and division (word). The 3 484950515253545556575859 double-word length shows the number 4 606162636465666768697071 5 727374757677787980818283 of data bytes to follow. The format 6 848586878889909192939495 word is 0, 1, or 2, indicating a single 7 96 97 98 99 100 101 102 103 104 105 106 107 track, simultaneous tracks, or sequen- 8 108 109 110 111 112 113 114 115 116 117 118 119 tially independent tracks. 9 120 121 122 123 124 125 126 127 The number of ntraks tells how Table 2—The MIDI specification only defines note number 60 as middle C, and all other notes are relative. The many chunks are in a file. The division absolute octave number designations shown here are based on middle C = C4, which is an arbitrary assignment.

Circuit Cellar INK® Issue 99 October 1998 77 Today, many sound-card manufacturers implement MIDI as well. A MIDI sequencer program is usually bundled with the drivers accompanying the card. MIDI files are generally smaller than .WAV files. They contain only the notes to play and when to play them, not how they should sound (that’s a job for the MIDI instrument). The sequencer program turns your PC into a recording studio. It contains three basic parts—the score, the MIDI list, and the mixer. With these tools, you can record a performance from a MIDI instrument via the Figure 1—The MIDI animator uses a MIDI interface, save it, edit 16-MHz clock for 250-ns instruction it, and play it back through times. the sound card (used as a MIDI instrument) or through an external instrument via the MIDI if you’re still with me, you may won- which has the required UART and interface. der where I’m going with this. Well, plenty of I/O bits (see Figure 1). I use Or perhaps you’d like to write music. this bit of background is necessary for 15 I/Os as outputs (one for an LED) The score tool displays the MIDI perfor- my project. After all, what’s a controller and seven as inputs (five for configura- mance in black on white. That’s black without a control language? tion, one for zero crossing, and the RX notes on a white page, including the Your MIDI sequencer is the conduc- input for MIDI input). musical terms necessary for scoring the tor in control of the MIDI animator. All 14 control outputs will be PWM. complete performance. This project enables you to determine I chose to use PWM so they can serve Although a live performance is auto- the state of outputs via the musical as both digital outputs (at 0% and matically scored, you can start writing score you prepare using the MIDI 100%) and as pseudoanalog outputs music with a blank score. Just click sequencer. More on this later. First for phase control of lighting. on the notes and place them on the the hardware. Use the zero-crossing input to sync musical staff. But don’t expect random up with the AC line. If it isn’t used, notes to sound like real music. It takes MIDI ANIMATOR the software detects its absence during many long hours to learn this skill. To receive MIDI commands, one powerup, and the internal timer runs I hope you’re not reading this be- must be able to receive a serial bit- with no sync at a slightly slower rate. cause you wish to be a composer. And stream of 31.25 kbps. Using a processor Configuration jumper 4 chooses without a hardware PWM or a modified RC servo mode. UART requires a bit In RC servo mode, all outputs are 1– • B4 (71) output C6 (space 6) –—–•––– A4 (69) output B6 (line 6) polling time of 32 µs. 2-ms pulses, which supports 0–180° • G4 (67) output C5 (space 5) By the time the sam- (or 0–90°) control of the common RC ––––––––———–—•——– F4 (65) output B5 (line 5) pling code is executed, actuators. • E4 (64) output C4 (space 4) there’s hardly any time Let’s see how this works. The ———–——–—•———–– D4 (62) output B4 (line 4) • C4 (60) output C3 (space 3) left between bits to MIDI output I’m interested in con- —————–•—————– B3 (59) output B3 (line 3) accomplish anything, tains note information. It comes in a • A3 (57) output C2 (space 2) not to mention dealing track chunk. —–——–•——————— G3 (55) output B2 (line 2) with a packet size of up Although any other MIDI com- • F3 (53) output C1 (space 1) —–—•——————–—— E3 (52) output B1 (line 1) to 128 characters. I need mands will be tossed out, I still have • D3 (50) output C0 (space 0) a hardware UART to to keep track of them to locate the ––•— C3 (48) output B0 (line 0) provide about 320 µs to ones I want. If a MIDI command’s do something useful in. channel number matches the jumper Figure 2—Here is the score for the MIDI animator. For simplicity, only the natural notes are used. The lines of the staff are used to output to one port, For this project, I selection I made on JP0–3, the com- and the spaces are used to output to the other port. chose a PIC16C63, mand is recognized as legal for this

78 Issue 99 October 1998 Circuit Cellar INK® Photo 1—The first step in this project is to display MIDI note commands. The seven-segment displays indicate legal hexadecimal commands broadcast over a MIDI interface.

That way, you can manually cycle through the buffer at your leisure without losing any data (assum- circuit, enabling ing it doesn’t overrun, which it prob- the user to control 16 MIDI ably will if you have a lot of activity). animator circuits with just one score. If the CFG4 input is held low, the Once the channel number is OK’d, display runs at full speed to keep up the note number identifies which with the buffer. output to act on. The musical score One of the decimal points serves as allows 0–127 notes. a separate visual indicator tied to the I implemented C3 (octave three) TX output. It flickers whenever the through B4 (octave four), which covers RX interrupt routine is entered, indi- seven spaces and seven lines of the cating that things are working well. standard treble-clef staff (see Figure 2). The receive character routine To keep the scoring simple, I didn’t use checks to make sure the received sharps or flats. Table 2 lists available character has no framing or overrun notes and their corresponding outputs. errors, and it places the received char- Each note has an accompanying acter into the ring buffer. At this point, velocity value. Normally, this value is we’re not trying to interpret the data. 64 (for instruments without velocity We just want to grab and display it. or aftertouch). I use this as the on (100%) indicator. Zero indicates off UNCONCLUSION (0%). Numbers between 0 and 64 Next month, I’ll discuss the PWM translate into a PWM output relative and servo-control feature and what to the value. devices you might want to add to the outputs. Here’s your chance to start MIDI MONITOR experimenting with your computer. It’s always nice to have some small This interface allows for all kinds of successes in a new design, but some- possibilities. Just think about it. I times you need to alter your direction somewhat. Going from concept to Jeff Bachiochi (pronounced“BAH-key- finished form in one step can be more AH-key”) is an electrical engineer on frustrating when it doesn’t work. It’s Circuit Cellar INK’s engineering staff. more satisfying to have intermediate His background includes product design goals whenever possible. and manufacturing. He may be reached With 14 outputs available, I can at [email protected]. connect two seven-segment displays and output any characters received as a two-digit hex value, one digit on each REFERENCES port. The code uses a look-up table to www.midi.org determine the state of the two 7-bit www.harmony-central.com/MIDI outputs for the upper and lower nctnico.www.cistron.nl/midi.htm nibbles of the UART’s receive buffer. Since the characters come in faster SOURCE than you can see them, a ring buffer holds the characters until they are PIC16C63 called for by using the CFG4 jumper. Microchip Technology, Inc. The display routine samples the (602) 786-7200 CFG4 input and waits for a low before Fax: (602) 786-7277 displaying the next character. www.microchip.com

Circuit Cellar INK® Issue 99 October 1998 79 With the recent unveiling of the MultiMedia Card (MMC, shown in SILICON Photo 1) by SanDisk and Siemens, it’s a good time to check out the flash data- UPDATE card niche. But first, a bit of history. Back in November ’96, I described the battle between SanDisk Compact- Flash (CF) and the Intel-backed Miniature Tom Cantrell Card (“Flash Fight Flares,” INK 76). Since then, it’s safe to say that Compact- Flash is clearly winning. In particular, widespread adoption of CF in the emerging digital camera MegaMicro Card market bodes well for the future. CF is designed into dozens of models, and SanDisk shipped more than a million CF cards in ’97. Until now, acceptance of these cameras has been held back by limited resolution. However, the emergence of mega-pixel models under $1000, not to mention low-cost, photo-grade, inkjet In the o place is printers are harbingers of big biz down n Moore’s Law more the road. world of rigidly enforced than in Then, in August ’97, I covered the the memory market. The serial flash module from a startup called data flash name of the game: make it denser, smaller, Nexcom (“Serial Flash Busts Bit Barrier,” faster, and cheaper—or go home. INK 85). Checking up, I find that late cards, Hope, at least from the supplier’s last year the company, product line, and perspective, can be found in the historic single-transistor memory technology Tom fact that ever-lower priced bits are were acquired by Integrated Silicon quickly consumed. Program bloat gets Solutions Inc. (ISSI). compares MultiMedia much of the blame since it’s easy to These two articles set the stage for point the finger at some faceless pro- MMC, which can aptly be described as Card to Compact- grammer who couldn’t resist filling a hybrid that fills the gap between CF another meg with frivolous features. and the Nexcom-now-ISSI module. Flash and Nexcom. But, exploding data is equally to Simply put, MMC combines multi- blame, and nobody’s forcing you to megabyte aspirations with minimalist His result bodes well stockpile all those TIFs, GIFs, JPGs, form factor, power consumption, and for the smaller, faster, and PDFs. interface. and more versatile MMC in a variety of handheld products.

Photo 1—Memory marches on, and the MultiMediaCard, which crams many mega- bytes into its miniscule package, proves it.

80 Issue 99 October 1998 Circuit Cellar INK® be finicky about battery TWINTERFACE Pin MMC SPI # Usage Usage SPI Description life. To that end, the One factor that really differentiates MMC adopts a number the MMC from CF is the interface. CF, 1 RSV CS Chip select (active low) of power-saving features. reflecting its PCMCIA roots, requires a 2 CMD DataIn Host-to-card commands To start, there’s no 5-V whopping 50 pins to support its 8-/ and data 3 VSS1 VSS1 Supply voltage ground option like the one offered 16-bit IDE-disk-drive–compatible bus. 4 VDD VDD Supply voltage with CF. Instead, the MMC Needless to say, the size and cost goals 5 CLK CLK Clock operates at a somewhat of MMC demand something more 6 VSS2 VSS2 Supply voltage ground lower voltage. streamlined, as in just seven signals. 7 DAT[0] DataOut Card-to-host data and status Actually, the card is As opposed to the expensive and Table 1—The MMC offers two interfaces (SPI and MMC) to enable a required to be able to mechanically precise pin-and-socket– price/performance tradeoff that covers a broad range of applications. establish basic communi- style connector of PCMCIA and CF, the cation with the host over MMC uses the surface-contact slide-in BIG & SMALL a wide 2.0–3.6-V range. This communi- approach like the Nexcom module. At only 32 mm × 24 mm (and 1.4 mm cation enables the host to interrogate A close look at Photo 1 shows that thick), the MMC footprint is barely 1 in.2, the card’s Operating Condition Regis- the socket power and ground contacts which is about half the size of CF. In ter (OCR), which defines the allowed are offset to connect first on insertion fact, the MMC occupies about the same voltage range (typically greater than and disconnect last on removal—a area as the Nexcom module, although 2.7 V) for memory access. basic requirement for hot swap. the aspect ratio is a bit more squarish. The amount of power consumed Taking power and dual grounds may However, where the Nexcom module during memory access isn’t trivial (e.g., leave only four pins to get the job done, topped out at a megabyte or so, MMC 35 mA at 3.3 V). However, the MMC but SanDisk manages to provide two starts at 2 MB and goes all the way to has a low-power standby mode that rather different ways of doing so (see 10 MB, with talk of 15- and 20-MB units cuts power by a factor of almost 1000 Table 1). in 1999 being bandied about. Meanwhile, (e.g., 50 µA at 3.3 V). I can imagine how the arguments CF is at 40 MB and headed to 80 MB. The host can overtly issue a command went. On one side, the purists arguing That is, MMC seems to be tracking at that causes the card to go into standby. for an elegant new interface offering about a quarter of the capacity of CF. However, it may not be necessary high speed and lots of neat capabilities. Besides obvious data-storage appli- because the MMC automatically puts On the other, pragmatists willing to cations like digital photos or voice itself to sleep after 5 ms of inactivity. dispense with the bells and whistles in recording, new ideas are emerging to There’s no need to reset the card or favor of something quick and easy to take advantage of flash-card technology. For otherwise go through hoops to get hook up to any micro. Tastes great or instance, a museum in Japan provides a going again. Even in standby mode, the less filling? Why not do both? hand-held audio player with a card storing card remains conscious enough to The purists get what they want with the equivalent of a tour guide. A change detect a subsequent command and the so-called MMC interface, which is in exhibits simply calls for updating wake itself up. Only a 1-ms delay is the default when the card powers up. the flash cards with the new info. required before the card is ready for Pragmatists can choose a simple SPI A subtle, but I suspect profound, the next read or write, as opposed to (i.e., clocked serial) interface that, at difference for MMC is the prospect of the 50-ms delay that is required after best, directly connects to the ever- read-only versions (i.e., ROM). Siemens powerup. growing list of so-equipped micros or, has announced 2- and 8-MB at worst, calls for a few lines units with plans for 32 MB of bit-banging code. in 1999 and a whopping MMC SPI How does the MMC know 128 MB by 2001. which interface to use? In Three-wire serial data bus Three-wire serial data bus This announcement (clock, command, and data) (clock, data in, and data out) MMC mode, pin 1 is a reserved opens the door for MMC and card-specific CS signal No Connect, but it’s defined as a medium for distributing Variable clock rate 0–20 MHz Variable clock rate 0–5 MHz as Chip Select (CS) for SPI software of all kinds, includ- Up to 64k cards addressable by Card selection via a hardware mode. At powerup, the MMC the bus protocol CS signal ing programs and reference Up to 30 cards stackable on a Up to 10 cards stackable on a card checks the CS pin and, if data such as maps, phone single physical bus single physical bus it’s asserted, switches the inter- books, and even music. Easy card identification Not available face from MMC to SPI mode. Siemens uses the analogy Error-protected data transfer Optional. A nonprotected data- In both modes, pin 5 is the is available transfer mode. that flash MMC is like a Sequential and single/multiple Single block read/write clock input generated by the hard drive, while ROM block-oriented data transfer host to time data transfers. MMC is like a CD-ROM. Data is referenced to the Table 2—Using the simpler SPI mode sacrifices some functionality related to The portable apps best addressing and multiblock data transfers. But, the difference between the modes falling edge of the clock. served by the small size of is an issue for designers, not users, because the card uses whichever interface is The difference between the the card are also likely to requested by the host it is currently plugged into. modes largely boils down to

Circuit Cellar INK® Issue 99 October 1998 81 Figure 1—The fact that MMC is toward lower operating voltages to a) low voltage only (2–3.6 V) may reduce power consumption and extend dictate the use of level shifters. One approach that works with a battery life. In situations where the 5-V SPI port uses transistor pairs MMC must connect to a 5-V device, level to (a) step up MMC outputs and shifters are required. Figure 1, taken (b) step down MMC inputs. from a SanDisk app note, shows transistor pairs configured to step up and b) step down a 5-V SPI interface. SMARTS ONBOARD SanDisk sticks with the strategy of using an onboard intelligent controller in front of the memory chip. Their success in the marketplace is the best argument for adding a controller the last two pins. For MMC mode, they Finally, the MMC mode offers faster which, despite the cost penalty, is function as bidirectional command raw transfer (20 MHz vs. 5 MHz for SPI). more than offset by various benefits. (CMD) and data (DAT) lines, while for However, the advantage of the higher The controller goes out of its way to SPI they are unidirectional data lines speed is mainly found with the multi- help preserve data integrity, incorporating (DIN and DOUT). Also, the MMC CMD block and streaming modes. The actual functions like internal ECC, CRC, bad line switches between open-collector throughput is ultimately limited by sector mapping, and wear-dependent and push-pull output configuration, memory bandwidth: 1 MBps for reads write algorithms (write endurance is while SPI is push-pull only. Table 2 and 200 kBps for writes. 300k cycles). Because the card handles sums up the functional differences The fact that the MMC doesn’t have these important functions, you don’t between the modes. a 5-V option is evidence of the trend have to fuss with them. While SPI requires a CS line for each card, MMC mode uses an addressing SPI Index scheme that supports, logically at least, Cmd Mode? Abbreviation Description up to 64K cards in a stack. Here’s how. Each card has a unique 128-bit card CMD0 Y GO_IDLE_STATE Resets all cards to idle state ID (CID) register. In response to an CMD1 Y SEND_OP_COND Request and confirm operating conditions ALL_SEND_CID CMD2 N ALL_SEND_CID Request all cards send their ID number broadcast from the CMD3 N SET_RELATIVE_ADDR Assign 16-bit relative card address (RCA) host, all attached MMC cards try to CMD4 N SET_DSR Select output driver configuration drive their own CID on the CMD line CMD7 N SELECT/DESELECT_CARD Select addressed (RCA) card (open-collector mode), and each simul- CMD9 Y SEND_CSD Request addressed card to send CSD data CMD10 Y SEND_CID Request addressed card send ID number taneously monitors the line for com- CMD11 N READ_DAT_UNTIL_STOP Stream read parison. Any time a card outputs a 1 CMD12 N STOP_TRANSMISSION Stop stream read but sees a 0, it backs off (i.e., quits CMD13 Y SEND_STATUS Request addressed card send its status sending its CID). CMD15 N GO_INACTIVE_STATE Set addressed card to inactive CMD16 Y SET_BLOCKLEN Set block length for block commands By the time the host clocks in the CMD17 Y READ_SINGLE_BLOCK Read a single block last bit of CID, only one card is left CMD18 N READ_MULTIPLE_BLOCK Read multiple blocks standing. The host proceeds to assign CMD20 N WRITE_DAT_UNTIL_STOP Stream write that card a 16-bit relative card address CMD24 Y WRITE_BLOCK Write a single block CMD25 N WRITE_MULTIPLE_BLOCK Write multiple blocks (RCA) that is used for the duration of CMD26 N PROGRAM_CID Program card ID (factory use only) the session. CMD27 Y PROGRAM_CSD Protection writable bits of CSD register The host keeps issuing ALL_SEND_ CMD28 Y SET_WRITE_PROT Protection on for addressed group CID commands. Cards that have gotten CMD29 Y CLR_WRITE_PROT Protection off for addressed group CMD30 Y SEND_WRITE_PROT Request card protection status their RCA remain quiet. Eventually, all CMD32 Y TAG_SECTOR_START First sector in erase list cards have an RCA and the last issued CMD33 Y TAG_SECTOR_END Last sector in erase list command times out, signaling comple- CMD34 Y UNTAG_SECTOR Remove sector from erase list tion of the ID phase. CMD35 Y TAG_ERASE_GROUP_START First group in erase list CMD36 Y TAG_ERASE_GROUP_END Last group in erase list Another major difference is that CMD37 Y UNTAG_ERASE_GROUP Remove group from erase list MMC mode, thanks to the ability to CMD38 Y ERASE Erase all previously selected sectors overlap commands and data, offers CMD39 Y FAST_IO Access app-specific (non-MMC) registers terminate-at-will multiblock and CMD40 N GO_IRQ_STATE Enter interrupt mode CMD59 Y CRC_ON_OFF Enable/Disable CRC (SPI mode only) streaming transfer modes. SPI handles everything as a single-block transfer Table 3—The MMC command set offers dozens of high-level commands dealing initialization and configura- with predetermined length. tion, data transfer (block, multiblock, and stream), and erasure and write1 protection.

82 Issue 99 October 1998 Circuit Cellar INK® Perhaps the most important STACK THE DECK Write benefit of the separate-control- Protect If you think the MMC is an Erase Erase Erase Group ler approach is that it decouples Group 0 Group 1 Group 31 ace, a good place to see more the host-system hardware and is the recently formed Multi- software design from the particu- Media Card Association. lars of the underlying memory Sector 15 You’ll find late-breaking info technology. . . . Write and links to members like . . . Protect The host issues high-level . . . Group SanDisk, Siemens, Hitachi, . . . commands like read, write, erase, . . . Motorola, Nokia, and others. and so forth, and the controller A $340 evaluation kit from handles the details. This means SanDisk comes with a 20-MB today’s design will work with 512–1023 MMC card, PC parallel port tomorrow’s MMC cards, no 0–511 0–511 MMC drive, extender card, matter what kind of esoteric and the requisite software memory technology finds its Sector 0 utilities and documentation. way under the hood. Figure 2—The basic unit of storage on an MMC card is called a sector, The MMC is less PC-centric Along with the IDE-disk but that’s about the extent of any resemblance to a disk drive. than earlier cards, and it targets drive pretensions, the rigid many nonPC-related apps. adherence to disk nomenclature (cylinder, Table 3 summarizes the commands But, there’s no denying the PC is often head, etc.) that characterized the earlier that are handled by the MMC. The at least one, if not the ultimate, desti- card’s interface is fading. Other than subset of commands related to multi- nation for just about all data. the fact that the basic building blocks block transfer and software addressing Unlike earlier disk cards, MMC can’t are 512-byte sectors, the organization aren’t available in SPI mode, as I de- piggyback on the PC’s built-in IDE isn’t really much like a disk at all. scribed earlier. All of the commands support. To make MMC look like a Instead, the memory is partitioned are six bytes in length, while responses disk, you need flash-file system software. as shown in Figure 2. The smallest vary from 1 to 16 bytes, depending on SanDisk offers a $2545 host developers amount that can be erased defines a the command as well as on which in- toolkit containing the C source for a sector. An erase group comprises 16 terface is being used. FAT (file allocation table) file system. sequential sectors. A single erase command can zap an arbitrary selection of the sectors (i.e., any or all of the 16) within an erase group or an arbitrary selection of erase groups. The process involves tagging the start and end of a sequence of sectors or erase groups, untagging those (up to 16) that aren’t to be erased, and then issuing the erase command. A write-protect group, the smallest individually protectable unit, is composed of 32 erase groups. Plus, two card-level write-protect bits—one temporary and one permanent—offer global protection. There’s a permanent copy bit that is presumably intended to combat piracy. However, protection seems to depend on trusted software on the host or programmer, because the copy-bit setting doesn’t otherwise affect card operation. The global write- and copy-protection bits are found in the CSD (card-specific data) register which, like the previously mentioned CID and OCR (voltage profile) registers, defines various card- unique parameters such as speed, power requirements, and partitioning (i.e., block, sector, group, device sizes).

Circuit Cellar INK® Issue 99 October 1998 83 pc_cluster_size Return cluster size pc_rmdir Delete a directory pc_diskabort Abort operation pc_set_attributes Set file attributes pc_dskclose Flush FAT and files and free buffers pc_set_cwd Set current working directory pc_diskflush Flush FAT and files pc_set_default_drive Set default drive specifier pc_format Format card pc_stat Get file or directory statistics pc_free Return bytes free on card pc_unlink Delete a file pc_fstat Return statistics on open file po_close Close a file pc_gdone Free pc_gfirst and pc_gnext resources po_extend_file Extend a file pc_get_attributes Get file attributes po_flush Write a file directory entry and flush FAT pc_gfirst Return first entry in a directory po_lseek Move the file pointer pc_gnext Return next entry in a directory po_open Open a file pc_isdir Test if path is a directory po_read Read from a file pc_mv Rename a file or directory po_truncate Truncate a file pc_pwd Return the current working directory po_write Write to a file

Table 4—The SanDisk host-developers toolkit software provides a FAT file system–compatible Application Programmers Interface (API).

Porting the driver to a design starts GIGANANOCARD? SanDisk offers 2-, 4-, and 8-MB cards with writing a minimal set of low-level Compared to older cards, MMC is a at $26, $32, and $43 in volume (for hardware-specific drivers that estab- better fit with the form-factor, power- now, it looks like the formula is $3 per lish physical communication with the consumption, and cost requirements of MB + $20). As of today, capacity, price, MMC. A configuration file specifies a anything that purports to be handheld or both may hold back some applications. variety of options, such as buffer sizes, or fit in a pocket. But thanks to Moore’s Law, both con- whether to preerase when a file is deleted I especially like the simple, versatile cerns will diminish over time, broad- or extended (speeds subsequent writes), interface. It’s nicer to deal with a few ening MMC acceptance and design-in. MMC or SPI interface, and so on. pins rather than the 50+ of earlier The interesting question is, what Put it all together, and you end up cards. Thanks to SPI mode, the card is happens next? History would predict with an API (see Table 4) that knows easily managed by the lowliest proces- that another downsizing lies around about disks, files and their attributes, sors, yet designs requiring performance the corner. The only problem is that directories, and so forth. can exploit the faster MMC mode. while silicon may shrink, people won’t. The wizards may get a zillion bits on the head of a pin, but that doesn’t mean it’s wise. Make the thing much tinier, and you’ll need a magnifying glass and tweezers to boot up. I

Tom Cantrell has been working on chip, board, and systems design and marketing in Silicon Valley for more than ten years. You may reach him by E-mail at tom.cantrell@circuitcellar. com, by telephone at (510) 657-0264, or by fax at (510) 657-5441.

SOURCES MultiMedia Card SanDisk Corp. (408) 542-0500 Fax: (408) 542-0503 www.sandisk.com Serial flash module Integrated Silicon Solutions, Inc. (408) 588-0800 (408) 588-0805 www.issiusa.com MultiMedia Card Assn. (408) 253-0441 Fax: (408) 253-8811 www.mmca.org

84 Issue 99 October 1998 Circuit Cellar INK® PRIORITY INTERRUPT

Banking on Bugs

really have to be more careful about destroying my image. After all, if perception is 99% of reality, why mess with people’s perception? i It all started at a party. It was your basic, eat, drink, and be merry, business-acquaintance get-together where people split off into little groups to discuss subjects that typically require a two-cocktail prologue. “So, Steve, I’m told you’re a magazine publisher?” I’m not sure what smelled stronger, the smoke from the London broil on the grill or his martini breath. The problem with all these “get to know ya” business parties is that inevitably you are asked a question about professional rank by a person who can’t conceivably understand the answer. When you’ve been self-employed as long as I have, you can pretty much call yourself anything you want—President, Engineer, Salesman, Publisher, Editorial Director, even Janitor. When an investment banker has had a couple martinis and asks if you’re a magazine publisher, you definitely have to be careful. Just like there are people who think food comes from grocery stores, there are professional people who use computers every day without ever considering how they’re designed or manufactured. Experience has taught me that these people associate the word publishing with McGraw-Hill, Time, and Rupert Murdock. Ultimately, it’s counterproductive to shatter their lofty image with cold reality. I’d love to say (even just once), “I’m the janitor,” but usually I cop out and simply say, “I’m involved a bit in publishing, but I really prefer to think of myself as a design engineer.” Thankfully, the information age has educated bankers so that I no longer have to add, “and I don’t build bridges.” Of course, now they think we’re all computer engineers (whatever that is), and to them, “computer” only means PCs! The conversation went back and forth a few times as I tried to explain about embedded control (definitely a mistake). He admitted that PCs certainly weren’t in everything, but he just couldn’t grasp the concept of single-chip computers in things like toasters and power tools. At this point, mere explanation was becoming a challenge. I passed my basting brush to the person closest to the grill and said to the banker, “Obviously, the only way is to show you. I have a microcontroller design over in the shop. Come on.” A half dozen people ended up trekking over to the workshop. As we descended the stairs a couple of them hesitated. I chose not to tell them why this project was located here and not in the Circuit Cellar. I didn’t want to confuse the issue. Soon it would become clear to them. The mixed clutter of electronic equipment, power tools, and carpentry devices presented an air of eclectic insanity. I could sense they were reconsidering their descent into the dungeon. “It’s OK, just step over that stuff. And, watch out for those wires! They’re probably live!” (They weren’t, but there are times when it’s just fun to say that, especially to bankers). We walked around a workbench and stopped in front of an equipment cart pilled high with electronics. An assortment of pulse generators, oscillators, and amplifiers were intertwined to produce a complex signal, which appeared as a rapidly changing sweep frequency on the brightly lit oscilloscope. (I didn’t even try to explain sweep frequencies or oscilloscopes to them.) They seemed hypnotized by the pulsating hum of the electronics combined with the strobe-like rhythm of the oscilloscope. That was, until one of the ladies yelled, “It’s full of insects!” Immediately, they jumped back. The banker looked at the 7′ plexiglass enclosure that was indeed full of six-legged critters. His startled expression said it all. Embedded control designers must be real fruitcakes. “No! You don’t understand. Yes, the case is full of insects! In fact, we used a bunch of rodents before that….” I could sense the hole getting deeper…. “That’s what we’re designing! Wait, that’s not what I mean!” I moved quickly to block their exit and explain, “A while ago we designed a commercial device that repels rodents. Inside it, there’s a microcontroller.” I held out a tiny chip in my hand. At least now I had their attention. “All this equipment simulates the signal that we squashed down into this chip. [Of course, you all know better but sometimes you have to lay it on thick for bankers.] Testimonials from customers said that it did work on rodents, but it also seemed to drive out the insects. We decided to test it.” There was a silent pause as everyone gazed at the festering bugs. “Don’t worry. They can’t escape [I hope].” Suddenly, my choice of location was clear to them. Who wants all these bugs in the house? Having assured them of the enclosure’s security, they began to relax a bit. They even conceded that testing a product was a commercial necessity. But as bankers and financial people, they just didn’t seem to grasp the significance of a dedicated microcontroller or the value in it. That was until the investment banker added, “So, does anybody buy this thing?” I looked at him and grinned, “How does 50,000 a month strike you!” It was like a universal language translator had just been introduced to the communication. Embedded microcontrol was instantly understood as high volume and big bucks. Added explanation was unnecessary. As we walked back to the party, the banker seemed a little more animated. Obviously, my not being a publishing tycoon was acceptable. He smiled as he elbowed a little closer and whispered, “So, Steve, you need any money?”

[email protected]

96 Issue 98 September 1998 Circuit Cellar INK®