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Modeling the Physics of RRAM Defects Modeling the physics of RRAM defects A model simulating RRAM defects on a macroscopic physical level T. Hol Modeling the physics of RRAM defects A model simulating RRAM defects on a macroscopic physical level by T. Hol to obtain the degree of Master of Science at the Delft University of Technology, to be defended publicly on Friday August 28, 2020 at 13:00. Student number: 4295528 Project duration: September 1, 2019 – August 28, 2020 Thesis committee: Prof. dr. ir. S. Hamdioui TU Delft, supervisor Dr. Ir. R. Ishihara TU Delft Dr. Ir. S. Vollebregt TU Delft Dr. Ir. M. Taouil TU Delft Ir. M. Fieback TU Delft, supervisor An electronic version of this thesis is available at https://repository.tudelft.nl/. Abstract Resistive RAM, or RRAM, is one of the emerging non-volatile memory (NVM) technologies, which could be used in the near future to fill the gap in the memory hierarchy between dynamic RAM (DRAM) and Flash, or even completely replace Flash. RRAM operates faster than Flash, but is still non-volatile, which enables it to be used in a dense 3D NVM array. It is also a suitable candidate for computation-in-memory, neuromorphic computing and reconfigurable computing. However, the show stopping problem of RRAM is that it suffers from unique defects, which is the reason why RRAM is still not widely commercially adopted. These defects differ from those that appear in CMOS technology, due to the arbitrary nature of the forming process. They can not be detected by conventional tests and cause defective devices to go unnoticed. Therefore, new tests need to be developed that properly include the physics of a defective device in a RRAM model. Device-aware testing (DAT) is the state-of-the-art solution to this problem. By accounting for the unique physics of an RRAM device, DAT is able to detect unique RRAM defects. However, DAT bases its results on relatively compact electrical models, which do not account for randomness present in e.g. the forming of the filament and local temperature fluctuations. Meanwhile, many low-level physical models exist already that can model this randomness and provide accurate insights into the physical specifics of RRAM. These models do, however, hardly ever analyze the effects of defects. The contribution of this work is to expand and improve one of the state-of-the-art physical models to analyse manufacturing defects on a low, near atomic-level scale. For the first time, the characteristics of a defect can be described in the physical shape of the defect, rather than only the electrical consequences of a black box device. This enables deep level analysis and characterization of defects, the results of which improves DAT to detect even more unique defects. The model is applied to four types of RRAM-related defects: oxygen vacancy density fluctuation, oxide thickness variation, electrode roughness, and contamination by impurities. The effect of the defects on the conductivity of the device are observed and explained, and their unique non-linear behavior is confirmed by simulation. Finally, a discussion is presented which criticizes the reproducability of the referenced defect-free model, but also shows the potential of this work’s model to be improved. Dynamic defects are not yet included, but the model does provide a static characterization of unique RRAM defects, improving the quality of DAT. iii Preface After a year of collecting information, understanding theoretical physics, but mostly attempting different implementations, this thesis is finally finished. The great majority of the time spent on this work was trying again and again to generate realistic results, taking advice from so many sources and great people - and then still, failing again and again. Thus, eventually a decision was made to report the parts of the model that produced the most realistic results and draw a conclusion. Furthermore, the better half of the thesis process had to be done at home, due to the currently still active global pandemic. This definitely did not aid productivity and contributed to the unfortunately unfinished nature of this work. Nevertheless, it is now done, and I have a lot of people to thank for keeping up with me through the last year: first of all, my supervisor Moritz, who was always present to provide me with valuable feedback, help, pointers, and papers. Then, my thesis advisor Said Hamdioui, for always keeping my eyes on the impor- tant parts. Thanks to Ryoichi Ishihara, who helped me understand the concept of phonons and tunneling, and getting me in touch. Also, many thanks to Gennadi Bersuker and Luca Larcher, who, even though they didn’t have the required information, still helped me as much as they could. Finally, I thank my parents for never giving up on me, even though I often wanted to, and all my friends at the Delft choir and orchestra for providing me with the music everyone needs in life. T. Hol Delft, August 2020 v Contents 1 Introduction 1 1.1 Motivation............................................1 1.2 State of the Art..........................................2 1.3 Contribution of this work.....................................2 1.4 Outline..............................................3 2 Background 5 2.1 Memory in computing......................................5 2.2 Emerging memory technologies and RRAM design........................7 2.3 RRAM manufacturing process.................................. 12 2.4 Defects.............................................. 14 3 State of the art 17 3.1 RRAM defect modeling...................................... 17 3.2 Classification of defect-free RRAM models............................ 19 3.3 Macroscopic models....................................... 21 3.4 Comparison and defect-free model choice............................ 24 4 Model implementation 25 4.1 Overview of the model structure................................. 25 4.2 General modules......................................... 28 4.3 Solving the discrete Poisson equation in 3D............................ 30 4.4 Calculating the current: the charge transport model....................... 34 4.5 Determining state change: the kMC engine............................ 51 4.6 Injection of defects in the model device.............................. 54 5 Validation of model 59 5.1 Validating the solution of the 3D Poisson equation solver..................... 59 5.2 Validating the calculated device current.............................. 61 5.3 Validating the events that change the model state......................... 64 5.4 Validating the full model..................................... 68 6 Defect analysis 79 6.1 Experimental setup........................................ 79 6.2 Results.............................................. 81 7 Discussion 87 8 Conclusion 89 Bibliography 91 A Model default properties 99 vii 1 Introduction 1.1. Motivation Almost 50 years ago, Chua theorized the existence of the memristor as the fourth fundamental electronic component next to resistors, capacitors and inductors [24]. It was considered to be just a theoretical ex- pansion of the already existing passive elements, until not too long ago HP Labs claimed to be the first to create a device that exhibits the characteristics of a memristor [86]. Since then, the applications of memris- tors, named “memristive devices”, have been explored extensively [85, 95, 101]. These applications include computation-in-memory [34, 60, 104], synaptic neuromorphic computing for neural networks [23, 49], re- configurable computing [25, 107] and reconfigurable physical unclonable functions [17]. One of the most ex- tensively explored applications of memristive devices, however, is the implementation as Non-Volatile Mem- ory (NVM) [53,64,68, 101]. Figure 1.1: A schematic representation of the layout of a memristive crossbar memory [101]. Dense crossbar structures of these devices [53] are speculated to be able to contend with existing 3D NAND flash, given their comparable feature size, but faster read and write times [68, 101]. A schematic representation of a crossbar memory is displayed in Figure 1.1. This layout makes the devices usable as non-volatile Random Access Memory (RAM). The most prominent three of these technologies [101] are Spin- Transfer-Torque Magnetic RAM (STT-MRAM) [52], Phase-Change RAM (PCRAM) [98] and Resistive RAM (ReRAM or RRAM)[97]. The first two exhibit resistance switching, but are not true memristors. However, the last one, RRAM, behaves like a memristor and can therefore also be used for applications apart from NVM as cited before. RRAM is based on the formation and rupture of a conductive filament through an oxide, a mechanism which was known for a long time already [45] and was also the mechanism behind HP’s first memristive de- vice [86]. A notable advantage of RRAM over other emerging NVM technologies is the fact that it can be 1 2 1. Introduction integrated in the back end of line (BEOL) process of existing CMOS technology [97] and is therefore the lead- ing candidate for large-scale commercial use. The manufacturing process of RRAM involves a controlled dielectric breakdown of an oxide [97]. Applying a reverse bias to this filament reoxidizes part of the filament, whereas applying a forward bias recreates the dielectric breakdown in the oxidized part. This changes the conductive properties of this device and allows it to switch between a High Resistance State (HRS) and a Low Resistance State (LRS). Unfortunately, the formation of a filament occurs randomly and abruptly, causing much variability in the resistances of the two states of the device
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