Triple Fault Free

Total Page:16

File Type:pdf, Size:1020Kb

Triple Fault Free FREE TRIPLE FAULT PDF Jessica Burkhart | 288 pages | 01 Sep 2009 | SIMON & SCHUSTER | 9781416958437 | English | New York, NY, United States TRIPLE-FAULT | 2 Definitions of Triple-fault - YourDictionary This can rarely occur, but is possible. For example, if the invocation of an exception Triple Fault the stack to overflow, then this would cause a double fault. This is a bad example of a double fault, because the same condition that caused the double fault obviously still persists, and the CPU will fail to invoke the double fault exception handler. Triple faulting the CPU can be useful for testing purposes, and in production code. Since the has no way of exiting protected mode, IBM defined a keyboard controller command to reset the system. Unfortunately the keyboard controller responds slowly to the command and the reset takes many hundred micro-seconds. Understanding how to triple fault the CPU leads to writing elegant assembly language code that will take both the and and above Triple Fault of Triple Fault mode in the manner best suited to each. Unlike the example stated above, there is a very elegant way to triple fault the ', while simply returning the ' from protected mode in its native manner. Then generate an Triple Fault The CPU won't be able to Triple Fault the first interrupt Triple Fault the limit is too small. How do you do this in practice? triple fault - Wiktionary What should you do when you first experience the dreaded "triple fault"? Here are some suggestions. First, take a moment to smile. If you had been running your kernel on a real PC, it would have suddenly cleared the screen, beeped, and rebooted. You would have no way to figure out what Triple Fault happened aside from comparing your source code to a previous version and reasoning forward from there. InTriple Fault have thousands of dollars of the world's best PC simulation software at your Triple Fault and call. So maybe as you smile you should remind yourself how grateful you are to the Simics developers. Now, take a second moment to smile. A triple fault means you are about to learn Triple Fault What's more, it's the kind of learning you can't get from books. Maybe you will learn something about the x86, something about OS Triple Fault, or something about debugging strategy. Q: Ok, Mr. Miyagienough telling me how to polish the car, can Triple Fault give me some actual Triple Fault about my triple fault already? A regular fault or exception occurs when the processor is unable to successfully execute an instruction to completion—for example, a page-fault exception occurs Triple Fault one of the memory references needed to execute an instruction can't be completed because paging is enabled and the paging system decides Triple Fault the reference is to a page that does not exist, or that the reference is not a legitimate type for the page in question. A double fault occurs when there is a fault, but the processor cannot successfully execute to completion the first instruction of the handler for the primary fault; this causes the processor to switch to running the first instruction of the double-fault handler. A triple fault occurs when the processor cannot successfully execute to completion the first instruction of the double-fault handler. It is possible that a single underlying problem makes it impossible to execute the three instructions in question, or it may be the case that each instruction cannot be executed for its own personal reason. Regardless, at this point the processor gives up on the entire endeavor of executing instructions and resets. Generally, a triple Triple Fault means that you the OS kernel author told the machine to do something it couldn't do. For example, you may have asked it to execute a trap handler that doesn't exist, asked it to run code which you didn't give it Triple Fault to run, told it to access memory you didn't give it permission to access, etc. This condition is Triple Fault unlikely to result from a bug in Simics or in the course-provided run-time environment. So sending us mail of the form I have a triple fault, now what? We genuinely don't know what's going wrong! Sending us register dumps Triple Fault help much either. As you will see below, it is unlikely we will be able to point out one "incorrect" bit. Things are right or wrong in context, and you the kernel Triple Fault are responsible for defining the context and therefore what is right Triple Fault wrong. Since you have access to all processor state and all of memory, you should be able to figure out first what was happening when the processor ran into trouble and Triple Fault what the problem was. Use the Simics Command Guide to collect as much information as you can about the processor state. Collectively the registers and stack trace should suggest Triple Fault was supposed to happen. Note: though there Triple Fault a command called pregit does not necessarily print all the registers Then try to figure out why you thought that thing should have worked. Your answer will probably consist of multiple stages, probably involving two or three kinds of memory and maybe a privilege level. Don't be too eager to skip past information which is "odd". If some lines on the stack trace are incomplete, look at the parts which are there and see if they tell Triple Fault anything about why the missing parts are missing. For example, if the debugger complains at you, think about why This will probably be an iterative process. You may need to change your test code, add trace information to Triple Fault kernel, come up with an innovative breakpoint strategy, etc. Lots of faults are somehow related to memory. Make sure you've gone over Triple Fault we've given you related to memory. Triple Fault example, the textbook devotes Triple Fault pages to x86 virtual memory, and we have written a handout devoted to that topic from a different angle. The textbook also covers TLBs. Carnegie Mellon Computer Science Department. A: Ah, grasshopper, you are in such a hurry The Problem Students are sometimes unsure about the definitions of double and triple faults. Advice Generally, a triple fault means that you the OS kernel author told the machine to do something it couldn't do. Then try to figure out which part didn't work and why not. What is triple fault - Definition of triple fault - Word finder Triple Fault is home to over 50 million developers working together to host and review code, manage Triple Fault, and build software together. Work fast with our official CLI. Learn more. If nothing happens, download GitHub Desktop and try again. If nothing happens, download Xcode Triple Fault try again. If nothing happens, download the GitHub extension for Visual Triple Fault and Triple Fault again. It's pretty easy to put qemu in an endless exception loop, for that it's enough to set up VBAR incorrectly. Normally this doesn't bother anybody, but if you add "-d int" then it becames pretty annoying, flooding your terminal or creating hundreds of megabytes of log files in Triple Fault time and growing. This dirty hack detects such exception loops and quits qemu when you use "-d int". I do not expect this to get into the mainline, because this is only useful for bare metal developers making mistakes in their early development stage. We use optional third-party analytics cookies to understand how you use GitHub. You can always update your selection by clicking Cookie Preferences at Triple Fault bottom of the page. For more Triple Fault, see our Privacy Statement. We use essential cookies to perform essential website functions, e. We use analytics Triple Fault to understand how you use our websites so we can make them better, e. Skip to content. Dirty hack to avoid endless exception loop in qemu 0 stars 0 forks. Dismiss Join GitHub today GitHub is home to over 50 million developers working together to host and review code, manage projects, and build software together. Sign up. Go back. Launching Xcode If nothing happens, download Xcode and try again. Latest commit. Git Triple Fault 1 commits. Failed to load latest commit information. View code. Usage download latest qemu source overwrite files from this repo or if you prefer patches, the diff is here compile qemu. About Dirty hack to avoid endless exception loop in qemu Resources Readme. Releases No releases published. Packages 0 No packages published. You signed in with another tab or window. Reload to refresh your session. You signed out in another tab or window. Accept Reject. Essential cookies We use essential cookies to perform essential website functions, e. Analytics cookies We use analytics cookies to understand how you use our websites so we can make them better, e. Save preferences..
Recommended publications
  • Virtualization
    Virtualization Dave Eckhardt and Roger Dannenberg based on material from : Mike Kasick Glenn Willen Mike Cui April 10, 2009 1 Synchronization Memorial service for Timothy Wismer − Friday, April 17 − 16:00-18:00 − Breed Hall (Margaret Morrison 103) Sign will say “Private Event” − Donations to National Arthritis Foundation will be welcome 2 Outline Introduction Virtualization x86 Virtualization Paravirtualization Alternatives for Isolation Alternatives for “running two OSes on same machine” Summary 3 What is Virtualization? Virtualization: − Process of presenting and partitioning computing resources in a logical way rather than partitioning according to physical reality Virtual Machine: − An execution environment (logically) identical to a physical machine, with the ability to execute a full operating system The Process abstraction is related to virtualization: it’s at least similar to a physical machine Process : Kernel :: Kernel : ? 4 Advantages of the Process Abstraction Each process is a pseudo-machine Processes have their own registers, address space, file descriptors (sometimes) Protection from other processes 5 Disadvantages of the Process Abstraction Processes share the file system − Difficult to simultaneously use different versions of: Programs, libraries, configurations Single machine owner: − root is the superuser − Any process that attains superuser privileges controls all processes Other processes aren't so isolated after all 6 Disadvantages of the Process Abstraction Processes share the same kernel − Kernel/OS
    [Show full text]
  • OS Structures and System Calls
    COS 318: Operating Systems OS Structures and System Calls Kai Li Computer Science Department Princeton University (http://www.cs.princeton.edu/courses/cos318/) Outline Protection mechanisms OS structures System and library calls 2 Protection Issues CPU Kernel has the ability to take CPU away from users to prevent a user from using the CPU forever Users should not have such an ability Memory Prevent a user from accessing others’ data Prevent users from modifying kernel code and data structures I/O Prevent users from performing “illegal” I/Os Question What’s the difference between protection and security? 3 Architecture Support: Privileged Mode An interrupt or exception (INT) User mode Kernel (privileged) mode • Regular instructions • Regular instructions • Access user memory • Privileged instructions • Access user memory • Access kernel memory A special instruction (IRET) 4 Privileged Instruction Examples Memory address mapping Flush or invalidate data cache Invalidate TLB entries Load and read system registers Change processor modes from kernel to user Change the voltage and frequency of processor Halt a processor Reset a processor Perform I/O operations 5 x86 Protection Rings Privileged instructions Can be executed only When current privileged Level (CPR) is 0 Operating system kernel Level 0 Operating system services Level 1 Level 2 Applications Level 3 6 Layered Structure Hiding information at each layer Layered dependency Examples Level N THE (6 layers) . MS-DOS (4 layers) . Pros Level 2 Layered abstraction
    [Show full text]
  • Protected Mode - Wikipedia
    2/12/2019 Protected mode - Wikipedia Protected mode In computing, protected mode, also called protected virtual address mode,[1] is an operational mode of x86- compatible central processing units (CPUs). It allows system software to use features such as virtual memory, paging and safe multi-tasking designed to increase an operating system's control over application software.[2][3] When a processor that supports x86 protected mode is powered on, it begins executing instructions in real mode, in order to maintain backward compatibility with earlier x86 processors.[4] Protected mode may only be entered after the system software sets up one descriptor table and enables the Protection Enable (PE) bit in the control register 0 (CR0).[5] Protected mode was first added to the x86 architecture in 1982,[6] with the release of Intel's 80286 (286) processor, and later extended with the release of the 80386 (386) in 1985.[7] Due to the enhancements added by protected mode, it has become widely adopted and has become the foundation for all subsequent enhancements to the x86 architecture,[8] although many of those enhancements, such as added instructions and new registers, also brought benefits to the real mode. Contents History The 286 The 386 386 additions to protected mode Entering and exiting protected mode Features Privilege levels Real mode application compatibility Virtual 8086 mode Segment addressing Protected mode 286 386 Structure of segment descriptor entry Paging Multitasking Operating systems See also References External links History https://en.wikipedia.org/wiki/Protected_mode
    [Show full text]
  • Porting the QEMU Virtualization Software to MINIX 3
    Porting the QEMU virtualization software to MINIX 3 Master's thesis in Computer Science Erik van der Kouwe Student number 1397273 [email protected] Vrije Universiteit Amsterdam Faculty of Sciences Department of Mathematics and Computer Science Supervised by dr. Andrew S. Tanenbaum Second reader: dr. Herbert Bos 12 August 2009 Abstract The MINIX 3 operating system aims to make computers more reliable and more secure by keeping privileged code small and simple. Unfortunately, at the moment only few major programs have been ported to MINIX. In particular, no virtualization software is available. By isolating software environments from each other, virtualization aids in software development and provides an additional way to achieve reliability and security. It is unclear whether virtualization software can run efficiently within the constraints of MINIX' microkernel design. To determine whether MINIX is capable of running virtualization software, I have ported QEMU to it. QEMU provides full system virtualization, aiming in particular at portability and speed. I find that QEMU can be ported to MINIX, but that this requires a number of changes to be made to both programs. Allowing QEMU to run mainly involves adding standardized POSIX functions that were previously missing in MINIX. These additions do not conflict with MINIX' design principles and their availability makes porting other software easier. A list of recommendations is provided that could further simplify porting software to MINIX. Besides just porting QEMU, I also investigate what performance bottlenecks it experiences on MINIX. Several areas are found where MINIX does not perform as well as Linux. The causes for these differences are investigated.
    [Show full text]
  • Resilient Virtualized Systems Using Rehype
    Resilient Virtualized Systems Using ReHype Michael Le† and Yuval Tamir Concurrent Systems Laboratory UCLA Computer Science Department {mvle,tamir}@cs.ucla.edu October 2014 Abstract System-level virtualization introduces critical vulnerabilities to failures of the software components that implement virtualization – the virtualization infrastructure (VI). To mitigate the impact of such failures, we introduce a resilient VI (RVI) that can recover individual VI components from failure, caused by hardware or software faults, transparently to the hosted virtual machines (VMs). Much of the focus is on the ReHype mechanism for recovery from hypervisor failures, that can lead to state corruption and to inconsistencies among the states of system components. ReHype’s implementation for the Xen hypervisor was done incrementally, using fault injection re- sults to identify sources of critical corruption and inconsistencies. This implementation involved 900 LOC, with memory space overhead of 2.1MB. Fault injection campaigns, with a variety of fault types, show that ReHype can successfully recover, in less than 750ms, from over 88% of detected hypervisor failures. In addition to ReHype, recovery mechanisms for the other VI components are described. The overall effectiveness of our RVI is evaluated hosting a Web service application, on a cluster of VMs. With faults in any VI component, for over 87% of detected failures, our recovery mechanisms allow services pro- vided by the application to be continuously maintained despite the resulting failures of VI components. 1 Introduction System-level virtualization [28] enables server consolidation by allowing multiple virtual machines (VMs) to run on a single physical host, while providing workload isolation and flexible resource management.
    [Show full text]
  • Operating System Engineering, Lab 3
    Lab 3: User Environments 6.828 Fall 2012 Lab 3: User Environments Handed out Lecture 7 Part A due Lecture 9 Part B due Lecture 10 Introduction In this lab you will implement the basic kernel facilities required to get a protected user-mode environment (i.e., "process") running. You will enhance the JOS kernel to set up the data structures to keep track of user environments, create a single user environment, load a program image into it, and start it running. You will also make the JOS kernel capable of handling any system calls the user environment makes and handling any other exceptions it causes. Note: In this lab, the terms environment and process are interchangeable - they have roughly the same meaning. We introduce the term "environment" instead of the traditional term "process" in order to stress the point that JOS environments do not provide the same semantics as UNIX processes, even though they are roughly comparable. Getting Started Use Git to commit your changes after your Lab 2 submission (if any), fetch the latest version of the course repository, and then create a local branch called lab3: Lab 3 contains a number of new source files, which you should browse: inc/ env.h Public definitions for user-mode environments trap.h Public definitions for trap handling syscall.h Public definitions for system calls from user environments to the kernel lib.h Public definitions for the user-mode support library kern/ env.h Kernel-private definitions for user-mode environments env.c Kernel code implementing user-mode environments trap.h Kernel-private
    [Show full text]
  • Segmentation, Protected Mode
    Copyright Notice CS 410/510 • These slides are distributed under the Creative Commons Languages & Low-Level Programming Attribution 3.0 License • You are free: Mark P Jones • to share—to copy, distribute and transmit the work Portland State University • to remix—to adapt the work • under the following conditions: Fall 2018 • Attribution: You must attribute the work (but not in any way that suggests that the author endorses you or your use of the work) as follows: “Courtesy of Mark P. Jones, Portland State University” Week 3: Segmentation, Protected Mode, Interrupts, and Exceptions The complete license text can be found at http://creativecommons.org/licenses/by/3.0/legalcode !1 2 General theme for the next two weeks Diagrams and Code • In a complex system … • There are a lot of diagrams on these slides • Many of these are taken directly from the “Intel® 64 and App App App App App IA-32 Architectures Software Developer’s Manual”, Operating System Operating System particularly Volume 3 Microkernel • There is a link to the full pdf file in the Reference section Hardware • There is also a lot of code on these slides • Remember that you can study these more carefully later if • Question: how can we protect individual programs from you need to! interference with themselves, or with one another, either directly or by subverting lower layers? • General approach: leverage programmable hardware features! 3 4 Taking stock: Code samples ... so far vram video RAM simulation vram.tar.gz hello boot and say hello on bare metal, via hello.tar.gz GRUB simpleio a simple library for video RAM I/O Segmentation bootinfo display basic boot information from (or: where do “seg faults” come from?) GRUB baremetal.tar.gz mimg memory image bootloader & make tool example-mimg display basic boot information from mimgload example-gdt basic demo using protected mode segments (via a Global Descriptor Table) prot.tar.gz example-idt context switching to user mode (via an Interrupt Descriptor Table) 5 6 BASIC EXECUTION ENVIRONMENT • General-purpose registers.
    [Show full text]
  • 71. Ralf Brown's Interrupt List
    “Charm can fool you.” Ralf Brown’s Interrupt 71 List Ralf Brown is a well-known authority for maintaining both documented and undocumented BIOS interrupts, DOS interrupts, memory map and other system-oriented information. Because of him only, the world came to know so many officially undocumented interrupts and system specific information. His work is appreciated throughout the world by thousands of DOS Programmers. The entire Ralf Brown’s Interrupt List is available on CD . The complete list runs up to thousands of pages! Because of space constraint, I provide only a part of Ralf Brown’s Interrupt List. Ralf Brown’s sources are used with his special permission. Many thanks to Dr. Ralf Brown! 71.1 Notations To save spaces, RBIL (Ralf Brown’s Interrupt List) uses few notations. So we have to understand those notations before using RBIL. If it is marked "internal" or undocumented, you should check it carefully to make sure it works the same way in your version of the software. Information marked with "???" is known to be incomplete or guesswork. FLAGS The use of -> instead of = signifies that the indicated register or register pair contains a pointer to the specified item, rather than the item itself. Register pairs (such as AX:BX) indicate that the item is split across the registers, with the high-order half in the first register. CATEORIES The ninth column of the divider line preceding an entry usually contains a classification code (the entry has not been classified if that character is a dash). The codes currently in use are: A - applications,
    [Show full text]
  • Attacking Hypervisors Through Hardware Emulation
    Attacking hypervisors through hardware emulation Presenting: Oleksandr Bazhaniuk ( @ABazhaniuk ), Mikhail Gorobets ( @mikhailgorobets ) Andrew Furtak, Yuriy Bulygin ( @c7zero ) Advanced Threat Research Agenda • Intro to virtualization technology • Threat model and attack vectors to hypervisor • Hypervisor issues in hardware emulation • Hypervisor detection and fingerprinting • Hypervisor fuzzing by CHIPSEC framework • Conclusions Intro to virtualization technology VMX/VT-x overview Without Virtualization With Virtualization App App App App App App OS OS OS Hypervisor can VMM / Hypervisor grant VM direct Hardware hardware access Hardware • OS manages hardware • Hypervisor manages hardware resources resources • Hypervisor provide isolation level for guest Virtual Machine (VM) Hypervisor architecture overview Type 1 Type 2 App App App App App App App App Guest OS Guest OS Guest OS Guest OS Hypervisor VMM / Hypervisor Host OS Hardware Hardware • Xen • VirtualBox • VmWare ESX • KVM • Hyper-V • Parallels Hypervisor architecture Hypervisor Code flow: VMXon VMXON init VMCS vmlaunch VMLAUNCH while(1){ VM-exit event VMRESUME exit_code = read_exit_code(VMCS) Host Guest switch(exit_code){ mode mode VM-exit default //VM exit handler handler // within VMM context} vmresume VMEXIT } VMXoff Basic Hypervisor virtualization components o CPU virtualization: • CPUID • MSR • IO/PCIe o Memory virtualization: • EPT • VT-d o Device Virtualization: • Disk • Network o Hypercall interface Hypervisor Isolations Software Isolation CPU / SoC: traps to hypervisor (VM Exits), MSR & I/O permissions bitmaps, rings (PV)… Memory / MMIO: hardware page tables (e.g. EPT, NPT), software shadow page tables Devices Isolation CPU / SoC: interrupt remapping Memory / MMIO: IOMMU, No-DMA ranges CPU Virtualization (simplified) VM Guest OS Instructions, Access to exceptions, I/O ports interrupts… Access to Access to (e.g.
    [Show full text]
  • Applying Microreboot to System Software Michael Le and Yuval Tamir Concurrent Systems Laboratory UCLA Computer Science Department {Mvle,Tamir}@Cs.Ucla.Edu
    IEEE International Conference on Software Security and Reliability Washington, D.C., June 2012. Applying Microreboot to System Software Michael Le and Yuval Tamir Concurrent Systems Laboratory UCLA Computer Science Department {mvle,tamir}@cs.ucla.edu Abstract—Av ailability is increased with recovery based on ev entually continue operating normally.Finally, component microreboot instead of whole system reboot. There microreboot is simpler if a component with greater privilege areunique challenges that must be overcome in order to apply can manage the microreboot process. With LLSS there may microreboot to low-levelsystem software. These challenges not be anysoftware component in the system with greater arise from the need to interact with immutable hardware privilege. Hence, the LLSS must somehowmicroreboot components on one hand and, on the other hand, with a wide itself while in a potentially corrupted state. variety of higher levelworkloads whose characteristics may be unknown. As an example, we describe our experience with Ke y contributions of this paper include identifying applying microreboot to system-levelvirtualization software. unique challenges to applying microreboot to low-level Specifically,implementing microreboot for all the components system software and presenting general approaches to of the widely-used Xen virtualization infrastructure. We addressing these challenges. This is based on our identify the unique difficulties with applying microreboot for experience using these approaches with complexlow-level such low-levelsoftwareand present our solutions. We present software — software that provides system-level measures of the complexity of different classes of solutions and virtualization. Specifically,wehav e applied microreboot to experimental results, based on extensive fault injection, showing the effectiveness of the solutions.
    [Show full text]
  • CS444/544 Operating Systems II Handling Interrupt/Exceptions Yeongjin Jang
    CS444/544 Operating Systems II Handling Interrupt/Exceptions Yeongjin Jang 1 Recap: Timer Interrupt and Multitasking After 1ms • Preemptive Multitasking (Lab 4) Ring 3 • CPU generates an interrupt to force execution at kernel after some time quantum • E.g., 1000Hz, on each 1ms.. OS Kernel (Ring 0) Timer interrupt! 2 Recap: Timer Interrupt and Multitasking • Preemptive Multitasking (Lab 4) Ring 3 • CPU generates an interrupt to force execution at kernel after some time quantum • E.g., 1000Hz, on each 1ms.. OS Kernel (Ring 0) • Guaranteed execution in kernel • Let kernel mediate resource contention 3 Recap: Timer Interrupt and Multitasking • Preemptive Multitasking (Lab 4) Ring 3 iret (ring 0 to ring 3) • CPU generates an interrupt to force execution at kernel after Schedule() some time quantum • E.g., 1000Hz, on each 1ms.. OS Kernel (Ring 0) • Guaranteed execution in kernel • Let kernel mediate resource contention 4 Recap: Interrupt • Asynchronous (can happen at any time of execution) • Mostly caused by external hardware • Read • https://en.wikipedia.org/wiki/Intel_8259 • https://en.wikipedia.org/wiki/Advanced_Programmable_Interrupt_Controller • Software interrupt • int $0x30 ß system call in JOS 5 Recap: Exceptions • Synchronous (an execution of an instruction can generate this) • Faults • Faulting instruction has not finished yet (e.g., page fault) • Can resume the execution after handling the fault • Non-fault exceptions • The instruction (generated exception) has been executed (e.g., breakpoint) • Cannot resume the instruction (if so, it will trap indefinitely…) • Some exceptions are fatal • Triple fault (halts the machine) 6 Handling Interrupt/Exceptions • Set an Interrupt Descriptor Table (IDT) Interrupt Number Code address 0 (Divide error) 0xf0130304 1 (Debug) 0xf0153333 2 (NMI, Non-maskable Interrupt) 0xf0183273 3 (Breakpoint) 0xf0223933 4 (Overflow) 0xf0333333 … 8 (Double Fault) 0xf0222293 … 14 (Page Fault) 0xf0133390 ..
    [Show full text]
  • COS 318: Operating Systems OS Structures and System Calls
    COS 318: Operating Systems OS Structures and System Calls Jaswinder Pal Singh Computer Science Department Princeton University (http://www.cs.princeton.edu/courses/cos318/) Outline u Protection mechanisms l Lead to … u OS structures u System and library calls 2 Protection Issues u CPU l Kernel has the ability to take CPU away from users to prevent a user from using the CPU forever l Users should not have such an ability u Memory l Prevent a user from accessing others’ data l Prevent users from modifying kernel code and data structures u I/O l Prevent users from performing “illegal” I/Os u Question l What’s the difference between protection and security? 3 Architecture Support: Privileged Mode An interrupt or exception (INT) User mode Kernel (privileged) mode • Regular instructions • Regular instructions • Access user memory • Privileged instructions • Access user memory • Access kernel memory A special instruction (IRET) 4 Privileged Instruction Examples u Memory address mapping u Flush or invalidate data cache u Invalidate TLB entries u Load and read system registers u Change processor modes from kernel to user u Change the voltage and frequency of processor u Halt a processor u Reset a processor u Perform I/O operations 5 Monolithic u All kernel routines are together, linked in single large executable l Each can call any other l Services and utilities User User program program u A system call interface u Examples: l Linux, BSD Unix, Windows, … u Pros l Shared kernel space l Good performance Kernel u Cons (many things) l Instability: crash in any procedure brings system down l Inflexible / hard to maintain, extend 6 Layered Structure u Hiding information at each layer u Layered dependency u Examples Level N l THE (6 layers) .
    [Show full text]