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Interoperability Between Operating Systems and Microprocessors On INTEROPERABILITY BETWEEN OPERATING SYSTEMS AND MICROPROCESSORS ON EMBEDDED PLATFORMS by MONG TEE SIM B.S. DeVry University, Pomona, 2002 A thesis submitted to the Graduate Faculty of the University of Colorado Colorado Springs in partial fulfillment of the requirements for the degree of Master of Science Department of Electrical and Computer Engineering 2017 © 2017 Mong Tee Sim All Rights Reserved This thesis for the Master of Science degree by Mong Tee Sim has been approved for the Department of Electrical and Computer Engineering by Darshika G. Perera, Chair T.S Kalkur Charlie Wang th Date 20 April 2017 ii Sim, Mong Tee (M.S., Electrical Engineering) Interoperability between Operating Systems and Microprocessor on Embedded Platform Thesis directed by Professor Darshika G. Perera. ABSTRACT Software designs and programming are limited by the hardware resources including the memory capacity and the CPU clock frequency of the system. This has opened up research and investigation into efficient computing systems and architectures. However, increasing the memory capacity and optimizing the CPU clock frequency alone will not be sufficient to fulfill today’s complex software algorithmic requirements. Therefore, it is imperative to incorporate some hardware-based algorithms and designs to satisfy the requirements of the software-based algorithms and also to address the constraints associated with the existing computing systems. In many cases, software algorithms are designed with none or minimal software optimizations, provided that these software designs meet the specifications. Software engineers and programmers typically depend on the compilers to perform necessary code optimizations. Although the current compilers have often satisfied the requirements of software algorithm designs, these compilers do not have knowledge about some software constructs including logical flow control, and spinwait for resources, which lead to CPU time wasted. Within the semiconductor devices, hardware has also reached its limitations such the power wall, the process geometry, and the parametric latencies. As a result, the choice of adding more memory and increasing the CPU clock frequency will soon be obsolete. iii If we hastily modify the way how microprocessors operate, most software, if not all software will break. In order to modify the architecture of the microprocessor, a detailed study of hardware and software interoperability is crucial. In this research work, our main objective is to investigate the various issues and constraints associated with the interoperability between the operating systems (OSes) and the microprocessors on embedded platforms. Based on our extensive analyses, we design a novel and efficient five-virtual-core Pipelined Barrel Processor (PBP) that does not have control and data hazards. The PBP also addresses some of the issues and constraints associated with the interoperability between the OSes and the microprocessors on embedded platforms. iv DEDICATION To my late Mother, Madam Choo (Pearl), I dedicate this thesis to you for your love and for raising and nurturing my two older brothers, my four older sisters and me single-handedly. Mother had left us on Wednesday, 25th February 2015 to join my late Father in a better place. Mother, I love you. You will always live in my heart and memory, your youngest son always. To my Wife, Swee Yee Lee, I dedicate this Thesis to you for your mental and physical support throughout my undergraduate days until now and raising and educating our two children days and nights without a sign of resentment. I am forever in your debt. To my two Children, my daughter, JieZhou Melody Sim and my son, Monte Patrick Sim, this Thesis is a Father setting a good example for his children that learning and knowledge are timeless. Knowledge not only enriches life, it also enriches the soul. v ACKNOWLEDGEMENTS One of my Professors at the University of Texas, Austin once said, "Nice to read but not original, original but not nice to read.” I sincerely appreciate my Professor, Dr. Darshika G. Perera, Ph.D., for spending many hours of her family time bashing through the jungle of my text trying to make my Thesis more readable. Although no word could describe her dedication to her profession and her kin sense to see her students succeed, but I must say, her action is exemplary and admirable. Thank you, Professor Darshika! Besides being passionate about her job, she has vast knowledge in the field of Electrical Engineering and especially in the field of Data Mining. Dr. T. S. Kalkur, Ph.D. is our ECE chairman. In his busy daily schedule between the University and his family, he still finds the time to educate the younger generation and elevates the standard of our ECE students. I have attended one of his classes and one social event with him. As a Professor, Dr. Kalkur is brilliant with his trade and at the social event, he is a friendly gentleman. Thank you for taking the time to be my thesis committee member. Dr. Charlie Wang, Ph.D. is my Professor for the Computer Architecture and Design class. He provided his students with one of the most useful and informative lecture slides in all the schools I have ever attended. His lectures were systematic, concise, and clear. He did not just give us lectures; he provided us the tools to solve real problems. I am proud to say that I have experienced this benefit recently at my job. What makes Dr. Wang admirable beside his teaching techniques is his passion as an educator is that nothing can stop him from coming to UCCS to teach and see his vi students succeed. Thank you, Dr. Wang, for being my Professor and my thesis committee member. Eva Wynhorst is our ECE program assistant. She works tirelessly to help the UCCS ECE students. She even goes beyond her normal responsibility to help the students to get their paperwork done. I am one of the students who has benefited from her generosity. Thank you, Eva, for being a wonderful person. vii TABLE OF CONTENTS CHAPTER I. INTRODUCTION ........................................................................................................................ 1 1.1 Our Objectives ............................................................................................................. 4 1.2 Thesis Organization ..................................................................................................... 4 II. ANALYSIS OF OPERATING SYSTEMS ......................................................................................... 6 2.1 Super Loop .................................................................................................................. 6 2.2 Operating System Task Terminologies.......................................................................... 7 2.3 Cooperative Operating System .................................................................................... 9 2.4 Real-time Operating System ...................................................................................... 16 2.4.1 Hybrid Real-time Operating Systems ................................................................ 17 2.4.2 True Real-time Operating System .................................................................... 22 2.5 Create Task ................................................................................................................ 23 2.6 Context Switching ...................................................................................................... 24 2.7 Existing Literature ...................................................................................................... 27 III. ANALYSIS OF SCHEDULING METHODS .................................................................................. 28 3.1 Round Robin Scheduling Method ............................................................................... 28 3.2 Group Based Scheduling Method ............................................................................... 29 3.3 Threshold Based Scheduling Method ......................................................................... 30 3.4 Fixed Priority Based Scheduling Method .................................................................... 31 3.5 Fixed Priority Lookup Table Method .......................................................................... 32 3.6 Time Tick ISR.............................................................................................................. 34 3.7 Software and Hardware Semaphores ......................................................................... 35 3.8 Key Features of Operating Systems ............................................................................ 36 3.9 Compiler .................................................................................................................... 37 3.10 Existing Literature ...................................................................................................... 39 viii IV. MICROPROCESSOR ............................................................................................................... 41 4.1 Microcontroller.......................................................................................................... 43 4.2 Analysis of Microprocessors ....................................................................................... 43 4.3 Constraint on Operating Systems and Microprocessors ............................................. 46 4.4 Single-Cycle Microprocessor ...................................................................................... 49
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