Open Hesam Final Report.Pdf

The Pennsylvania State University

The Graduate School

HIGH-PERFORMANCE INTEGRATED CIRCUITS FOR ULTRSOUND

NEUROMODULATION AND POWER MANAGEMENT OF MEDICAL IMPLANTS

A Dissertation in

Electrical Engineering

Hesam Sadeghi Gougheri

Submitted in Partial Fulfillment of the Requirements for the Degree of

Doctor of Philosophy

May 2020

The dissertation of Hesam Sadeghi Gougheri was reviewed and approved* by the following:

Mehdi Kiani Assistant Professor of Electrical Engineering Dissertation Advisor Chair of Committee

Ram Mohan Narayanan Professor of Electrical Engineering

Bruce Gluckman Professor of Engineering Science and Mechanics

Seyedehaida Ebrahimi Assistant Professor of Electrical Engineering

Kultegin Aydin Department Head of Electrical Engineering and Professor

Abstract

In general, this Ph.D. thesis aims at developing innovative technologies for interfacing with the central and peripheral nervous systems. More particularly, this thesis is focused on the design, development, and testing of novel circuits and systems for ultrasound neuromodulation and power management of those implantable medical devices (IMDs) which are powered by wireless power transmission (WPT) via inductive coupling. First, a new class of integrated power management (IPM) application-specific integrated circuits (ASICs) is proposed for efficient, robust, and long-range inductive power transmission. Unlike conventional IPM ASICs with voltage-mode (VM) operation, a current-mode (CM) IPM structure is proposed in which the receiver coil is employed as a current source. Several features have been added to the CM IPM structure to noticeably improve performance of the wireless IMDs in terms of voltage regulation, maximum provided output power, and lifetime. In the second part, the concept of microscopic ultrasound stimulation (μUS) is proposed in which either an electronically phased array of ultrasound transducers or several millimeter-sized focused transducers can directly be placed on the brain surface with partially removed skull (or over thinned skull) to deliver a focused ultrasound pressure to the neural target. A comprehensive study of ultrasound transducer characterization is presented to find optimal design of the transducers for μUS application. An ultrasound neuromodulation ASIC is designed and fabricated to drive the transducer with sufficient power, and finally a couple of preliminary animal experiments with commercial off-the-shelf (COTS) components are carried out.

In chapter 1 of this dissertation, the proposed technologies for ultrasound neuromodulation and power management of IMDs are briefly introduced, and an overview over current technologies for neuromodulation and WPT to IMDs is presented. Also, the main contributions of this thesis are briefly described. In chapter 2, a current-based resonant power delivery (CRPD) technique is presented for extended-range WPT. In chapter 3, a self-regulated reconfigurable voltage/current-mode integrated power management (VCIPM) is presented for robust inductive WPT. In chapter 4, optimal wireless receiver structure for omnidirectional WPT is discussed. A self-regulated seamless-voltage/current-mode IPM with energy recycling capability is presented in chapter 5. To improve maximum output power provided to IMDs, a dual-output reconfigurable shared-inductor boost-converter/current-mode IPM is presented in chapter 6. In chapter 7, a comprehensive study of ultrasound transducer characteristics in μUS is presented. An ASIC for ultrasound neuromodulation is proposed in chapter 8. Finally, in chapter 9 preliminary animal experiments and future works are discussed. This research has resulted so far in 6 journal papers, 8 peer- reviewed conference papers, 1 pending US patent, and 1 book chapter. iii

Table of Contents

List of Figures ...... ix

List of Tables ...... xxi

List of Abbreviations ...... xxii

Acknowledgements ...... xxiv

Chapter 1 Introduction ...... 1

1.1 Ultrasound neuromodulation ...... 1

1.1.1 Current state-of-the-art neuromodulation technologies ...... 1

1.1.2 Transcranial focused ultrasound stimulation ...... 2

1.1.3 Proposed microscopic ultrasound stimulation ...... 3

1.2 Wireless power transmission to implantable medical devices (IMDs) ...... 5

1.2.1 Proposed IPM ASICs for wireless power transmission to IMDs ...... 5

1.3 Contributions ...... 6

1.3.1 Integrated power management ASICs ...... 6

1.3.1.1 Current-based resonant power delivery ASIC ...... 6

1.3.1.2 Self-regulated reconfigurable voltage/current-mode IPM ASIC ...... 7

1.3.1.3 An inductive voltage/current-mode IPM ASIC with seamless mode transition and

energy recycling ...... 7

1.3.1.4 A dual-output reconfigurable shared-Inductor boost-converter/current-Mode

inductive power management ASIC ...... 8

1.3.2 Microscopic ultrasound stimulation ...... 8

1.3.2.1 A comprehensive study of ultrasound transducer characteristics in microscopic

ultrasound neuromodulation ...... 8

1.3.2.2 An ASIC for microscopic ultrasound neuromodulation ...... 9

Chapter 2 Current-Based Resonant Power Delivery with Multi-Cycle Switching for Extended-

Range Inductive Power Transmission...... 10

2.1 Proposed current-based resonant power delivery (CRPD) technique ...... 12

2.1.1 CRPD Concept ...... 12

2.1.2 The circuit theory behind CRPD ...... 14

2.1.3 Theory vs. Simulation...... 17

2.2 Measurement results ...... 19

2.3 Conclusion ...... 24

Chapter 3 Self-Regulated Reconfigurable Voltage/Current-Mode Inductive Power Management 25

3.1 VCIPM modeling and operation ...... 26

3.2 VCIPM chip architecture ...... 32

3.3 Measurement results ...... 36

3.4 Conclusion ...... 44

Chapter 4 Optimal Wireless Receiver Structure for Omnidirectional Inductive Power

Transmission to Biomedical Implants ...... 46

4.1 Omnidirectional inductive power transmission to mm-sized implants using three Rx

coils… ...... 47

4.2 Different Rx structures using three Rx coils ...... 49

4.3 Conclusion ...... 51

Chapter 5 A Self-Regulated Seamless-Voltage/Current-Mode Inductive Power Management with

Extended Input Voltage Range and Energy Recycling ...... 52

5.1 Proposed power management concept and structure ...... 52

5.2 Measurement results ...... 56

5.3 Conclusion ...... 59

Chapter 6 A Dual-Output Reconfigurable Shared-Inductor Boost-Converter/Current-Mode

Inductive Power Management ASIC...... 61

6.1 Proposed dual-configuration ASIC features ...... 64

6.1.1 Adaptive switching control (ASC) ...... 64

6.1.2 Shared-inductor boost-converter (SBC) configuration...... 65

6.2 Proposed ASIC architecture ...... 66

6.3 Measurement results ...... 71

6.3.1 ASC performance characterization ...... 73

6.3.2 Received voltage (VRx) variation ...... 74

6.3.3 Dynamic mode change and VPR operation ...... 75

6.3.4 SBC performance characterization ...... 75

6.3.5 Improvements of the proposed structure ...... 77

6.3.6 The proposed dual-configuration IPM ASIC vs. state-of-the-art inductive power

delivery ASICs ...... 79

6.4 Conclusion ...... 82

Chapter 7 A Comprehensive Study of Ultrasound Transducer Characteristics in Microscopic

Ultrasound Neuromodulation ...... 83

7.1 Ultrasound transducer modeling and operation ...... 86

7.2 Transducer fabrication, simulation and measurement setup ...... 87

7.3 Simulation and measurement results ...... 92

7.3.1 Figure-of-Merit (FoM) for the proposed µUS ...... 92

7.3.2 Simulation vs. measurement ...... 92

7.3.3 Sonication frequency (fp) impact ...... 95

7.3.4 Backing layer impact ...... 97

7.3.5 Transducer dimension (Do, t) impact ...... 98

7.3.6 Beam focusing impact ...... 101

7.3.7 Acoustic matching impact ...... 101

7.3.8 Measurement results with bio-phantom ...... 103

7.4 Conclusion ...... 104

Chapter 8 An ASIC for Microscopic Ultrasound Stimulation ...... 106

8.1 Introduction ...... 106

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8.2 Power amplifier ...... 107

8.3 ASIC architecture ...... 109

8.4 Measurement results ...... 114

8.5 Testing the proposed ASIC with a focused ultrasound transducer to generate sufficient

acoustic pressure for the ultrasound neuromodulation ...... 119

Chapter 9 Preliminary Animal Experiments and Future Work...... 122

9.1 Microscopic ultrasound stimulation system integration ...... 122

9.2 Sonication parameters for ultrasound neuromodulation ...... 123

9.2.1 Required acoustic intensity for successful ultrasound neuromodulation ...... 124

9.3 Ultrasound neuromodulation experiment on rat...... 125

9.4 Ultrasound neuromodulation experiment on mouse ...... 126

9.5 Microscopic ultrasound stimulation with transducer array / beamforming integrated

with imaging ...... 128

Reference… ...... 131

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List of Figures

Fig. 1.1. Some examples of neuromodulation technologies: (a) transcranial magnetic stimulation

(TMS), (b) transcranial direct current stimulation (tDCS), and (c) optogenetics...... 2

Fig. 1.2. Current ultrasonic neuromodulation setups [24]...... 3

Fig. 1.3. The concept of microscopic ultrasound stimulation (µUS) in which either (a) several millimeter (mm)-sized focused transducers or (b) an electronically phased array of ultrasound transducers can directly be placed on the brain surface with partially removed skull (or over thinned skull) or sub-mm-sized transducers can be implanted inside the brain tissue to deliver a focused ultrasound pressure to the neural target, as in (a)...... 4

Fig. 1.4. Conceptual diagram of distributed paradigm for wireless power transmission to IMDs in which a network of small implants are distributed over the surface of the brain. Similar distributed implants can also be used in the peripheral nervous system...... 6

Fig. 2.1. Generic model of conventional inductive power transmission links. The power management includes a rectifier or a voltage multiplier depending on the voltage amplitude across

L2C2-tank, i.e., VR. The power management also includes a regulator, which has been removed for the sake of simplicity...... 10

Fig. 2.2. The circuit schematic of the proposed inductive link equipped with current-based resonant power delivery (CRPD). A single switch (SW) is added to the conventional inductive link to short the L2C2-tank for several power carrier cycles, and then deliver L2C2-tank energy to the load (CL ||

RL), when the Rx coil current (iL2) is at its peak...... 12

Fig. 2.3. Switching diagram and key waveforms of the proposed CRPD to achieve high AC-DC

VCE (VL / VR,peak). SW is first closed for several Tps to store energy in L2C2-tank. Then, SW is opened at the peak of iL2 for 0.25Tp to deliver L2C2-tank energy to the load...... 13 ix

Fig. 2.4. The proposed CRPD-based inductive link model in (a) region (I) with closed SW, and (b) region (II)-(III) with open SW...... 14

Fig. 2.5. Simulated and calculated results for key signals of the proposed CRPD-based inductive link shown in Fig. 2.2, when SW was switched at fsw = 50 kHz. Simulation and calculation results were very well matched. The circuit parameters can be found in Table 2.1...... 18

Fig. 2.6. Simulated and calculated VL vs. time for the CRPD-based inductive link, when VR,peak was as small as 1 V. A VCE of 3.7 has been achieved in the Rx side. The circuit parameters have been stated in Table 2.2...... 19

Fig. 2.7. The CRPD measurement setup that includes two PCB coils, and a discrete control circuit for L2C2-tank switching and power delivery to CL || RL. The coils geometries and circuit parameters can be found in Table 2.2...... 21

Fig. 2.8. Measured key waveforms of the proposed CRPD in Fig. 2.2, operating at fp = 1 MHz and fsw = 50 kHz to deliver power to the RL of 100 kΩ (a) VL was increased for ~ 20 mV at the beginning when SW was opened every 20 µs, and (b) VL increased to ~ 3.1 V after ~ 30 ms of switching, where |VR| was only 1 V, leading to the VCE of 3.1...... 21

Fig. 2.9. Measured VL and PTE of the CRPD-based inductive link vs. fsw for RL of 100 kΩ at d12 =

7 cm and |Vs| = 0.39 V. Maximum VL and PTE of 3.1 V and 5.3% were achieved at the optimal fsw of 50 kHz, respectively...... 22

Fig. 2.10. Measured (a) VL and (b) PTE of the CRPD-based and conventional inductive links vs.

RL at d12 = 7 cm and |Vs| = 0.39 V. The VL and PTE of the CRPD link were measured at the corresponding optimal fsw for each RL. It can be seen that the proposed CRPD can significantly improve VL and PTE for RL values larger than 5 kΩ...... 23

Fig. 2.11. The measured values for VL for the CRPD-based and conventional inductive links vs. d12 for RL of 100 kΩ, and |Vs| = 1.05 V. The measured corresponding optimal fsw for CRPD link at each d12 decreased from 100 kHz to 50 kHz as the distance was increased from 1 cm to 15 cm. If the Rx side requires a minimum VL of 2.8 V, the proposed CRPD can extend the powering distance from 7 cm to 13 cm...... 24

Fig. 3.1. Schematic diagram of the conventional 2-coil inductive link for wireless power transmission, followed by a conventional power management that includes a rectifier and a regulator for AC-DC conversion...... 26

Fig. 3.2. The simplified circuit models of the inductive link and proposed VCIPM in VM operation with (a) M2 as the active rectifier switch, (b) turned-off M2, and (c) turned-on M2...... 27

Fig. 3.3. The key waveforms for achieving both rectification and regulation in an active rectifier, shown in Fig. 2a, using (a) conventional technique with controlling the forward current by decreasing the switch on-time duration (Ton), and (b) proposed technique with employing the reverse current by increasing Ton...... 29

Fig. 3.5. The block diagram of the control loop for voltage regulation of VL at VDD = 3.2 V with reverse current by adjusting Td in Fig. 3.3b...... 31

Fig. 3.6. Simulated and calculated Ton and VR vs. RL in the proposed self-regulated active rectifier

(VM) as shown in Fig. 3.3b to achieve constant VL of VDD = 3.2 V using reverse current. The circuit parameters are listed in Table 3.1...... 32

Fig. 3.7. Block diagram of the proposed adaptive reconfigurable VCIPM chip that operates either in VM or CM based on VR amplitude, and can perform rectification, regulation, and OVP all in one step using one off-chip capacitor (CL)...... 33

Fig. 3.8. Schematic diagrams and key waveforms of (a) VMC and (b) CMC blocks to generate proper SW2 and SW1 pulses, respectively...... 34

Fig. 3.9. Detailed schematic diagrams of (a) time-base generator (TBG), (b) pulse generator, (c)

CM comparator (CM_Comp), and (d) VM comparator (VM_Comp) blocks, shown in Fig. 3.8. 36

Fig. 3.10. VCIPM chip micrograph, occupying 1.56 mm2 and 0.52 mm2 with and without pads, respectively...... 37

Fig. 3.11. The VCIPM chip measurement setup showing Tx (L1) and Rx (L2) PCB coils. The

VCIPM chip was operated at fp = 1 MHz to provide a regulated VL of 3.2 V across CL = 2 µF. .. 37

Fig. 3.12. (a) Measured VL and VR waveforms in VM when the Tx voltage (Vs in Fig. 3.1) was increased from 11 Vp-p to 15 Vp-p at RL = 100 kΩ. (b) Zoomed waveforms for VL and VR, demonstrating how reverse current regulated VL at 3.2 V despite Vs variations...... 38

Fig. 3.13. Measured VL and VR in VM when RL was increased from 1 kΩ to 10 kΩ. Thanks to increase in the reverse current, VL was maintained constant at 3.2 V with small ripples of 100 mVp- p despite 10x increase in RL...... 39

Fig. 3.14. (a) Measured VL and VR waveforms in CM when Vs was increased from 4 Vp-p to 9 Vp-p at RL = 100 kΩ. (b) Zoomed waveforms for VL and VR demonstrating how changes in fsw regulated

VL at 3.2 V despite Vs variations...... 39

Fig. 3.15. Measured VL and VR waveforms in CM for RL variations from 10 kΩ to 100 kΩ, demonstrating automatic fsw adjustment to regulated VL at 3.2 V...... 40

xii

Fig. 3.16. Measured VL, VR, and Vs waveforms when Vs was manually increased from 4 Vp-p to 10

Vp-p, resulting in the automatic reconfiguration of the VCIPM chip from CM to VM based on the

VR amplitude (1.2 V vs. 3.35 V) to regulate VL at 3.2 V...... 40

Fig. 3.17. Measured VL and VR waveforms during VCIPM chip startup, in which M2 and M3 first slowly charged CL to ~2 V, followed by CM and VM operations to further increase VL to 3.2 V.

...... 41

Fig. 3.18. Measured (a) VCE and (b) PTE vs. RL for conventional VM only and the VCIPM chip at d = 4.5 cm and fp = 1 MHz. The VCIPM chip reconfigured itself from VM to CM at RL ~ 2 kΩ to achieve highest VCE and PTE at larger RL...... 42

Fig. 3.19. Measured VR,peak with and without OVP as well as PTE vs. Vs in VM at RL = 100 kΩ and d = 6 cm. As Vs is increased, the VCIPM chip enables OVP to increase reverse currents and consequently reduce the PTE to maintain VR within safe regions...... 43

Fig. 3.20. Measured VL vs. (a) coupling distance, d, (b) Rx coil orientation, ϕ, and (c) Rx coil misalignment for conventional VM only and VCIPM chip at RL = 100 kΩ and fixed input power of 145 mW. The proposed VCIPM could extend d, ϕ, and misalignment robustness for 125%,

150%, and 500%, respectively...... 43

Fig. 4.1. The omnidirectional inductive link model in HFSS for calculating the mutual coupling between Tx and Rx coils...... 47

Fig. 4.2. The simulated mutual coupling between the Tx coil (L1) and each of three Rx coils (L21,

L22, L23), i.e., k1,21, k1,22, k1,23, vs. the angular tilting of the Rx coils (φ) as shown in Fig. 4.1...... 49

Fig. 4.3. Different Rx structures for omnidirectional inductive power transmission. (a)

Conventional Rx structure with three rectifiers to charge CL through the highest Rx coil voltage.

The proposed Rx structures: (b) connecting the resonant Rx coils in parallel, (c) connecting the

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resonant Rx coils in series, and (d) connecting the Rx coils in series and resonate them all with one capacitor. The proposed structures only need one rectifier...... 49

Fig. 4.4. Simulated values for VL vs. φ for different Rx structures in Fig. 4.3 (RL = 10 kΩ). The VL results labeled with a, b, c, and d correspond to structures in Figs. 4.3a, 4.3b, 4.3c, and 4.3d, respectively...... 51

Fig. 5.1. Conceptual block diagram of conventional and proposed inductive IPM structures, and the simplified block diagram of the proposed energy-recycling seamless-voltage/current-mode

(ERSVCM) IPM...... 52

Fig. 5.2. Conceptual key waveforms for the safe operation of SVCM with extended input-voltage range and energy recycling operation...... 54

Fig. 5.3. Simplified schematic diagrams of configuration selection, switch controller, and body- biasing blocks to generate optimal SW1-4 and VB1-4...... 55

Fig. 5.4. PRVCM chip micrograph, occupying 6 mm2 and 3.8 mm2 with and without pads, respectively...... 57

Fig. 5.5. Measured transient waveforms of VL and Vp vs. input power variation (~VTx) in R1, operating in SVCM, for RL=100kΩ and CL=4.7µF...... 57

Fig. 5.6. Measured ERSVCM chip waveforms in energy recycling configuration with self- regulation as well as chip transition between SVCM and energy recycling for an intermittent WPT condition with drastic VTx changes...... 58

Fig. 6.1. (a) Simplified diagram of an inductive link with a conventional multi-stage IPM structure to generate multiple regulated outputs, and (b) performance of the IPM structure vs. power received by the receiver coil (PRx). PL and PHv are the power consumed by RL and RHv, respectively.

...... 61

xiv

Fig. 6.2. (a) Simplified diagram of an inductive link with the proposed dual-configuration IPM structure, and (b) performance of the proposed IPM structure vs. variation of PRx. The proposed

ASIC adaptively changes configuration between SBC and active CM rectifier with automatic switching control to achieve optimal and robust operation...... 63

Fig. 6.3. (a) Circuit schematic and (b) key waveforms in CM configuration with a focus on ASC to achieve optimal switching. (c) Circuit schematic and (d) key waveforms for the SBC configuration, which recycles energy previously stored on CS to charge CHv when PL + PHv > PRx.

...... 64

Fig. 6.4. Simplified block diagram of the proposed dual-configuration IPM structure with ASC,

SBC, and VPR capabilities...... 67

Fig. 6.5. The chip operation algorithm for optimal switching between different operation modes to maintain VL and VHv at 2.6 V and 3.9 V, respectively, regardless of PRx variations. The ASIC maintains its operation in each mode as long as all the conditions for starting the mode are valid.

...... 67

Fig. 6.6. Simplified block diagrams of the ASC. (a) switching frequency control block, (b) zero- crossing control block, and (c) pulse-width control block. (d) Key waveforms of the ASC...... 70

Fig. 6.7. The proposed dual-configuration IPM chip micrograph operating at 1 MHz and occupying an active area of 1.35 mm2. MC, PWC and ZCC are mode control, pulse-width control and zero-crossing blocks, respectively...... 72

Fig. 6.8. The proposed ASIC measurement setup showing the Tx and Rx wire-wound coils, (LTx) and (LRx), respectively. The inductive link specifications are listed in the table...... 72

Fig. 6.9. (a) Measured transient waveforms when the ASC block is enabled suddenly, demonstrating a transition from switching with improper ZC and PW timings to precise switching.

(b) Zoomed-in views of VRx showing how ASC automatically optimized ZC and PW timings. . 73

Fig. 6.10. (a) Measured transient waveforms when VRx amplitude (~ PRx) was changed from 0.8 V to 1.6 V. (b) Zoomed-in views of VRx demonstrating how ASC automatically optimized ZC and

PW...... 74

Fig. 6.11. Measured transient waveforms for dynamic mode change between M2, M5, and M6 to simultaneously regulate VL at 2.6 V across RL = 10 kΩ, charge CS up to 3.9 V, and perform VPR.

...... 75

Fig. 6.12. Measured transient waveforms for providing VHv = 3.9 V (RHv = 1.9 kΩ, PHv = 8 mW) with insufficient PRx, demonstrating adaptive chip reconfiguration between CM and SBC for CL =

CHv = 4.7 µF, CS = 100 µF...... 76

Fig. 6.13. Measured transient waveforms for adaptive chip reconfiguration between CM and SBC to simultaneously regulate VL and VHv at 2.6 V and 3.9 V, respectively, with insufficient PRx for CL

= CHv = 4.7 µF, RL = 14 kΩ, RHv = 9 kΩ, and CS = 100 µF...... 77

Fig. 6.14. (a) Measured PCE vs. PL with (w/) and without (w/o) enabling ASC. (b) Measured PCE vs. PL with and without VPR. (c) VHv vs. PHv for fixed PRx with and without SBC...... 78

Fig. 6.15. Benchmarking of the proposed dual-configuration IPM ASIC against CM state-of-the- art IPM ASICs. (a) Measured PCE vs. PL when PRx ≈ PL and the ASICs work as a rectifier. (b)

Measured PCE when PRx is considered fixed to provide the maximum PL (PL,max) and PL is normalized to PL,max for each ASIC. (c) The ASICs’ performance in terms of operating frequency,

PL,max/PRx and PCEmax (small circles are the projections of the larger circles on the 2D planes). 80

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Fig. 7.1. (a) Comparison of different neuromodulation approaches in terms of their spatial coverage, spatial resolution and invasiveness. (b) Conceptual schematic of the microscopic ultrasound stimulation (µUS) system (the minimally invasive variation with large spatial coverage)...... 84

Fig. 7.2. Transmission line model (KLM) of a piezoelectric transducer [134]...... 86

Fig. 7.3. The generated acoustic pressure beam by a disc-shaped ultrasound transducer and its acoustic intensity (magnitude variations) along the axial and lateral directions. It can be seen that even an unfocused transducer features a natural focus...... 87

US8 and US9: focused PCB-backed transducers (Do = 5.8 mm, t = 1 mm) encapsulated with EPO-

TEK and EPO-TEK + Alumina, respectively...... 88

Fig. 7.5. (a) Measurement setup used to measure the acoustic pressure generated by each ulrasound transducer. (b) Simulation setup in COMSOL used to find electrical and acoustic characteristics of the ultrasound transducers (US)...... 89

Fig. 7.6. Measured transient voltage of the hydrophone (after preamplifier) for driving US2 at the axial distance of (a) 12.3 mm and (b) 6.9 mm...... 91

Fig. 7.7. Comparison between measured and simulated characteristics of US1. (a) Electrical impedance, (b) simulated (COMSOL) acoustic beam profile at fp = 2.85 MHz, (c) measured acoustic beam profile at fp = 2.8 MHz, and (d) axial and lateral resolution. Acoutic intenstiry was found for 1 V sinusoidal input...... 94

xvii

Fig. 7.8. Measured acoustic beam profile of US1 at the frequencies of (a) 2.6 MHz and (b) 2.7

MHz. (c) Axial and lateral resolution. Fig. 6c shows the measured beam profile of US1 at 2.8 MHz.

...... 96

Fig. 7.9. Impact of the backing layer (air vs. PCB) on the acoustic beam profile of air-backed US1

(Fig. 6c) and PCB-backed US2. (a) US2 measured electrical impedance, (b) US2 measured acoustic beam profile at fp = 2.8 MHz, and (c) axial and lateral resolution of US1 and US2...... 97

Fig. 7.10. Impact of t on the acoustic beam profile of US4 (t = 0.73) and US5 (t = 0.4) with similar

Do = 4.2 mm. (a) Measured electrical impedance, (b) US4 measured intensity at fp = 3.05 MHz, (c)

US5 measured acoustic intensity at fp = 5.56 MHz, and (d) axial and lateral resolution of US4 and

US5...... 99

Fig. 7.11. Impact of Do on the acoustic beam profile (t = 0.75 mm) of US2 (Fig. 6c) and US3. (a)

US3 measured acoustic beam profile at fp = 2.8 MHz (US2 profile in Fig. 7.9b) and (b) axial and lateral resolution of US2 and US3...... 100

Fig. 7.12. US6 measured acoustic beam profile at fp = 9.56 MHz...... 100

Fig. 7.13. Impact of beam focusing and acoustic mathicng. (a) US7-9 measured electrical impedance, (b), (c), (d) US7, US8 and US9 measured acoustic intensity, respectively, and (e) axial and lateral resolution of US7-9...... 102

Fig. 7.14. Experiment setup used to measure the impact of sheep brain phantom on the acoustic beam profile generated by US1 and US6...... 103

Fig. 7.15. Comparison of measured normalzied acoustic beam profile with the introduction of a sheep brain phantom. (a) and (b) US1 (2.8 MHz) measurements without and with the phantom, respectrively. (c) and (d) US6 (9.56 MHz) measurements without and with the phantom, respectrively...... 104

xviii

Fig. 8.1. Simplified block diagram of (a) the class-D and -DE power amplifier (PA), (b) the class-

E PA, and (c) key operational waveforms of these PAs...... 107

Fig. 8.2. The equivalent circuit model of the PZT transducer used in [148]...... 109

Fig. 8.3. Simplified block diagram of the proposed ultrasonic neuromodulation chip...... 110

Fig. 8.4. (a) Simplified circuit schematic of the proposed power management unit, and (b) its key conceptual waveforms...... 111

Fig. 8.5. Simplified schematic diagram of the clock recovery block, signal generator block and their key operational waveforms...... 112

Fig. 8.6. Circuit schematic of (a) low-side level shifter (LSLS), and (b) high-side level shifter

(HSLS)...... 113

Fig. 8.7. Circuit schematic of low-side and high-side gate drivers...... 113

Fig. 8.8. The proposed ultrasound neuromodulation chip micrograph...... 114

Fig. 8.9. Measured transient waveforms of Vdd-MV, VR1 and VR2, demonstrating adaptive switching of the power management unit (PMU) between rectification and regulation modes...... 115

Fig. 8.10. Measured transient waveforms of VR1, VGP and VGN, demonstrating proper operation of

Signal Generator block...... 115

Fig. 8.11. Measured transient waveforms of PAout, HSLS output, VGN and VGP at optimal fp and

DC of 2.7MHz and 25%, respectively...... 116

Fig. 8.12. (a) and (b) Measured transient waveforms of PAout and HSLS output at fp = 2.7 MHz for

DC = 10% and 40%, respectively. (c) Amplitude of the first and third harmonics (H1 and H3) of

PAout vs. DC at fp = 2.7 MHz. (d) Power efficiency and output power (Pout) vs. DC at fp = 2.7 MHz.

...... 117

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Fig. 8.13. (a) and (b) Measured transient waveforms of PAout and HSLS output at fp = 2.6 MHz and

2.95 MHz for DC = 30% and 15%, respectively. (c) Amplitude of the first harmonics (H1) of PAout and output power (Pout) vs. operating frequency (fp) at optimal duty cycle. (d) Maximum efficiency and optimal duty cycle vs. operating frequency (fp)...... 118

Fig. 8.14. (a) A pair of spherically shaped focused transducer, and (b) the prepared focused transducer for our experiment (US10)...... 119

Fig. 8.15. The measured electrical impedance of US10...... 120

Fig. 8.16. (a) Measured transient waveforms of PAout and hydrophone voltage (VHyd), VGN, VGP at fp = 4.6 MHz when US10 was used as the load, and (b) zoomed waveform of PAout...... 121

Fig. 9.1. The future plan for integration of the whole µUS system into a portable device for the proof-of-concept testing on rodents. Thanks to the transducer miniaturization, multiple mm-sized transducers can be placed on the animal’s head to target multiple brain regions...... 122

Fig. 9.2. Typical sonication protocol in ultrasound neuromodulation. The key parameters are sonication duration (SD) and inter-stimulus interval (ISI), tone-burst duration (TBD), pulse repetition frequency (PRF) and duty cycle (DC)...... 123

Fig. 9.3. Preliminary ultrasound neuromodulation experiment on a rat...... 125

Fig. 9.4. Preliminary ultrasound neuromodulation experiment on a mouse...... 126

Fig. 9.5. (a) The mouse hindlimb and (b) tail movement as the response to ultrasound stimulation.

When there was no stimulus pulse (LED: OFF), there was no movement, and by driving the ultrasound transducer (LED: ON), after a short delay hindlimb and tail movement was observed.

The tail movement happened after a longer delay...... 127

List of Tables

Table 2.1: CRPD-based inductive link parameters used in simulations ...... 18

Table 2.2: Coils geometries and circuit parameters in measurements for CRPD-based and conventional inductive links ...... 20

Table 3.1: Circuit parameters used in calculations and simulations ...... 30

Table 3.2: Benchmarking the VCIPM ASIC among state-of-the-art inductive power managements

...... 45

Table 4.1: Omnidirectional inductive link specifications ...... 48

Table 4.2: Circuit parameters used in simulations ...... 50

Table 5.1: Benchmarking the ERSVCM ASIC among state-of-the-art inductive power managements...... 59

Table 6.1: Benchmarking of the dual-configuration ASIC among state-of-the-art inductive power management ASICs ...... 81

Table 7.1: Specifications and acoustic/electrical characteristics of the fabricated ultrasound transducers in the measurements ...... 93

Table 9.1: Important sonication parameters from previously reported works in ultrasound neuromodulation ...... 124

Table 9.2: Sonication parameters used in the experiment to achieve successful ultrasound neuromodulation ...... 127

xxi

List of Abbreviations

Abbreviations Definition

ASIC Application-Specific Integrated Circuit

ASC Adaptive Switching Control

BGR Bandgap Reference

COTS Commercial Off The Shelf

CM Current Mode

CRPD Current-Based Resonant Power Delivery

CG Current Generator

ERSVCM Energy-Recycling Seamless-Voltage/Current-Mode

FoM Figure of Merit

IPM Integrated Power Management

IMD Implantable Medical Device

LNA Low-Noise Amplifier

mm Millimeter

µUS Microscopic Ultrasound Stimulation

OVP Over Voltage Protection

PCB Printed Circuit Board

PCE Power Conversion Efficiency

PDL Power Delivered to Load

PTE Power Transmission Efficiency

xxii

PMIC Power Management Integrated Circuit

PML Perfect Matching Layer

PA Power amplifier

PSC Printed Spiral Coil

PTE Power Transfer Efficiency

PZT Lead Zirconium Titanate

RFID radiofrequency identification

Rx Receiver

SBC Shared-Inductor Boost Converter

SVCM Seamless-Voltage/Current-Mode

tDCS Transcranial Direct Current Stimulation

TMS Transcranial Magnetic Stimulation

tFUS transcranial focused ultrasound

Tx Transmitter

VPR Voltage-Power Regulation

VM Voltage Mode

WPT Wireless Power Transmission

VCIPM Voltage/Current-Mode Inductive Power Management

ZVS Zero-Voltage Switching

ZDS Zero-Derivative Switching

xxiii

Acknowledgements

Foremost, I would like to express my sincerest gratitude to my advisor, Dr. Mehdi Kiani, for his guidance, patience, and encouragement, for being a mentor to me and for influencing me beyond research. I am thankful to him for letting me concentrate on research without worrying about funding. His dedication to research and teaching has greatly inspired me and helped me shape my professional career.

I would like to thank all my committee members, Dr. Narayanan, Dr. Gluckman and Dr. Ebrahimi, for sharing their insight and knowledge and providing comments and advice to improve my thesis.

I would like to thank all my collaborators: Dr. Gluckman and Dr. Drew for their help with animal experiments; Dr. Dangi and Dr. Kothapalli for providing the experiment setup for ultrasound transducers characterization. I appreciate the technical discussions we had, and I could not complete my work without their efforts and help.

I would like to thank all former and current Integrated Circuits and Systems Lab (ICSL) members, Dr. Ahmed Ibrahim, Dr. Miao Meng, Philip Graybill, Zeinab Kashani, and Sheikh Ilham for their discussions and generous help. It was a truly pleasure experience working with them.

This work was supported by the National Institutes of Health (NIH) under Grant 1R21EY029424 and NIBIB-1U18EB021789-01. Any opinions, findings, and conclusions or recommendations expressed in this dissertation are those of the author and do not necessarily reflect the views of NIH.

Last, I would like to express my deepest gratitude to my family for being so supportive in every way. I would not have completed this journey without their love and support. I love you all!

xxiv

Chapter 1 Introduction

1.1 Ultrasound neuromodulation

Stimulation of brain activity to induce transient physiological effects by inhibition and excitation of neuronal tissues has the potential to enhance our perceptual, motor, and cognitive capabilities, as well as to restore sensory and motor functions lost through injuries or diseases [1]. Currently, the therapeutic utility of brain stimulation in managing numerous neurological and psychiatric diseases has been well understood [2]-[7]. In neuroscience research, dynamic mapping of brain circuits by monitoring and modulating brain activity can enhance our understanding of brain functions. This knowledge will help to better understand and treat different neurological disorders based on the identification of underlying neural circuits [8]. 1.1.1 Current state-of-the-art neuromodulation technologies

Currently, neuromodulation can be achieved with different modalities from pharmacological and chemical methods, which lack specificity and have numerous metabolic requirements, to electrical, electromagnetic, optical, and acoustic methods with higher specificity. Transcranial magnetic stimulation (TMS) is one of the conventional methods which has been proposed for neuromodulation, as shown in Fig. 1.1a. In this method, a coil which is held near the head is driven by high current pulses to generate a variable magnetic field, leading to induction of current in the conductive tissue of the brain [9]-[11]. Typically, high frequency TMS in the range of 5-20 Hz can enhance neural activity, and low frequency TMS in the range of 0.1-1 Hz can suppress the activity in the stimulation area. However, these results are not completely consistent [12]. TMS has several bottlenecks such as poor specificity and stimulation depth. Since magnetic field cannot be focused, spatial resolution in TMS is restricted to ~1 cm2. Also, stimulation depth is limited to ~1 cm due to the field divergence and the size of required coil. It is notable that new technologies such as μ-magnetic stimulation probes and devices [13], [123] can improve the performance of the TMS system. These technologies employ μ-coils which can be made in very small sizes (50-200 μm), and therefore they have a very high spatial resolution. In addition, the μ-coil made in this mechanism can be fabricated on long probes and be inserted in the brain for deep brain stimulation [13]. Transcranial direct current stimulation (tDCS) is another neuromodulation approach in which a mA- level current is driven through the scalp into cortical area beneath the electrodes [14], as shown in Fig. 1.1b. The tDCS can increase or decrease excitability by anodal (positive) or cathodal (negative) current, respectively. These currents can change membrane potential of neurons and cause neural activity. The tDCS 1

can initiate long aftereffects. The work in [15] has shown that aftereffects due to tDCS in rat subcortical areas can appear within a minute after stimulation and last up to one hour. Similar to TMS, tDCS also suffers from some limitations such as poor spatial resolution and stimulation depth. Recently, optogenetics has been proposed as an invasive method which can provide cell-level spatial resolution. Indeed, Optogenetics involves technologies for 1) the selective expression of photo-activated opsins in specific types of cells, 2) the delivery of light to the neurons that express the opsins, and 3) the acquisition of correlated behavioral and neurophysiological readouts [8]. Optogenetics enables neuronal activity to be excited or inhibited by specific wavelengths of light and is revolutionizing our understanding of different neural circuits and how they contribute to normal and pathological brain functions. Although optogenetics currently offers unrivaled spatial resolution down to the cellular level, it requires genetic alteration that is risky, if not impossible, in humans [16]. In addition, for light delivery it requires penetration into the parenchyma of the nervous system that causes scar tissue formation and long-term damage (highly invasive).

(a) (b) (c) Fig. 1.1. Some examples of neuromodulation technologies: (a) transcranial magnetic stimulation (TMS), (b) transcranial direct current stimulation (tDCS), and (c) optogenetics.

1.1.2 Transcranial focused ultrasound stimulation

Transcranial focused ultrasound stimulation (tFUS) as a noninvasive neuromodulation modality for both activation and suppression of neural activity in both central and peripheral nervous system has recently gained more attention due to its higher spatial resolution of sub-centimeter (cm) scale relative to its noninvasive counterparts. Tyler and his group have pioneered the noninvasive use of low frequency (0.25- 0.65 MHz), pulsed, focused ultrasound for 1) exciting neuronal circuits in ex vivo mouse brains with the

2 spatial-peak pulse-average acoustic intensity (Isppa) of 29 mW/mm [17], 2) evoking motor responses in

2 mouse brains by 50-ms sonication of 80 pulses (100 cycles per pulse) at 1.5 kHz with Isppa = 2.3 mW/mm , which resulted in a temperature increase of <0.01oC, where the response latencies (20-30 ms) were ~10 ms slower than ones with electrical and optical methods [18], 3) disrupting electrographic seizure activity in

intact mouse brains [19], 4) stimulating peripheral somatosensory circuits in humans with Isppa of ~100-600

2 mW/mm [20], and 5) modulating the activity of the primary somatosensory cortex in humans with Isppa of <60 mW/mm2 [21], [22]. Recently, other groups have also successfully demonstrated noninvasive ultrasonic stimulation in mice, rats, cats, rabbits, sheep, monkeys, and humans with different acoustic frequencies within the 0.2-43 MHz range (Fig. 1.2) [23]-[39]: notably, 1) noninvasive stimulation of human primary and secondary somatosensory cortices as well as the visual cortex at ~250 kHz and the Isppa of ~30 mW/mm2 [26]-[28], and 2) reliable activation of retina with 90 μm resolution using continuous stimuli at

2 43 MHz with Isppa of ~200 mW/mm [39]. Therefore, there is mounting evidence in the field that ultrasound has a robust effect upon neural tissue, although putative mechanisms for inducing electrical activity on nervous tissue via mechanical energy introduced by ultrasound are currently theoretical [40]-[42]. Although tFUS can currently reach deep regions of the brain (large spatial coverage), the main drawback with tFUS systems is their poor sub-cm spatial resolution as they operate at low sonication frequencies (<1 MHz) due to the large ultrasound loss in the skull, let alone acoustic reflections and diffractions. For example, the 0.5-MHz tFUS system in [26] targeted to the human primary somatosensory cortex achieved measured lateral and axial spatial resolution of 4.9 mm and 18 mm (volume of ~400 mm3), respectively. To the best of our knowledge, while tFUS has been demonstrated as an effective noninvasive tool for modulating neural activity with spatial resolutions of more than several millimeters, ultrasound has not yet been studied as a minimally invasive portable/implantable means for neuromodulation with improved microscopic resolution at large scale.

Fig. 1.2. Current ultrasonic neuromodulation setups [24].

1.1.3 Proposed microscopic ultrasound stimulation In this thesis, the concept of microscopic ultrasound stimulation (µUS) is proposed. In the µUS, either an electronically phased array of ultrasound transducers or several millimeter (mm)-sized focused

transducers can directly be placed on the brain surface with partially removed skull (or over thinned skull) or sub-mm-sized transducers can be implanted inside the brain tissue to deliver a focused ultrasound pressure to the neural target, as shown in Fig. 1.3. For stimulating the regions close to the brain surface (within several millimeters), mm-sized transducers (or preferably an array) can be placed on the brain surface (above the target region). This is the focus of this thesis. To stimulate very deep brain regions with very fine spatial resolutions even at a low sonication frequency (fp), sub-mm sized transducers, mounted on a flexible thin substrate, with a local ultrasound pressure can also be implanted inside the brain tissue. Although some simulation results have been conducted for this technique [44], it needs to be further explored in future works. To realize the proposed µUS system, as the first step a single mm-sized transducer (either focused or with natural focus) is considered for simplicity to generate required acoustic intensity for the stimulation (developing an array will be explored in future works). A comprehensive study on the ultrasound transducer characteristics is carried out to find optimal design of the transducer for the µUS application. A new figure- of-merit (FoM) is defined to maximize energy efficiency of the µUS system to reduce the size and power consumption. This is key to make the µUS system portable and even implantable in future. This study is presented in chapter 7 in detail. In the next step, an ultrasound neuromodulation ASIC is designed and fabricated in a 0.25-µm HV BCD Complementary Metal Oxide Semiconductor (CMOS) process with an active area of 1.7 mm2 to replace bulky commercial equipment used in the previous studies. In measurements, the proposed ASIC was able to successfully drive a focused ultrasound transducer with high voltages to generate required acoustic intensities for successful ultrasound neuromodulation. The ASIC design and measurement results are discussed in chapter 8. In future works, the whole µUS system can be integrated and tested on rodents (e.g. rat), the discussion of which is presented in chapter 9.

(a) (b) Fig. 1.3. The concept of microscopic ultrasound stimulation (µUS) in which either (a) several millimeter (mm)-sized focused transducers or (b) an electronically phased array of ultrasound transducers can directly be placed on the brain surface with partially removed skull (or over thinned skull) or sub-mm-sized transducers can be implanted inside the brain tissue to deliver a focused ultrasound pressure to the neural target, as in (a). 4

1.2 Wireless power transmission to implantable medical devices (IMDs)

Wireless power transmission (WPT) is gaining more momentum for powering electronic devices without any direct electrical contact. Inductive coupling, capacitive coupling, and ultrasound are among conventional WPT techniques which have widely been investigated so far [46]-[48]. Inductive coupling is known as the most suitable method for short-range WPT due to its high power transmission efficiency (PTE) and safety. Inductive coupling currently covers a wide range of applications with different power requirement from nanowatts in some wireless sensors and radiofrequency identification (RFID) tags to watts in mobile electronics, and kilowatts in electric vehicles [48]. Inductive coupling is also the most attractive method for wireless power and bidirectional data transmission to implantable medical devices (IMDs). An inductive link can provide sufficient power for IMDs by efficient coupling between an external transmitter coil and a small-sized receiver coil powering the implant. 1.2.1 Proposed IPM ASICs for wireless power transmission to IMDs Conventional IMDs rely on a single and centralized implant for wireless data and power transmission. In inductive WPT to such implants, variations in the coupling distance between the coils, the receiver coil misalignment/orientations, and the load can cause drastic performance degradation, demanding new integrated power management (IPM) structures. For large-scale interfacing with the nervous system and organs (e.g., the brain), such centralized approach also leads to bulky coils/electronics and complex interconnect wiring, increasing the size of the implant and causing damage to surrounding neural tissue over time [45]. To mitigate these issues, distributed implants, as shown in Fig. 1.4, have recently been proposed with several major advantages [49]- [51]. 1) It can offer large-scale interfacing by scaling up the number of distributed implants. 2) The implant size in distributed systems can be reduced to improve the safety and longevity of neural interfaces. And 3) the wiring interconnects, which are a key issue in current high-channel count implantable technologies, can be distributed among many implants and significantly be reduced. The centralized and distributed paradigms can be employed in implants with recording and stimulation capabilities via different modalities (electric, optic, acoustic, etc.). In particular, to realize the distributed paradigm in advanced implants, there is a demand for new class of IPM ASICs powered by inductive power transmission, because existing IPM ASICs are prone to the variations of the inductive link parameters such as coupling distance, orientation, and alignment. In the distributed paradigm, these parameters can vary significantly, because the implants are distributed under one or several external transmitter coils. Thus, conventional IPM ASICs do not provide reliable performance, particularly for advanced applications. For

applications that involve stimulation or imaging, this problem is more severe, because the system requires relatively high peak power levels for operation, while the power delivered to the load (PDL) is drastically affected by variations in the inductive link parameters. In this thesis, multiple IPM ASICs are introduced to significantly improve the robustness of inductive power management against variations in inductive link parameters. The current state of the art and the proposed ASICs are discussed in chapters 2 to 6 in detail. A new class of IPM topologies are also developed in which the receiver LC-tank is employed as a current source, unlike conventional voltage-mode (VM) topologies. In some exemplary implementations: 1) thanks to the proposed switching technique, the operation range of the inductive link can be extended up to 125%, 2) robustness of the link is improved by 150% and 500% against variations in the orientation and alignment of the receiver coil, respectively, and 3) other new features have been added to the proposed CM topology to improve driving capability (i.e. output power) of the system up to 750%.

1.3 Contributions 1.3.1 Integrated power management ASICs 1.3.1.1 Current-based resonant power delivery ASIC

A current-based resonant power delivery (CRPD) technique with multi-cycle switching has been presented that enables efficient inductive power transmission at large distances. Unlike the conventional inductive link, in which the receiver (Rx) LC-tank is utilized as a voltage source, the proposed CRPD switches the Rx LC-tank for several cycles in a novel fashion to utilize it as a current source. Therefore, the voltage across the load (RL) can be significantly higher than the Rx LC-tank voltage. This eliminates the

need for DC-DC charge pumps or AC-DC voltage multipliers, which require several capacitors and diodes.

In measurements, CRPD was capable of achieving the DC voltage of 3.1 V across an RL of 100 kΩ, by switching the Rx LC-tank at 50 kHz with an AC voltage amplitude of 1 V across the Rx coil at the operation frequency of 1 MHz. One journal paper ([52]) and one conference paper ([53]) have been published on this switching technique. 1.3.1.2 Self-regulated reconfigurable voltage/current-mode IPM ASIC A reconfigurable power management structure for inductive power delivery has been proposed by adaptively employing either resonant voltage or current mode to improve the inductive power transmission performance against coils’ coupling distance (d), orientation (ϕ), and load impedance (RL) variations. At the presence of these variations, unlike conventional VM and CM power managements with poor voltage- and power-conversion efficiencies (VCE and PCE respectively), the proposed voltage/current-mode inductive power management (VCIPM) chip can achieve high VCE by automatically switching to CM when the receiver (Rx) coil voltage (VR) is smaller than the required load voltage (VL), and achieve high

PCE by operating in VM when VR > VL. A VCIPM prototype chip was fabricated in a 0.35 µm 2P4M standard CMOS process occupying 0.52 mm2 active area. In measurements the VCIPM chip, operating at

1 MHz, achieved a high VCE of 4.1V/V for RL of 100 kΩ by operating in CM with fsw = 166.6 kHz, and extended d and ϕ from 6 cm to 13.5 cm (125%) and 30º to 75º (150%), respectively, compared to its VM counterpart by adaptively switching from VM to CM. One journal paper ([54]) and one conference paper ([55]) have been published on this ASIC. 1.3.1.3 An inductive voltage/current-mode IPM ASIC with seamless mode transition and energy recycling An IPM with the unique capabilities of seamless-voltage/current-mode (SVCM) operation and energy recycling is presented for robust inductive power delivery. Utilizing parasitic bulk diodes with lower voltage drop, this IPM seamlessly transitions between VM and CM in a safe and robust fashion, extending the input-voltage range (removing dead zone) and significantly improving PCE in CM operation. The IPM first provides the required load power (PL) by one-step rectification/regulation, and then stores the surplus energy into a storage capacitor to extend the receiver (Rx) operation time via energy recycling when the input power is insufficient. A proof-of-concept chip was fabricated in a 0.35 µm CMOS process. In measurements, the chip safely achieved a regulated voltage of 3 V for a wide input-voltage range (without dead zone) by switching the Rx LC-tank at 142 kHz. With zero input power, the chip extended the Rx

operation time by 250% thanks to the energy recycling. One journal paper ([56]) and one conference paper ([57]) have been published on this ASIC. 1.3.1.4 A dual-output reconfigurable shared-Inductor boost-converter/current- Mode inductive power management ASIC

A dual-output, reconfigurable IPM ASIC for inductive power delivery has been proposed and developed. The proposed ASIC operates either as a CM rectifier or a boost converter by sharing the receiver

(Rx) coil (LRx) to improve performance of inductive power transmission against the variations of Rx input power (PRx) and dual-output DC power (PL + PHv). Conventional IPM structures either fail to generate regulated outputs (e.g., VL and VHv) when the required PL + PHv exceeds PRx or suffer from low PCE when

PRx exceeds PL + PHv due to voltage regulation and protection. To overcome these challenges, the proposed

ASIC offers the unique capabilities of 1) generating multiple regulated outputs (VL = 2.6 V, VHv = 3.9 V) directly from LRx with single-stage conversion, 2) efficient CM operation with active rectification, enabled by adaptive switching control (ASC), 3) charging a large capacitor (CS) with the purpose of operating as a shared-inductor boost converter (SBC), transferring energy from CS to CL and CHv, when PRx < PL + PHv, and 4) efficient voltage-power regulation (VPR). A proof-of-concept chip was fabricated in a 0.35-µm 2P4M standard CMOS process occupying 1.35-mm2 active area. In measurements, the proposed ASIC was able to successfully provide regulated VL = 2.6 V and VHv = 3.9 V despite significant variations in PRx, PL, and PHv. Moreover, the chip extended the peak output power range by 750% and improved the PCE by 1.3 times and 8.1 times thanks to the ASC and VPR, respectively. One journal paper ([58]) has been published on this ASIC. 1.3.2 Microscopic ultrasound stimulation 1.3.2.1 A comprehensive study of ultrasound transducer characteristics in microscopic ultrasound neuromodulation A key element in the proposed µUS is the ultrasound transducer that converts electrical power to acoustic pressure. The literature lacks a comprehensive study (in a quantitative manner) of the transducer characteristics, such as dimension, focusing, acoustic matching, backing material and sonication frequency

(fp), in the µUS. This research studies the impact of these design parameters on the acoustic beam profile of millimeter-sized transducers with the emphasis on the stimulation spatial resolution and energy efficiency, which is defined as the µUS figure-of-merit (FoM). For this purpose, disc-shaped focused and unfocused piezoelectric (PZT-5A) transducers with different dimension (diameter, thickness), backing material (printed circuit board, PCB, and air) and acoustic matching in the frequency range of 2.2-9.56 8

MHz were fabricated. The experimental results with both water and sheep brain phantom medium demonstrate that acoustically matched focused transducers with high quality factor are desirable for µUS, as they provide fine spatial resolution and high acoustic intensities with low input electrical power levels (i.e., high FoM). One journal paper ([59]) has been published on this study. 1.3.2.2 An ASIC for microscopic ultrasound neuromodulation

An ASIC with wireless power and data transmission capabilities has been proposed and developed to provide required control signals to efficiently drive an ultrasound transducer with sufficient power for successful ultrasound neuromodulation. The ASIC is designed in a 0.25-µm HV BCD CMOS process and is equipped with a power management unit based on an inductive full-wave active rectifier-regulator topology to achieve short-range wireless power and data transfer. Providing sufficient power with high efficiency was the main goal in the design of this ASIC. Thus, a class-DE diver with nonoverlapping switching signals was employed to reduce switching losses and achieve the maximum efficiency. In measurements, the ASIC was able to drive a focused ultrasound transducer at the frequency of 4.6 MHz to generate maximum pressure of 3 MPa which is sufficient for successful ultrasound neuromodulation.

Chapter 2 Current-Based Resonant Power Delivery with Multi-Cycle Switching for Extended-Range Inductive Power Transmission

Inductive power transmission has extensively been used over the past decades for contactless energy transfer to power a device or recharge its battery. It has covered a wide range of applications with different power requirements from µW to kW. Some examples include powering radio frequency identification (RFID) tags and implantable medical devices (IMDs), and recharging batteries of handheld mobile devices and electric vehicles [60]-[61]. In an inductive power transmission link, as shown in Fig. 2.1, an efficient power amplifier (PA) drives the transmitter (Tx) coil, which is mutually coupled to a receiver (Rx) coil. A power management is required to rectify and regulate the AC voltage across the L2C2-tank (VR) to a constant

DC voltage across the load (RL), i.e., VL in Fig. 2.1.

Fig. 2.1. Generic model of conventional inductive power transmission links. The power management includes a rectifier or a voltage multiplier depending on the voltage amplitude across L2C2-tank, i.e., VR. The power management also includes a regulator, which has been removed for the sake of simplicity.

3 The mutual coupling between a pair of coupled coils, k12 in Fig. 2.1, is inversely proportional to d , where d is the center-to-center spacing between the coils when they are in parallel planes and perfectly aligned [48]. A key requirement in all of the aforementioned applications is to provide sufficient VL, while maintaining high power transmission efficiency (PTE), in worst-case conditions when d is relatively large, coils are misaligned, or Rx coil is miniaturized. It should also be noted that even in some low-power applications such as neural stimulators, a relatively high VL is often required. In these conditions, one can increase the PA voltage, Vs in Fig. 2.1, to further increase VL. In practice, however, VL can only be increased to the extent that the tissue exposure to the electromagnetic field is maintained within safety limits, and regulatory requirements for interference with nearby electronics is satisfied [63]. Therefore, achieving sufficient VL at large distances is quite challenging. In order to extend the powering distance, multi-coil inductive links in the form of 3- and 4-coil links have been proposed to provide impedance matching in the Rx side, and source decoupling in the Tx side

[64] ,[65]. Compared to their 2-coil counterpart, the 3- and 4-coil links improve PTE at the cost of increasing the size. Alternatively, off-chip matching circuits have also been proposed for impedance transformation by using a network of capacitors and inductors, which again add to the size, cost, and power loss in the Rx side. In recent years, several power management integrated circuits have been presented to convert the AC voltage of the inductive link (VR) to the DC voltage (VL) [66]-[72]. Passive and active rectifiers that employ threshold-voltage cancelation and offset-controlled high-speed comparators have improved the power conversion efficiency (PCE) [68]. At coupling distances, in which VR is slightly smaller than the required

VL, voltage doublers and reconfigurable voltage rectifier/doubler with higher voltage conversion efficiency

(VCE) have recently been proposed to achieve the desired VL at the cost of adding off-chip capacitors [69] -[72]. In order to further extend the range of inductive power transmission, AC-DC voltage multipliers and

DC-DC charge pumps can also be used to achieve the required VL. However, these structures require several off-chip capacitors and diodes, which add to the size, cost, and complexity of the Rx [73]-[75]. In summary, in such power management circuits the Rx LC-tank in Fig. 2.1 has been considered as a voltage source to generate VL, which has led to limitations on the maximum achievable VL. Inductive links have also been employed for efficient charging of capacitors and batteries [76]-[78]. While most of these works have again utilized the Rx LC-tank as a voltage source, the Rx LC-tank has been used as a current-limited voltage source in [76] by adding an additional series capacitor. In [77], the resonance capacitor in Rx has been removed and the Rx coil has been switched in every power carrier cycle to charge a capacitor through the Rx coil current. However, this non-resonant Rx structure has resulted in low voltages across the Rx coil and drastically reduced VL. In [78], the Rx coil has been used as a current source to recharge a battery using two switches. However, most RFID tags and IMDs cannot have batteries due to their size and weight constraints. Our group has also proposed for the first time a switching-based current-based resonant technique for inductive power delivery, which has been called Q-modulation [79]. In Q-modulation, the Rx LC-tank of the inductive link is shorted twice in every power carrier cycle to provide load-matching condition, which helps to maximize PTE. This has been achieved by adding a single switch in parallel with the series- connected Rx LC-tank, which is then used as a current source. Although Q-modulation has helped to increase the voltage across the Rx LC-tank (VR), VL has been still smaller than VR, particularly for large RL values, resulting in VCEs < 1. The Q-modulation is suitable for applications that involve high power consumption, i.e., small RL in the range of hundreds of ohms and below, where RL is smaller than the equivalent resistance of the Rx LC-tank. In such conditions, Q-modulation helps to match small RL to the 11

larger resistance of the Rx LC-tank [79]. However, in RFID tags and many low-power IMDs implanted deep inside the body, RL is in the order of several kΩ and above, in which Q-modulation is not applicable. In this chapter, a new current-based resonant power delivery (CRPD) technique is proposed that utilizes only a single switch to short the series-connected Rx LC-tank of the inductive link for several power carrier cycles in a unique fashion to effectively use it as a current source. Therefore, an optimal AC-DC voltage conversion with high VCE greater than one can be achieved in the Rx side. This helps to extend the range of inductive power transmission, particularly for applications that involve low-power consumption in the

Rx side, or require large VL. The CRPD concept, circuit theory, and modeling will be presented in Section 2.1, followed by proof-of-concept measurements results in Section 2.2. 2.1 Proposed current-based resonant power delivery (CRPD) technique

Fig. 2.2 shows the circuit schematic of the proposed inductive link, equipped with CRPD. Compared to the conventional inductive link in Fig. 2.1, a single switch (SW) has been added in parallel with the series- connected L2C2-tank, and the power management is represented by a passive rectifier to generate a DC voltage (VL) across the load capacitor and resistor (CL || RL). In Fig. 2.2, VR represents the voltage across L2 or the L2C2-tank when SW is closed. As shown in Fig. 2.2, in CRPD the L2C2-tank is connected in series, while in conventional inductive links the L2C2-tank can be connected in parallel or in series for large and small RL values, respectively.

2.1.1 CRPD Concept Fig. 2.3 shows the switching diagram and key waveforms of the proposed CRPD, including Rx coil current (iL2), VR, VL, and the clock for controlling SW. The operation of CRPD can be divided into 3 regions.

In region (I), which is shown as t0 < t < t1 in Fig. 2.3, SW is closed for several power carrier cycles (Tp = 1

/ fp). Therefore, the high-Q L2C2-tank stores the energy, provided by the inductive link. In region (II), which is shown as t1 < t < t2 in Fig. 2.3, at the peak of iL2, i.e., iL2,max, where the voltage across C2 is zero and all the energy is stored in L2, SW is opened to deliver all L2 energy to the load for less than 0.25Tp. At t = t2,

iL2 reaches zero and the switching state remains open in region (III), which is shown as t2 < t < t3 in Fig.

2.3, for t3 - t1 = 0.25Tp. At t = t3 the next power cycle starts, SW is closed again, and iL2 starts building up.

Fig. 2.3. Switching diagram and key waveforms of the proposed CRPD to achieve high AC-DC VCE (VL / VR,peak). SW is first closed for several Tps to store energy in L2C2-tank. Then, SW is opened at the peak of iL2 for 0.25Tp to deliver L2C2-tank energy to the load.

The switching timing is key in CRPD to achieve the optimal performance, because the L2C2-tank should have enough time of several Tps to store high amount of energy, and the energy transfer to the load needs to be started at iL2,max by opening SW for Toff = 0.25Tp, as show in Fig. 2.3. While the onset of turning SW on and off are fixed in CRPD, its switching frequency, i.e., fsw = 1 / Tsw, is a degree of freedom that has been provided by CRPD, compared with conventional inductive links.

At t = t1, since VR is zero and the only path for discharging L2 is the rectifier, VR suddenly increases to >

VD + VL, where VD represents the forward voltage of the rectifier. The peak voltage of VR in region (I), i.e.,

VR,peak, does not need to be higher than VL, because L2C2-tank is being effectively used as a current source.

Therefore, an AC-DC voltage conversion with high VCE, which is defined as VL / VR,peak in CRPD, can be achieved. Since L2C2-tank is in series with CL || RL in regions (II) and (III) and CL is much larger than C2,

L2 can be fairly assumed at resonance in our proposed CRPD. In addition, since the duration of regions (II) 13

and (III) are much shorter than that of region (I), the L2C2-tank resonance and quality factor are approximated to those in region (I).

It should be noted that in CRPD since the Rx LC-tank is shorted for several cycles, during which L2 cannot deliver power to RL, a better performance can be achieved at larger RL values that demand less power.

For applications with small RL, in region (I) where only CL provides power for RL, VL decreases significantly and, therefore, the steady-state VL could be smaller than VR,peak in Fig. 2.3. 2.1.2 The circuit theory behind CRPD

Figs. 2.4a and 2.4b show the inductive link model in regions (I) and (II)-(III), respectively, to find iL2,

VL, and PTE. Since SW is open in both regions (II) and (III), the equivalent circuit in Fig. 2.4b can be used for both regions. The mutual inductance between L1 and L2, i.e., M12, can be modeled with V12 = - jɷp×M12×IL2 and V21 = jɷp×M12×IL1 in Tx and Rx sides, where ɷp = 2π/Tp = 2πfp is the power carrier frequency, and IL1 and IL2 are the amplitude of sinusoidal currents in L1 and L2, respectively [65].

(a) (b) Fig. 2.4. The proposed CRPD-based inductive link model in (a) region (I) with closed SW, and (b) region (II)-(III) with open SW.

Since the duration of region (I) is much longer than that of regions (II)-(III), the L2C2-tank can be considered at resonance in CRPD, and IL1 and IL2 in steady state can be found from region (I) circuit model in Fig. 2.4a,

1 1 ( + j p L1 + R1)I L1 +V12 = Vs ,( + j p L2 + R2 + Rsw )I L2 −V21 = 0 (2.1) j pC1 j pC2

1/2 where Rsw is the switch resistance and |Vs| is the amplitude of the source, Vs. At resonance, ɷp = 1/(L1C1)

1/2 = 1/(L2C2) and, therefore, the amplitude of V21 in steady state can be found from, (M  )2 V k Q L / L V k Q Q R V = V M  /(R + 12 p ) = s 12 1 2 1 = s 12 1 2 2 , (2.2) 21 s 12 p 1 2 2 R2 + Rsw 1+ k12Q1Q2eq (1+ k12Q1Q2eq ) R1

1/2 where k12 = M12 / (L1L2) , Q1 = ωpL1 / R1, and Q2eq = ωpL2 / (R2+ Rsw) is the equivalent Q of L2 in region (I).

Therefore, the Tx side can be considered as a sinusoidal source, i.e., V21 in (2.2), in the Rx side. 14

In order to maximize iL2 and VR in region (I) of Fig. 2.3, which helps to increase VL, one should maximize

|V21| in (2.2) for a given |Vs| since iL2 = |V21| / (R2 + Rsw) in region (I). Therefore, at large distances where k12 is quite small, k12, Q1, and Q2 should be maximized, while R2 + Rsw should be minimized to maximize iL2 and, consequently VL.

The transient iL2(t) in regions (I) and (II)-(III), which is associated with circuits in Fig. 2.4a and 2.4b, can be found from,

di (t) 1 V (t) = L L2 + i (t)dt + (R + R )i (t) 21 2  L2 2 sw L2 , (2.3) dt C2

di (t) 1 1 V (t) −V = L L2 + i (t)dt + i (t)dt + (R + R )i (t) 21 D 2  L2  L2 2 D L2 , (2.4) dt C2 CL respectively, where RD represents the resistance of the rectifier. To find (2.4), RL is safely ignored compared to CL, because CL should be chosen large enough to reduce the voltage ripples across RL. One can also ignore CL in (2.4) as it is much larger than C2 in inductive links.

The solution for iL2(t) in region (I) for t0 < t < t1 can be written as, iL2 (t) = exp((t −t0 ))[A1 cos(d (t −t0 ))+ A2 sin(d (t −t0 )]− A3 sin(p (t −t0 )) , (2.5) where α and ɷd can be found from,

 p  p 2  = − , d = 4Q2eq −1 . (2.6) 2Q2eq 2Q2eq

The particular solution for iL2, which is originated from |V21| in (2.2), determines A3, while A1 and A2 can be found from the initial conditions of iL2. Therefore, A1-3 in (2.5) can be found from,

, (2.7)

and A3 = |V21| / (R2 + Rsw), where VC2(t0) is the initial voltage across C2 in each switching cycle, which is the same as VC2(t3) in region (III) from the previous cycle as shown in Fig. 2.3. At startup, VC2(t0) in (2.7) should be set to zero. It can be seen that in order to increase iL2 in (2.5), A3 should be maximized by increasing |V21| in (2.2) and reducing R2 + Rsw. This implies that k12, Q1, and Q2eq should be maximized.

In region (I), CL is the only source that delivers power to RL and, therefore, VL slowly decreases for the amount of ∆VL,dec as shown in Fig. 2.3. One can find ∆VL,dec from,

−Tsw + Toff VL,dec = VL (t0 )(1− exp( )) (2.8) RLCL where Tsw = 1 / fsw and Toff = 0.25Tp are the switching time period and switch turn-off duration, respectively.

The solution for iL2(t) in region (II) for t1 < t < t2 can be found by solving (2.4) as, iL2 (t) = Bexp((t −t1))cos(d (t −t1) −) + A3 cos(p (t −t1)) , (2.9) where A3 is almost equal to |V21| / (R2 + RD) for large CL, and

di (t ) / dt −(i (t ) − A ) −1 diL2 (t1) / dt −(iL2 (t1) − A3 ) L2 1 L2 1 3 2 2  = tan ( ) B = ( ) + (iL2 (t1) − A3 ) , d d (iL2 (t1) − A3 ) di (t ) V21 − (VC 2 (t1) +VL (t1) +VD + (R2 + RD )iL2 (t1)) L2 1 = . (2.10) dt L2

In (2.10), iL2(t1) should be found from (2.5), and VC2(t1) is the voltage across C2 in region (I) and can be found from,

1 t1 V (t ) = i (t)dt +V (t ) , (2.11) C 2 1 C  L2 C 2 0 2 t0 using iL2 in (2.5). The time that iL2 in (2.9) reaches to zero, i.e., t = t2 in Fig. 2.3, can be approximately found from,

t2 − t1 = ( / 2 −)/d , (2.12) if |V21| is ignored in region (II), i.e., A3 = 0, since the total stored energy in the L2C2-tank in region (II) is much larger than the energy provided by small V21, particularly at large distances, where k12 in (2.2) is relatively small.

In region (II), where iL2 is nonzero and the L2C2-tank is connected to the load, L2 delivers power to CL ||

RL. Therefore, VL gradually increases by discharging L2 energy into CL. The amount of ∆VL,inc as shown in Fig. 2.3 can be found from,

t2 V = i (t)dt/ C , (2.13) L,inc  L2 L t1 using iL2 in (2.9). In region (III), the rectification diode forces iL2 to remain zero, which in turn maintains

VC2 constant for t2 < t < t3. Therefore, VC2(t0) in (2.7) for the next switching cycle can be found by calculating

VC2 at t = t3 or t2 from,

1 t2 V (t ) = i (t)dt +V (t ) , (2.14) C 2 0 C  L2 C 2 1 2 t1 using iL2 in (2.9). Region (III) have intentionally added for the duration of (t3 - t1) = Toff = 0.25Tp to ensure that L2 is completely discharged into CL, which eliminates the need and power consumption for sensing the zero-crossing times of iL2.

According to (2.8) and (2.13), VL decreases in region (I) and increases in region (II) for each switching cycle (Tsw). Therefore, the final value of VL after n switching cycles can be found from,

n VL (t = nTsw) = VL,inc (i) − VL,dec (i), (2.15) i=1 where ∆VL,dec(i) and ∆VL,inc(i) can be calculated from (2.8) and (2.13) for each Tsw, respectively.

The PTE of the CRPD-based inductive link in Fig. 2.2 is defined as the power delivered to RL, PL = 2 VL /RL, divided by the power provided by Vs, Ps. At steady state, the final value for VL can be calculated from (2.15) to find PL. Since the L2C2-tank is mostly shorted in the CRPD-based link, the link model in Fig.

2.4a can be used to find Ps. In Fig. 2.4a, the L2C2-tank can be modeled in the Tx side as a reflected impedance [65],

2 2 Rref = k12p L1Q2eq = k12Q1Q2eq  R1 , (2.16) in series with R1. Since L1 is canceled out by C1 at resonance, the PTE of CRPD-based inductive link can be written as,

2 2 VL / RL VL R1 2 PTE = 2 = 2 . (1+ k12Q1Q2eq ) . (2.17) 0.5 |Vs | /(R1 + Rref ) VS RL

2.1.3 Theory vs. Simulation

In order to demonstrate the functionality of the CRPD and verify the accuracy of the presented circuit theory, the CRPD-based inductive link in Fig. 2.2 was simulated in the Cadence Spectre circuit simulator (Cadence Technology, San Jose, CA), and compared with the calculation results based on the theory. Table

2.1 summarizes the circuit parameters that were used in our simulations. The amplitude of Vs operating at fp of 1 MHz was set to 1.5 V to achieve VR amplitude of 1 V when SW was always closed. This implies that a conventional inductive link would achieve VL < 1 V for such settings.

TABLE 2.1: CRPD-based inductive link parameters used in simulations

Parameter Value Parameter Value

L1/L2 (µH) 205/4.2 k12 0.01

R1/R2 (Ω) 30/1.1 CL (nF) 100

C1/C2 (nF) 0.123/6 RL (kΩ) 100

|Vs | (V) 1.5 Toff (ns) 250

RD/Rsw (Ω) 0/1 fsw (kHz) 50

VD (V) 0.4 fp (MHz) 1

Fig. 2.5 shows the simulated and calculated results for iL2, VR, VL, and SW during 50 μs of operation, when SW was switched at the rate of fsw = 50 kHz. Although the peak amplitude of VR VR,peak) during L2C2- tank energy storage (SW: closed) is ~1 V, VL has reached to ~ 1.7 V due to a sudden increase in VR to > 2.3 18

V to compensate for VL + VD = 2.1 V, and provide a path for discharging L2 into CL. It can be seen in Fig.

2.5 that our calculated results match very well with simulations. The slight errors in calculated VL are due to the approximations that were made in finding initial conditions.

Fig. 2.6 shows the simulated and calculated waveforms for VL at fsw = 50 kHz, when VR,peak was as small as 1 V. It can be seen that VL has reached to ~ 3.7 V in steady state, which results in an AC-DC VCE of VL

/ VR,peak = 3.7 thanks to the optimal control of SW in CRPD. Fig. 2.6 inset also shows the ripples on VL in steady state, in which ∆VL,dec and ∆VL,inc in (2.15) have cancelled out each other.

It can be seen in Fig. 2.6 that the rate of increase in VL is much faster at startup, where VL is relatively small, because 1) according to (2.8), ∆VL,dec is proportional to VL and, therefore, ∆VL,dec is quite small at low

VL, and 2) ∆VL,inc in (2.13) is proportional to iL2 values within t1 < t < t2, which decay at a lower rate at low

VL, where the voltage on L2 is smaller and, therefore, ∆VL,inc is larger at low VL. However, as VL increases,

∆VL,dec is increased and ∆VL,inc is decreased, until they become equal, resulting in a steady-state value for

VL.

2.2 Measurement results

A proof-of-concept CRPD-based inductive link was designed using printed spiral coils (PSCs) and its measured performance was compared with that of a conventional inductive link. Table 2.2 shows the geometries of Tx and Rx coils as well as circuit parameters that were used in our measurements. The inductive link was designed at fp of 1 MHz to power a nominal RL of 100 kΩ at the nominal distance of d12

= 7 cm. The diameter of the Rx coil was limited to Do2 = 3 cm. The same set of Tx and Rx coils were used for both CRPD-based and conventional links. Fig. 2.7 shows the CRPD measurement setup that includes Tx and Rx coils, designed on FR4 printed circuit boards (PCBs), and a custom-designed discrete circuit for switching L2C2-tank based on the optimal 19

switching scheme in Fig. 2.3. The setup block diagram has also been shown in Fig. 2.7 inset. In this proof- of-concept setup, a discrete transistor and diode with nominal Rsw of 0.2 Ω and VD of 0.3 V at the forward current of 10 mA were used, respectively. A function generator provided two synchronous signals to drive

L1 at fp of 1 MHz and the switch at adjustable fsw. For the sake of comparison, the measurement setup was slightly modified to realize a conventional inductive link, followed by a passive rectifier with similar diode and CL || RL as shown in Fig. 2.1.

TABLE 2.2: Coils geometries and circuit parameters in measurements for CRPD-based and conventional inductive links Parameters Symbols CRPD Conventional

Inductance (µH) L1 250

Outer diameter (mm) Do1 170

Fill factor φ1 0.4

L1 Number of turns n1 35

Line width (mm) w1 1.2

Line spacing (mm) s1 0.2

Quality factor Q1 62.5

Inductance (µH) L1 4.4

Outer diameter (mm) Do2 30

Fill factor φ2 0.55 L2 Number of turns n2 14

Line width (mm) w2 0.6

Line spacing (mm) s2 0.2

* Quality factor Q2 24.2 29

L1 - L2 coupling distance (mm) d12 70

Operation frequency (MHz) fp 1

Nominal load resistance (kΩ) RL 100

Load capacitance (nF) CL 100

Source voltage (V) |Vs| 0.39

Received voltage (V) |VR| 1 1.05

Load voltage (V) VL 3.1 0.95

Switching frequency (kHz) fsw 50 - Voltage conversion efficiency VCE 3.1 0.9 PTE (%) η 5.3 0.45

* Q2 in CRPD link also includes Rsw of 0.2 Ω.

Fig. 2.8 shows the measured waveforms for the CRPD, including from top: VL, VR, and SW, when the inductive link was operating at fp = 1 MHz and d12 = 7 cm with fsw = 50 kHz. As it can be seen in Fig. 2.8a,

VL across RL and CL of 100 kΩ and 100 nF increased for ~ 20 mV at each switching cycle of 20 µs, respectively. As shown in Fig. 2.8b, VL reached to 3.1 V within ~ 30 ms after the switching started, when

the maximum amplitude of the received voltage, |VR|, was only 1 V, leading to high VCE of 3.1 thanks to

CRPD. As shown in Fig. 2.8b inset, when SW was opened every 20 µs, VR suddenly jumped to ~ 3.4 V, which was higher than VL of 3.1 V, to provide a path for L2 to be discharged into the load. It should be noted that the amplitude of VR was very small when SW = 0, i.e., switch was open for a long time, because the series connected L2C2-tank was heavily loaded by RL of 100 kΩ. In all measurements, to reduce the discrete switch resistance (Rsw), SW was increased to 4 V. However, in the future implementation of the integrated

CRPD, a low-voltage large transistor with small Rsw can be used.

(a) (b)

In measurements, in order to synchronize SW with the peak of iL2 as shown in Fig. 2.3, the zero-crossing times of VR were observed, because when SW is closed and VR = 0, the maximum energy is stored in L2, which is equivalent to iL2 peaks. It should also be noted that for the same conditions, the conventional inductive link followed by the same passive rectifier achieved |VR| and VL of 1.05 and 0.95 V, leading to the small VCE of 0.9. In the conventional inductive link, |VR| was slightly higher than that of CRPD, because

L2 was not loaded by Rsw of 0.2 Ω and, therefore, Q2 was higher.

Fig. 2.9 shows VL and PTE of CRPD-based inductive link vs. fsw for the RL of 100 kΩ and |Vs| of 0.39 V at d12 = 7 cm. It can be seen that at the optimal fsw of 50 kHz, maximum VL and PTE of 3.1 V and 5.3% were achieved, respectively. For fsw much greater than 50 kHz, the L2C2-tank cannot store maximum energy and, therefore, iL2 and VR in Fig. 2.3 are small, resulting in low VL values. For fsw much smaller than 50 kHz,

L2C2-tank is shorted for a long period, and more energy is wasted into the L2C2-tank (R2 + Rsw), resulting in low VL again. It should be noted that |Vs| was measured at the input of the inductive link, as shown in Fig. 2.7 inset, to eliminate the effects of signal generator output impedance in our measurements. It is worth to note that for the same conditions, the conventional inductive link achieved VL and PTE of 0.95 V and 0.45%, respectively. Therefore, the proposed CRPD-based inductive link increased VL and PTE by ~ 3.3 and 11.8 times, compared to the conventional inductive link, respectively.

Fig. 2.9. Measured VL and PTE of the CRPD-based inductive link vs. fsw for RL of 100 kΩ at d12 = 7 cm and |Vs| = 0.39 V. Maximum VL and PTE of 3.1 V and 5.3% were achieved at the optimal fsw of 50 kHz, respectively.

Figs. 2.10a and 2.10b show VL and PTE vs. RL for both CRPD-based and conventional inductive links at d12 = 7 cm and |Vs| = 0.39 V, as well as the optimal fsw to maximize VL and PTE at each RL, respectively.

For the CRPD link, the optimal fsw at each RL was first found in measurements, and then VL and PTE were measured at each RL with the corresponding fsw. It can be seen in Fig. 2.10 that for small RL, which demand more current from CL, the optimal fsw has been increased to more frequently charge CL. However, for large

RL the optimal fsw has been decreased to provide more time for L2C2-tank to reach to its maximum energy.

It can be seen in Figs. 2.10a and 2.10b that the same fsw can maximize both VL and PTE. The CRPD-based 22

link achieved higher VL and consequently PTE for RL ≥ 10 kΩ with the optimal fsws of 50-100 kHz. However, the conventional link was superior for RL < 5 kΩ, at which the equivalent resistance of parallel-connected

L2C2-tank was matched to RL. In CRPD, ∆VL,dec in (2.8) significantly increased for small values of RL, and limited VL. Nonetheless, the proposed CRPD-based link achieved higher VL and PTE for a wide range of

RL. It is worth noting that based on Figs. 2.10a and 2.10b, the proposed CRPD is mostly suitable for applications that either involve low-power consumption in the Rx side, i.e., large RL, such as RFID and low-power IMDs, or require a duty-cycled high-power and high-voltage Rx, in which a large capacitor (CL) is often charged through the inductive link and then discharged on a small RL. As an example, Fig. 2.10a shows that VL of 7.1 V can be achieved for the large RL of 1 MΩ, while |VR| was as small as 1 V, leading to the VCE of 7.1.

Fig. 2.11 shows the measured values of VL vs. d12 for CRPD-based and conventional inductive links for

RL of 100 kΩ. Fig. 2.11 also shows the optimal values of fsw for the CRPD link at each distance. As the distance was increased from 1 cm to 15 cm, the optimal fsw reduced from 100 kHz to 50 kHz. In these measurements, |Vs| was increased to 1.05 V to achieve a minimum VL of 2.8 V at d12 = 7 cm in the conventional inductive link, which can be further regulated to 2.5 V. As shown in Fig. 2.11, the proposed

CRPD could extend the powering distance to 13 cm to achieve the minimum VL of 2.8 V for the same |Vs| of 1.05 V. It should be noted that VL was reduced for d12 < 5 cm in both links, because the reflected load in was increased at short distances, which reduced the available Ps. Therefore, |Vs| can be safely increased at short distances to increase VL to 2.8 V in the conventional inductive link with much smaller Ps compared to d12 > 5 cm, since PTE is much higher at short distances.

(a) (b)

Fig. 2.10. Measured (a) VL and (b) PTE of the CRPD-based and conventional inductive links vs. RL at d12 = 7 cm and |Vs| = 0.39 V. The VL and PTE of the CRPD link were measured at the corresponding optimal fsw for each RL. It can be seen that the proposed CRPD can significantly improve VL and PTE for RL values larger than 5 kΩ.

A new technique has been presented for inductive power delivery at large distances, where the receiver coil voltage is smaller than the required load voltage. The receiver LC-tank has been switched every several power carrier cycles to store energy in the LC-tank and then deliver it to the load within a quarter of the power carrier cycle by connecting the receiver LC-tank in series with a rectifier, which drives the load capacitor and resistor. Since the receiver LC-tank has been effectively used as a current source, a large AC- DC voltage conversion efficiency has been achieved. The circuit theory behind the proposed technique has been presented and verified with simulation results. Measurement results have shown that the proposed technique can significantly increase the output of a conventional inductive link, followed by a passive rectifier. In a proof-of-concept measurement setup, the proposed technique could increase the rectifier output by 3.3 times from 0.95 V to 3.1 V across a load of 100 kΩ, by switching the receiver LC-tank at 50 kHz. Our measurements have validated that the proposed current-based resonant power delivery technique is suitable for extending the range of inductive power transmission for applications that involve receivers with low-power consumption and high voltage.

Chapter 3 Self-Regulated Reconfigurable Voltage/Current- Mode Inductive Power Management

In general, there are four key parameters in inductive power transmission: 1) power delivered to the load 2 (PDL) defined as PL = VL /RL, 2) power transmission efficiency (PTE) defined as PL/PS, where PS is the PA output power, 3) power conversion efficiency (PCE) within Rx defined as PL/PR, where PR is the power management input power, and 4) voltage conversion efficiency (VCE) in Rx defined as VL/VR,peak, where

VR,peak is the amplitude of VR in steady state. While achieving high PTE and sufficient PDL should always be considered in the design of inductive links, maximizing PCE or VCE depends on VR. When VR is larger than the required VL, which is the case when coupling distance (d) is relatively small and coils are well aligned, high PCE is more desirable to maximize the power efficiency within Rx, and VCE < 1 V/V is quite acceptable. However, for VR < VL with large d and/or misaligned coils, VCE > 1 V/V is paramount to achieve the required VL even at the cost of lower PCE. Therefore, for most WPT applications that involve d and coils’ orientation (ϕ) variations and misalignments, the power management should be smart enough to sense VR and decide to whether maximize VCE or not. Conventional integrated power managements in the form of rectifiers or doublers operate in voltage mode (VM) using active synchronous switches to achieve high AC-DC power-conversion efficiency (PCE). However, they suffer from limited voltage-conversion efficiency (VCE), requiring large AC carriers across the receiver (Rx) LC-tank [66]-[76]. Current mode (CM) structures are the other group of power managements. This group potentially can achieve VCE > 1 due to inherit characteristic of their operation [78]-[80]. In previous chapter, a single-switch CM resonant power delivery technique was presented. This

CM technique could achieve high VCE of 3.1 V/V at RL = 100 kΩ. But, measurement results show that for application with small RL range VM structures are preferable due to better load matching condition.

Considering a wide range of d, ϕ, and RL variations in inductive links, neither VM nor CM power management structures can provide the optimal performance. This has been the motivation to propose a reconfigurable voltage/current mode inductive power management (VCIPM) that can adaptively switch between VM and CM based on VR amplitude to 1) maximize PTE when VR is larger than the required VL of

3.2 V, and 2) maximize VCE for small VR ≤ 3.3 V. In addition, the VCIPM chip can increase PTE for a wide range of large and small RL by operating in CM and VM, respectively. The VCIPM chip has been designed for applications with power consumption in the range of several µW to tens of mW. In the proposed VCIPM chip, VR envelope is first detected and compared with 3.3 V. If VR,peak > 3.3 V, VM

configuration is selected and the power management operates as an active voltage rectifier with high PCE.

If VR,peak ≤ 3.3 V, CM configuration is selected and the Rx LC-tank is shorted for optimal number of Tps to store energy and then deliver it to the load. In addition, the VCIPM chip regulates VL to 3.2 V by controlling the reverse current, which is defined as the current returning back from CL to the Rx LC-tank in Fig. 3.1, in VM and the switching frequency in CM, eliminating the need for the regulator and its associated off-chip capacitor. The VCIPM chip also performs over-voltage protection (OVP) along with self-regulation in VM using the reverse current. Therefore, the VCIPM chip only requires two off-chip capacitors, one for resonance (C2 in Fig. 3.1) and one for rectification/regulation/OVP. In this chapter, VCIPM modeling and operation is presented in Section 3.1, detailed description of VCIPM chip architecture is discussed in Section 3.2, and comprehensive measurement results is presented in Section 3.3.

3.1 VCIPM modeling and operation The proposed VCIPM operates in either VM or CM. In VM, a half-wave active rectifier with adjustable reverse current for simultaneous rectification, regulation, and OVP forms the power management. Fig. 3.2a shows the simplified circuit model of the inductive link, followed by the proposed VCIPM structure in VM, in which M2 acts as the rectifier switch, continuously controlled by SW2 pulses. This structure can be further simplified to the circuits in Figs. 3.2b and 3.2c when M2 is turned off and on, respectively.

For extended-range WPT, in which L1 and L2 are loosely coupled and k12 is relatively small, if the switch turn-on time is negligible compared with Tp, the amplitude of the induced voltage in Rx, V21 in Fig. 3.2a, can be written as, V k Q Q R V = s 12 1 2 2 21 2 , (3.1) (1+ k12Q1Q2 ) R1

where Q1 = ωpL1 / R1, Q2 = ωpL2 / R2, and |Vs| is the source voltage amplitude at the operation frequency of

1/2 1/2 ωp = 2πfp = 1/(L1C1) = 1/(L2C2) . When M2 is turned off, as shown in Fig. 3.2b, L2 current (iL2) can be found from, di (t) 1 V (t) = L L2 + i (t)dt + R i (t) 21 2  L2 2 L2 , (3.2) dt C2

Fig. 3.2. The simplified circuit models of the inductive link and proposed VCIPM in VM operation with (a) M2 as the active rectifier switch, (b) turned-off M2, and (c) turned-on M2. the solution of which leads to, iL2 (t) = exp(1(t −t0 ))[A1 cos(d1(t −t0 ))+ A2 sin(d1(t −t0 ))]+ B1 cos(p (t −t0 )), (3.3) where to is the time zero-crossing of VR, and α1 and ɷd1 can be calculated from,

R2 1 2 1 = − , d1 = −1 . (3.4) 2L2 L2C2

A1, A2 and B1 constants in (3.3) are determined by the initial conditions and V21 as, di (t ) L2 0 −A |V21 | dt 1 B1 = , A1 = iL2 (t0 ) − B1, A2 = , (3.5) R2 d1 where iL2(t0) is L2 initial current and V21 = |V21|sin(ωpt). In startup, iL2(t0=0) = diL2(t0=0)/dt = 0. Using iL2 in

(3.3), VR can also be found from,

1 t V (t) = i (t)dt . (3.6) R C  L2 2 t0

As shown in Fig. 3.2b when M2 is off, CL is discharged via RL that decreases VL for,

−Toff VL,dec  VL (1− exp( )), (3.7) RLCL where Toff is the M2 off-time duration. In the conventional active rectifier (Fig. 3.2a), when VR amplitude reaches VL at t = t1, M2 is turned on that results in the simplified circuit in Fig. 3.2c. Since CL should be chosen large enough (µF range) to reduce ripples, RL and C2 can be safely ignored compared with CL.

Therefore, iL2 in Fig. 3.2c can approximately be found from, di (t) 1 V (t) = L L2 + i (t)dt + (R + R )i (t) 21 2  L2 2 M 2 L2 , (3.8) dt CL where RM2 represents M2 loss. Solving for iL2 in (3.8) results in, iL2 (t) = exp(2 (t))[E1 cos(d 2t) + E2 sin(d 2t)]+ D1 cos(p (t −t1))+ D2 sin(p (t −t1)), (3.9) where

R2 + RM 2 1 2  2 = − , d 2 = − 2 2L2 L2CL |V | (1/ C ) − L  2 D = 21 p , D = L 2 p D 1 2 2 2 (R + R ) 1 (R2 + RM 2 ) p + (1/ CL ) − L2 p  2 M 2 p . (3.10)

E1 = iL (t1) − D2 sin( pt1) − D1 cos( pt1) di (t ) L 1 − E + D  sin( t ) − D  cos( t ) dt 2 1 1 p p 1 2 p p 1 E2 = d 2

The initial conditions of iL2(t1) and diL2(t1)/dt should be calculated from (3.3) when the switch was off.

When the switch is kept on until t = t2, CL||RL are charged through the Rx LC-tank and the VL increase can be calculated from

1 t2 V  i (t)dt L,inc  L2 C L t1 (3.11)

Using iL2 in (3.9) when the switch is on, VR can also be found from,

1 t V (t)  i (t)dt + R i (t) . (3.12) R C  L2 M 2 L2 L t1

Figs. 3.3a and 3.3b show the conventional and proposed methods for achieving rectification and regulation simultaneously within the active rectifier with forward and reverse currents, respectively. In the conventional technique, as shown in Fig. 3.3a, the switch on-time duration (Ton) is adjusted so that the forward current into CL||RL can be controlled, while keeping the reverse current zero, to regulate VL at the desired VDD. In other words, if VL > VDD, ΔVL,inc in (3.11) is decreased by reducing Ton = t2 – t1 in Fig. 3.3a and vice versa. However, this technique suffers from very small Ton and large VR, particularly for large RL, which have been alleviated in the proposed VCIPM by using reverse current in Fig. 3.3b.

(a) (b) Fig. 3.3. The key waveforms for achieving both rectification and regulation in an active rectifier, shown in Fig. 2a, using (a) conventional technique with controlling the forward current by decreasing the switch on-time duration (Ton), and (b) proposed technique with employing the reverse current by increasing Ton.

Fig. 3.4 shows the simulated and calculated results for VR amplitude and Ton vs. RL in the conventional self-regulated active rectifiers (Figs. 3.2a and 3.3a) for maintaining VL constant at VDD = 3.2 V using the circuit parameters listed in Table 3.1 and RM2 = 0. In calculations, VR was found from (3.6) and (3.12) when the switch was turned off and on, respectively, and Ton was calculated by finding t2 from ΔVL,inc = |ΔVL,decc| 29

in (3.7) and (3.11), which is needed for regulation, at VL = 3.2 V. In simulations, the circuit in Fig. 3.2a was built in the Cadence Spectre circuit simulator (Cadence Technology, San Jose, CA). Three lessons to learn from Fig. 3.4, 1) calculation and simulation results match very well, validating the accuracy of our modeling, 2) as RL was increased to several kΩ, Ton was significantly decreased to nano seconds and below to less frequently charge CL, because larger RL requires less power, and 3) as RL was increased, VR was

TABLE 3.1: Circuit parameters used in calculations and simulations

Fig. 3.4. Simulated and calculated Ton and VR vs. RL in the conventional self-regulated active rectifier (Figs. 3.2a and 3.3a) to achieve constant VL of VDD = 3.2 V. The circuit parameters are listed in Table 3.I. significantly increased to several volts, because Ton was intentionally reduced for conventional self- regulation, reducing the loading effect on the L2C2-tank. In circuit implementation, pulses with small Ton are hard to generate due to M2 large input capacitance and can also increase the dynamic power consumption. On the other hand, large VR can damage the chip, imposing the need for OVP circuitry and an additional capacitor for detuning the Rx LC-tank. Small differences between calculated and simulated results in Fig. 3.4 could be due to approximations in calculating V21 in (3.1) and ignoring RL and C2 compared with CL, as well as the inherent nonlinearity of the circuit with the diode, which has been modeled with a fixed resistor, RM2. As shown in Fig. 3.3b, the proposed technique for rectification, regulation, and even OVP all in one step employs the reverse current during Td by maintaining M2 on for longer time periods (larger Ton) to allow 30

current to flow from CL to the Rx L2C2-tank. This technique not only increases Ton, but also maintains VR just slightly above VDD by detuning the L2C2-tank with CL, when RL is large and/or d and ϕ are small.

Therefore, only one off-chip capacitor (CL) is needed for rectification, regulation, and OVP. It should be noted that such reverse current can be as small as zero when VL < VDD to improve PCE of the rectifier, and as large as possible by even extending into VR < VDD region when VL is much larger than required VDD. In general, large reverse currents can degrade the rectifier PCE, however, they can be carefully employed for regulation and OVP, as in this work, when the received power by the L2C2-tank is too much.

Fig. 3.5 shows how proper adjustment of Td can regulate VL. As seen in Fig. 3.3b, for t1 < t < t0+Tp/4, M2 is on and VL increases due to the forward current (positive iL2) from L2C2-tank to CL||RL. The amount of VL increase can be found from,

t +T / 4 1 0 p V  i (t)dt . (3.13) L,inc C  L2 L t1

Fig. 3.5. The block diagram of the control loop for voltage regulation of VL at VDD = 3.2 V with reverse current by adjusting Td in Fig. 3.3b.

In Fig. 3.3b, for t0+Tp/4 < t < t0+Tp/4+Td for the duration of Td, M2 remains on and VL decreases due to the reverse current (negative iL2) from CL to the L2C2-tank. The amount of VL decrease can be found from,

t +T / 4+T 1 0 p d V  i (t)dt . (3.14) L,dec2 C  L2 L t0 +Tp / 4

When M2 is turned off at t = t0+Tp/4+Td, VL decreases for ΔVL,dec1, calculated from (3.7). As shown in

Fig. 3.5, a negative feedback loop is required to compare VL with the required VDD = 3.2 V in order to 31

generate the proper Td that adjusts ΔVL,dec2 in (3.14) with reverse current to achieve ΔVL,inc = |ΔVL,dec1 +

ΔVL,dec2| in steady state. If VL < VDD, the loop sets Td = 0 (no reverse current) and the power management operates as an efficient active rectifier. The control loop in Fig. 3.5 has only one dominant pole from the integrator block and, therefore, it is inherently stable.

Fig. 3.6 shows simulated and calculated Ton and VR vs. RL for the proposed regulation technique with the reverse current based on the control loop in Fig. 3.5 to maintain constant VL of VDD = 3.2 V, using inductive link parameters in Table 3.1. In calculations, VR was found from (3.6) and (3.12) when the switch was turned off and on, respectively, and Ton was calculated by finding Td from ΔVL,inc = |ΔVL,dec1 + ΔVL,dec2| in

(3.7), (3.13), and (3.14) at VL = 3.2 V. Comparing Figs. 3.4 and 3.6 it can be seen that thanks to the use of the reverse current, 1) Ton experiences much less variations of 190 ns to 250 ns for the same RL range of 1-

10 kΩ, 2) the required Ton is much larger (~10x) in the proposed technique, and 3) VR amplitude remains almost constant (safe operation and OVP). Since for simplicity M2 is considered ideal in calculations and simulations, VR amplitude in Fig. 3.6 is almost constant. However, in practice VR can slightly change due to voltage drop across M2.

Fig. 3.6. Simulated and calculated Ton and VR vs. RL in the proposed self-regulated active rectifier (VM) as shown in Fig. 3.3b to achieve constant VL of VDD = 3.2 V using reverse current. The circuit parameters are listed in Table 3.1.

It should be mentioned VCIPM utilizes the switching technique which has been presented in previous chapter in CM. To implement passive diode in previous chapter, a diode connected transistor in used in VCIPM structure. 3.2 VCIPM chip architecture

Fig. 3.7 shows the block diagram of a prototype VCIPM chip, which was designed at the fp of 1 MHz to regulate VL at VDD = 3.2 V. The VCIPM chip operates in either VM or CM based on the VR amplitude using

M2 or M1 and M3 transistors, respectively, and performs rectification, regulation, and OVP all in one step

with a single off-chip capacitor (CL). In VCIPM chip, VR amplitude is first detected by a passive envelope detector. Then, a mode selection (MS) block determines whether VCIPM chip should operate in VM or CM by enabling voltage-mode controller (VMC) or current-mode controller (CMC) blocks, respectively. This threshold for mode switching should be determined by the maximum load power, which results in the highest voltage drop across the rectifier in VM. In the VCIPM chip, the MS block selects VM for VR > 3.3

V and CM for VR ≤ 3.3 V to account for rectifier voltage drop of 0.1 V at the maximum PL of 20 mW and

VDD = 3.2 V. If VMC is enabled, M1 (W/L = 2.5 mm / 0.6 µm) is turned on by setting SW1 = 3.2 V, and M2

(W/L = 0.5 mm / 0.6 µm) is controlled by SW2 to form a half-wave active rectifier as shown in Fig. 3.3b. In

VM, diode-connected M3 (W/L = 10 mm / 0.6 µm) is always off, because its source-gate voltage is negative.

If CMC is enabled, M2 is turned off by setting SW2 to the highest voltage between VL and VR using a body- bias generator, and M1 is controlled by SW1, as discussed in previous chapter. The body-bias generator, the circuit diagram of which is shown in Fig. 3.8a, also controls the bulks of M2 and M3 to avoid any leakage current through bulk. Self-regulation will also be achieved in VMC and CMC by adjusting SW2 and SW1 pulses, respectively. A bandgap reference (BGR) provides a constant 1.2 V, from which a reference bias current of 60 nA is generated by a current generator (CG).

Figs. 3.8a and 3.8b show the block diagrams and key operational waveforms of VMC and CMC, respectively. In VMC, a regulation amplifier (Reg_Amp in Fig. 3.8a), controlling the bias current (Ibias) of the active rectifier comparator (VM_Comp), amplifies the difference between VL and required VDD = 3.2 V by comparing 0.37×VL with VBGR = 1.2 V. If VL < 3.2 V, this amplifier outputs low and Ibias is maximized.

Therefore, VM_Comp operates at its maximum speed with intentional offsets so that it can maximize the forward current and minimize the reverse current to achieve the highest PCE as well as to quickly charge

CL and increase VL. When VL surpasses 3.2 V, Reg_Amp reduces Ibias, slowing down VM_Comp in turn- off, that allows reverse current from CL to L2C2-tank by increasing the width of SW2 pulses (Td in Fig. 3.3), as it can be clearly seen in Fig. 3.8a inset waveforms.

(a)

(b)

Fig. 3.8. Schematic diagrams and key waveforms of (a) VMC and (b) CMC blocks to generate proper SW2 and SW1 pulses, respectively.

In CMC as showing in Fig. 3.8b, a time-base generator (TBG), whenever it is reset, outputs high after 4

µs to enable a regulation comparator (Reg_Comp) that compares 0.37×VL with VBGR = 1.2 V. If VL < 3.2 V, the CM comparator (CM_Comp) with an intentional offset of 170 mV is enabled by Reg_Comp to detect the time zero-crossings of VR, where iL2 reaches its maximum, with the help of a synchronization block and consequently generates a sharp SW1 pulse to charge CL through M3. The synchronization block includes two cascaded D-flip-flops that count two pulses to generate a transition, which is then converted to a short pulse 34

(active low) with the width of Tp/4 by a pulse generator block. The pulse-generator output controls M1 with a driver (SW1 pulses) and also resets D-flip-flops and TBG for the same process to be repeated. Fig. 3.8b inset shows how synchronization block can eliminate false CM_Comp pulses, which are not at the time zero-crossings of VR. The intentional offset in CM_Comp compensates for the circuit delays in CMC path, ensuring M1 switching occurs at iL2 peaks. One can calculate this offset by finding the delays of synchronization, pulse generator, and driver blocks in simulations or measurements. If VL > 3.2 V,

CM_Comp is disabled and, therefore, SW1 remains high and CL is not charged. It can be seen that fsw is automatically adjusted to regulate VL at 3.2 V. The maximum fsw is limited to166.6 kHz in the VCIPM chip according to previous chapter. Since synchronization block requires ~2 clock cycles (~2 µs) for synchronization and then resting TBG, the TBG delay is set to 4 µs to achieve the maximum fsw of 166.6 kHz. Fig. 3.9 shows the detailed circuit diagrams of TBG, pulse generator, CM_Comp, and VM_Comp blocks, which were discussed in Fig. 3.8. As shown in Fig. 3.9a, the TBG outputs low for ~4 µs by first charging C1 = 350 fF with the reference current of 110 nA set by Vbp = 2.15 V, and then comparing C1 voltage (VC1) with VBGR = 1.2 V using a comparator that employs internal positive feedback. Any timing error in the TBG output due to process, voltage, and temperature variations, which can only have considerable effects on the C1 value in TBG (bias voltage and currents are generated by a bandgap reference), can change fsw. However, PTE is fairly robust against slight variations of fsw. Inside the pulse generator in Fig. 3.9b, the step input from the synchronization block (either rising or falling edge) is first delayed for Tp/4 = 250 ns with a current-starved inverter loaded by a C2 = 230 fF, and then passed through an XOR to create SW1 pulses. The CM_Comp in Fig. 3.8c is designed with non-identical differential-pair transistors (P1: W/L = 1 µm / 0.6 µm, P2: W/L = 4 µm / 0.6 µm) to create 170 mV offset to generate proper

SW1 pulses, synchronized with time-zero crossings of VR. Finally, the VM_Comp in Fig. 3.8d with a common-gate topology compares VL and VR with an adjustable speed controlled by its bias current (Ibias) in the range of 0 to 230 nA. An internal positive feedback with N4 is added to further sharpen the falling edge of the output, because at VR > VL, VA is high and P6 deeply enters into triode, significantly reducing the comparator gain compared with the rising edge for VR < VL.

Fig. 3.9. Detailed schematic diagrams of (a) time-base generator (TBG), (b) pulse generator, (c) CM comparator (CM_Comp), and (d) VM comparator (VM_Comp) blocks, shown in Fig. 3.8.

3.3 Measurement results The VCIPM chip was fabricated in a 0.35 µm 2P4M standard CMOS process, occupying 1.56 mm2 and 0.52 mm2 with and without pads as shown in Fig. 3.10, respectively. Fig. 3.11 shows the proof-of-concept

VCIPM chip measurement setup with a pair of planar Tx and Rx coils (L1 and L2), fabricated on printed circuit board (PCB), which their specifications are listed in Table 2.2. In Tx, a signal generator was used to drive L1 at fp = 1 MHz. In Rx, the L2C2-tank was connected to the VCIPM chip to achieve a regulated VL of

3.2 V across CL = 2 µF for different d, ϕ, and RL.

Fig. 3.10. VCIPM chip micrograph, occupying 1.56 mm2 and 0.52 mm2 with and without pads, respectively.

Fig. 3.11. The VCIPM chip measurement setup showing Tx (L1) and Rx (L2) PCB coils. The VCIPM chip was operated at fp = 1 MHz to provide a regulated VL of 3.2 V across CL = 2 µF.

Figs. 3.12a and 3.12b show the measured VL and VR waveforms with different time scales in VM at RL

= 100 kΩ when the Tx voltage (Vs in Fig. 3.7) was increased from 11 V to 15 V peak-to-peak, demonstrating that despite Vs increase, the VCIPM chip adaptively adjusted the width of SW2 pulses and consequently the amount of reverse currents to regulate VL at 3.2 V. For lower Vs = 11 Vp-p, since RL of 100 kΩ was very

large, which demanded ultralow power in each cycle, and the incoming power was moderate, the chip generated large reverse currents every ~125 µs whenever VL exceeded 3.2 V that resulted in a sudden voltage drop in VR for several cycles to slightly reduce VL below 3.2 V. As shown in Fig. 3.10a, since the

Rx LC-tank received more power at Vs = 15 Vp-p, VCIPM chip employed reverse current more frequently, seen as sudden decreases in VR, to regulate VL. Since VR,peak was higher than 3.3 V, the chip automatically operated in VM. It should also be noted that thanks to the proposed reverse-current regulation, VR amplitude was maintained fairly constant despite Vs increase.

Fig. 3.13 shows the VCIPM chip response in VM to significant RL variations. As RL was increased by

10x from 1 kΩ to 10 kΩ, VL remained fairly constant at 3.2 V with small ripples of 100 mVp-p by increasing reverse current. Whenever VL was increased above 3.2 V, large reverse currents were generated by the chip that resulted in sudden and fast drops in VR. At larger RL of 10 kΩ with the same input power, CL was discharging more slowly and, therefore, the VCIPM chip generated reverse currents more frequently (every

~25 µs) to maintain VL constant at 3.2 V. Again, it can clearly be seen that despite RL increase by 10x, VR amplitude remained fairly constant, protecting the chip against potential large voltages in conventional power managements as seen in Fig. 3.4. Fig. 3.13 shows rectification, regulation, and OVP all in one step for RL = 10 kΩ. In order to further reduce voltage ripples across VL in VM, Reg_Amp in Fig. 3.8a should be designed for higher gain and bandwidth at the cost of more power consumption. However, in general the proposed reverse-current technique for regulation adds more ripples compared with conventional techniques that adjust the forward current, because CL is first charged every cycle with maximum forward current and then extra charge is removed by the reverse current.

(a) (b)

Figs. 3.14a and 3.14b show the measured VL, VR, and Vs waveforms with different time scales in CM at

RL = 100 kΩ when Vs was increased from 4 Vp-p to 9 Vp-p, demonstrating that for Vs = 4 Vp-p 1) since VR,peak was 1.2 V in steady state without switching (

VR jumped from 1.2 V to ~5 V by turning M1 off with proper SW1 pulses to charge CL to 3.2 V. Despite Vs increase to 9 Vp-p, in which VR,peak increased to 2.9 V (still below 3.3 V), the VCIPM chip remained in CM configuration and adaptively adjusted fsw to regulate VL at 3.2 V. As shown in Fig. 3.14b, at lower Vs of 4

Vp-p, resulting in less power delivered to Rx, the chip generated SW1 pulses at the highest fsw of 166.6 kHz to more frequently charge CL. In contrast, at higher Vs of 9 Vp-p with increased received power, fsw was automatically decreased to charge CL less frequently and regulate VL at 3.2 V. It should be noted that the proposed VCIPM chip achieved a high VCE of 2.7 V/V at Vs = 4 Vp-p. Nonetheless, the maximum measured

VCE in VCIPM chip was 4.1 V/V at fsw = 166.6 kHz, RL = 100 kΩ, VL = 3.2 V, and steady-state VR,peak of 0.78 V.

(a) (b)

Fig. 3.14. (a) Measured VL and VR waveforms in CM when Vs was increased from 4 Vp-p to 9 Vp-p at RL = 100 kΩ. (b) Zoomed waveforms for VL and VR demonstrating how changes in fsw regulated VL at 3.2 V despite Vs variations. 39

Fig. 3.15. Measured VL and VR waveforms in CM for RL variations from 10 kΩ to 100 kΩ, demonstrating automatic fsw adjustment to regulated VL at 3.2 V.

Fig. 3.16. Measured VL, VR, and Vs waveforms when Vs was manually increased from 4 Vp-p to 10 Vp-p, resulting in the automatic reconfiguration of the VCIPM chip from CM to VM based on the VR amplitude (1.2 V vs. 3.35 V) to regulate VL at 3.2 V.

Fig. 3.15 shows measured VL and VR waveforms in CM when RL was significantly increased by 10x from 10 kΩ to 100 kΩ. At smaller RL of 10 kΩ that demanded more power, the chip adjusted fsw to its maximum of 166.6 kHz to constantly charge CL and consequently regulate VL at 3.2 V. In contrast, for larger RL of 100 kΩ that gradually discharged CL, demanding less power, fsw was adjusted properly by frequently eliminating large charging pulses of VR for ~10 µs to regulate VL at 3.2 V with small ripples of

10 mVp-p. Fig. 3.15 clearly shows that VL remained constant at 3.2 V with 10x increase in RL. Comparing Figs. 3.12 and 3.13 shows that voltage ripples in CM are much smaller than those of VM due to the lack of reverse current in self-regulation. In other words, CMC charges CL as much as needed while VMC might overcharge CL and then discharge it, increasing ripples.

Fig. 3.16 shows automatic reconfiguration of the VCIPM chip from CM to VM when Vs was suddenly increased from 4 Vp-p to 10 Vp-p in measurements with RL = 100 kΩ. At lower Vs = 4 Vp-p, the steady-state

VR,peak was 1.2 V and, therefore, the chip operated in CM to regulate VL at 3.2 V by large VR,peak of ~5 V,

i.e., operating with high VCE of 2.7 V/V. As Vs was increased to 10 Vp-p, VR,peak was gradually increased to

3.35 V after ~15 µs (higher than required VDD of 3.2 V), in which the VCIPM chip automatically changed its configuration to VM. Fig. 3.16 clearly shows that VL remained constant at 3.2 V for a drastic change in

VR amplitude.

Fig. 3.17 shows measured VL and VR waveforms during VCIPM chip startup at RL = 100 kΩ. When Vs was applied to Tx, VL was zero, M1 was off, and CL was initially charged through M3. When VL was charged to ~0.6 V, close to M1 threshold voltage, M1 was slightly turned on and M2 significantly helped M3 to further charge CL. At VL = 2 V, the VCIPM chip became fully functional and operated in CM since VR,peak was ≤

3.3 V. In the VCIPM chip, current generator and BGR blocks in Fig. 3.7 require at least VL of 2 V to generate correct voltage and current biases, which are key in CM operation. As VR,peak was increased to >

3.3 V, the chip switched to VM and regulated VL at 3.2 V. As shown in Fig. 3.17, the VCIPM chip started up within ~16 ms.

Fig. 3.17. Measured VL and VR waveforms during VCIPM chip startup, in which M2 and M3 first slowly charged CL to ~2 V, followed by CM and VM operations to further increase VL to 3.2 V.

Figs. 3.18a and 3.18b compare the measured VCE and PTE values between conventional VM and

VCIPM chip vs. different RL values of 0.5-100 kΩ at d = 4.5 cm and fp = 1 MHz, respectively. In VM-only measurements, the VCIPM chip was manually configured to VM by disabling CM, in which M1 was externally turned on to operate the power management as a conventional active rectifier. It can be seen in Figs. 3.18a and 3.18b that the VCIPM chip could significantly improve both VCE and PTE, particularly at large RL > ~2 kΩ, thanks to reconfiguring itself to CM. For instance, at RL = 100 kΩ the measured VCE and PTE of the VCIPM chip were 4.1 (4.1 V/V vs. 1 V/V) and 21 (2.8% vs. 0.13%) times larger compared with the VM, respectively. At large RL, VM achieves poor Q2L/QL (ηRx) and consequently low PTE, because most of the received power is wasted in R2. Using inductive link specifications in Table 2.2, calculated QL =

3 3.6×10 and Q2L = 28.8 at RL of 100 kΩ for VM that leads to the poor ηRx of 0.8%. However, CM can

effectively match the load by improving Q2L,eq/QL,eq with high fsw. In contrast, at small RL better load matching is provided by VM, since equivalent parallel resistance of the Rx LC-tank is in range of kΩ and below, and power is also delivered to RL with more efficient active rectifier. Nonetheless, the VCIPM chip achieves highest possible VCE and PTE for a wide range of RL by optimally selecting the operation mode.

Fig. 3.19 shows measured averaged VR,peak vs. Vs in VM with and without OVP, as well as measured

PTE with OVP for RL = 100 kΩ at d = 6 cm. The VR,peak values with OVP were averaged, because the VR envelope has small variations due to reverse currents as shown in Fig. 3.12b. For a Vs increase from 11 to

17 Vp-p, VR,peak slightly increased for only ~0.2 V with OVP, compared with the significant VR,peak increase of 1.9 V without OVP. Therefore, OVP with the reverse current is quite effective. As shown in Fig. 3.19, the measured PTE was decreased from ~0.07% to 0.03% for a Vs increase from 11 to 17 Vp-p, because the received power was exceeding the required power for generating the constant VL of 3.2 V and, therefore,

PTE was intentionally reduced by regulation and OVP blocks using reverse currents to maintain VL at 3.2 V and also protect the chip against high voltages. Such PTE reduction due to regulation or OVP is not an issue, since the regulation block optimizes the rectifier performance to achieve constant VL of 3.2 V, and OVP operates only when the received power is too high. Nonetheless, the highest measured PCE of the rectifier in VM was 77% at RL of 100 kΩ, when there was no reverse current.

(a) (b) Fig. 3.18. Measured (a) VCE and (b) PTE vs. RL for conventional VM only and the VCIPM chip at d = 4.5 cm and fp = 1 MHz. The VCIPM chip reconfigured itself from VM to CM at RL ~ 2 kΩ to achieve highest VCE and PTE at larger RL.

Figs. 3.20a, 3.20b, and 3.20c compare measured VL in conventional VM and VCIPM chip vs. d, Rx coil’s orientation (ϕ), and misalignment at RL = 100 kΩ and fixed input power of 145 mW, respectively.

Fig. 3.20a shows that for generating a constant VL of 3.2 V at the same Vs, the VCIPM chip could extend d from 6 cm to 13.5 cm for 125%, because at d > 6 cm the VCIPM chip employed the CM configuration with high VCE to provide VL = 3.2 V. As shown in Fig. 3.20b, the VCIPM chip could extend ϕ for 150% from 30o to 75o thanks to the CM operation. Finally, the VCIPM chip improved robustness against Rx coil misalignment at d = 6 cm for 500% from 1 cm to 6 cm. In Figs. 3.18 and 3.20, the operation of the VCIPM 42

chip in CM has only been compared with VM-only in some regions with small VR, because operating in

CM with large VR can potentially damage the chip by creating large voltage peaks across L2. However, in the previous work using discrete components [52], the operation of CM-only with VM-only for different d and RL conditions has been compared.

(a) (b)

(c) Fig. 3.20. Measured VL vs. (a) coupling distance, d, (b) Rx coil orientation, ϕ, and (c) Rx coil misalignment for conventional VM only and VCIPM chip at RL = 100 kΩ and fixed input power of 145 mW. The proposed VCIPM could extend d, ϕ, and misalignment robustness for 125%, 150%, and 500%, respectively.

Table 3.2 benchmarks the VCIPM chip against state-of-the-art inductive power management ASICs. The VCIPM chip offers the first integrated power management that employs both VM and CM configurations adaptively during the operation, which is suitable for inductively powered systems with variable coupling distance, orientations, misalignment, and loading. In the proof-of-concept VCIPM chip prototype, operating at 1 MHz, maximum VCE and PCE of 4.1 V/V and 77% were achieved inside Rx at

RL of 100 kΩ and PL of 10 mW, respectively. Designing a full-wave rectifier for increased PL can further improve the PCE in the future implementation of this chip. The VCIPM chip extended d for 125% thanks to operation in CM and could achieve rectification, regulation, and OVP with a single off-chip capacitor of

CL = 2 µF with measured line and load regulations of 0.8% and 0.75% in VM and 2.5% and 2.2% in CM, respectively. Employing reverse current for regulation and OVP was presented for the first time that differs in principle with conventional regulating rectifiers that adjust forward current with pulse-width/frequency modulation. 3.4 Conclusion

In this Chapter, the theory, first ASIC implementation, and measurement results of a reconfigurable VM and CM power management with self-regulation for inductive power transmission has been presented. The VCIPM chip could achieve high VCE and PCE by operating in CM and VM, respectively. The VCIPM chip could also increase the inductive link PTE for large RL by dynamic load transformation in CM configuration. Adjusting reverse current in VM and fsw in CM, regulation and OVP could be achieved along with rectification, eliminating the need for two off-chip capacitors. The VCIPM chip was fabricated in a 0.35 μm standard CMOS process and could provide a 3.2 V regulated output across a 2 μF capacitor with safe received ac voltages under large input power, loading, coupling distance, and coils’ orientation variations. The VCIPM chip achieved a maximum VCE of 4.1 V/V and extended the range by 125% while requiring only two off-chip capacitors for energy storage and resonance.

TABLE 3.2: Benchmarking the VCIPM ASIC among state-of-the-art inductive power managements

ISSCC CICC VLSI JSSC ISSCC ISSCC Publication This Work 2012, [71] 2015, [81] 2016, [82] 2017, [80] 2015, [79] 2016, [78] CMOS Tech (µm) 0.5 0.18 0.18 0.35 0.35 0.18 0.35 Application WPT WPT WPT WPT WPT Battery Charger WPT Rx Structure VM VM VM CM CM CM VM-CM Frequency (MHz) 13.56 15 144 6.78 2 0.05 1 Max VCE (V/V) 0.84/1.4* 1.67* ~0.9 0.83 4.1 - - -3 @ RL (kΩ) @0.5 @0.77 @5×10 @0.1 @100 Max PCE (%) 77 87.7 66.5 92.2 87.1 61.2 77

@ PL (mW) @19 @33 @0.15 @6000 @220 @0.0028 @10 Self-Startup Yes Yes Yes Yes Yes No Yes Self-Regulation No Yes Yes Yes No - Yes Range Extension (%) 33 - - - - - 125 VM: 0.8 Line Regulation (%) ------CM: 2.5 VM: 0.75 Load Regulation (%) - <2.5 1.12 - - - CM: 2.2 Active Area (mm2) 0.585 0.112 - ~4.77 ~4.8 0.54 0.52 Over-Voltage No No No Yes Yes No Yes Protection (OVP)

Output Power Range 0.0006- 6-37 0.6-90 0.02-0.2 500-6000 50-1450 0.1-20 (mW) 0.0028++

**Off-Chip Capacitors 4 3 -+ 2 4 - 2

*Voltage doubler. **Capacitors for Rx resonance, rectification, regulation, and OVP.

+Due to high operating frequency and small output power, capacitors are implemented on-chip. ++At the receiver coil.

Chapter 4 Optimal Wireless Receiver Structure for Omnidirectional Inductive Power Transmission to Biomedical Implants

It is well known that coupling coefficient between Transmitter (Tx) and receiver (Rx) coils (k12) depends on the alignment between Tx and Rx coil, i.e., k12 is maximum when Tx and Rx coils are perfectly aligned and located in parallel planes with respect to each other. If the Rx coil is tilted by φ, then k12 should be

o multiplied by a constant factor of cos(φ), meaning that k12 reduces to zero if Rx coil is tilted by φ = 90 [48]. This is a potential challenge in powering biomedical implants, since the implanted Rx coil can be easily misaligned and tilted. It should be mentioned that this problem is more severe in the miniaturized inductive link due to operation of the system at a higher carrier frequency, smaller size of the Rx coil, and huge power loss of the tissue. Recently, new magnetoelectric (ME)-based links were proposed for WPT which can improve the system reliability by operating at a lower carrier frequency [84]. Since ME-based links operate at the acoustic resonance frequency, with the same size of the inductive link they can employ a lower carrier frequency which improves the overall power efficiency of the system [85],[86]. In order to eliminate the adverse effects of Rx coil tilting on the PTE and PDL of inductive links, several groups have suggested to employ multiple orthogonal coils in the Rx side [87]-[89]. The most common approach has been the use of three orthogonal coils in the Rx side such that the Rx coil is exposed to the magnetic field from all directions. However, each of three orthogonal Rx coils has been followed by a separate power management unit that has resulted in the use of three rectifiers or power recovery circuits, adding to the size, complexity, and cost of the Rx [87]. In addition, connecting the outputs of three rectifiers together has the disadvantage of only using one rectifier at a time, leading to smaller PTE and PDL. In this chapter, different Rx structures for omnidirectional inductive power transmission to mm-sized biomedical implants are studied that involve three orthogonal coils in the Rx side. Instead of using a power management per each Rx coil, three resonant Rx structures are proposed and compared with different connections of three Rx coils, i.e., series and parallel, followed by a single power management. The simulation results will be provided to show the performance of each structure for different Rx coils tilting. The use of three Rx coils for powering mm-sized implants will be discussed in Section 4.1, followed by proposed Rx structures in Section 4.2.

4.1 Omnidirectional inductive power transmission to mm-sized implants using three Rx coils Fig. 4.1 shows the omnidirectional inductive link model in the full-wave electromagnetic field simulator,

HFSS (Ansoft, Pittsburgh, PA), using three orthogonal coils in the Rx side, L21, L22, L23, and a Tx coil, L1. These coils are considered to be made of single filament wire to achieve higher quality factor compared to printed spiral coils. The geometrical parameters that affect PTE and PDL are wire width (w), wire spacing

(s), outer diameter (Do), and the number of turns (n). In our omnidirectional link example, 1) the implant diameter was limited to 3.6 mm, i.e., maximum Do2 = 3.6 mm, 2) the operation frequency (fp) was increased

Fig. 4.1. The omnidirectional inductive link model in HFSS for calculating the mutual coupling between Tx and Rx coils. to 100 MHz to improve PTE and PDL, since a mm-sized Rx coil was used, and 3) Tx and Rx coils were separated by d12 = 20 mm. The geometries of Tx and Rx coils are listed in Table 4.1, which were used in the simulations for comparing different Rx structures. It should be noted that the diameters of L21, L22, and

L23 Rx coils, i.e., Do21, Do22, and Do23 in Table 4.1, are different to avoid short-circuit between these coils. Fig. 4.2 shows the simulated values of the mutual coupling vs. the angular tilting of Rx in φ direction as shown in Fig. 4.1. Since three coils were used in the Rx side, i.e., L21, L22, and L23, three different coupling

o factors, i.e., k1,21, k1,22, and k1,23, have been reported in Fig. 4.2. At φ = 0 , k1,23 was maximized to ~ 0.004, since L23 and L1 were located in perfectly parallel planes. However, k1,21 and k1,22 were both negligible,

o because their planes were perpendicular to that of L1. As φ increased to 45 where L22 and L23 were tilted by

o 45 , k1,23 reduced to ~ 0.003 as it was no longer perfectly aligned with L1, while k1,22 increased to ~ 0.0027 due to better alignment between L22 and L1. However, k1,22 is still smaller than k1,23, since Do22 of 3 mm is smaller than Do23 = 3.6 mm. Nevertheless, acceptable mutual couplings (k1,22 and k1,23) were achieved at φ 47

o = 45 . As φ was increased in Fig. 4.2, k1,21 remained very small, because its plane was kept perpendicular to that of L1.

Table 4.1: Omnidirectional inductive link specifications Parameters Symbols Value

Inductance (nH) L1 168

Tx coil Outer diameter (mm) Do1 20

(L1) Number of turns n1 2

Wire width (mm) w1 0.7

Wire spacing (mm) s1 0.7

L21 50.5

Inductance (nH) L22 44.6

L23 57

Do21 3.3 Rx coils

Outer diameter (mm) Do22 3

(L2)

Do23 3.6

Number of turns n2 3

Wire width (mm) w2 0.1

Wire spacing (mm) s2 0.045

L1 - L2 coupling distance (mm) d12 20

Operation frequency (MHz) fp 100

Since the Rx structure in Fig. 4.1 is symmetric, a similar pattern for coupling vs. 0o < φ < 90o can be

o seen for φ > 90 in Fig. 4.2, considering the slight difference between Do21, Do22, and Do23. As it can be seen in Fig. 4.2, a large mutual coupling of > 0.0027 can be achieved for different conditions of Rx tilting, leading to omnidirectional inductive power transmission.

Fig. 4.2. The simulated mutual coupling between the Tx coil (L1) and each of three Rx coils (L21, L22, L23), i.e., k1,21, k1,22, k1,23, vs. the angular tilting of the Rx coils (φ) as shown in Fig. 4.1.

4.2 Different Rx structures using three Rx coils Fig. 4.3 shows four different resonant Rx structures by changing the connection of three orthogonal coils in the Rx for omnidirectional inductive power transmission. In the most conventional structure as shown in

Fig. 4.3a, a rectifier is followed by each Rx LC-tank to charge the load capacitance, CL, which is then used to provide power for RL. In this structure, the energy inside all three Rx LC-tanks cannot be delivered to CL and RL at the same time if the voltage across one LC-tank is larger than those of the other two. In addition, it requires three rectifiers. In this section for simplicity, a passive rectifier represents the power management, and the resistive loss of coils has not been shown in Fig. 4.3 but has been considered in the simulations.

(a) (b) (c) (d) Fig. 4.3. Different Rx structures for omnidirectional inductive power transmission. (a) Conventional Rx structure with three rectifiers to charge CL through the highest Rx coil voltage. The proposed Rx structures: (b) connecting the resonant Rx coils in parallel, (c) connecting the resonant Rx coils in series, and (d) connecting the Rx coils in series and resonate them all with one capacitor. The proposed structures only need one rectifier.

Figs. 4.3b, 4.3c, and 4.3d show the proposed resonant Rx structures that require only one rectifier. In

Fig. 3.4b, three Rx LC-tanks are connected in parallel to charge CL. Three Rx LC-tanks can also be

connected in series as shown in Fig. 4.3c. Finally, Fig. 4.3d shows the series connection of three Rx coils, which their overall inductance, L21 + L22 + L23, has been then resonated out at fp by a single capacitor, CT. In order to compare the performance of the proposed structures, four inductive links in Fig. 4.3 were simulated in the Cadence Spectre circuit simulator (Cadence Technology, San Jose, CA). Table 4.2 summarizes the circuit parameters that were used in the simulations. The HFSS simulated values for inductance and resistive loss of Tx and Rx coils as well as k1,21, k1,22, and k1,23 vs. φ in Fig. 4.2 were also used in our circuit simulator. Due to the slight difference of the size of Rx coils in Table 4.1, their resonant capacitors, i.e., C21, C22, and C23 in Table 4.2, are slightly different. The amplitude of the source, Vs,peak, was set to 85 mV for all four links.

Table 4.2: Circuit parameters used in simulations Parameter Nominal Value Parameter Nominal Value

RL (kΩ) 10 C1 (pF) 15

CL (nF) 10 CT (pF) 16.5

C21 (pF) 50 VD (V) 0.5

C22 (pF) 56 Vs,peak (mV) 85

C23 (pF) 44 fp (MHz) 100

Fig. 4.4 shows the simulated values of the rectifier output voltage, VL in Fig. 4.3, vs. φ for four different

Rx structures shown in Fig. 4.3 using the RL value of 10 kΩ. The data points labeled with a, b, c, and d in Fig. 4.4 correspond to the Rx structures in Figs. 4.3a, 4.3b, 4.3c, and 4.3d, respectively. It can be seen that

o the conventional Rx structure in Fig. 4.3a achieved the highest VL of 3.3 V at φ = 0 . However, the proposed structure in Fig. 4d outperformed the other three structures in Fig. 4.3, including the conventional Rx

o structure, for most tilting scenarios, achieving the VL of 3.5 V at the worst-case scenario of φ = 45 .

Therefore, the proposed Rx structure in Fig. 4.3d achieves higher VL and requires only one rectifier, compared to the conventional Rx structure in Fig. 4.3a.

The structure in Fig. 4.3b achieved the lowest VL in Fig. 4.4, because three parallel Rx LC-tanks reduced the overall equivalent resistance of the Rx side, compared to the RL of 10 kΩ. The structure in Fig. 4.3c

o achieved the low VL of 1.9 V at φ = 0 , where k1,23 was maximum and k1,21 and k1,22 were almost zero according to Fig. 4.2, because the large equivalent resistances of L21C21- and L22C22-tanks in series with

o L23C23-tank limited the current that charged CL. At φ = 0 , the conventional Rx structure achieved highest

VL, because the two Rx coils with negligible couplings (L21 and L22) could not adversely load the optimal

Rx coil, L23.

4.3 Conclusion

The most common strategy to enable omnidirectional inductive power transmission has been the use of several orthogonal coils in the Rx side, in which each coil has been followed by one power management. Three different Rx structures have been presented that allow power delivery from three orthogonal Rx coils to the load using only one power management, saving area and cost. The simulated voltages across the load in the Rx side in three proposed Rx structures have been found and compared with those of the conventional structure for different tilting and loading conditions, suggesting that 1) for large RL values connecting three Rx coils in series and resonating them with a single capacitor leads to higher load voltages, and 2) for small

RL values resonating each Rx coil first and then connecting three Rx LC-tanks in parallel leads to higher load voltages. In these structures, only a single power management is required in the Rx side, unlike the conventional Rx structure that requires one power management per each Rx coil.

Chapter 5 A Self-Regulated Seamless-Voltage/Current-Mode Inductive Power Management with Extended Input Voltage Range and Energy Recycling

5.1 Proposed power management concept and structure An advanced integrated power management (IPM) can play a key role in safe, robust, and efficient operation of inductive links against undesired variations of input power (~VTx), coupling distance (d), and coils’ misalignment. Conventional IPMs with two-stage rectification/regulation structure (Fig. 5.1) operate in either current mode (CM) [79] or voltage mode (VM) [83] to generate a regulated DC voltage (VL) across the load (RL) from an AC voltage (Vp) across the receiver (Rx) coil. However, they can only operate for

Vp>VL and also suffer from low power-conversion efficiency (PCE) due to the power loss in both rectifier and regulator.

Fig. 5.1. Conceptual block diagram of conventional and proposed inductive IPM structures, and the simplified block diagram of the proposed energy-recycling seamless-voltage/current-mode (ERSVCM) IPM.

Recently, IPMs with combined rectification and regulation in one stage have been presented to further improve PCE and also eliminate one off-chip capacitor [82]. But, these IPMs achieve poor voltage- conversion efficiency (VCE=VL/Vp). In order to achieve high VCE for recovering power from small Vp

an inductive battery charger with CM operation has been presented in [78]. In order to maximize PCE for both small and large Vp, a reconfigurable IPM has recently been presented in [54], [55] that can adaptively switch between VM and CM in a discrete fashion based on Vp amplitude. But, current CM structures can suffer from large peaks in Vp, particularly for large Vp and VL, which can damage the IPM (unsafe operation) and also limit the input voltage (Vp) range. More importantly, current IPM structures can potentially lead to a remarkable amount of wasted power inside the Rx coil (L2) and IPM (PWaste in Fig. 5.1), when the received power, PRx, is higher than the required load power, PL. The proposed IPM structure in Fig. 5.1 has the unprecedented capabilities of 1) storing the additional received power (Pstore=PRx-PL) into a storage capacitor (CS) that will be recycled and transferred to the load

(CL||RL) through the Rx LC-tank (L2C2) whenever PRx

SW1 and SW2. Then, the extra received energy, if any, is stored in CS up to VCs=4V by operating again in

SVCM, named region-2 (R2), via controlling N1, P1, and P3 switches with SW1 and SW3. When Vp is very small (<100mV) due to VTx reduction, d increase, or coils’ misalignment, the operation region can be changed into energy recycling, named region-3 (R3), to recycle the stored energy in CS and transfer it to

CL||RL via L2C2-tank by controlling N1, P1, and P4 switches with SW1 and SW4. A configuration selection block determines the optimal operation region, followed by a switch controller to generate key SW1-4 signals. A body-biasing block generates required body voltages (VB1-B4) for N1, P1-4 transistors based on R1-

3. Fig. 5.2 shows key waveforms in the ERSVCM chip for operating in SVCM and energy recycling at the power carrier frequency of f=1/T=1MHz. In SVCM during each Tsw1, the chip seamlessly operates in VM for Tsw1/T-1 power carrier cycles and in CM for one cycle, which are repeated. In VM, SW1,3,4 are high

(N1/P1:ON, P3,4:OFF), VB1-B4 are connected to the highest voltage, and P2 is controlled by SW2 as an active switch (half-wave active rectifier) to charge CL if Vp>VL. For Vp

CM, SW2-4 are high (P2-4:OFF), VB2 is connected to VL to employ low-dropout parasitic source-bulk diode

Fig. 5.2. Conceptual key waveforms for the safe operation of SVCM with extended input-voltage range and energy recycling operation.

Fig. 5.3. Simplified schematic diagrams of configuration selection, switch controller, and body-biasing blocks to generate optimal SW1-4 and VB1-4.

(D2) of P2, and at the time zero-crossing of Vp, where the maximum energy is stored into L2 as current (iL2),

SW1 becomes low (N1/P1:OFF) to generate a voltage peak across VP (~VL+0.7) to charge CL through P2 diode as the only current path. Therefore, a high VCE>1 can be achieved if Vp

Similar to [55], reverse current from CL and CS in VM is employed for self-regulation of VL=3V and VCs=4V as well as OVP. In CM, however, unlike [55] that suffers from large unsafe Vp peaks (Vp peak), and consequently, limited Vp range as shown in Fig. 5.2, the ERSVCM chip limits Vp peak by utilizing parasitic diodes of P2,3 (D2,3) with much smaller voltage drop (~0.7V) and smaller turn-on time, extending Vp range in CM to (VL+0.7)V. For energy recycling (Fig. 5.2) from CS to CL in each repeated cycles of Tsw2=T1+T2+T3,

SW2,3 are high (P2,3:OFF), VB2=VL, and 1) during T1, SW1 is low (N1/P1:OFF) and P4 is turned on (SW4=low) to transfer energy from Cs to L2C2-tank, 2) during T2, N1/P1 are turned on (SW1=high) and P4 is turned off

(SW4=high) for L2C2-tank to resonate and change the direction of iL2, and 3) during T3, N1/P1 are turned off

(SW1=low) at iL2 peak (Vp=0) to charge CL through D2. The switch controller adjusts Tsw2 for regulating VL during charge recycling that can significantly increase the Rx operation time, when PRx is negligible.

Fig. 5.3 shows the schematic diagrams of the configuration selection (R1-3), switch controller, and body- biasing blocks. In R1,2, a time-base generator (TBG1) upon reset creates a rising edge after each Td1=4µs.

If VL<3V (VBGR=1.5 V) or VCs<4V (only for R2), ZD_Comp1 is enabled to detect the time zero-crossings of

Vp and operate the chip in optimal SVCM with minimum Tsw1=7µs by turning N1/P1 on with SW1 pulse for

~0.25µs, followed by TBG1 reset to create next Tsw1. Similarly, in R3 a TBG2 creates a rising edge after

Td2=850ns upon reset that leads to a SW4 pulse with T1=100ns width, if VL<3V, to consequently generate optimal SW1 pulse for T2 using ZD_Comp2, which detects the time zero-crossings of Vp. The switch controller outputs the desired SW1-4 signals based on the operation region. If VL>3V (C1_out=low), SW2 remains low in R1 for self-regulation and OVP. In the body-biasing block, VB1-B4 are connected to the highest voltage across P1-4 except when the chip operates in CM, in which D2,3 are employed by connecting VB2,B3 to VL and VCs through large transmission gates (TG1/TG2) with small resistance. 5.2 Measurement results

The ERSVCM chip was fabricated in a 0.35µm 4M2P standard CMOS process, operating at 1MHz and occupying 2.4mm2 of active area, shown in Fig. 5.4. Fig. 5.5 shows measured transient waveforms vs. input power variation (~VTx) in R1, operating in SVCM, for RL=100kΩ and CL=4.7µF. When VTx was increased from 2.4Vp-p to 4.7Vp-p, the chip was able to provide regulated VL=3V with safe Vp,peak=4.1V thanks to seamless transition between VM and CM, as well as employing reverse current for self-regulation and OVP.

For VTx=2.4Vp-p, steady-state Vp was as small as 2.2V, and therefore, the chip employed CM at optimal frequency of 1/Tsw1=142kHz to achieve VL=3V (VCE=1.4V/V). For higher VTx=4.7Vp-p, the chip employed both VM and CM (mostly VM) and reverse current to regulate VL at 3V and limit Vp,peak to 4.1V (OVP).

Fig. 5.4. PRVCM chip micrograph, occupying 6 mm2 and 3.8 mm2 with and without pads, respectively.

Fig. 5.5. Measured transient waveforms of VL and Vp vs. input power variation (~VTx) in R1, operating in SVCM, for RL=100kΩ and CL=4.7µF.

Fig. 5.6 shows key measured waveforms of VL, VCs, and Vp for energy recycling configuration (R3), which match very well with conceptual waveforms in Fig. 5.2, as well as ERSVCM chip response, i.e., transition between SVCM and energy recycling, to an intermittent WPT condition with VTx drastic variations (0-5.3 Vp-p). For continuous VTx of 5.3Vp-p by operating in SVCM with self-regulation and OVP, the chip successfully regulated VL at 3V for RL=100kΩ and then transferred the extra energy to CS=4.7µF 57

by charging it to VCs=4V. After ~2ms, VTx was intentionally switched between 0 and 5.3Vp-p for ~0.5ms, which had negligible effect on VL and the chip continued operating in SVCM. Then, VTx was intentionally reduced to 0 and RL=3kΩ was added for ~0.65ms as the worst-case scenario. It can be seen in Fig. 5.6 that by operating the chip in energy recycling configuration, VL was kept constant at 3V by recycling energy from CS to CL at the maximum power efficiency of 33% (VCs reduced from 4V to 3V). As VTx was increased to 5.3Vp-p again, the chip started functioning in SVCM. Therefore, the ERSVCM chip can extend the operation duration (Rx lifetime) for ~250% at RL=5kΩ for 0.1V voltage drop of VL by converting the wasted energy into recycled energy.

Fig. 5.6. Measured ERSVCM chip waveforms in energy recycling configuration with self-regulation as well as chip transition between SVCM and energy recycling for an intermittent WPT condition with drastic VTx changes.

Table 5.1 compares the performance of the ERSVCM chip with state-of-the-art IPMs. This chip employs SVCM structure along with energy recycling to extend the input-voltage range and Rx lifetime for reliable

and safe WPT. It achieves measured PCE of 75% for operation in SVCM at RL=0.5kΩ. The chip also performs self-regulation and OVP with reverse current in charging both CL and CS.

TABLE 5.1: Benchmarking the ERSVCM ASIC among state-of-the-art inductive power managements

ISSCC ISSCC VLSI ISSCC ISSCC Publication This Work 2015, [79] 2017, [83] 2016, [82] 2016, [78] 2017, [55] CMOS Tech. (µm) 0.35 0.18 0.18 0.18 0.35 0.35 Freq. (MHz) 2 10.4-13.56 144 0.05 1 1 Rx Architecture CM VM VM CM VM-CM SVCM Energy Recycling No No No No No Yes VCE (V/V) <1 <1 >1 >1 >1 >1 PCE (%) 87 >73.7* 66.5 61.2 VM: 77 75

@ PL (mW) @ 220 @ 18 @ 0.15 @ 0.0028 @ 10 @ 18 Self-Regulation No Yes Yes Yes Yes Yes VM : 0.8 Line Regulation (%) - - - - 1.8 CM : 2.5 VM : 0.75 Load Regulation (%) - - 1.12 - 0.8 CM : 2.2 Dead Zone in Input- Yes Yes Yes Yes Yes No Voltage Range Over-Voltage Protection VM: Yes Yes No No No Yes (OVP) CM: No

Rx Lifetime Extension (%) - - - - - 250

0.0006- PL Range (mW) 50-1450 6-62.5 0.02-0.2 0.1-20 0.09-27 0.0028++ Off-Chip Capacitors** 4 4 -+ - 2 3 Active Area (mm2) ~4.8 - - 0.54 0.52 2.4 *Total link efficiency. **For Rx resonance, rectification, regulation, and OVP. + Due to high operating frequency and small output power, capacitors were implemented on chip ++At Rx coil. 5.3 Conclusion

In this chapter, the theory, ASIC implementation, and measurement results of a new strategy for inductive power delivery has been presented in that the surplus received energy is stored on a storage capacitor (or a battery) as an energy reservoir to be recycled back into the load when the received power is inadequate. Utilizing both VM and CM operations with seamless transitions extended the safe input-voltage range, eliminating the dead zone in current IPMs. The proposed ERSVCM chip could extend the system

operation time by 250% for RL = 5 kΩ thanks to the energy-recycling technique. In measurements, despite severe transmitted-power variations in a mimicked intermittent WPT scenario, the chip successfully achieved a regulated supply of 3 V by operating in CM with high VCE and employing energy recycling. With only one off-chip capacitor, rectification, regulation, and OVP have been achieved with the reverse current. The chip achieved a high PCE of 75% at the output power of 18 mW with measured line and load regulations of 1.8% and 0.8% in one-step self-regulation, respectively.

Chapter 6 A Dual-Output Reconfigurable Shared-Inductor Boost-Converter/Current-Mode Inductive Power Management ASIC

In implantable medical devices (IMDs), depending on the mode of operation (e.g., recording, stimulation, or imaging), different output power and voltage levels are required over time [96]. However, the power received by the receiver coil through the inductive coupling with the transmitter coil, called PRx hereafter as shown in Fig. 6.1a, is often limited and variable due to safety constraints and variations in the coils’ distance and alignment [97],[98]. Therefore, there is a demand for new multi-output architectures for IPM structures to efficiently power IMDs despite variations in the inductive link parameters. Fig. 6.1 shows a conventional multi-stage IPM structure and its performance in providing multi-level outputs against variations in PRx. The structure includes a rectifier, which converts an AC signal across the receiver LRxCRx-tank (VRx) to a DC voltage, followed by a linear regulator, which generates an operating load voltage (VL) across CL for the load RL, and a DC-DC converter, which generates a high-voltage output

(VHv) across CHv for the load RHv. However, this multi-stage IPM structure reduces the overall power conversion efficiency (PCE) and increases the size and cost of the system [99],[100].

(a)

(b) Fig. 6.1. (a) Simplified diagram of an inductive link with a conventional multi-stage IPM structure to generate multiple regulated outputs, and (b) performance of the IPM structure vs. power received by the receiver coil (PRx). PL and PHv are the power consumed by RL and RHv, respectively.

To prevent this PCE reduction, several works have combined the rectifier with the regulator or DC-DC converter to generate VL or VHv with a single-stage power conversion [101]-[104]. But these structures are vulnerable to PRx variation considering the required output power levels, i.e. PL and PHv defined as the power

consumed by RL and RHv, respectively, as shown in Fig. 6.1b. In an IMD, PL is the power consumption for low-power functionalities such as neural recording, and PHv is the power consumption due to power-hungry functions such as stimulation, which is needed only for short periods of time.

Depending on PL, PHv, and PRx, the performance of the conventional IPM structures can be divided into three regions, as shown in Fig. 6.1b. For PL + PHv > PRx, the IPM structure fails to generate the regulated outputs (VL and VHv), and the system cannot operate properly due to insufficient PRx. Recently in [56], an energy recycling scheme is presented for IPM structures to extend receiver (Rx) operation time when an interrupt appears in PRx. In this scheme, surplus energy is banked in a storage capacitor, and the energy is recycled during PRx interruption. Although this scheme has made the Rx robust against PRx interruption, it is not optimal for the entire range of PRx < PL + PHv. For example, in cases when PRx is slightly less than PL

+ PHv, for optimal operation, the IPM should simultaneously use both PRx and the previously stored energy.

However, the ASIC in [56] employs either PRx or the energy on storage capacitor.

For the case when PRx > PL + PHv, the conventional IPM structures suffer from low PCE due to voltage regulation and protection, particularly when PHv is only needed for short periods of time (e.g., stimulation or imaging). Therefore, several groups including ours have suggested closed-loop WPT to compensate for variations in PRx and output power [105]-[108]. However, all of these systems operate in voltage mode (VM) and require the sending of several bits of data from the Rx side to the transmitter (Tx) side to adjust the power provided by the power amplifier (PA in Fig. 6.1a).

When PRx is in the same range as PL + PHv, inductive IPM ASICs operate as a rectifier either in VM or current mode (CM), depending on VRx [109]-[112]. CM is more attractive due to its ability to operate at VRx

< VL, but most CM structures utilize either passive rectification with poor PCE [55] or active rectification at a low power-carrier frequency (fp = 50 kHz) [78]. Moreover, active rectification is mainly implemented by comparator-based active switches, which suffer from decreased efficiency due to limited bandwidth and the offset of the comparators. The IPM ASIC in [78] employs an auto-calibration control loop to achieve optimal switch timing based on VRx amplitude. However, it requires an extra analog-to-digital converter

(ADC) and can become power hungry for applications with continuous VRx variations (due to coils’ coupling variations) at high fp. It is worth mentioning that recently in [111] a CM structure with adaptive switching at high fp of 13.56 MHz is presented to recharge a battery. However, this structure is not optimal to achieve maximum power transmission efficiency (PTE) for wide range of the PRx in WPT due to power loss in the resonance capacitor. In this chapter, a novel dual-configuration IPM ASIC to overcome the aforementioned issues is proposed. Fig. 6.2 shows the structure of the proposed ASIC and its performance vs. PRx. For each PRx 62

range, a new feature is added to conventional IPM structures to improve its performance. The proposed

ASIC generates two regulated outputs (VL = 2.6 V, VHv = 3.9 V) directly from the Rx coil (LRx) with single- stage conversion. Efficient CM operation is implemented by active rectification at high fp = 1 MHz with automatic switching control (ASC) in CM. To improve the robustness of the system against variations when

PRx < PL + PHv, a large capacitor (CS) (or a battery) is charged to a high voltage and provides energy to CL

(a)

(b) Fig. 6.2. (a) Simplified diagram of an inductive link with the proposed dual-configuration IPM structure, and (b) performance of the proposed IPM structure vs. variation of PRx. The proposed ASIC adaptively changes configuration between SBC and active CM rectifier with automatic switching control to achieve optimal and robust operation.

and CHv through a shared-inductor boost converter (SBC) that reuses LRx. Moreover, to prevent power efficiency loss for PRx > PL + PHv, a voltage-power regulation (VPR) technique is used to regulate VL and

VHv at target levels and cut PRx when the Rx does not need extra power. In total, the proposed ASIC has 6 operating modes (M1-M6)—determined by a mode control block—to improve power efficiency over a wide

PRx range. It should be mentioned that there is a considerable amount of research on adaptive switching in the literature, especially in DC-DC converters [113]-[116]. Also, providing multiple outputs and adaptive switching have been implemented in VM inductive power management ASICs as well [117],[118]. But, this is the first work that 1) adaptively controls the configuration between SBC and CM to achieve optimal performance for a wide range of PRx, PL, and PHv; 2) simultaneously uses the Rx coil (LRx) to receive PRx for

WPT and energy transfer from CS to CL and CHv for the boost converter to reduce the size and cost of the

system; and 3) employs the VPR technique to simultaneously regulate multiple outputs and input power and perform over-voltage protection in one step. 6.1 Proposed dual-configuration ASIC features 6.1.1 Adaptive switching control (ASC) Fig. 6.3a shows the simplified circuit schematic and key operational waveforms of the proposed dual- configuration IPM ASIC in CM with ASC at fp=1/T and switching frequency fsw=1/Tsw, which is similar to an adaptive switching concept in DC-DC converters [113]-[116]. It should be noted while Fig. 6.3b shows the waveforms for charging CL, the same switching pattern can be employed to charge CHv or CS as well.

While CL is charging, SW5 and SW6 are high (P2,3: OFF), VB2,3 are connected to the highest voltage in the

ASIC, and VB1 is connected to VL. For low-power operation, the ASIC configures itself to CM, SW1 is initially high (N1: ON), and LRx resonates with CRx for several cycles of T to build up energy in LRx as current

(iRx). For charging CL, at the time zero-crossing of VRx (ZC), when iRx is at its maximum (imax), SW1 and SW4 go low (N1: OFF, P1: ON) and VRx jumps up to deliver the stored energy to CL via P1. ZC and the duration for turning P1 (PW) on are two key parameters that should be accurately adjusted based on PRx to achieve maximum PCE. Unlike conventional comparator-based active switching to determine ZC and PW, in this work ASC, in which VRx is monitored to adjust ZC and PW to their optimal values, is employed.

As shown in Fig. 6.3b, the value of VRx at the falling edge of SW1 (ti1) can be used as a criterion for the accuracy of ZC switching. If the switching is early or late, VRx is negative or positive at t = ti1, respectively.

Also, the value of VRx at the rising edge of SW4 (ti2) can be used to evaluate the accuracy of PW. If PW is short, VRx jumps up to turn on the parasitic bulk-diode of P1 (D1) and delivers the rest of iRx to the load. If

PW is long, a reverse current flows from CL to the LRxCRx tank, and at ti2, VRx jumps down to a value <

−|Vth,D0 − V0|, where V0 is the value of VRx at ti1, and the bulk diode of N1 (D0) is turned on, providing a path for iRx. However, in the precise switching condition, a negative jump can also be appeared in the VRx waveform at ti2 due to parasitic capacitors at the VRx node. But this negative peak should be too small to turn D0 on (> −|Vth,D0|). It should be mentioned that the same switching procedure can be carried out to charge CHv or CS by controlling the P2 or P3 switches with SW5 or SW6, respectively. 6.1.2 Shared-inductor boost-converter (SBC) configuration

Fig. 6.3c shows the simplified circuit schematic and key operational waveforms of the proposed ASIC in SBC configuration to transfer energy from CS to CHv at fp = 1/T and switching frequency fsw = 1/Tsw. A similar switching pattern can be employed to transfer energy from CS to CL, as well. For PRx < PL + PHv, the

ASIC automatically changes its configuration to SBC. In this configuration energy previously stored on CS is recycled to provide the required output power (i.e. PL + PHv − PRx) to keep VL and VHv regulated at 2.6 V and 3.9 V, respectively.

In SBC, shown in Fig. 6.3c, SW4 is high (P1: OFF), and VB1 and VB2 are connected to the highest voltage in the ASIC and VHv, respectively. SW1 and SW2 begin high (N1,2: ON), and LRx resonates with CRx for several cycles of T to build up energy in iRx. Then at t0, where VRx is at its negative peak (iRx = 0), SW2 and SW3 go low (N2: OFF, P4: ON) to connect CS in series with the LRxCRx tank. Since CS ≫ CRx, the LRxCRx tank is still in resonance (receiving power from Tx), and therefore the iRx peak increases by the amount of iS,m, which is the current provided by CS. Then, similar to CM at the VRx time zero-crossings, SW1 and SW5 go low (N1: 65

OFF, P2: ON), and VRx jumps to deliver energy to CHv. Adaptive switching is employed in the SBC configuration as well to achieve precise switching. With the same switching procedure, CL can be charged through P1 via SW4. In both CM and SBC configurations, there is a Td1 = 50 ns delay between the SW4/4,5 and SW1 rising edges to prevent any reverse current flowing from the outputs to the LRxCRx tank. Also, in the SBC configuration, at t = t0, N2 should be turned off slightly earlier than P4 is turned on to prevent CS from discharging to ground.

It is notable that SBC operation does not markedly change with the absolute value of LRx. But LRx should not be made too large, since the time of energy transfer from LRx to CHv or CL (i.e. the time between t1 and t2 in Fig. 6.3b) is limited to 500 ns. Since LRx plays a more important role in inductive link power transmission efficiency, it should primarily be determined by the inductive link optimization [65]. Also,

SBC operation is not impacted by the absolute value of CS as long as CS ≫ CRx, CS ≫ CHv, and CS ≫ CL.

During the times that CS plays a role in the ASIC operation (i.e. during t0 < t < t1 and t1 < t < t2), it is in series with either CRx or CHv/CL. Thus, as long as CS is large enough, its value does not change switch timings or power transfer to the outputs. In contrast, the value of VS can significantly increase energy transfer from

CS to the outputs (energy ∝ is,m). Therefore, CS should be charged to the maximum safe voltage level of the ASIC. The operation of VPR is explained in detail in Section 6.2 in connection with the chip architecture and operation algorithm. 6.2 Proposed ASIC architecture

Fig. 6.4 shows the block diagram of a proof-of-concept prototype dual-configuration IPM chip, which was designed in a 0.35-µm standard CMOS process at the fp of 1 MHz to regulate VL and VHv at 2.6 V and

3.9 V, respectively, and charge CS up to 3.9 V for operation in SBC configuration. In this process, these voltage levels were selected which can also be scaled down to VL = 2 V. But similar circuit techniques can be implemented at lower voltages in a more advanced process, providing transistors with a lower threshold voltage, to achieve smaller VL. Also, using a high-voltage process, similar circuit techniques can be used to achieve higher voltage (VHv) and power levels.

Fig. 6.4. Simplified block diagram of the proposed dual-configuration IPM structure with ASC, SBC, and VPR capabilities.

The mode control block determines whether the chip operates in CM or SBC based on VL, VHv, and VS according to the operation algorithm shown in Fig. 6.5. The operation of the chip is divided into six different modes (M1-M6). The first priority in this chip is regulating VL at 2.6 V, and then regulation of VHv at 3.9 V.

Therefore, the chip first checks VL, and if VL ≤ 2.57 V, it operates in SBC configuration to charge CL (M1).

Then for 2.57 V < VL ≤ 2.6 V, the configuration switches to CM to charge CL up to 2.6 V (M2). If slightly

VL > 2.6 V and VHv ≤ 3.87 V, CHv is charged in SBC configuration (M3). For 3.87 V < VHv ≤ 3.9 V, CHv is charged in CM configuration (M4). If CHv is still charging and VL goes below 2.6 V, the chip automatically switches back to M2 to charge CL back to 2.6 V, and then again switches back to charge CHv. When both CL and CHv are charged to the target values of 2.6 V and 3.9 V, respectively, the chip operates in CM configuration to charge CS up 3.9 V (M5). Finally, if Rx does not need any power (i.e. slightly VL > 2.6 V,

VHv > 3.9 V and VS > 3.9 V), PRx will be cut (M6) to avoid wasting extra power. If any of output voltages

(VL, VHv, and VS) go below their target levels, again the chip switches its operation mode to provide the required power.

It should be mentioned that a 30-mV margin below the target levels of 2.6 V and 3.9 V is given for VL and VHv, respectively, to change the ASIC operation mode for voltage regulation (i.e. the lower threshold voltages are 2.57 V and 3.87 V for VL and VHv, respectively). Therefore, the ideal maximum voltage variation in VL and VHv is 30 mV. One can adjust these thresholds for configuration/mode change to meet the application regulation requirements. Also, since VL provides supply voltage for the rest of the ASIC, the

ASIC first charges CL to generate supply for the control blocks for reliable operation, and then charges other outputs.

If the ASIC operates in M1 or M3 while CS is fully discharged, VS may reach a negative level. But this decrease in VS will be very small, since CS ≫ CRx, CS ≫ CHv, and CS ≫ CL. Also, the ASIC can still work properly and charge CHv and CL to the target levels by means of PRx. In our circuit implementation, the comparison between the output voltages and the threshold values is realized by hysteresis comparators with hysteresis windows of 10 mV to avoid back-and-forth switching between different modes.

In Fig. 6.4, SW2,3 are always high (N2: ON and P4: OFF) in CM configuration (M2,4,5), and N1 is controlled according to the CM operation discussed in Section 6.1.1 to charge CL, CHv, or CS through P1, P2, or P3 by controlling SW4, SW5, or SW6, respectively. In SBC configuration (M1,3), SW6 is always high (P3: OFF), and N1,2 are controlled according to the SBC operation discussed in Section 6.1.2 to transfer energy from

CS to CL or CHv through P1 or P2 via SW4 or SW5, respectively.

In M6, the ASIC opens the Rx resonance capacitor (CRx) by turning SW1 low (N1: OFF), and therefore the reflected load on the Tx side changes noticeably [65]. Thus, the Tx can sense this mode and turn off transmitted power to avoid wasting power in the Rx. This technique is called “voltage-power regulation

(VPR)” because both the output voltages and PRx are regulated simultaneously, which helps the ASIC 68

achieve maximum efficiency when PRx > PL + PHv. It is notable that N1 is off (i.e. the LRxCRx-tank is detuned) only in M6, in which the Tx will sense the Rx detuning based on the change in the reflected impedance [106] to turn off the transmitted power to the Rx side and consequently improve PCE. But in other operation

0.5 modes the link is always working under optimal tuning conditions (i.e. fp = (LRxCRx) ) to achieve maximum PTE [65].

Based on the operation mode (M1-6), the 7-bit initial values for ZC and PW, which are set externally, are determined by the switching initial condition block. Then the ASC block generates the desired signals for

SW1-6 to control the power transistors for the given operation mode. Also, a body biasing block and bandgap reference (BGR) generate control signals for VB1-B3 and reference voltages, respectively. The size of power transistors was selected sufficiently large to reduce conduction loss in the switches. P2 and P3 were sized at 3mm/0.5µm and 7mm/0.5µm, respectively, and the rest of the power transistors were 5mm/0.5µm. Also, a similar methodology used in [56], [54], and [78] can be employed here for mathematical modeling and loss analysis of the ASIC. The ASC block includes switching frequency control, ZC control, and PW control blocks, as shown in Fig. 6.6. In the switching frequency control block shown in Fig. 6.6a, Pulse Gen. 1 creates a rising edge 2.2

µs after reset every TSW = 5 µs to enable Comp. 1 to detect time zero-crossings of VRx with a relaxed offset/speed requirement. Then after two consecutive time zero-crossings of VRx, detected by two cascaded

D flip-flops, a rising edge is created to function as a synchronization signal to generate SW1-6. After 0.75T

= 750 ns, the VRx negative peak indicator (NP) goes high, which sets SW2,3 low for SBC operation (only in

M1,3; in other modes, SW2,3 = high).

Fig. 6.6. Simplified block diagrams of the ASC. (a) switching frequency control block, (b) zero-crossing control block, and (c) pulse-width control block. (d) Key waveforms of the ASC.

As shown in Fig. 6.6b, in the ZC control block, the NP rising edge is delayed in the Tunable Delay 1 block for TZC with 5-ns resolution. The delay is controlled by a 7-bit counter, which is adjusted in an iterative process to find the proper switching time for SW1 when VRx ≈ 0 (except in M6, when SW1 remains low). To generate update signals for the ZC correction loop (i.e. UDz), after 20 ns from the falling edge of SW1,

0.5VRx and 0.5VRx2 (the voltage across CRx) are sampled. The samples are then compared by ZC Comp. to update the counter for the next cycle. Thus, ZC Comp. can be designed with a relaxed speed requirement.

Since there is considerable parasitic capacitance of power transistors at the VRx node, VRx and VRx2 are sampled with a 20 ns delay to make sure these voltages have stabilized. The pulse width of the switching signals is controlled by the PW control block as shown in Fig. 6.6c.

To generate optimal switching times for SW4-6, the SW1 falling edge is first delayed by 10 ns to generate

SW4-6 falling edges, and then similarly the SW4-6 pulse widths are controlled by Tunable Delay 2 with 5-ns resolution and a 7-bit counter in an iterative process. To generate update signals for the PW correction loop

(i.e. UDPW), VRx is monitored at the rising edge of SW4-6 according to the discussion in Section 6.1.1. Finally, the Reset and Resetz commands are generated to reset all blocks for the next TSW. Thanks to the ASC, the ASIC does not require an ADC or high-speed voltage detector because the ZC and PW control loops can adaptively control switch timings by monitoring the criteria to achieve optimal performance.

It should be noted that a 10-ns delay is employed 1) after SW1 to prevent reverse current flowing from the output capacitors to ground and 2) after SW4-6 to make sure that VRx has reached its stable level.

Moreover, a limiter is added after VRx to prevent extra static power dissipation in the D flip-flop due to the sine-wave signal variation at its input. To reduce the settling time of the ZC and PW control loops, the switching initial condition block determines initial values of ZC and PW windows based on configuration. In CM, ZC time is 0.25T = 250 ns in ideal condition, but non-idealities may change it by several tens of ns.

In the SBC configuration, it is < 0.25T, and should be determined based on VS. In our design, since CS is charged up to 3.9 V, the initial ZC time is considered 150 ns in the SBC configuration. Similarly, the PW initial value should also be determined based on configuration and output power (PL and PHv). For higher output power, PW is longer. Usually, output power levels are known, and a proper initial value can be found in a manner similar to that in [56]. If output power levels are unknown, the PW should be chosen to be as small as possible while still preventing reverse current from the output capacitor at the cost of a longer settling time. It should be noted that process and temperature variations might affect the performance of some blocks in the ASIC, such as delay cells. The delay cells are realized through current-starved inverters loaded with capacitors. That said, these variations do not disrupt the operation of the ASIC, since thanks to the ASC, the ZC and PW control loops adaptively adjust switching timings, as discussed in Section 6.1. Moreover, the delays and pulse width values of the control signals are designed based on the worst process corner conditions. 6.3 Measurement results

Fig. 6.7 shows the dual-configuration chip micrograph fabricated in a 0.35-µm 2P4M standard CMOS process with an active area of 1.35 mm2. Fig. 6.8 shows the measurement setup for characterizing the 71

reconfigurable IPM chip. A pair of wire-wound coils, LTx and LRx, with geometries specified in the table (in

Fig. 6.8) were used. A signal generator was used to drive LTx at fp = 1 MHz. In the Rx, the LRxCRx tank was

Fig. 6.8. The proposed ASIC measurement setup showing the Tx and Rx wire-wound coils, (LTx) and (LRx), respectively. The inductive link specifications are listed in the table.

connected to the chip to achieve a regulated VL and VHv of 2.6 V and 3.9 V, respectively, across CL = CHv =

4.7 µF for different values of PRx, PL, and PHv.

6.3.1 ASC performance characterization

Fig. 6.9 shows measured transient waveforms when the ASC was suddenly activated, demonstrating a transition from switching with improper ZC and PW timings to precise switching. Since slightly VL > 2.6

V and VHv > 3.9 V, the chip operated in M5 mode to charge CS = 0.1 µF. For the sake of measurements, a

5.1-kΩ resistor was connected in parallel with Cs to limit the charge on Cs. Initially when the ASC was disabled, as shown in Fig. 6.9(b1), there were large reverse currents, due to improper ZC and PW timings, which limited VS to only 0.75 V. By enabling ASC, the ZC and PW control loops (shown in Fig. 6.6) started to adaptively optimize ZC and PW by adjusting the falling edge of SW1 and the pulse width of SW6, and as a result VS increased, as shown in Fig. 6.9(b2). Finally, in steady state shown in Fig. 6.9(b3), ZC and PW reached their optimized values and VS was charged up to 2.2 V thanks to the ASC.

Fig. 6.9. (a) Measured transient waveforms when the ASC block is enabled suddenly, demonstrating a transition from switching with improper ZC and PW timings to precise switching. (b) Zoomed-in views of VRx showing how ASC automatically optimized ZC and PW timings.

6.3.2 Received voltage (VRx) variation

Fig. 6.10 shows measured transient waveforms for input power (~ VRx) variation for CS = 0.1µF||5.1kΩ.

Since slightly VL > 2.6 V and VHv > 3.9 V, the chip operated in M5 mode to only charge CS. The VRx steady- state amplitude (VRx,amp) was changed from 0.8 V to 1.6 V, and the chip adaptively found optimal switching timing at each VRx amplitude, thanks to the ASC helping to charge CS with maximum efficiency.

Fig. 6.10. (a) Measured transient waveforms when VRx amplitude (~ PRx) was changed from 0.8 V to 1.6 V. (b) Zoomed-in views of VRx demonstrating how ASC automatically optimized ZC and PW.

Fig. 6.11. Measured transient waveforms for dynamic mode change between M2, M5, and M6 to simultaneously regulate VL at 2.6 V across RL = 10 kΩ, charge CS up to 3.9 V, and perform VPR.

6.3.3 Dynamic mode change and VPR operation

Fig. 6.11 shows measured transient waveforms for dynamic mode changes between M2, M5, and M6 for

CL = 4.7 µF, CS = 1 µF, and RL = 10 kΩ. The chip first switched periodically between M2 and M5 to simultaneously regulate VL at 2.6 V and charge CS up to 3.9 V. Indeed, since regulation of CL is the first priority in this chip, the ASIC first charged CL to slightly > 2.6 V in CM configuration in M2, and then, CS was charged in CM in M5. When CS was charged to slightly > 3.9 V, then it periodically switched between

M2 and M6 to maintain VL = 2.6 V (voltage regulation) and perform power regulation, respectively. In M6, the Rx resonance loop was opened (SW1 in Fig. 6.4 set low), and as a result PRx ≈ 0. It is worth-noting that in steady state when PRx > PL + PHv, the ASIC always dynamically switched between either M2 and M6 or

M4 and M6 to regulate CL and CHv at the target levels, respectively.

Small CS leakage current cannot cause serious problems for ASIC operation, since for reliable operation of WPT to biomedical devices, the Tx continuously sends power to the Rx, and PRx interruption or insufficiency only occurs for short periods of time. Moreover, whenever CS is discharged, the ASIC charges it immediately to the designated level of 3.9 V when PRx is available. 6.3.4 SBC performance characterization

Fig. 6.12 shows measured transient waveforms for providing VHv = 3.9 V (RHv = 1.9 kΩ, PHv = 8 mW) with insufficient PRx, resulting in adaptive chip reconfigurations between CM (M4) and SBC (M3) for CL =

CHv = 4.7 µF, CS = 100 µF. For VHv < 3.87 V the chip automatically employed SBC to increase VHv to 3.9 V by transferring energy stored in CS (summed with PRx) to CHv with precise switching timing, adjusted by

ASC, as shown in Fig. 6.12b. For VHv > 3.87 V the chip switched to CM, only utilizing PRx. However, since

PRx was not sufficient, CHv was discharged to < 3.87 V. Thus, the chip again used CS energy to charge CHv.

In other words, for PRx < PHv the chip dynamically changed its configuration between SBC and CM to regulate VHv at the desired level of 3.9 V. Fig. 6.13 shows measured transient waveforms for adaptive chip reconfiguration between CM and SBC to simultaneously regulate VL and VHv at 2.6 V and 3.9 V, respectively, with insufficient PRx, for CL = CHv =

4.7 µF, RL = 14 kΩ, RHv = 9 kΩ, and CS = 100 µF. The chip mostly operated in M4 (CM) to maintain VHv =

3.9 V. This said, since PRx < PHv, it operated in M3 (SBC configuration) for a short period of time to compensate for insufficient PRx. Meanwhile, whenever CL was discharged to < 2.6 V, the chip switched to

M2 (CM) to charge CL. It can be seen that the ASIC automatically adapted its configuration based on PRx,

PL, and PHv to regulate VL and VHv at the target levels. For this proof-of-concept prototype, the proposed structure is implemented with two outputs, but a similar strategy can be extended to systems with several outputs with only minor modifications.

Fig. 6.12. Measured transient waveforms for providing VHv = 3.9 V (RHv = 1.9 kΩ, PHv = 8 mW) with insufficient PRx, demonstrating adaptive chip reconfiguration between CM and SBC for CL = CHv = 4.7 µF, CS = 100 µF.

Fig. 6.13. Measured transient waveforms for adaptive chip reconfiguration between CM and SBC to simultaneously regulate VL and VHv at 2.6 V and 3.9 V, respectively, with insufficient PRx for CL = CHv = 4.7 µF, RL = 14 kΩ, RHv = 9 kΩ, and CS = 100 µF.

6.3.5 Improvements of the proposed structure Fig. 6.14a-c shows the improvement in performance of the proposed ASIC due to the ASC, VPR, and

SBC for CL = CHv = 4.7 µF and CS = 100 µF. Fig. 6.14a shows the PCE, defined as PL/PRx, with and without

ASC enabled. Without ASC, the ZC and PW were externally set at their optimal values for PL,min = 0.6 mW.

The on-chip ASC increased the PCE from 58.6% to 75.3% (by 1.3 times) at PL = 4.7 mW. In Fig. 6.14b, the Tx power was fixed to achieve PL = 4.7 mW, and then PCE was found with and without VPR. For the condition PL = 0.6 mW, without VPR, the PCE dropped significantly since extra PRx was wasted for voltage regulation and over-voltage protection. In contrast, the proposed ASIC can achieve high PCE for even small

PL levels and increases PCE up to 8.1 times at PL,min = 0.6 mW (PCE = 55.5%), compared with when VPR is disabled (PCE = 6.8%).

Fig. 6.14. (a) Measured PCE vs. PL with (w/) and without (w/o) enabling ASC. (b) Measured PCE vs. PL with and without VPR. (c) VHv vs. PHv for fixed PRx with and without SBC.

In Fig. 6.14c, the Tx power was fixed to provide PHv = 5.3 mW with the SBC disabled (only using CM), and then PHv was varied by changing RHv. For PHv ≤ 5.3 mW, the ASIC could successfully provide a regulated VL of 3.9 V by adaptively switching the operation mode between M4 and M6. For PHv ≥ 5.3 mW without the SBC, VHv started to decrease, because PHv exceeded PRx. In contrast, with the SBC enabled, the

ASIC successfully provided a regulated VHv of 3.9 V up to PHv = 45 mW with a VS of 3.9 V by recovering the energy previously stored on CS and adaptively switching the operation mode between M3 and M4. Therefore, thanks to adaptive switching of the configuration, the proposed ASIC could increase the maximum power provided by the ASIC (PHv,max) by 8.5 times compared to when the SBC was disabled, for the same PRx.

This increase in PHv is for short periods of time, since the energy stored on CS is limited, and in steady state CS will be discharged if PRx < PL + PHv. These short periods of time can be extended by using a high- 78

voltage process (increasing VS) and/or choosing a large capacitor or a battery as the storage element (CS). It is worth noting that most power-hungry functions of an IMD (e.g., stimulation or imaging) are required only for short periods of time. In other words, although the average power consumption of an IMD could be low, it might require a large transient peak power. Thanks to the SBC configuration, in addition to the energy received through the inductive link (PRx), the energy previously stored on CS can also be simultaneously delivered to the output. Therefore, the proposed ASIC can provide large peak power to enable an IMD to perform different functions during its operation. 6.3.6 The proposed dual-configuration IPM ASIC vs. state-of-the-art inductive power delivery ASICs The performance of the proposed dual-configuration ASIC is compared to state-of-the-art CM inductive power delivery ASICs ([78],[111] and [112]) in Fig. 6.15. The comparison between different ASICs is challenging, because the IPM ASICs were designed for different applications, PL levels, frequencies, figures of merit, etc. Here the ASICs are compared in terms of several important parameters of the inductive link such as PCE and frequency.

Fig. 6.15a shows the measured PCE of the different IPM ASICs vs. PL variation. It should be mentioned that the numbers in Fig. 6.15a for other works were found from PCE figures in the papers ([78],[111] and

[112]). Also, the assumption here is that PRx ≈ PL for each case. In other words, Fig. 6.15a shows the PCE of the ASICs when PRx is at its optimal level (i.e. slightly above PL), and the ASICs are operating as rectifiers at each PL. It is clearly seen that the optimal PL range is very different for the ASICs. For example, [78] shows optimal performance for PL in the range of µW, while our proposed chip is optimal for the mW range.

Fig. 6.15b shows the PCE vs. PL when 1) PRx is considered fixed to provide the maximum of the PL

(PL,max) for each work—for example PRx is considered 0.66 mW and 20 mW for [112] and [111], respectively—and 2) PL is normalized to PL,max for each ASIC. It is observed that PCE is a maximum at

PL,normalized = 1, as expected. And it reduces significantly for smaller PL levels for all other ASICs, since PRx

> PL and an extra portion of PRx is wasted within the ASICs due to voltage regulation. In contrast, the proposed ASIC can achieve high PCE despite large variations in PL thanks to the VPR technique.

Finally, Fig. 6.15c compares the ASICs’ performance in terms operating frequency, PL,max/PRx, and

PCEmax (small circles are the projections of the larger circles on the 2D planes). The suggested CM structure in [112][112] achieves the highest PCE (84%). However, its operating frequency and PL,max/PRx are limited to 125 kHz and 1, respectively. In contrast, the proposed IPM ASIC, in addition to offering high PCE

(75.3%), operates at the much higher frequency of 1 MHz and provides PL,max/PRx of 8.5 thanks to the dual- configuration operation with ASC. The proposed ASIC is the only work that provides PL,max/PRx > 1.

(a)

(b)

(c) Fig. 6.15. Benchmarking of the proposed dual-configuration IPM ASIC against CM state-of-the-art IPM ASICs. (a) Measured PCE vs. PL when PRx ≈ PL and the ASICs work as a rectifier. (b) Measured PCE when PRx is considered fixed to provide the maximum PL (PL,max) and PL is normalized to PL,max for each ASIC. (c) The ASICs’ performance in terms of operating frequency, PL,max/PRx and PCEmax (small circles are the projections of the larger circles on the 2D planes).

Table 6.1 benchmarks the proposed dual-configuration chip against state-of-the-art inductive power delivery ASICs. This chip is the first work that adaptively controls its configuration between SBC and CM to achieve optimal performance for a wide range of PRx, PL, and PHv. This work employs the VPR technique to simultaneously regulate output voltages and input power and achieve over-voltage protection in one step.

The proposed ASIC can achieve a high PCE of 75.3% for PL = 4.7 mW. The measured line and load regulation were 0.26% and 0.57%, respectively. Unlike previous works that mostly used comparator-based switching for active rectification, this chip employs adaptive switching in order to maximize efficiency. Moreover, this chip provides two outputs while only using 3 off-chip capacitors, and the same strategy can be used to increase number of outputs. Although the proposed structure has employed an additional off- chip capacitor as the storage capacitor (CS), thanks to the unique switching technique it eliminates the need for an off-chip inductor for the boost converter. Therefore, considering the functionality that the ASIC provides, the size of the system has not been increased compared to other IPM structures.

TABLE 6.1: Benchmarking of the dual-configuration ASIC among state-of-the-art inductive power management ASICs

ISSCC 2016 ISSCC 2017 ISSCC 2018 ISSCC 2018 JSSC 2019 Publication This Work [78] [55] [100] [103] [109] CMOS Tech. (nm) 180 350 65 180 180 350 Frequency (MHz) 0.05 1 13.56 13.56 1.7-30* 1 VM-CM Shared-Inductor VM VM CM (Active (Active/ VM (Quasi Boost- Rx Configuration (Active (Active Rectifier) Passive Boost Conv.) Conv./Current-Mode Rectifier) Rectifier) Rectifier) (SBC-CM) Regulation Voltage Voltage Voltage-Power Voltage-Power - - Technique Regulation Regulation Regulation** Regulation (VPR)

PCE (%) @ PL 61.2 @ VM: 77 @ 10 75.4 @ 6.3 67.8 @ 12 80.1 75.3 @ 4.7 (mW) 0.0028 VM : 0.8 Line Regulation (%) - - - - 0.26 CM : 2.5 Load Regulation VM : 0.75 - - - - 0.57 (%) CM : 2.2 Switching Timing One-shot diode Adaptive Switching Comparator Comparator Comparator Comparator Detection Method mode Control (ASC) 8.5 PL,max/PRx < 1 < 1 < 1 < 1 < 1 (750% increase)

# of Off-Chip 1 Cap.++, 1 1 Cap, 1 Ind., 1 Battery 1 Capacitor 1 Capacitor 3 Capacitors Comp.+ Battery 1 Battery # of Outputs 1 1 2 1 1 2 (1 cap. per output) 0.0006 - PL Range (mW) < 20 < 9.2 < 48 < 94 < 45 0.0028 Active Area (mm2) 0.54 0.52 5.1 1.25 1.37 1.35

*Multiple bands within the range of 1.7-30 MHz. **Only for strongly coupled coils. + ++ Excluding resonance capacitor (CRx). Using total on-chip capacitor of 5.42 nF in power management unit.

6.4 Conclusion

In this chapter, the theory of operation, circuit implementation, and measurement results for a new power management structure for inductive power delivery has been presented in which the configuration is adaptively controlled between an SBC and CM rectifier based on PRx, PL, and PHv in order to achieve optimal performance for a wide range of PRx. Utilizing the VPR technique, the proposed ASIC can efficiently achieve voltage regulation and over-voltage protection simultaneously in one step by controlling the input power. Moreover, active rectification is performed by ASC to mitigate issues related to comparator-based

CM rectifiers. In measurements, the proposed ASIC provided regulated voltages of VL = 2.6 V and VHv =

3.9 V despite significant variations in PRx. It achieved a high PCE of 75.3% at PL = 4.7 mW and measured line and load regulations of 0.26% and 0.57%, respectively. More importantly, the chip extended the peak- output-power range by 750% and improved power conversion efficiency by 1.3 times and 8.1 times thanks to ASC and VPR, respectively.

Chapter 7 A Comprehensive Study of Ultrasound Transducer Characteristics in Microscopic Ultrasound Neuromodulation

Thanks to the multi-decade efforts of research and development in the neuromodulation field, the therapeutic utility of neural stimulation in managing neurological and psychiatric diseases, such as Parkinson’s disease, has been well established [1]-[3]. Stimulation of brain activity has the potential to enhance our perceptual, motor, and cognitive capabilities, as well as to restore sensory and motor functions lost through injury or disease [4]-[6]. In basic neuroscience research, mapping of brain circuits by neuromodulation can also enhance our understanding of brain function. Currently, neuromodulation can be achieved with different modalities such as chemical, electrical, electromagnetic, optical, and acoustic methods [6]-[16]. Fig. 7.1a compares key specifications of different neuromodulation approaches in terms of their spatial coverage, spatial resolution and invasiveness. Noninvasive tools, such as transcranial magnetic stimulation (TMS) and transcranial direct and alternating current stimulation (tDCS, tACS), suffer from poor spatial resolution of centimeter (cm) scale and limited depth of penetration [2]. Invasive methods, such as electrical and optical stimulation, can achieve better spatial resolution through the implantation of electrodes and optic-fibers/light-emitting-diodes (LEDs) into neural tissue at the cost of tissue inflammation and damage (highly invasive). Low-intensity transcranial focused ultrasound (tFUS) as a noninvasive neuromodulation modality for both activation and suppression of neural activity has recently gained more attention due to its improved spatial resolution of sub-cm scale. Although tFUS has been successfully demonstrated in both in vitro and in vivo experiments on animals and humans for modulating neural activities in the central and peripheral nervous systems [23]-[39], mechanisms for inducing electrical activity on nervous tissue via ultrasound are still unknown. The tFUS is often practiced at low sonication frequencies (fp, the frequency at which the transducer is driven) of sub-MHz due to the large skull attenuation at high frequencies, but successful ultrasound stimulation at fps up to 43 MHz has also been reported [119]. In [120], [121], and [122], the impact of skull on the acoustic beam profile of ultrasound transducers at a wide frequency range has been studied. Inspired by the microscopic magnetic stimulation (µMS) [13],[123], the concept of microscopic ultrasound stimulation (µUS) is proposed in this thesis to further improve the spatial resolution and coverage of ultrasound stimulation [124]. In µUS, either an electronically phased array of ultrasound transducers or several millimeter (mm)-sized focused transducers can directly be placed on the brain surface

with partially removed skull (or over thinned skull) as shown in Fig. 7.1b or sub-mm-sized transducers can be implanted inside the brain tissue to deliver a focused ultrasound pressure to the neural target.

(a)

(b)

Unlike tFUS, in which ultrasound travels through the lossy skull medium with different acoustic impedance compared with the soft tissue demanding low frequency operation (poor spatial resolution), in the µUS acoustic energy is steered and delivered directly to the neural target within a more homogenous medium. Therefore, neuromodulation with finer spatial resolution at a larger scale can be achieved with higher energy efficiency, defined as the transducer generated acoustic intensity at the neural target divided by the transducer input electrical power. In µUS, high energy efficiency is key in reducing the required electrical power that will consequently enable the µUS system to be wearable or implantable. Despite all these advantages of the proposed µUS, it is more invasive than tFUS as it requires device implantation.

However, µUS is still less invasive compared to its electrical and optical counterparts, because ultrasound transducers in µUS can be placed on the brain surface outside the parenchyma. A key element in both tFUS and µUS is the ultrasound transducer(s) that converts input electrical power into acoustic pressure. The transducer design can highly affect the stimulation specifications such as spatial resolution and energy efficiency. Although a considerable amount of research on ultrasound transducer design exists in the literature [125]-[130], most of the prior works have mainly focused on broadband (with low-quality factor, Q) ultrasound transducers with pulse excitation which are frequently used in ultrasound imaging applications. However, the proposed µUS generally requires a sinusoidal excitation (Fig. 7.1b) as well as high energy efficiency (to be portable) that should be achieved with narrowband ultrasound transducers with high Q. Until now, most tFUS experiments have only been focused on studying the impact of ultrasound on neural tissue, investigating optimal tFUS sonication parameters and studying interactions between acoustic beams and brain tissues using commercially available bulky ultrasound transducers [23]-[39]. Although custom-made transducers have been used in [131], [132], unfortunately there has been no comprehensive study (in a quantitative manner) on the impact of transducer dimension, focusing, acoustic matching, backing materials and frequency on the generated acoustic beam profile that relates to the stimulation spatial resolution and energy efficiency. In this chapter, the µUS transducer array in Fig. 7.1b is simplified to a single mm-sized transducer (either focused or with natural focus), made from lead zirconate titanate-5A (PZT-5A). In future works, these studies need to be extended from a single focused transducer to an array of ultrasound transducers. In this chapter, a comprehensive study in a quantitative manner on the relationship between transducer characteristics, such as dimension, focusing, acoustic matching, backing materials and frequency, and achievable spatial resolution and energy efficiency in µUS is presented. The main contribution is not transducer fabrication and design per se. It is rather a comprehensive quantitative evaluation of the performance of mm-sized ultrasound transducers (in both water and sheep brain phantom medium) in terms of spatial resolution and energy efficiency in the context of ultrasound neuromodulation that will provide future designers of such systems with insight in developing novel electronics and in vivo experiments. This chapter introduces a new figure-of-merit (FoM) for µUS as the maximum acoustic intensity to input-power (at electrical port) ratio (I2PR) related to the energy efficiency. The study methods can also be generalized to tFUS.

7.1 Ultrasound transducer modeling and operation

In this chapter, disc-shaped piezoelectric transducers for µUS are studied, but similar theory can be generalized to other types of transducers. For a disc-shaped transducer, there are two strongly excited vibration modes, named thickness extensional (TE) and radial or planar expander (PE) modes, as well as several weakly coupled modes near TE and PE modes [133]. For large aspect ratios (Do/t), where Do and t are the outer diameter and thickness of the transducer (piezoelectric material), respectively, the TE mode is dominant, and the transducer only shows a piston-type displacement.

Fig. 7.2. Transmission line model (KLM) of a piezoelectric transducer [134].

Fig. 7.2 shows the Krimholtz, Leedom, and Matthaei (KLM) model of a piezoelectric transducer, in which the transducer is represented by a transmission line tapped at its center [134]. The transducer is driven through the input electrical port. An ideal transformer with the turn ratio of Φ:1 models the electrical to mechanical coupling where Φ can be found from,

1/2 . (8.1) =KT () sinc() 000CZc 2

s KT and Zc are the electromechanical coupling factor and acoustic impedance, respectively. C0 = ε ×A/t represents the transducer clamped capacitance where εs and A are clamped dielectric constant and the transducer cross-section area. In (8.1), ω0 = πva/t is called half-wavelength resonant frequency in the TE mode where va is stiffened acoustic velocity. The KLM model also includes a capacitor in series with the transformer, C’ (negligible effect, C0 << C’), related to the transducer dimension and KT. Within the transformer secondary side, representing the mechanical part, two generated acoustic waves pass through two transmission lines with t/2 length, Zc characteristic impedance and va sound velocity to reach the front (propagating waves in tissue) and back acoustic ports, interfacing with transducer front and backing materials with ZF and ZB acoustic impedances, respectively. When ZF and ZB are smaller than Zc, the transmission line has a resonance close to ω0. The input electrical impedance at ω0 can be found from,

2 4KT Zc . (8.2) R0 = () 00CZZBF+ 86

Fig. 7.3 shows the generated acoustic beam profile of a disc-shaped transducer which can be divided into two regions: near field and far field. At the boundary of these two regions, a focal zone appears at which the beam width is relatively narrowest (proportional to Do) resulting in the maximum acoustic intensity [46]. As shown in Fig. 7.3, even an unfocused disc-shaped transducer has a natural focus. The near-field region begins from the transducer surface and ends at the focal point defining the focal length (N), fD2 N = po, (8.3) 4v where ν is the sound velocity in the medium. In near-field region (particularly near the transducer surface), there are several local maxima and minima which are highly dependent on the medium (i.e., difficult to model their exact locations). The far-field region begins at the focal point at which the beam starts to diverge, thereby increasing the beam width along the axial direction. As shown in Fig. 7.3, the acoustic intensity decreases monotonically in the far-field region, and its variation in the lateral direction is less than that in the near field. In far field, the beam profile can be predicted with higher accuracy, which is preferable for reliable operation.

7.2 Transducer fabrication, simulation and measurement setup For the fabrication of all transducers, PZT-5A was chosen as the piezoelectric material due to its high electromechanical coupling, which is key in maximizing acoustic pressure and I2PR. In order to quantitatively study the impact of a wide variety of transducer design parameters, such as dimension (Do, t), fp, backing material (PCB-backed, air-backed), beam focusing and acoustic matching, nine sets of transducers (US1-US9) were fabricated (specifications summarized in Table 7.1) at frequencies of 2.2-9.56 MHz.

Fig. 7.4 shows some examples of the fabricated transducers mounted within their assemblies. Fig. 7.4a and 8.4c shows US2 and US6 transducers with PCB as the backing material and piezoelectric (PZT) material dimension of Do = 6.8 mm, t = 0.75 mm and Do = 2.8 mm, t = 0.3 mm, respectively. The PZT discs were mounted on a 1.5 mm thick PCB using conductive epoxy, and their top silver plate was wirebonded to a PCB pad. The transducers were connected to SMA connectors using a pair of AWG28 wires. Then, their PCBs were placed inside a custom-made 3D-printed plastic holder. Finally, to provide electrical isolation and protect wirebonds, the transducer surface was coated by Sylgard-184 (The Dow Chemical Company, Midland, MI) which has similar acoustic properties to water (cannot be used for acoustic matching).

Fig. 7.4b shows the air-backed transducer with the PZT material dimension of Do = 6.8 mm and t = 0.75 mm (US1). The PZT disc top and bottom plates were soldered to a pair of AWG28 wires, and then connected to a SMA connector. A 3D-printed plastic holder with a 6.8 mm diameter hole at its center was fabricated to house the transducer and provide air as the backing material. The PZT disc was placed inside the hole and held still by gluing its perimeter to the holder. The other end of the hole was covered by epoxy to create electrical isolation, thus providing air as the PZT backing material. Similarly, the transducer surface was covered by Sylgard-184. The transducers in Fig. 7.4a-c are unfocused but feature a natural focal zone as shown in Fig. 7.3.

Fig. 7.4. Some examples of fabricated transducers used in our measurements. (a) US2: PCB-backed transducer with Do = 6.8 mm and t = 0.75 mm, (b) US1: air-backed transducer with Do = 6.8 mm and t = 0.75 mm, (c) US6: PCB-backed transducer with Do = 2.8 mm and t = 0.3 mm, (d) and (e) US8 and US9: focused PCB-backed transducers (Do = 5.8 mm, t = 1 mm) encapsulated with EPO-TEK and EPO-TEK + Alumina, respectively.

Fig. 7.4d and 4e shows fabricated focused transducers (US8, US9) with PZT dimension of Do = 5.8 mm and t = 1 mm and focusing lens materials of EPOTEK-301 (Epoxy Tech., Billerica, MA) and EPOTEK-

301+Alumina (Al2O3), respectively (these materials also provide acoustic matching). The procedure to fabricate these two transducers is as follows. 1) The PZT disc was mounted on a PCB using conductive epoxy. 2) The PCB was placed inside a brass housing to hold the lens material. 3) A steel bearing ball with 10 mm diameter was used as a mold to shape the lens surface (create desired curvature). The bearing ball was held by a 3-axis translation stage (NRT-100, Thorlabs, Newton, NJ) in a way that the distance between the PZT disc surface at its center and the ball surface was ~λ/4 = 0.25 mm (λ: ultrasound wavelength inside the lens, fp = 2.47 MHz) to provide acoustic matching. And finally, 4) The lens material was poured inside the brass housing to fill the space between the PZT disc and the bearing ball. Before pouring the lens material, the ball was sprayed with a mold release agent (Ease Release 200, Mann Formulated Prods., Gillete, NJ), facilitating the ball removal from the transducer when the lens material is cured.

(a)

(b) Fig. 7.5. (a) Measurement setup used to measure the acoustic pressure generated by each ulrasound transducer. (b) Simulation setup in COMSOL used to find electrical and acoustic characteristics of the ultrasound transducers (US).

Fig. 7.5a shows our setup for measuring the acoustic pressure generated by each transducer. The transducers were placed inside a tank filled with deionized (DI) water and were driven by a function generator with a burst-mode sinusoidal waveform at pulse repetition interval of 1 ms. All measurements were done in DI water to ensure that transducer wires are electrically isolated. Since the goal was to study the acoustic intensity profile of each transducer, they were driven by relatively low ultrasound pressure (tens of kPa), which resulted in no ultrasound scattering. However, in future experiments with much higher ultrasound pressure (hundreds of kPa), degassed water will be used to avoid ultrasound scattering due to bubbles and cavitation [18]. To measure the acoustic pressure, the HGL0085 hydrophone (Onda, Sunnyvale, CA) with 85 µm aperture size and 0.25-40 MHz bandwidth was employed. The voltage across the hydrophone was amplified by a preamplifier with 20 dB voltage gain and 360 µVrms input noise. The preamplifier output was captured using a commercial data acquisition system (Razormax 16, GaGe, Lockport, IL) with 1 Gsps sampling rate and 16 bits of resolution. The measured pressure data was stored in a PC. To locate the measured pressure with the hydrophone position, a trigger signal from the function generator was used. The trigger signal was generated 2 µs before each burst of the input sinusoid. After each 64 consecutive rising edge of the trigger signal (64 ms), the PC sent a command to the 3-axis translation stage to move the hydrophone position with the minimum step size of 50 µm. The stored pressure data was averaged during 64 ms for filtering the high frequency noise. Fig. 7.5b shows our COMSOL Multiphysics (COMSOL, Burlington, MA) simulation setup used to find the electrical and acoustic characteristic of the ultrasound transducers (US). The transducer front side was covered by Sylgard and was immersed in water with the attenuation coefficient of 0.002 dB/(MHz.cm). The boundaries were modeled with the perfect matching layer (PML). The predefined PZT-5A model in COMSOL was used. The mechanical loss was modeled with the PZT damping factor of 0.02. The Sylgard density and the speed of sound in Sylgard were considered 1500 kg/m3 and 1000 m/s, respectively [135]. The Sylgard thickness was within 1-2 mm for different transducers. In practice, the encapsulation layer thickness should be ~λ/4 to maximize the acoustic intensity. But, the Sylgard acoustic impedance is close to that of water, and therefore, its thickness is not an issue. For simplicity, the 3D-printed holder was not modeled in simulations. In the electrical circuit interface, an AC voltage source and a source resistor (Rs) of 50 Ω were connected to the transducer to measure the driving electrical power and impedance (ZUS), as shown in Fig. 7.5b.

(a)

(b) Fig. 7.6. Measured transient voltage of the hydrophone (after preamplifier) for driving US2 at the axial distance of (a) 12.3 mm and (b) 6.9 mm.

Fig. 7.6a and 7.6b shows the measured hydrophone transient voltage (after preamplifier) when US2 was placed at the axial distance of 12.3 mm and 6.9 mm, respectively. The transducer center is considered as the reference point for both axial and lateral distances. The transducer was excited with a burst-mode sinusoid at 2.7 MHz with 12 number of cycles (Nc). As shown in Fig. 7.6a, two different sets of sinusoidal signals can be seen at the hydrophone output. The first set, which coincides with the transducer exciting voltage, was due to the electromagnetic coupling noise between the transducer and the hydrophone. The second set was the actual generated pressure by the transducer. Since it takes several cycles for the transducer to reach steady-state vibrations due to its limited bandwidth, Nc should be chosen large enough for the hydrophone voltage to settle down. As the hydrophone was closer to the transducer (axial distance of 6.9 mm) in Fig. 7.6b, the coupling noise interfered with the actual generated pressure. For smaller axial distances, the coupling can completely disrupt the actual received pressure waveform. Therefore, measurements in near-field (small axial distances) is quite challenging. To mitigate this, Nc is chosen as the smallest number of cycles that the transducer vibration could reach its steady state. For example, Nc was 10 and 7 for US1 and US3, respectively. The axial distances of 6.9 mm and 12.9 mm were primarily chosen to show the coupling noise interference in measuring acoustic intensity at short distances (< 6.9 mm). For neuroscience research applications, these axial distances are optimal for targeting the brain regions of rodents which are within ~10 mm of their skull [136].

Based on (8.3), reducing Do decreases the focal length and improves the lateral resolution. In [124], the acoustic intensity profile of sub-mm-sized transducers (for implantation in brain tissue) was investigated using COMSOL. For instance, for a transducer with Do = 0.5 mm and t = 0.2 mm the focal point was located 91

at the axial distance of < 50 µm. The characteristics of such transducers cannot be accurately measured with our current setup due to the coupling noise. Due to difficulty in fabrication, handling, and characterization of sub-mm-sized transducers, as a first step, this study investigates the performance of mm-sized transducers to establish FoM for µUS. These results will help design of micron-scale ultrasound transducer arrays for µUS (Fig. 7.1b) in future studies. 7.3 Simulation and measurement results 7.3.1 Figure-of-Merit (FoM) for the proposed µUS

For successful ultrasound stimulation, the required acoustic intensity at the neural target should be higher than a threshold, which depends on the sonication frequency and pattern [138]. In µUS, in which the stimulation system will be portable, it is crucial to meet such threshold requirement with minimal electrical power for driving the ultrasound transducer(s). Therefore, the maximum acoustic intensity (W/cm2) to the input electrical power (W) ratio, termed as I2PR (cm-2), is defined as the FoM for the µUS. This FoM, which directly relates to the stimulation energy efficiency, is used to compare the performance of different transducers. It is worth noting that the insertion loss (IL) and transducer electrical-to-mechanical power efficiency

(ηT) are also the parameters which are often used in the literature as a measure of a transducer sensitivity particularly in imaging [125]. The IL is defined as the voltage inverse ratio of the magnitude of an ultrasound sinusoidal burst, which is emitted by the transducer, to the magnitude of the received reflected echo from a highly reflective plane in parallel with the transducer. The IL is often reported in dB (20log10).

Although IL can be considered as a measure of ηT, it does not explicitly relate to the acoustic intensity as it lacks information about the transducer focusing characteristic. Therefore, both IL and ηT, while very important, are not the optimal FoM for the µUS compared to I2PR. This said, all these three parameters (IL, 2 ηT, I PR) were measured for each transducer as shown in Table 7.1. 7.3.2 Simulation vs. measurement

To validate the accuracy of the measurements, the simulated and measured characteristics of the transducers were compared (only US1 simulated results are reported). Table 7.1 shows the specifications and measured electrical and acoustic characteristics of US1-US9 transducers.

Table 7.1: Specifications and acoustic/electrical characteristics of the fabricated ultrasound transducers in the measurements

US1 US2 US3 US4 US5 US6 US7 US8 US9 Transducer Do = 6.8 mm Do = 5 mm Do = 4.2 mm Do = 4.2 mm Do = 2.8 mm Parameter Do = 5.8 mm, t = 1 mm t = 0.75 mm t = 0.75 mm t = 0.73 mm t = 0.4 mm t = 0.3 mm Encapsulation EPO-TEK Sylgard Sylgard Sylgard Sylgard Sylgard Sylgard EPO-TEK EPO-TEK Layer + Alumina Backing Layer Air PCB PCB PCB PCB PCB PCB PCB PCB Focused No No No No No No No Yes Yes

fp (MHz) 2.8 2.8 2.8 3.056 5.66 9.56 2.19 2.47 2.47 N (mm) 14.25 16.75 11.25 4.35 14 9.25 4.6 8.5 7 Axial Resolution 14.75 19.25 12.5 7.75 23.75 6.25 12 6.5 6.5 (mm) Lateral Resolution 1.9 2.2 1.75 1.1 1.1 0.5 1.8 1.05 1 (mm) Max. I2PR (1/cm2) 6.6 2.4 3.4 8.85 3.71 16 2.9 9.3 12.9 Electrical 303 + 136 - 287 - 158j 395 - 317j 148 - 67.2j 326 - 5j 233 - 245j 250 - 363j 194 - 318j Impedance (Ω) @ fp 7j 50.5j

IL (dB) @ fp -21.3 -24.7 -29.8 -30.5 -31.9 -33.7 -31.7 -32.2 -29.9

ηT (%) @ fp 36.7 16.3 15 22.6 11 12 17 14.5 21.7

For each transducer, the following measured parameters are reported. 1) electrical impedance measured using a network analyzer (E5071C, Keysight Tech., Santa Rosa, CA), 2) acoustic intensity profile in axial and lateral directions normalized to the maximum intensity in that specific measurement, 3) axial and lateral resolution, defined as half-power (-3 dB) beam width (normalized intensity reduced to 0.5) in axial and lateral directions, respectively. For axial resolution, the beam width in the far-field region starting at N is reported, because near-field measured intensities are not reliable. For the lateral resolution, the beam width at N is reported. 4) I2PR as discussed earlier. 5) IL, which was measured using the similar method in [125]. It should be noted that the measured IL results represent two-way insertion loss and include the losses introduced by the medium (water), the reflector (air), the divergence of the ultrasound beam, which is the main reason for relatively low IL values in Table 7.1, and measurement setup nonidealities. To exclude

such losses, 6) the ratio of the acoustic power to electrical power (ηT) was also measured. The acoustic

power in ηT was calculated by integrating the measured acoustic intensity over a plane in parallel with the transducer surface at the focal length (N).

(a)

(b)

(c)

(d) Fig. 7.7. Comparison between measured and simulated characteristics of US1. (a) Electrical impedance, (b) simulated (COMSOL) acoustic beam profile at fp = 2.85 MHz, (c) measured acoustic beam profile at fp = 2.8 MHz, and (d) axial and lateral resolution. Acoutic intenstiry was found for 1 V sinusoidal input.

Fig. 7.7 compares measured and simulated results of electrical and acoustic characteristics of US1. Fig.

7.7a shows the US1 electrical impedance with the simulated/measured series and parallel resonance frequencies of 2.66/2.6 MHz and 2.85/2.8 MHz, respectively. Fig. 7.7b and 7.7c shows the simulated and measured acoustic beam profiles, respectively, at the parallel resonance frequencies for the same sinusoidal input with 1 V amplitude across US1. Fig. 7.7d compares simulated and measured axial and lateral resolutions extracted from Fig. 7.7b and 7.7c. The simulated/measured N and axial and lateral resolutions were 12/14.25 mm, 15/14.75 mm and 1.3/1.9 mm, respectively. For the same input, the maximum simulated and measured acoustic intensity at the focal zone was 19.6 mW/cm2 and 11 mW/cm2, respectively. This discrepancy could be due to the differences in the boundary condition (related to reflections), PZT-5A parameters, lateral resolution, and electrical impedance (related to input power) between simulation and measurement setups. Therefore, for fair comparison of transducers, the measured normalized acoustic intensity and I2PR will be reported in the rest of this chapter.

In the following subsections, measurement results are used to study the impact of fp, transducer dimension (Do, t), backing layer, focusing, and acoustic matching on the characteristics of the generated acoustic beam profile.

7.3.3 Sonication frequency (fp) impact

Ideally, fp should be selected based on the transducer mechanical resonance frequency, which is ω0/2π

= va/2t for a disc-shaped transducer in the TE mode [134]. But in practice the backing and matching materials can affect ω0. In addition, C0 and C’ capacitors in Fig. 7.2, which are in series with the equivalent mechanical impedance, appear in the electrical impedance (seen from the input electrical port in Fig. 7.2), thereby deviating the electrical resonance frequency from ω0. Typically, the electrical impedance plot shows the series and parallel resonance frequencies as in Fig. 7.7a. For a transducer with a high ηT, these two frequencies merge to ω0/2π. To show the impact of operation at series vs. parallel resonance, the normalized acoustic intensity of

US1 was measured at three different frequencies of 2.6 MHz (series resonance, Fig. 7.8a), 2.7 MHz (between series and parallel resonance, Fig. 7.8b) and 2.8 MHz (parallel resonance, Fig. 7.7c). At 2.6 MHz, 2.7 MHz and 2.8 MHz, measured N was 20 mm, 14 mm and 14.25 mm, and the maximum I2PR was 0.45 cm-2, 3.1 cm-2 and 6.6 cm-2, respectively. This resulted in 14.7 times improvement in I2PR by operating at the parallel resonance (2.8 MHz) compared to the series resonance (2.6 MHz). As shown in Fig. 7.8c, axial and lateral resolution changed at different frequencies. In particular, worse resolution and lower I2PR were achieved at 2.6 MHz. Therefore, the beam profile is sensitive to fp, and one should sweep fp around the transducer

2 resonance frequencies to find the optimal fp that maximizes I PR. This said, in all transducers the optimal fp was found at or close to the parallel resonance frequency.

(a)

(b)

(c) Fig. 7.8. Measured acoustic beam profile of US1 at the frequencies of (a) 2.6 MHz and (b) 2.7 MHz. (c) Axial and lateral resolution. Fig. 6c shows the measured beam profile of US1 at 2.8 MHz.

It is worth noting that the optimal fp may not be exactly the same as the transducer center frequency (fc) 2 which is usually found from pulse-echo measurements [125]. The optimal fp is found when I PR is 2 maximized, while operating at fc may not necessarily result in the maximum I PR. Because, for maximizing I2PR the acoustic intensity at the focal zone and the input electrical power should be maximized and minimized, respectively, while at fc only the pulse-echo frequency spectrum reaches its maximum. For 2 example, the fc of US1 is 2.7 MHz, but I PR is maximum at 2.8 MHz. This is mainly due to the higher transducer impedance at 2.8. MHz, which resulted in lower input power.

7.3.4 Backing layer impact

Acoustic characteristics of the transducer backing layer not only impacts the generated acoustic intensity but can also affect the transducer electrical impedance. Based on (8.2), R0 (transducer impedance at resonance) is inversely proportional to ZB, and therefore, small ZB (high R0) leads to higher Q, enhancing the ηT. In other words, at small ZB most of the mechanical wave, which reaches the back acoustic port in Fig. 7.2, is reflected back towards the front acoustic port, generating higher acoustic pressure in the medium.

(a)

(b)

(c) Fig. 7.9. Impact of the backing layer (air vs. PCB) on the acoustic beam profile of air-backed US1 (Fig. 6c) and PCB-backed US2. (a) US2 measured electrical impedance, (b) US2 measured acoustic beam profile at fp = 2.8 MHz, and (c) axial and lateral resolution of US1 and US2.

To study the backing material impact, the acoustic beam profile of air-backed US1 and PCB-backed US2 with similar dimension were measured and compared. The ZB values for air and printed circuit board (PCB) are ~ 4×10-4 MRayl and 6.6 MRayl, respectively. As shown in Fig. 7.9a, at the parallel resonance the air-

backed US1 achieved higher impedance and sharper phase transition, indicating that its Q is higher. The measured acoustic beam profiles of US1 and US2 in Fig. 7.7c and 7.9b (fp,US2 = 2.8 MHz), respectively, as well as their axial and lateral resolutions in Fig. 7.9c are almost similar, indicating that the beam shape is less sensitive to the backing material, although N is slightly higher for US2 (14.25 mm vs. 16.75 mm). The

2 -2 2 maximum I PR and ηT of US1/US2 were 6.6/2.4 cm (175% increase in I PR by changing the backing layer from PCB to air) and 36.7/16.3%, respectively, implying that air backing with smaller ZB leads to higher energy efficiency as predicted by the theory. Therefore, unlike acoustic imaging, in which backing materials with high ZB and large damping are preferred (low Q, wideband) [134], in µUS (and tFUS) backing 2 materials with low ZB and small damping (high Q, narrowband) are preferable to increase the I PR.

7.3.5 Transducer dimension (Do, t) impact

The transducer dimension, including Do and t, can significantly affect the transducer performance since

ω0 = πva/t and N in (8.3) highly depend on t and Do, respectively. To study the impact of t, the measured characteristics of two PCB-backed transducers with similar Do = 4.2 mm and different t of 0.73 mm (US4) and 0.4 mm (US5) are compared in Fig. 7.10. As shown in the measured electrical impedance plots in Fig.

7.10a, the parallel resonance frequency of US4 was 3.05 MHz which was smaller than that of US5 (5.66 MHz) due to its larger t. Fig. 7.10b and 7.10c shows the measured normalized acoustic intensity profile of

US4 and US5, respectively. Fig. 7.10d compares the axial and lateral resolution of these two transducers.

The US4 and US5 achieved different N of 4.35 mm and 14 mm mainly due to their fp difference. Higher fp resulted in larger N. In addition, both transducers achieved similar lateral resolution of ~1.1 mm. As discussed in Section 7.2, since the focal zone of US4 was close to the transducer surface, its measured acoustic beam in Fig. 7.10b is somewhat affected by the coupling noise.

In order to study the impact of Do, the acoustic beam profile of two PCB-backed transducers with similar t = 0.75 but different Do of 5 mm (US3) and 6.8 mm (US2) at fp = 2.8 MHz were measured and compared.

The measured electrical impedance of US2 and US3 was already shown in Fig. 7.9a, indicating that they have similar parallel resonance frequency of ~2.8 MHz. However, at parallel resonance US3 with smaller 2 Do achieved higher impedance (R0), because R0 is inversely proportional to C0 ∝ A ∝ Do based on (8.2).

Fig. 7.9b and 7.11a shows the measured normalized acoustic intensity profile of US2 and US3, respectively. Fig. 7.11b compares their axial and lateral resolution. The measured N for US2 and US3 were 2 16.75 mm and 11.25 mm, respectively. Since N is proportional to Do based on (8.3), US3 achieved larger

N. The lateral resolution of US2 with smaller Do was better than that of US3 (1.75 mm vs. 2.2 mm), because

2 -2 beam width is proportional to Do [94]. Finally, the maximum I PR of US2 and US3 were 2.4 cm and 3.4

-2 2 cm , respectively. Higher I PR of US3 for 41.6% could be due to its smaller focal zone and higher Q (see 98

Fig. 7.9a). Therefore, smaller Do helps to improve lateral resolution at shorter N as well as the energy efficiency to some extent for relatively large Do/t ratio.

(a)

(b)

(c)

(d) Fig. 7.10. Impact of t on the acoustic beam profile of US4 (t = 0.73) and US5 (t = 0.4) with similar Do = 4.2 mm. (a) Measured electrical impedance, (b) US4 measured intensity at fp = 3.05 MHz, (c) US5 measured acoustic intensity at fp = 5.56 MHz, and (d) axial and lateral resolution of US4 and US5.

(a)

(b) Fig. 7.11. Impact of Do on the acoustic beam profile (t = 0.75 mm) of US2 (Fig. 6c) and US3. (a) US3 measured acoustic beam profile at fp = 2.8 MHz (US2 profile in Fig. 7.9b) and (b) axial and lateral resolution of US2 and US3.

To study the effect of aggressive size scaling (both Do and t), the acoustic intensity profile of a PCB- backed transducer (US6) with small Do = 2.8 mm and t = 0.3 mm was measured at its parallel resonance frequency of 9.56 MHz, as shown in Fig. 7.12. The axial and lateral resolution was 6.25 mm and 0.5 mm, respectively, which were significantly improved compared to US2 and US3. This is mainly due to both

2 -2 decrease in Do and increase in fp. The maximum I PR = 16 cm of US6 was also much higher than US2 and

US3, mainly due to smaller Do and resulting improved lateral resolution. This said, µUS at higher fp often requires larger threshold intensity to stimulate the neural tissue [119].

Fig. 7.12. US6 measured acoustic beam profile at fp = 9.56 MHz.

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7.3.6 Beam focusing impact

Beam focusing is known to improve the spatial resolution of the generated acoustic beam by a transducer. This will consequently enhance the acoustic intensity at the focal zone, improving the energy efficiency. As described in Section 7.2, for the focused transducers, spherically shaped acoustic lenses (at the front side) were fabricated with two different materials, EPO-TEK301 (US8) and EPO-

TEK301+Alumina (US9), on top of the PZT disc as shown in Fig. 7.4d and 7.4e, respectively. These PCB- backed transducers had similar dimension (Do = 5.8 mm, t = 1 mm). For fair comparison, another unfocused

(flat) transducer (US7) with EPO-TEK301 matching layer and similar dimension was also fabricated. It should be noted that Sylgard-184 was not used in US7-9, because sound speed in the lens material should be higher than that in the medium (water in our experiment) for proper acoustic matching.

Fig. 7.13a shows the measured electrical impedance of US7-9. The parallel resonance frequency of the unfocused (US7) and focused (US8,9) transducers was 2.2 MHz and 2.47 MHz, respectively. Therefore, the focusing lens slightly changed the resonance frequency. For the focused transducers (US8,9), US8 with EPO- TEK as the lens material achieved higher Q (larger impedance and sharper phase transition at resonance), because by adding Alumina to the EPO-TEK as in US9, the acoustic impedance of the lens material (ZF) increased and led to lower R0 at resonance (lower Q) based on (8.2).

Fig. 7.13b, 7.13c, and 7.13d shows measured normalized acoustic beam intensity of US7-9, respectively.

Fig. 7.13e compares the axial and lateral resolution of these three transducers. For US7-9, N was 4.6 mm,

8.5 mm and 7 mm, respectively. While the axial and lateral resolution of unfocused US7 was 12 mm and

1.8 mm, respectively, for focused US8 and US9 the axial and lateral resolution was very close at 6.5 mm and ~1 mm, respectively. Therefore, both axial and lateral resolution was significantly improved by ~1.8 times (from 12 mm to 6.5 mm and 1.8 mm to 1 mm) using the focusing lens. Finally, the measured

2 -2 -2 -2 maximum I PR of US7-9 were 2.9 cm , 9.3 cm and 12.9 cm , respectively, indicating that focused US8,9 transducers can achieve much higher energy efficiency (3.2 and 4.4 times, respectively) due to their focusing feature. 7.3.7 Acoustic matching impact

Any mismatch between the acoustic impedance of the piezoelectric material, encapsulation layer

(Sylgard-184 in US1-6) and the tissue medium can affect the generated acoustic intensity by the transducer due to the acoustic reflections. Ideally, similar acoustic impedance for all these three media is needed. But there is a large difference between the acoustic impedance of the PZT (Zc = 33 MRayl) and water (Zm = 1.48 MRayl), mimicking the tissue medium in our measurements. To reduce the acoustic reflections due to

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(a)

(b)

(c)

(d)

(e) Fig. 7.13. Impact of beam focusing and acoustic mathicng. (a) US7-9 measured electrical impedance, (b), (c), (d) US7, US8 and US9 measured acoustic intensity, respectively, and (e) axial and lateral resolution of US7-9. 102

the mismatch, the encapsulation layer can be employed as the matching layer as well. For optimal acoustic

0.5 matching, the thickness and acoustic impedance of this layer should be λ/4 and (Zc×Zm) , respectively [129].

To study the acoustic matching impact, US9 transducer included both EPO-TEK and Alumina as both focusing lens and matching material (Fig. 7.4e). Alumina was added to EPO-TEK with the volume fraction of 30% leading to the acoustic impedance of 5.6 MRayl [130]. The thickness of this layer at the center of the PZT disc was ~λ/4 = 0.25 mm (fp = 2.47 MHz). For fair comparison, focused US8 with similar dimension but without Alumina was used. For US8, only EPO-TEK with acoustic impedance of 3 MRayl, which is

0.5 lower than optimal (Zc×Zm) = 7 MRayl, provided poor acoustic matching. As shown in Fig. 7.13, US9 achieved similar performance to US8 with respect to the axial and lateral resolution, but it achieved ~1.4 times higher maximum I2PR (12.9 cm-2 vs. 9.3 cm-2) even with lower Q as seen in Fig. 7.13a. Therefore, acoustic matching is key in maximizing the energy efficiency. With our current fabrication process, it was hard to accurately control the lens material thickness at 0.25 mm for perfect acoustic matching, which could further improve I2PR. 7.3.8 Measurement results with bio-phantom In order to study the acoustic beam profile in a more realistic setup, several measurements were conducted with a sheep brain phantom (Carolina Biological Supply, Burlington, NC). In this section, the measurement results for US1 and US6, operating at low and high fps of 2.8 MHz and 9.56 MHz, respectively, are provided. Fig. 7.14 shows the modified measurement setup with a slice of 4.5 mm thick brain phantom filling the space between the transducer (2 mm away from the PZT disc surface) and hydrophone in the water tank. At the axial distance of 14 mm, the acoustic beam profile at the lateral direction (a plane parallel to the transducer surface) with and without the phantom was measured. The axial distance of 14 mm within the focal zone of both transducers was chosen to avoid any physical contact between our fragile hydrophone and the phantom.

Fig. 7.14. Experiment setup used to measure the impact of sheep brain phantom on the acoustic beam profile generated by US1 and US6. 103

(a) (b)

Fig. 7.15a and 7.15b shows the US1 measured normalized acoustic beam profile in lateral direction without and with the brain phantom, respectively. The lateral resolution of US1, which was 2 mm, was not affected by the phantom, however, the maximum acoustic intensity slightly reduced by ~1.1 dB by introducing the phantom. Fig. 7.15c and 7.15d shows similar results for US6. Since US6 was operating at the higher fp of 9.56 MHz, after introducing the phantom both the lateral resolution and maximum acoustic intensity degraded from 0.85 mm to 0.9 mm and by 5.4 dB, respectively. The attenuation coefficient of the soft tissue is within 0.5-1 dB/(MHz.cm), which matches with our measurements [137]. Therefore, while the shape (spatial resolution) of the acoustic beam profile is less sensitive to the slight inhomogeneity of the phantom medium, the acoustic loss increases at the presence of the phantom particularly at higher frequencies.

7.4 Conclusion A comprehensive study on the acoustic and electrical characteristics of mm-sized piezoelectric transducers for µUS applications was presented. The operation and transmission line model of disc-shaped piezoelectric transducers were discussed to establish a basis for studying their acoustic beam profile. Using the PZT-5A piezoelectric material, nine sets of transducers with different dimensions, frequencies, backing

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materials, focusing features and matching materials were fabricated. Through comprehensive experimental studies of electrical impedance and hydrophone measurements of these ultrasound transducers, the impact of aforementioned design parameters on spatial (axial and lateral) resolution and acoustic beam intensity (related to energy efficiency) was studied. It was shown that transducer miniaturization, beam focusing, acoustic matching and overall quality factor are critical in improving spatial specificity and energy efficiency of µUS.

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Chapter 8 An ASIC for Microscopic Ultrasound Stimulation

8.1 Introduction

As discussed in chapters 1 and 8, majority of studies on ultrasound neuromodulation have been focused on the impact of ultrasound on neural tissue and investigating optimal tFUS sonication parameters as well as interactions between acoustic beams and brain tissues using commercially available bulky electronics [23]-[39]. For the future portable and implantable ultrasound neuromodulation systems, there is a need for customized ASICs to replace these bulky equipment and significantly reduce the size of the whole system. There are several works in the literature which focus on the design and development of the electronics for ultrasound neuromodulation application [139]-[141]. An ultrasonic neuromodulation system is proposed in [139] using commercial off-the-shelf (COTS) components. However, the size of this system is very large (34cm×26cm×8cm) which is not proper for fully portable ultrasound neuromodulation systems. In [140], a CMOS 2D transmit beamformer with integrated PZT transducers is fabricated for ultrasound neuromodulation using a 5 V standard CMOS process. Although this work has significantly reduced the size thanks to the system integration, the maximum generated pressure at focal point is 100 kPa at 10 MHz which is not sufficient for reliable successful ultrasound neuromodulation. In [141], an ultrasonic beamforming system is proposed for ultrasound neuromodulation using a 16-element capacitive micromachined ultrasound transducer (CMUT) array. The ASIC in [141] was designed in a 0.18-µm HV BCD process, and is able to generate 0.95 MPa acoustic pressure at the focal point at 5 MHz. However, this system suffers from multiple issues: 1) CMUT transducers are less efficient than piezoelectric transducers, 2) this chip does not have wireless power/data transmission capability, and 3) there is no solid measurement result to demonstrate beam steering. In this chapter, an ultrasonic neuromodulation ASIC in a 0.25-µm HV BCD process is presented for ultrasound neuromodulation with high power efficiency. As discussed in chapter 7, PZT transducers are used to generate the acoustic pressure. Thus, a class DE driver is used to reduce switching loss and achieve high power conversion efficiency. Moreover, the ASIC includes a power management unit and signal generation blocks to generate control signals on chip and reduce the overall size of the system. Measurement results show that the proposed ASIC can successfully drive a focused ultrasound transducer (US10) at 4.6 MHz and generate the peak pressure of 3 MPa at the focal point. Also, the proposed ASIC can achieve high power efficiency of 91% when US1 is used as the load at the operating frequency of 2.7 MHz. The rest of this chapter is organized as follows: a brief discussion about the power amplifier (PA) design is presented first, then the proposed ASIC architecture is explained, and finally measurement results are presented.

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8.2 Power amplifier

Power amplifiers (PAs) are used in many applications such as wireless communication systems, industrial consumer electronics, and medical instruments [142], and have been widely studied over the past years. PAs are mainly classified based on the biasing type of their power transistors, and are generally divided into two groups: linear and non-linear PAs [142]. Output power, power efficiency, linearity, power gain, and size are key parameters to determine the optimal structure for a given application. Class A, B and AB are known as linear amplifiers. But, these topologies suffer from poor power efficiency due to their huge power loss across the power transistor. In contrast, class C, D, E and F PAs, which are non-linear, can achieve higher power efficiency thanks to the non-linear operation of the power transistor.

Fig. 8.1. Simplified block diagram of (a) the class-D and -DE power amplifier (PA), (b) the class-E PA, and (c) key operational waveforms of these PAs.

Class D (shown in Fig. 8.1a), which is also known as the switching amplifier, is one of the most popular non-linear PAs [143]-[145]. In this structure, the power transistors act as a switch (shown as SW1,2 in Fig.

8.1a), and the output voltage (Vout) varies between high-voltage supply (Vdd-HV) and ground, because the power transistors are either fully off or on. Although class D can achieve higher efficiency compared to linear PAs, it suffers from considerable power loss on the parasitic capacitance at the output node during

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switching transitions. In the conventional class-D PA, the duty cycle of the switching of the power transistor

(defined as Ton/Tp, where Tp is switching period) is 50%. To mitigate the switching loss in the class D, the class-E PA, shown in Fig. 8.1b, has been suggested [146],[147] that can ideally achieve 100% power efficiency. Ideally, the power loss across the power transistor, shown as SW switch in Fig. 8.1b, is zero. Because either its current or the voltage across it, shown as isw and Vout in Fig. 8.1b and 8.1c, respectively, are zero, and therefore its power consumption (i.e. isw × Vout) equals to zero all the time. This has been achieved thanks to the Vout waveform shaping by a reactive load impedance set by the LC network in Fig. 8.1b. Also, in the class-E PA the slope of Vout waveform at onset of turning SW on (shown as t1 in Fig. 8.1c bottom) should be zero. This feature is helpful to reduce the power loss in an actual implementation due to the component mismatches. Despite high performance of the class E in terms of power efficiency, it suffers from high peaks in the Vout waveform which can damage the power transistor. Moreover, it requires multiple off-chip components which significantly increases the size of the system. In the ultrasound stimulation application, in which an array of transducers is required, implementing this structure in small size is very challenging. Class DE, shown in Fig. 8.1a, is another non-linear PA topology which has the same structure as class D [148], [149]. But, the power transistor switching strategy is similar to class E. In this class, the switching signals (SW1,2 in Fig. 8.1c middle) are non-overlapped, and their duty cycle (DC), defined as Ton/Td where

Td is switching period, is smaller than 50%. For optimal performance, DC and Td should be accurately determined in a way that the voltage across each switch (SW1,2) and its derivative be zero at the time the switch is turned on. These conditions are known as zero-voltage switching (ZVS) and zero-derivative switching (ZDS). ZVS is helpful to improve power efficiency and ZDS improves the robustness of the PA against component mismatches, similar to class E. To meet these conditions, DC and Td should be calculated based on the ultrasound transducer specifications. The work in [148] has presented a detailed circuit modeling of class-DE PA for optimal driving of an ultrasound transducer. It has been shown that the following equation should be satisfied in order to achieve ZVS and ZDS.

2휋 1−퐶표푠(2휑) 2휑−푆푖푛(2휑) 1 = = √ + (9.1) 푇푝 2휋 퐶푝 푅푠 2휋 퐶푝 퐿푠 퐶푠 퐿푠

In 9.1, φ = π (1-2DC), and CP, Rs, Cs and Ls are the components of the equivalent circuit model of the transducer as shown in Fig. 8.2.

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Fig. 8.2. The equivalent circuit model of the PZT transducer used in [148]. Considering design constraints in the ultrasound neuromodulation applications, a class-DE PA is chosen among all different classes of PA. Because this class can provide high power efficiency without a need for off-chip components. Most of PA structures require a choke (large inductor) for basing the power transistor. But, class DE does not require any off-chip component for biasing. In addition, if ZVS and ZDS conditions are satisfied in this class, the linearity of the output waveform can be improved significantly which is helpful to increase overall efficiency of the system. Because in linear operation, most of the output power will appear in the first hormonic of the PA output. 8.3 ASIC architecture

Fig. 8.3 shows the block diagram of the first prototype ultrasound neuromodulation ASIC which was designed in a 0.25-µm HV BCD CMOS process. It is notable that in this process the gate-source voltage for high-voltage transistors is limited to 5 V, but drain-source voltage can be as high as 60 V. To achieve the threshold acoustic pressure for successful neuromodulation, it is required to drive the transducer with a high voltage. Thus, the ASIC circuit blocks need different supply voltages, depending on their tasks and the fabrication process constraints. The ASIC is equipped with a power management unit (PMU) based on an inductive full-wave active rectifier-regulator topology to achieve short-range wireless power and data transfer. The PMU provides a supply voltage Vdd-MV = 4 V to power low-power blocks. The clock recovery block generates the reference clock signal (Clk) from the inductive link power carrier. Then, a signal generator block creates control switching signals (VGN and VGP). Moreover, there is a low-dropout regulator

(LDO) that generates supply voltage for the signal generator block (Vdd-LV = 3 V).

Within the high-power circuits, first VGP and VGN signals are shifted to [Vss-HV = 36 V, Vdd-HV = 40 V] and [0, Vdd-MV] levels via high-side and low-side level shifters (HSLS and LSLS), respectively. Note that the maximum gate-source voltage in this process for power transistors is 5 V. Then, the gate drivers apply switching signals to the power transistors (P1 and N1) to drive the transducer. Providing sufficient power with high efficiency was the main goal in the design of this ASIC. It is notable that Vdd-HV was provided externally through a power supply, and Vss-HV was generated by a high-voltage LDO. The LDO structure is similar to the suggested structure in [150],[151].

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Fig. 8.3. Simplified block diagram of the proposed ultrasonic neuromodulation chip.

Fig. 8.4a shows the simplified circuit schematic of the proposed PMU for charging CL to regulated Vdd-

MV at 4 V. Also, Fig. 8.4b shows the conceptual waveforms of the voltage across receiver (Rx) LC-tank (VR1 and VR2), Vdd-MV, and regulation control signal (EN). When Vdd-MV ≤ 4 V, the PMU works as a full-wave active rectifier, and charges CL through low-loss active switches of M1 and M2. M3 and M4 are the cross- coupled pair to provide full-wave rectification. When Vdd-MV > 4 V (i.e. 0.3×Vdd-MV > VBGR = 1.2 V), EN control signal is low, and thus rectification transistors (M1 and M2) are turned off, and the receiver LC-tank nodes (VR1 and VR2) are connected to two series diodes (D1-4) through TG1 and TG2 transmission gates, as shown in Fig. 8.4a. Thus, Vdd-MV does not increase anymore, and CL is discharged through RL till Vdd-MV < 4 V. The diodes perform over-voltage protection by limiting the maximum voltage across the receiver LC- tank. It should be mentioned that diode-connected 5 V NMOS transistors were used to realize the diodes. Since the power carrier signal is used by the clock recovery block (Clk Recov. in Fig. 8.3) to generate the reference clock, it is necessary to avoid VR1 and VR2 waveform distortions by the PMU which can lead to frequency variation of these signals. This is one of main motivation that this regulation technique was employed in the proposed neuromodulation ASIC. Fig. 8.5 shows the simplified schematic of the clock recovery block, signal generator block and their key operational waveforms. To generate Clk, VR1 is compared with VBGR which triggers signal generator block. The reason that two series diodes were used in parallel with the receiver LC-tank in PMU in Fig.

8.4a during regulation time was to guarantee that VR1 amplitude is always larger than VBGR to generate a reliable reference clock during all times. The rising edge of Clk is first detected by a D-flip-flop, and then delayed by D1 Delay block. Next, Pulse Gen.-P block creates VGP signal with the DC of D2/Tp, as shown

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in Fig. 8.5. Then, similarly VGP rising edge is delayed by two consecutive D1 Delay block, and VGN signal is created by Pulse Gen.-N block with the DC of D2/Tp.

(a)

(b) Fig. 8.4. (a) Simplified circuit schematic of the proposed power management unit, and (b) its key conceptual waveforms.

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Fig. 8.5. Simplified schematic diagram of the clock recovery block, signal generator block and their key operational waveforms.

Fig. 8.6a shows the circuit schematic of the LSLS which changes the voltage level of the input signal

(VGN) from [0, Vdd-LV = 3 V] to [0, Vdd-MV = 4 V]. To implement the LSLS, conventional level shifter structure with a NAND gate latch was used. The latch was used to eliminate the asymmetry at the output waveform of the conventional topology due to non-idealities and loading effects. Because to reach high efficiency switching, it is necessary to achieve the same transition time for both rising and falling edge of the switching signal. In LSLS block, all transistors were implemented by 5 V transistors. Fig. 8.6b shows the circuit schematic of HSLS block which changes VGP voltage level from [0, Vdd-LV = 3 V] to [Vss-HV = 36 V, Vdd-HV

= 40 V]. In the HSLS, the input signal (shown in in Fig. 8.6b) is converted to current by Mhv1,2 to trigger a pair of latching inverters, formed by Mhv5-8 transistors. This latch limits the voltage variation at O1 and O2 nodes to [Vss-HV , Vdd-HV ]. Mhv3,4 transistors are used to prevent static power consumption [152], [153]. Then, similar to the LSLS, a NAND gate latch, formed by Lh3 and Lh4, is used to achieve an output signal (Out in Fig. 8.6) with the same rising and falling time. To reduce propagation delay between In and Out signals,

Mhv9 and Mhv10 are employed which sharpen transitions at O1,2 nodes by the feedback provided by Lh5 and

Lh6. All transistors in HSLS are high-voltage transistors. Mhv1,2 and Mhv3,4 are implemented by 60 V transistors, since their drain-source voltage vary in range of [0,Vdd-HV] and [0, Vss-HV], respectively. All other transistors were implemented by 20 V transistors. Fig. 8.7 shows the circuit schematic of the gate driver which is used in both high-side (HS) and low-side

(LS) paths. As the supply, Vdd and Vss are connected to Vdd-HV/Vss-HV and Vdd-MV/Gnd in HS and LS gate drivers, respectively. It should be mentioned that all high-voltage NMOS transistors are placed in an N- type buried Layer (NBL-Iso) which acts as an isolation layer to minimize parasitic voltage coupling between different transistors. This layer is connected to the maximum voltage across the transistor. 112

(a)

(b) Fig. 8.6. Circuit schematic of (a) low-side level shifter (LSLS), and (b) high-side level shifter (HSLS).

Fig. 8.7. Circuit schematic of low-side and high-side gate drivers.

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8.4 Measurement results

Fig. 8.8 shows the proposed ultrasound neuromodulation ASIC micrograph fabricated in a 0.25-µm HV

2 BCD CMOS process with an active area of 1.7 mm . The air-backed US1 transducer, shown in Fig. 7.4b, was used as the load to characterize the chip performance.

Fig. 8.8. The proposed ultrasound neuromodulation chip micrograph.

Fig. 8.9 shows the measured transient waveforms of Vdd-MV, VR1 and VR2 at fp = 2.7 MHz. It can be seen that the chip could successfully regulate Vdd-MV at 4 V by adaptive switching of the operation mode between rectification and regulation. As shown with red arrows in Fig. 8.9, the PMU automatically changed the mode to regulation (i.e. EN: Low), and therefore Vdd-MV was properly regulated and the voltage across the receiver LC-tank (VR1,2) was limited to < 5 V (safe region) without the need for any extra off-chip component. Also, VR1 amplitude and frequency remained constant in both modes which is necessary for the Clk Recovery block to generate a sable clock signal for the rest of the ASIC.

Fig. 8.10 shows the measured transient waveforms of VR1, VGP and VGN at fp = 1/Tp = 2.7 MHz, demonstrating proper operation of the Signal Generator block. It can be seen that switching signals of VGP and VGN are successfully generated with a pulse of D2 ≈ 95 ns and DC of D2/Tp = 95ns/370ns ≈ 25%. It should be mentioned that D1 and D2 delays are externally tunable, and can be adjusted based on the impedance characterization of the load to achieve optimal performance.

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Fig. 8.9. Measured transient waveforms of Vdd-MV, VR1 and VR2, demonstrating adaptive switching of the power management unit (PMU) between rectification and regulation modes.

Fig. 8.10. Measured transient waveforms of VR1, VGP and VGN, demonstrating proper operation of Signal Generator block.

Fig. 8.11 shows measured transient waveforms of PAout (PA output voltage, shown in Fig. 8.3), HSLS output, VGP and VGN at the optimal fp and DC of 2.7 MHz and 25%, respectively. It is clearly seen that thanks to precise switching, the ASIC could achieve both ZVS and ZDS which is significantly important for high power efficiency. The VGP signal was accurately shifted up and varied between 36 V and 40 V, as shown in Fig. 8.11, and then P1 and N1 power transistors created an almost rail-to-rail voltage swing across the load. The ASIC was able to provide the output power level of 1.9 W at this frequency with a high efficiency of 91%. It is worth mentioning that small voltage ringing can be seen in the waveforms which is due to the parasitics caused by the connection between the ASIC output and the ultrasound transducer (US1).

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Fig. 8.11. Measured transient waveforms of PAout, HSLS output, VGN and VGP at optimal fp and DC of 2.7MHz and 25%, respectively.

As mentioned in Section 8.2, the PA performance can be significantly impacted by DC and fp. The impact of these two parameters on important parameters of the PA was measured. Figs. 8.12a and 8.12b show measured PAout and HSLS output waveforms at fp = 2.7 MHz for DC = 10% and 40%, respectively.

For DC = 40%, PAout waveform looks like a square wave. Thus, the PA cannot meet both ZVS and ZDS conditions which can cause noticeable switching loss. Similarly, for DC = 10%, smaller than optimal DC, these two conditions could not be met again. But switching loss is less compared to the one with DC = 40% due to smaller voltage swing during transition. The performance of the proposed PA was characterized quantitatively at fp = 2.7 MHz for DC of 10% to 40% and the results are shown in Fig. 8.12c and 8.12.d. As

DC was increased, the amplitude of the first harmonic of PAout (H1) was increased as well, because power transistors (P1 and N1) were on for longer time. In contrast, the amplitude of the third harmonic of PAout

(H3) did not increase monotonically with DC and reached its minimum at DC of 20-25%. When DC is large, the increase in H3 is considerably more than H1. In other words, although the PA provided more power for the transducer, this power is not at resonance frequency of the transducer. Thus, output power which is defined based on the power provided by the PA at the resonance frequency does not increase proportional to the input power. Therefore, for large DC the efficiency of the PA was reduced. Similarly, for small DC values, H3 was increased which means that the PA distributed more power at undesired frequency band. The PA reached its maximum efficiency at DC of 25% where the PAout was more similar to a sine wave.

Fig. 8.13a and 8.13b show measured transient waveforms of PAout and HSLS output at fp = 2.6 MHz and

2.95 MHz for DC = 30% and 15%, respectively. When fp is lower than its optimal value (i.e. 2.7 MHz), for example 2.6 MHz, PAout never reached rail-to-rail swing during time periods where power transistors (P1

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(c)

(d)

Fig. 8.12. (a) and (b) Measured transient waveforms of PAout and HSLS output at fp = 2.7 MHz for DC = 10% and 40%, respectively. (c) Amplitude of the first and third harmonics (H1 and H3) of PAout vs. DC at fp = 2.7 MHz. (d) Power efficiency and

output power (Pout) vs. DC at fp = 2.7 MHz.

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(c)

(d)

Fig. 8.13. (a) and (b) Measured transient waveforms of PAout and HSLS output at fp = 2.6 MHz and 2.95 MHz for DC = 30% and

15%, respectively. (c) Amplitude of the first harmonics (H1) of PAout and output power (Pout) vs. operating frequency (fp) at

optimal duty cycle. (d) Maximum efficiency and optimal duty cycle vs. operating frequency (fp).

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and N1) were off, as shown in Fig. 8.13a. Thus, the PA could not meet the ZVS condition. When fp was higher than the optimal value (for example 2.95 MHz), PAout transitions were slow, and, therefore it could not meet ZVS or ZDS conditions, as shown in Fig. 8.13b. Figs. 8.13c and 8.13d show the impact of fp on important parameters of the PA. Interestingly, the PA reached maximum H1 at fp of 2.7 MHz where the PA met both ZVS and ZDS conditions. For small fp, Pout was larger which is due to the smaller impedance of the transducer at these frequencies. For larger fp, the impedance is more capacitive, thus Pout was decreased at these frequencies. The optimal DC for larger frequencies is close to 15%, while for smaller frequencies it increased up to 30%. 8.5 Testing the proposed ASIC with a focused ultrasound transducer to generate sufficient acoustic pressure for the ultrasound neuromodulation As discussed in chapter 7, beam focusing can be greatly helpful to increase the maximum generated pressure by a transducer. Two focused transducers were fabricated using acoustic lens as shown in Fig. 7.4d and 7.4e. Although acoustic lens can increase the pressure at focal point noticeably, it is not still optimal design for a transducer in order to maximize acoustic pressure. Another approach to fabricate a focused transducer is spherically shaping of the transducer surface during fabrication process [126], as shown in Fig. 8.14a. In such focused transducers, which have a spherical curvature themselves with no lens involved, attenuation and non-idealities caused by the lens layer can be eliminated.

A focused transducer (called US10) with Do = 20 mm, t = 0.5 mm and N = 19.5 mm from Piezo Hannas Tech. (WuHan, China) was used to further improve the maximum generated acoustic intensity. Similar to previous transducers in section 7.2, the transducer was placed inside a custom-made 3D-printed plastic holder, as shown in Fig. 8.14b. The measured transducer electrical impedance is shown in Fig. 8.15. The series and parallel resonance frequencies of the transducer are 3.88 MHz and 4.65 MHz, respectively. The transducer can achieve maximum I2PR of 90 1/cm2 which is noticeably higher than the transducers in chapter 7. This improvement is mainly due to larger Do and the transducer focusing approach.

(a) (b)

Fig. 8.14. (a) A pair of spherically shaped focused transducer, and (b) the prepared focused transducer for our experiment (US10).

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Fig. 8.15. The measured electrical impedance of US10.

To evaluate the ability of the proposed ASIC to provide sufficient power for successful ultrasound stimulation, US10 was used as the load. The transducer was driven by the ASIC, and the generated acoustic pressure was measured. The HNR0500 hydrophone (Onda, Sunnyvale, CA) with aperture size of 0.5 mm was used to measure the generated pressure. Fig. 8.16 shows the measured PAout, voltage across hydrophone

(VHyd), VGN and VGP at fp = 4.6 MHz with DC of 20%. It is notable that VGN and VGP were provided by a function generator. It can be seen that the ASIC could properly drive US10, and generate a high-voltage swing across the transducer. It is worth mentioning that large ringing seen in PAout waveform in Fig. 8.16b is due to the long cable used for the connection of the transducer to the ASIC. The hydrophone voltage could reach as high as 1.2 Vpp (0.6 Vp). The hydrophone sensitivity at this frequency is almost -254 dB re. 1V/uPA = 200 nV/Pa, which means that the maximum generated pressure was ~3 MPa. This pressure level is noticeably larger than the required threshold for successful ultrasound neuromodulation [43], [141]. Therefore, it can be concluded that the proposed ASIC would be able to provide sufficient power for the µUS application. More information about required acoustic power for ultrasound stimulation is presented in the next chapter.

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Fig. 8.16. (a) Measured transient waveforms of PAout and hydrophone voltage (VHyd), VGN, VGP at fp = 4.6 MHz when US10 was

used as the load, and (b) zoomed waveform of PAout.

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Chapter 9 Preliminary Animal Experiments and Future Work

9.1 Microscopic ultrasound stimulation system integration

Fig. 9.1 summarizes the future plans for the integration and development of the whole µUS system into a portable device for proof-of-concept testing on rodents (e.g. rats). The envisioned device will mainly integrate mm-sized ultrasound transducers, which were studied in chapters 7 and 8, and the electronics presented in chapter 8. Thanks to the transducer miniaturization in chapter 7, multiple mm-sized transducers can be placed on the animal’s head to target multiple brain regions. The transducer could be any design in

Table 7.1 or US10 in chapter 8. However, based on the presented study the required electrical power can be reduced using air-backing, focusing and acoustic matching techniques.

Building upon the experience in this work, a miniaturized 3D-printed plastic housing should be fabricated to hold the air-backed PZT material. A 3D-printed plastic pedestal will be surgically fixed onto the animal skull and positioned above the neural target. The pedestal will be filled with ultrasound gel to couple the generated ultrasound by the transducer to the tissue. The skull below the transducer can be partially removed or thinned to reduce ultrasound attenuation and reflection. The electronics mainly include the ultrasound neuromodulation ASIC which was discussed in chapter 8. It integrates the power management circuitry to provide enough voltage and power levels required in µUS, the high-voltage driver to drive ultrasound transducers, and the configurable stimulation pattern generator to generate the optimal sonication pattern. The sonication pattern will be discussed in the next section. The ASIC could be integrated either with the transducers or placed on the animals’ back (and wired to transducers) inside commercially available rodent jackets to distribute the weight on the animal body. As the first step to implement the envisioned system in Fig. 9.1, multiple animal experiments were conducted with commercial off-the-shelf (COTS) components to find the proper sonication setup for the successful ultrasound neuromodulation. The results are discussed in the following. In future, COSTS 122

components can be replaced with the proposed neuromodulation ASIC, US10 can be employed to generate acoustic intensity, and more animal experiments should be conducted. 9.2 Sonication parameters for ultrasound neuromodulation

One of the key elements for successful ultrasound neuromodulation is sonication setup and parameters. Previous studies on ultrasound neuromodulation were reviewed to find optimal sonication parameters. The majority of the research on ultrasound neuromodulation has used pulse-based sonication at sub-MHz frequency range and above. Fig. 9.2 shows the typical neuromodulation stimulus waveform generated by an ultrasound transducer to localize acoustic pressure at the target point.

Fig. 9.2. Typical sonication protocol in ultrasound neuromodulation. The key parameters are sonication duration (SD) and inter- stimulus interval (ISI), tone-burst duration (TBD), pulse repetition frequency (PRF) and duty cycle (DC).

Tone-burst duration (TBD), pulse repetition frequency (PRF), duty cycle (DC), sonication duration (SD) and inter-stimulus interval (ISI) are the main parameters that should be determined for stimulation. Also, the operating frequency is a key parameter which greatly impacts the required intensity for stimulation. The peak of the acoustic pressure, spatial-peak pulse-average intensity (Isppa) and spatial-peak time-average intensity (Ispta) are the common quantities to specify the amount of required intensity for the stimulation. In Table 9.1, the main sonication parameters for several works have been listed. Operating frequency in most of the literature is less than 1MHz, and 350 kHz and 650 kHz are the widely used frequencies. It can be seen that most of the literature used DC close to 50%, 0.2 ms < TBD < 0.5 ms, 1 kHz < PRF < 2kHz, and 100 ms < SD < 300 ms. These stimulation parameters can be used as the initial setting. To improve spatial resolution, operating frequency should be increased. The work in [43] has shown that at the frequency of 5 MHz, they can achieve spatial resolution of 0.29 mm in diameter. Since the

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frequency in this work is close to US10 resonance frequency, the reported parameters in this work were used as the preliminary setting in this thesis. Table 9.1: Important sonication parameters from previously reported works in ultrasound neuromodulation Subject: Rat Operating Freq. = 350 kHz Yoo, Ultrasound in Med. & Biol, TBD = 0.36 ms, PRF = 1.5kHz 2012, [24]. SD = 200 ms

2 2 Isppa = 8.6 W/cm , Ispta = 4.6 W/cm Subject: Mouse Operating Freq. = 2MHz Mourad, PLoS 2014, [36]. TBD = 0.2 ms, PRF =1.5kHz SD = 17.6 ms

2 Ispta = 5.25 W/cm Subject: Mouse Operating Freq. = 0.35 MHz Tyler, Nature Protocol, 2011, [18]. TBD = 0.214 ms, PRF = 2kHz Pressure = 1 MPa Subject: Mouse Operating Freq. = 1 MHz, 5 MHz Zheng, Nature Report, 2016, [43]. TBD = 0.5 ms, PRF = 1 kHz SD=300 ms, ISI = 3 s

2 Ispta = 210 mW/cm

9.2.1 Required acoustic intensity for successful ultrasound neuromodulation

For successful ultrasound neuromodulation, the generated acoustic pressure by the ultrasound transducer should be higher than a threshold. In the literature, this threshold is reported in form of Ispta, Isppa or peak of acoustic pressure (Ppeak) at the focal point. Equation 9.1 shows the approximate relation between these parameters,

2 Isppa = Ispta/DC = (Ppeak) /2Za (9.1)

Where Za is the acoustic impedance of the medium. Unfortunately, there is a discrepancy in the threshold reported in different works for successful ultrasound neuromodulation. This might be initiated from several factors such as the difference in the sonication frequency, ultrasound transducer positioning, anesthesia level, etc. in different studies. Based on

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Table 9.1, Ppeak above 1 MPa was considered as the initial value for the setting. It is notable that the reported

2 acoustic intensity in [43] to evoke EMG signal from a mouse tail at 5 MHz was Ispta = 210 mW/cm , which is approximately equal to Ppeak of 250 kPa. As shown in Fig. 8.16, the proposed ASIC was able to drive

US10 to generate peak pressure up to 3 MPa which is much higher than the reported pressure in [43]. Thus, considering previous studies the proposed system including the neuromodulation ASIC and US10 should be capable of providing required acoustic intensity for successful ultrasound neuromodulation. 9.3 Ultrasound neuromodulation experiment on rat Two ultrasound neuromodulation experiments on rat were conducted in collaboration with Prof. Gluckman. It is notable that all experiments were conducted under an approved IACUC protocol (PROTO201800135) at the Pennsylvania State University. Fig 9.3 shows the setup of the second experiment. A Sprague-Dawley rat with weight of 250 g was used in this study. After anesthetizing the rat, its hair was shaved, and then it was placed on a stereotactic frame. The animal head was fixed using ear bars. The acoustic pressure was generated by a commercial ultrasound transducer (A391S-SU; Olympus, MA, USA) with the center frequency of 0.5 MHz. The transducer was placed in a plastic container filled with water, and connected to the 3-axis positioning system that allowed its free movement over the rat’s head. Ultrasound gel was placed on the animal’s skull to couple the generated acoustic pressure by the transducer to the brain. Two function generators were used to generate sonication protocol based on the information in section 9.2. The transducer was driven by a linear power amplifier (VPA-1987 ENI Power Amplifier, NY, USA) with 55 dB gain. Unfortunately, these ultrasound neuromodulation experiments on rat were not successful, and there was no motor response as the result of the ultrasound stimulation. There were several problems with the preliminary setup which might have affected the results: 1) insufficient acoustic intensity for successful ultrasound stimulation, 2) diffraction of the acoustic beam due to air bubbles in the medium (water), 3) inaccuracy in targeting the desired brain region, and 4) improper level of anesthesia.

Fig. 9.3. Preliminary ultrasound neuromodulation experiment on a rat. 125

9.4 Ultrasound neuromodulation experiment on mouse

An ultrasound neuromodulation experiment on mouse was conducted in collaboration with Prof. Drew. Fig. 9.4 shows the setup. Several modifications were made in the setup to mitigate problems in the previous setup. 1) Instead of a large water container, a transparent plastic cone was used as the holder to couple the acoustic pressure generated by the transducer to the animal brain. This is quite helpful to more accurately target the desire brain region, as well as to observe the creation of any air bubble in the medium. 2) Instead of tap water, degassed/deionized water was used as the medium to mitigate creation of air bubbles. 3) Instead of ketamine and xylazine, isoflurane was used as the anesthesia material and it was tried to maintain the animal in lightly anesthetized condition.

Fig. 9.4. Preliminary ultrasound neuromodulation experiment on a mouse. To prepare the animal for the experiment, first it was anesthetized in a chamber with 5% isoflurane flow (1L/min oxygen) for 3 minutes, and then transferred onto the stereotaxic apparatus. The mouse head was fixed into the nosepiece and ear bars. The isoflurane flow was turned down to 2%. The hair on the head was clipped with tweezer and scissors. The isoflurane flow was turned down to 0.75%. The skin on the head was cleaned using sterile water and swab. The same equipment as in the previous experiments was used for this experiment. But, some changes were made in the power amplifier to reach higher electrical power. During the experiment, the input electrical power applied to the transducer, position and orientation of the transducer, sonication parameters were changed until finally some motor responses were observed for the parameters listed in Table 9.2. It is notable that the acoustic pressure was set to its maximum, equal to 1.05 MPa. It was possible to evoke different motor responses such as tail, hindlimb, forelimb and whisker movement. Fig. 9.5 shows the hindlimb and tail movement as the result of the ultrasound stimulation. In this experiment, animal behavioral response was monitored as the response to the applied acoustic pressure.

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An LED was synchronized with the stimulus pulses to track sonication duration. When there was no stimulus pulse (i.e. LED was off), no movement was observed. When the ultrasound transducer was driven, after a short delay the hindlimb and tail movement was observed, as shown in Fig. 8.5. The delay in tail response was longer than hindlimb movement. It is worth-mentioning that these motor responses were Table 9.2: Sonication parameters used in the experiment to achieve successful ultrasound neuromodulation Parameter Value Parameter Value Frequency (MHz) 0.5 PRF (kHz) 1 DC (%) 50 TBD (ms) 0.5 ISI (s) 5 SD (ms) 300

Fig. 9.5. (a) The mouse hindlimb and (b) tail movement as the response to ultrasound stimulation. When there was no stimulus pulse (LED: OFF), there was no movement, and by driving the ultrasound transducer (LED: ON), after a short delay hindlimb and tail movement was observed. The tail movement happened after a longer delay.

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observed while the transducer was located approximately 9 mm posterior to the rear corner of the mouse eyes along the medial plane. This location is compatible with the target point reported in [43]. However, more experiments are required to further investigate the optimal location to evoke the motor response. In this experiment, successful ultrasound neuromodulation was observed with a commercial 0.5 MHz transducer. The same experiment was performed with US10 transducer at sonication frequency of 4.6 MHz. Similar motor responses were observed with this transducer as well. However, it was hard to achieve a reliable motor response. This might be due to sub-mm (< 0.5 mm) spatial resolution of US10 which makes successful ultrasound stimulation very sensitive to alignment and positioning of the transducer. There is a need for more animal experiment to find the optimal alignment of the transducer. In near future, more experiments using US10 and other transducers in Table 7.1 should be conducted, while the commercial power amplifier is replaced with the proposed ultrasound neuromodulation ASIC to integrate the whole µUS system.

9.5 Microscopic ultrasound stimulation with transducer array / beamforming integrated with imaging

As mentioned in Chapter 1, to stimulate very deep brain regions with very fine spatial, sub-mm sized transducers, mounted on a flexible thin substrate, can be implanted inside the brain tissue to target the desired regions with high accuracy. This version of µUS system can improve the spatial resolution significantly, and will be a helpful tool to study the mechanism behind ultrasound neuromodulation. In [44], using finite-element simulations it is shown that a sub-mm scale resolution can be achieved at sub-MHz with sub-mm sized ultrasound transducers. Although this study shows promising results, there is a need for new experimental investigation to find I2PR and spatial resolution for sub-mm sized transducers in measurements. The focus of this thesis was on realization of µUS system using a single ultrasound transducer. With a single transducer, the neural target cannot be dynamically changed during operation. To improve the spatial coverage and adjustability of the system, the single transducer needs to be replaced by an array of transducers. Thus, with a beamforming technique different regions of the brain can be targeted. There is a need for an optimal design for ultrasonic transducer array for µUS application. In literature, there is considerable research on the array design for the ultrasound imaging application. However, in µUS application design restrictions and figure-of-merit (FoM) are different, as discussed in chapter 7. Therefore,

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a comprehensive study on characterization of ultrasound transducer array for µUS application will be an interesting research in future. As discussed in chapter 8, recently two groups presented ultrasound neuromodulation ASICs with beamforming capability. However, none of the proposed ASICs could provide reliable performance for successful ultrasound stimulation. Thus, there is a demand for new beamforming ASICs that can provide sufficient output power with high power conversion efficiency. This design will be challenging mainly due to high power budget required for ultrasound neuromodulation. On the other hand, in transducer array the impedance of each element is mostly capacitive which makes the design more challenging. Because, the power delivered to the load will decrease, and as a result the acoustic pressure generated by each element will be reduced. Thus, co-optimization of the transducer array and the driving stage is required to find the optimal design for both the array and the ASIC. After successful demonstration of the µUS system with beamforming (phased arrays), an attractive research direction would be to evaluate the system performance with in vivo and in vitro experiments. Although there are already several works in the literature with animal experiments, as discussed in chapter 1 they suffer from poor spatial resolution. The proposed system with phase array can provide sub-mm-scale spatial resolution which can become a very useful tool in studying the ultrasound neuromodulation mechanism. Furthermore, the beamforming provides a powerful tool for adjusting the stimulation focal zone which can lead to large-scale stimulation of different brain regions. Photoacoustic imaging is another capability that can be added to the system proposed in this thesis. In photoacoustic imaging, non-ionizing laser pulses are delivered to biological tissues. Some of the delivered energy is absorbed and converted into heat, leading to transient thermoelastic expansion, and thus wideband ultrasonic emission [154]. An ultrasound transducer is used to detect the wideband emissions. The photoacoustic imaging reveals important physiological properties of the target tissue, such as hemoglobin concentration and oxygen saturation. Since the design already has an ultrasound transducer, this modality also can be added to the proposed system. It is notable that design specification of the transducer required for the photoacoustic imaging is quite different with µUS system. An interesting research direction in future will be to design compact ultrasound transducers which can be used for both µUS and photoacoustic imaging simultaneously. The focus of this thesis was mainly on development of a technology for brain neuromodulation. But, for real-time interfacing with the brain, there is a need for neural recording technologies as well. A closed-loop neuromodulation system can remarkably improve the performance of brain-machine interfaces (BMIs) in executing sophisticated tasks. One of the future works could be adding electrophysiological neural 129

recording to the proposed system. In terms of ASIC design, adding this capability to the system is not very complicated. However, in terms of system design there is a need for new plans to integrate the whole transducer array and the recording pads into a small device.

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VITA

Hesam Sadeghi Gougheri received his B.Sc. in Electrical Engineering from Isfahan University of

Technology, Iran, in 2012. He received his M.Sc. degree in Microelectronics from Sharif University of

Technology in 2014. In his B.Sc. thesis, he designed low-power circuits for signal processing of gas sensors.

His M.Sc. thesis was titled “Modeling and Improvement of Phase Noise in Ring Oscillators”. He joined

ICSL in Aug. 2015 as a Ph.D. student. His research interests include mm-wave and RF circuits design and

Low-power biomedical circuits. He is a recipient of the 2019 Outstanding Doctoral Research Award from the Electrical Engineering Department at the PSU, the 2019-2020 IEEE SSCS Predoctoral Achievement

Award, the 2019 ISSCC Student Travel Grant Award, and the 2018 BioCAS Student Travel Grant Award.

145