Must Provide a Solution on a Chip – from Concept to Delivery

Must Provide a Solution on a Chip – from concept to delivery

Dr. Rakefet Kol

Chief Architect Zoran Microelectronics Ltd.

From Concept to Delivery…

Driving The Digital Lifestyle

‘Zoran’ is the Hebrew word for ‘Silicon’ ‘Zoran’ in Chinese means ‘Excellence’

1 Connect, Share, Entertain™ – Anywhere & Anytime

2nd TV Mobile Phone Broadcast, Color Inkjet Digital Audio Cable & MFP Player Satellite

Main TV WiFi Access PC / Mac & Gateway

WiFi Digital Camera Mobile Picture Viewer Digital Media Hub DVD-R, STB, PVR, AV/VCR rd Photo Printer 3 TV Connected Stereo / AVR

Digital Entertainment Markets

Low High Definition Portable Power Reduce Cost Imaging More Features

Audio Time to Video Processing Processing Market

2 Zoran Provides a Complete Solution

► Need a “Solution-on-a-Chip” ► Rich in features (but low cost) ► Full software stack ► Low level drivers VLSI ► Many applications ► Ready reference design Design System ► Adapt to rapidly changing market demands ► Reuse & Innovate ► Reuse HW modules ► Integrate, integrate, integrate Software ► Reuse SW modules ► Multiple various processors ► Legacy expertise ► Innovative solutions to new requirements

DVD Player And10 years now… ago…

3 DVD Player 1 year ago…

DVD Player Platform Integration

VaddisVaddisVaddis 86xVaddis® 966 67 Vaddis® 5 4 Future

Optical Data DVD Audio S/P DIF Out RF AMP Pickup RF AMP Recovery Demux All Audio DAC’s 6 channels Unit (OPU) Format Out Audio Audio out DSP Class D MPEG-2 + Modulator Host MPEG-4/MPEG-2 Audio OPU CPU DecoderDiVX Servo Servo Inputs Servo Decoder Drivers Control LCD Actuator Controller

Memory VideoVideo Processor HDXtreme™ Controller w/ ProgressiveProcessor Scan HDTV Out

Flash SDRAM DVD Player Platform

VaddisVaddis 862:862: FirstFirst fullyfully digitaldigital DVDDVD SystemSystem SolutionSolution

4 Integrated LCD Controller Requirements

► Various Interfaces ► Analog (alternated) RGBRGB ► Digital ► Serial (RGB,GBR) ► Parallel 8/18/24 bits

► Various sizes and resolutions

► Different control signals timing and constraints ► Various pixels arrangements RGB Stripe RGB Delta

R G B R G B R G B R G B

R G B R G B G B R G B R

R G B R G B R G B R G B

R G B R G B G B R G B R ► Image and video processing ► Support PAL and NTSC ► Enable display modes of 16:9 and 4:3 aspect ratios ► Adjust image parameters (brightness, contrast, color, tint) ► YUVÆRGB conversion (different for MPEG and JPEG)

Portable DVD: Previous Solution

SDRAM FLASH LCD Panel RGB (Analog I/F) CVBS/YC Chroma Vcom IC COMDC

Vaddis 862 HS, VS Backlight DVD SoC TCON 8-13 DC/DC Inverter Traverse Timing Mecha Controller IC Video Out (CVBS, YC, YPbPr)

Audio Audio Motor Keypad, DACs Amp Drivers Remote I/F 2 channels out Headphone Out

S/PDIF Out

5 Portable DVD based on Vaddis966L

SDRAM FLASH LCD Panel RGB RGB (Analog(Digital I/F)I/F) R[0:7] G[0:7] B[0:7] VCOM VCOM Vaddis 966L/LD Backlight TCON lines DC/DC InverterLED Traverse Mecha Video Out (CVBS)

Audio 2 ch out (analog or Class D) Motor Keypad, Amp Drivers Remote I/F S/PDIF Out

Integrated LCD Timing Controller

► Programmable ► Can generate various timing and control signals

Set12bits Set STV to 1 01000001000011010x410D Set6msb Set OEV for t1 cycles 00000010121 0x0295 Set6msb Set CKV for t2 cycles 00000011112 0x038C Set12bits Reset OEH & OEV, Set VCOM to 0 01000000100000100x4082 RepeatSame Repeat the same for t3 more cycles 1 0 17 0xA007 Set6msb Set OEH for t4 cycles 0000001109 0x0309 Set6msb Reset CKV for t5 Cycles 00000010035 0x0223 Set12bits Set STH for 1 (t6) cycle 01000011000100100x4312 Set12bits Reset STH 01000001000000100x4102 RepeatSame Repeat the same for t7 more cycles 1 0 1493 0xA1ED

ChangeSample ChangeSample Change Sample

12x LCD_Clock

6x LCD_Clock

DDE_Output

!6x LCD_Clock

LCD_Clock

!LCD_Clock

Red_LE

Green_LE

6 More Gadgets based on Vaddis966L…

► Car DVD

► Picture Frame

From Portable DVD to High-Definition

► High definition Blu-ray BD-DVD player ► x6 resolution of standard definition ► New compression standards ► Must keep legacy red-laser capabilities ► High quality video and audio ► Time to market ► Challenges ► Designing an Advanced Multi-Standard High Definition Video Decoder ► Memory bandwidth allocation ► SW development for Massively Parallel System on a Chip ► Performance “hungry” applications ► Inter-processor communication and synchronization ► Control many integrated modules ► Write software for several processors of various types

7 VaddisHD™ 100 Solution

System on a Chip HDD USB2.0HS OTG

SATA

HDMI1.3 out

CVBS S-Video Ethernet 10/100 Component Phy

7.1-ch audio out BD/DVD drive (SATA/ATAPI) Or Direct I/F to BL FE chip (Blazer) S/PDIF out

Nand/ DDR2 Nor

VaddisHD™ HW Architecture MPSoC, remember?!

ATAPI Drive ATAPI Driver / Secure CPU Application CPU Display Output

P SATA Drive x2 SATA MIPS, 32 bit, MIPS, 32 bit, H (2) ICache, DCache ICache, DCache Graphics Y Secure execution MMU

External FE chip

Interface to BL FE Enhancements Blend De-interlacer Scaler Video Digital Video Out Flash Cards Memory Card NTSC/ Analog Video Out Reader/Writer PAL AVZ Encoder USB Port x2 USB 2.0HS Multi Standards (OTG) HDMI 1.3 HDMI1.3 Decoder Tx DVD DRM Engine

CSS, CPR/PM, VCPS, MPEG-2, SmartCard H.264, VC-1, SmartCard AACS, BD+ MPEG-4

Guestbus

I2C ZDSP (Audio DSP) Analog audio UARTs DVD PS/TS Demux Memory Interface 2 MPEG1 L I,II,III, I S (10 ch.) SPI AC3, Class D MIF Arbitration AAC,AAC+,WMA, Remote Control WMA Pro, Dolby Infra Red Receiver Digital+, DTS,DTS+, IEC958 (S/PDIF) Ethernet PLLs, DTO Nano 0 Nano 1 Ethernet MAC+Phy Power Management

8 The Memory Challenge

► Demanding memory requirements ► Available bandwidth ► Utilization, frequency ► Footprint ► Size (width, depth, number of DRAM chips) ► Cost affecting system BOM ► Cost of memory chips ► Cost of package ► #of pins to support DRAMs ► Power ► Bandwidth allocation schemes ► Adaptive priorities ► Support various type of clients ► High bandwidth clients ► use on-chip buffers to compensate latency ► Cost/Performance ► Low latency clients ► Processing is stalled till memory transfer is completed

AVZ – Multi-standards Video Decoder

► AVZ is an advanced multi-standard high definition video decoder core ► Supported video compression standards: ► MPEG-4 part 10 (AVC/H.264) ► VC-1 ► MPEG-4 part 2 / DivX / Xvid ► MPEG-1/2 ► AVZ challenges: ► Support 4 different standards ► Different stream compression techniques ► VLC – different tables for different standards ► CABAC (Context Adaptive Binary Arithmetic decoding) ► Different header syntax ► Different MV calculations ► Different transforms ► High definition resolution requires high throughput ► parallel processing ► extra HW acceleration ► Several proprietary processors ► AVP ► SIMD

9 VaddisHD™ Software Architecture

Application EmWi Linux Services: Modules Loadable DirectFB Linux R-CORE Wrapper BD Middleware Uart Ethernet … Hardware specific i/f Wrapper

APP Kernel Space Services

RT R-CORE Wrapper Hardware specific i/f Wrapper HW accelerators Wrapper R-CORE Hardware Specific BD Implementation ThreadX

CFE

LL API + FS

Dual CPU architecture ThreadX OS for Real-time CPU Linux Kernel for Application CPU Inter-Processor Communication

VaddisHD™ 100 Demo Board for BD-DVD

Audio HDMI Component

DDR2 (1)

Serial NOR

iNand DDR2 (0)

10 MultiMedia HD player/TVMM

► HD-TVMM ► Integrated into HDTV, enabling playback from USB- key or HDD or Ethernet ► HD-Player ► Portable box ► Playback of various content via HDMI1.3 1080p ► IP-VOD ► Ethernet connectivity ► DRM

Rakefet

‘Rakefet’ is the Hebrew name for ...