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2015
Gallium Nitride: Analysis of Physical Properties and Performance in High-Frequency Power Electronic Circuits
Dalvir K. Saini Wright State University
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This Thesis is brought to you for free and open access by the Theses and Dissertations at CORE Scholar. It has been accepted for inclusion in Browse all Theses and Dissertations by an authorized administrator of CORE Scholar. For more information, please contact [email protected]. GALLIUM NITRIDE: ANALYSIS OF PHYSICAL PROPERTIES AND PERFORMANCE IN HIGH-FREQUENCY POWER ELECTRONIC CIRCUITS
A thesis submitted in partial fulfillment
of the requirements for the degree of
Master of Science in Electrical Engineering
By
Dalvir K. Saini
B. S., Wright State University, Dayton, Ohio, United States of America, 2013
2015 Wright State University WRIGHT STATE UNIVERSITY GRADUATE SCHOOL
July 20, 2015
I HEREBY RECOMMEND THAT THE THESIS PREPARED UNDER MY SUPERVISION BY Dalvir K. Saini ENTITLED Gallium Nitride: Analysis of Physical Properties and Performance in High-Frequency Power Electronic Circuits BE ACCEPTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF Master of Science in Electrical Engineering.
Marian K. Kazimierczuk, Ph.D.
Thesis Director
Brian Rigling, Ph.D.
Chair Department of Electrical Engineering College of Engineering and Computer Science Committee on Final Examination
Marian K. Kazimierczuk, Ph.D.
Ray Siferd, Ph.D.
Saiyu Ren, Ph.D.
Robert E. W. Fyffe, Ph.D. Vice President for Research and Dean of the Graduate School Abstract
Saini, Dalvir K., M.S.E.E., Department of Electrical Engineering, Wright State Uni- versity, 2015. Gallium Nitride: Analysis of Physical Properties and Performance in High- Frequency Power Electronic Circuits.
Gallium nitride (GaN) technology is being adopted in a variety of power electronic ap- plications due to their high efficiencies even at high switching speeds. In comparison with the silicon (Si) transistors, the GaN-based devices exhibit lower on-state resistance and par- asitic capacitances. The thermal performance of the GaN transistors are also better than the Si counterparts due to their higher junction temperature and lower temperature-coefficient of on-resistance. These unique properties make the gallium-nitride power transistors an appropriate selection for power electronic converters and radio-frequency power amplifiers, where size, efficiency, power density, and dynamic performance are major requirements. Foreseeing the immense capabilities of the GaN transistors in the near future for the fast-growing electronic industry, this thesis endeavors to make the following contributions: (a) analyze the important properties of GaN as a semiconductor material, (b) study the formation of the 2-dimensional electron gas layer required for current conduction, (c) deter- mine the functionality of the GaN as a field-effect transistor, and (d) test its performance through simulations and experiments at high switching frequencies in power electronic con- verters, where the Si-based transistors cease to operate normally. The critical material properties include the intrinsic carrier concentration, the specific on-resistance, and the intrinsic carrier mobility. The dependence of these properties on the temperature is inves- tigated. The comparison of these properties are made with the silicon and silicon-carbide (SiC) semiconductor materials to give a clear view about the superior performance of GaN over the other types. While the Si MOSFETs create a channel to conduct the electrons and holes between the source and drain terminals, the GaN field-effect transistors (FET) form a 2-dimensional electron gas (2-DEG) layer, whose thickness is controlled by the applied gate potential. Because of the high electron density in the 2-DEG layer, the GaN FETs are termed as high- electron mobility transistors (HEMT). The operation of both enhancement and depletion
iii mode GaN FETs are discussed in detail and the model of the drain current through the 2-DEG layer is provided. The figure-of-merit (FOM) for the GaN transistors is explained and then compared with that of Si and SiC transistors. Two important implementations of GaN transistors are in the (a) pulse-width modulated synchronous-buck DC-DC power converters and (b) Class-D resonant inverters. These circuits are better representative examples since they comprise of one GaN FET (high-side switch) connected to a “hot” point and the other GaN FET (low-side switch) referenced to ground. While the low-side switch consumes minimum gate-drive power for turn ON/OFF transitions, the high-side switch demands a higher gate-drive power to operate the transistor as a switch. Also, these switches exhibit switching losses due to the charge/discharge process of the parasitic capacitances. The gate-drive power and switching losses increase as the switching frequency is increased. However, due to the superior performance and very low values of the device parasitic resistances and capacitances in the GaN transistors, higher switching frequencies can be achieved at very minimal switching losses. Simulations were performed to analyze the behavior of the two circuits at different switching frequencies and were compared with those using Si transistors. It is observed that the overall efficiency reduced to 48% at 5 MHz for the Si-based buck converter and down to 41% at 5 MHz for the Si-based Class-D inverter. However, using GaN transistors showed an improved performance, where the overall efficiency reduced to only 71% at 15 MHz for the buck converter and 60% at 10 MHz for the Class-D inverter. Further, experimental validations were performed on a prototype of the synchronous buck converter developed using the high-frequency, half-bridge switching network module EPC9037 manufactured by Efficient Power Conversion Corporation. The module comprises of the enhancement-mode GaN transistors and a high-speed, dual-side, high-performance gate-driver LM5113 by Texas Instruments. The experimental results showed the immense capability of the GaN transistors to achieve high efficiencies. The experimentally measured efficiency of the synchronous buck converter was 85% at a switching frequency of 5 MHz and reduced to 60% at 8MHz. The theoretical predictions were in good agreement with simulation and experiment results.
iv Contents
1 Introduction 1
1.1 Background...... 1
1.2 ResearchMotivation ...... 3
1.3 ThesisObjectives...... 4
1.4 ExistingTechnology ...... 5
1.5 OrganizationoftheThesis...... 7
2 Overview of GaN Technology 9
2.1 Fundamental Properties of GaN Semiconductor Material ...... 9
2.1.1 BandGapEnergyofGaN...... 10
2.1.2 ThermalVelocityofChargeCarriers ...... 12
2.1.3 Breakdown (Critical) Electrical Field and Breakdown Voltage . . . . 12
2.1.4 IntrinsicCarrierConcentration ...... 13
2.1.5 ExtrinsicCarrierConcentration...... 14
2.1.6 Charge Carrier Mobility and Saturation Velocity ...... 18
2.1.7 ResistivityandConductivity ...... 27
2.2 Figures-of-Merit for Semiconductor Materials ...... 33
3 Characteristics of the Gallium Nitride Transistors 36
3.1 OperationofGaNTransistors ...... 36
3.1.1 2DElectronGas ...... 36
3.1.2 Depletion-Mode Structure of GaN FET ...... 38
3.1.3 Enhancement-Mode Structure of GaN FET ...... 38
3.1.4 Cascode-Configured Structure of GaN FET with Si MOSFET . . . . 40
3.2 DeviceParameters ...... 41
3.2.1 BreakdownVoltage...... 41
v 3.2.2 On-Resistance of a Transistor ...... 43
3.2.3 On-Resistance of GaN Transistor ...... 45
3.3 Static and Dynamic Characteristics of GaN FET ...... 47
3.3.1 DCCharacteristicsofGaNFET ...... 48
3.3.2 Small-SignalModelofGaNFET ...... 49
4 Synchronous Buck Converter Using GaN Transistors 55
4.1 PWM Synchronous Buck DC-DC Converter ...... 55
4.1.1 CircuitDescription...... 56
4.1.2 CircuitDesign ...... 56
4.1.3 DesignExample ...... 59
4.1.4 SimulationResults ...... 62
5 Half-Bridge Class-D Series Resonant Inverter Using GaN Transistor 73
5.1 Class-DResonantInverter...... 73
5.1.1 CircuitDescription...... 74
5.1.2 CircuitDesign ...... 74
5.1.3 DesignExample ...... 76
5.1.4 SimulationResults ...... 78
6 Results 90
6.1 SummaryofResults ...... 90
6.2 Comparison of Material Properties of Gallium Nitride, Silicon Carbide, and
Silicon...... 90
6.3 Comparison of Device Properties of Gallium Nitride, Silicon Carbide, and
Silicon...... 91
6.3.1 Figure-of-Merit...... 93
6.4 Results for PWM Synchronous Buck DC-DC Converter ...... 94
vi 6.4.1 Comparison of Theoretical and Simulation Results ...... 95
6.4.2 ExperimentalResults ...... 97
6.5 Results for Half-Bridge Class-D Resonant Inverter Using GaN Transistor . . 104
6.5.1 Comparison of Theoretical and Simulation Results ...... 104
7 Conclusions and Future Work 108
7.1 ThesisSummary ...... 108
7.2 Semiconductors and Their Target Applications ...... 109
7.2.1 High/Low-Voltage and Low-Frequency Applications ...... 111
7.2.2 Low-Voltage and High-Frequency Applications ...... 111
7.2.3 High-Voltage and High-Frequency Applications ...... 112
7.3 Take-HomeLessons...... 112
7.4 Conclusions ...... 113
7.5 Contributions...... 114
7.6 FutureWork ...... 115
8 Bibliography 116
vii List of Figures
1.1 Fundamental properties of silicon, silicon carbide, and gallium nitride materials. 5
2.1 StructureofwurtziteGaNcrystal...... 9
2.2 Intrinsic carrier concentration ni as a function of temperature T for silicon. 14
2.3 Intrinsic carrier concentration ni as a function of temperature T for silicon
carbide...... 15
2.4 Intrinsic carrier concentration ni as a function of temperature T for gallium
nitride...... 15
2.5 Intrinsic carrier concentration ni, majority carrier (electrons) concentration
nn, minority carrier (holes) concentration pn, and donor concentration ND
as functions of temperature T for silicon with N = 5 1016 cm 3...... 16 D × −
2.6 Intrinsic carrier concentration ni, majority carrier (electrons) concentration
nn, minority carrier (holes) concentration pn, and donor concentration ND
as functions of temperature T for silicon carbide with N = 5 1016 cm 3. 16 D × −
2.7 Intrinsic carrier concentration ni, majority carrier (electrons) concentration
nn, minority carrier (holes) concentration pn, and donor concentration ND
as functions of temperature T for gallium nitride with N = 5 1016 cm 3. 17 D × −
2.8 Low-field electron mobility µn as a function of doping concentration at room
temperature T =300Kforsilicon...... 19
2.9 Low-field hole mobility µp as a function of doping concentration at room
temperature T =300Kforsilicon...... 19
2.10 Low-field electron mobility µn as a function of doping concentration at room
temperature T =300Kforsiliconcarbide...... 20
2.11 Low-field hole mobility µp as a function of doping concentration at room
temperature T =300Kforsiliconcarbide...... 20
viii 2.12 Low-field electron mobility µn as a function of doping concentration at room
temperature T =300Kforgalliumnitride...... 21
2.13 Low-field hole mobility µp as a function of doping concentration at room
temperature T =300Kforgalliumnitride...... 21
2.14 Low-field electron mobility µn as a function of temperature T for silicon. . . 23
2.15 Low-field hole mobility µp as a function of temperature T for silicon. . . . . 23
2.16 Low-field electron mobility µn as a function of temperature T for silicon carbide. 24
2.17 Low-field hole mobility µp as a function of temperature T for silicon carbide. 24
2.18 Low-field electron mobility µn as a function of temperature T for gallium
nitride...... 25
2.19 Low-field hole mobility µp as a function of temperature T for gallium nitride. 25
2.20 Average electron drift velocity vn as a function of electric field intensity E
forsilicon...... 27
2.21 Average electron drift velocity vn as a function of electric field intensity E
forsiliconcarbide...... 28
2.22 Average electron drift velocity vn as a function of electric field intensity E
forgalliumnitride...... 29
2.23 Electron mobility µn as a function of electric field intensity E for silicon. . . 29
2.24 Electron mobility µn as a function of electric field intensity E for silicon carbide. 30
2.25 Electron mobility µn as a function of electric field intensity E for gallium
nitride...... 30
2.26 Resistivity ρi as a function of temperature T forsilicon...... 32
2.27 Resistivity ρi as a function of temperature T for silicon carbide...... 32
2.28 Resistivity ρi as a function of temperature T for gallium nitride...... 33
2.29 Comparison of the three FOMs for Si, SiC and GaN semiconductor materials. 34
3.1 The formation of 2DEG at the interface of GaN and AlGaN...... 37
ix 3.2 Electrical field is generated by applying voltage on the terminals of the device
resultinginflowofelectricalcurrent...... 37
3.3 Structure of the depletion-mode with zero gate voltage (VG = 0)...... 38
3.4 Structure of the depletion mode with negative gate voltage (VG < 0). . . . . 39
3.5 Structure of the enhancement-mode with zero gate voltage (VG = 0). . . . . 39
3.6 Structure of the depletion-mode with positive gate voltage (VG > 0). . . . . 40
3.7 Implementation of the cascode-configuration of depletion-mode gallium ni-
tride FET with enhancement-mode silicon MOSFET...... 41
3.8 Size comparison of silicon and gallium nitride FET...... 42
3.9 Plot of specific on-resistance RDS(on) as a function of breakdown voltage VBD
forsilicon...... 44
3.10 Plot of specific on-resistance RDS(on) as a function of breakdown voltage VBD
forsiliconcarbide...... 44
3.11 Plot of specific on-resistance RDS(on) as a function of breakdown voltage VBD
forgalliumnitride...... 45
3.12 Plot of specific on-resistance RDS(on) as a function of temperature T for
silicontransistors...... 46
3.13 Plot of specific on-resistance RDS(ON) as a function of temperature T for
siliconcarbidetransistors...... 46
3.14 Plot of specific on-resistance RDS(on) as a function of temperature T for
galliumnitridetransistors...... 47
3.15 Different resistive elements, which constitute on-resistance RDS(on) in GaN
HEMT...... 48
3.16 Circuit to analyze the DC characteristics of EPC2020 GaN HEMT...... 49
3.17 Drain current iD as a function of gate-to-source vGS for different values of
VDS...... 50
x 3.18 Drain current iD as a function of drain-to-source vDS for different values of
VGS...... 50
3.19 Symbol and small-signal model of a transistor. (a) Symbol of transistor
with parasitic capacitances. (b) Low-frequency small-signal model of the
transistor. (c) Small-signal equivalent model obtained using Miller’s theorem
with drain-to-source terminals short-circuited. (d) Small-signal equivalent
modelwithlumpedcapacitances...... 51
3.20 Magnitude plot of the small-signal voltage gain Av of EPC2020 GaN HEMT. 54
3.21 Phase plot of the small-signal voltage gain Av of EPC2020 GaN HEMT. . . 54
4.1 Circuit diagram of the synchronous buck dc-dc converter...... 55
4.2 Circuit schematic for dc-dc synchronous buck converter on SABER circuit
simulator ...... 59
4.3 Theoretically obtained plot of efficiency as a function of switching frequency
for the synchronous buck dc-dc converter...... 61
4.4 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for switch M1 at100kHz...... 61
4.5 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for switch M2 at100kHz...... 62
4.6 Simulation results of inductor current iL and output voltage VO at 100 kHz. 63
4.7 Simulation results of input power PI and output power PO at 100 kHz. . . . 63
4.8 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for MOSFET M1 at1MHz...... 64
4.9 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for MOSFET M2 at1MHz...... 65
4.10 Simulation results of inductor current iL and output voltage VO at 1 MHz. 65
4.11 Simulation results of input power PI and output power PO at 1 MHz. . . . 66
xi 4.12 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for MOSFET M1 at10MHz...... 66
4.13 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for MOSFET M2 at10MHz...... 67
4.14 Simulation results of inductor current iL and output voltage VO at 10 MHz. 67
4.15 Simulation results of input power PI and output power PO at 10 MHz. . . . 68
4.16 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for MOSFET M1 at15MHz...... 68
4.17 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for MOSFET M2 at15MHz...... 69
4.18 Simulation results of inductor current iL and output voltage VO at 15 MHz. 69
4.19 Simulation results of input power PI and output power PO at 15 MHz. . . . 70
4.20 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for silicon MOSFET M1 at5MHz...... 71
4.21 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for silicon MOSFET M2 at5MHz...... 71
4.22 Simulation results of inductor current iL and output voltage VO at 5 MHz. 72
4.23 Simulation results of input power PI and output power PO at 5 MHz. . . . 72
5.1 Circuit diagram of half-bridge Class-D series resonant inverter...... 73
5.2 Circuit schematic for Half-Bridge Class-D RF power amplifier in SABER
simulator...... 77
5.3 Theoretically obtained plot of efficiency as a function of the switching fre-
quency of the Class-D series resonant inverter...... 78
5.4 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for switch M1 at100kHz...... 79
5.5 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for switch M2 at100kHz...... 79
xii 5.6 Simulation results of drain current iD for switch M1 and M2 at 100 kHz. . . 80
5.7 Simulation results of input power PI and output power PO at 100 kHz. . . . 80
5.8 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for switch M1 at1MHz...... 81
5.9 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for switch M2 at1MHz...... 82
5.10 Simulation results of drain current iD for switch M1 and M2 at 1 MHz. . . 82
5.11 Simulation results of input power PI and output power PO at 1 MHz. . . . 83
5.12 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for switch M1 at10MHz...... 83
5.13 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for switch M2 at10MHz...... 84
5.14 Simulation results of drain current iD for switch M1 and M2 at 10 MHz. . . 84
5.15 Simulation results of input power PI and output power PO at 10 MHz. . . . 85
5.16 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for switch M1 at15MHz...... 85
5.17 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS for switch M1 at15MHz...... 86
5.18 Simulation results of drain current iD for switch M1 and M2 at 15 MHz. . . 86
5.19 Simulation results of input power PI and output power PO at 15 MHz. . . . 87
5.20 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS with silicon MOSFET M1 at5MHz...... 88
5.21 Simulation results of gate-to-source voltage vGS and drain-to-source voltage
vDS with silicon MOSFET M2 at5MHz...... 88
5.22 Simulation results of drain current iD with silicon MOSFETs M1 and M2 at
5MHz...... 89
xiii 5.23 Simulation results of input power PI and output power PO with silicon MOS-
FETsat5MHz...... 89
6.1 Intrinsic carrier concentration ni as functions of temperature T for gallium
nitride,siliconcarbide,andsilicon...... 91
6.2 Electron mobility µn as functions of temperature T for gallium nitride, silicon
carbide,andsilicon...... 92
6.3 Drift electron velocity µn as functions of electric field intensity E for gallium
nitride,siliconcarbide,andsilicon...... 92
6.4 On-resistance R(DSon) of gallium nitride, silicon carbide, and silicon transis-
tors as functions of breakdown voltage VBD...... 93
6.5 On-resistance R(DSon) of gallium nitride, silicon carbide, and silicon transis-
tors as functions of temperature T ...... 94
6.6 The product of on-resistance R(DSon) and gate charge Qg of gallium nitride,
silicon carbide, and silicon transistors as functions of temperature T ..... 95
6.7 The inverse of the product of on-resistance R(DSon) and gate charge Qg of
gallium nitride, silicon carbide, and silicon transistors as functions of tem-
perature T ...... 96
6.8 The bar graph of figure-of-merit (R Q 1) of gallium nitride, silicon (DSon) × g− carbide,andsilicontransistors...... 96
6.9 The comparison of theoretical efficiency of PWM synchronous buck dc-dc
converter using gallium nitride and silicon transistors...... 97
6.10 The comparison of theoretical and simulated efficiency of PWM synchronous
buck dc-dc converter using gallium nitride transistors...... 98
6.11 Pictureoffullexperimentalset-up...... 99
6.12 Picture of PWM synchronous buck dc-dc converter with EPC9037 half bridge
module...... 100
xiv 6.13 Picture of EPC9037 half bridge module, which includes the voltage regula-
tor MCP1703, high-frequency gate-drive LM5113, and EPC2101 half-bridge
module of enhancement-mode GaN transistors...... 101
6.14 Experimentally obtained plots of gate-to-source voltage vGS (upper trace),
drain-to-source voltage vDS (middle trace), and inductor current iL (lower
trace) at fs =100kHz...... 103
6.15 Experimentally obtained plots of gate-to-source voltage vGS (upper trace),
drain-to-source voltage vDS (middle trace), and inductor current iL (lower
trace) at fs =500kHz...... 104
6.16 Experimentally obtained plots of gate-to-source voltage vGS (upper trace),
drain-to-source voltage vDS (middle trace), and inductor current iL (lower
trace) at fs =1MHz...... 105
6.17 Experimentally obtained plots of gate-to-source voltage vGS (upper trace),
drain-to-source voltage vDS (middle trace), and inductor current iL (lower
trace) at fs =2MHz...... 105
6.18 Experimentally obtained plots of drain-to-source voltage vDS (upper trace)
and output voltage VO (lower trace) at fs =5MHz...... 106
6.19 Experimentally obtained plots of rain-to-source voltage vDS (upper trace)
and output voltage VO (lower trace) at fs =8MHz...... 106
6.20 The comparison of theoretical and experimental efficiency of PWM syn-
chronous buck dc-dc converter with gallium nitride transistors...... 107
6.21 The comparison of theoretical and simulated efficiency of half-bridge class-D
resonant inverter using gallium nitride transistors...... 107
7.1 Various application areas for gallium nitride, silicon, and silicon carbide dis-
tributed according to operating voltage, operating temperature, and operat-
ingfrequencyrequirements...... 110
xv Acknowledgments
I owe my gratitude to many people, who have made this thesis possible and because of whom my graduate experience has been one that I will cherish forever. I would like to express my sincere appreciation to the following people who made this thesis viable in one or the other way.
Dr. Marian K. Kazimierczuk for his guidance and encouragement. His enthusiasm for my thesis topic and tremendous expertise is very much appreciated. I have been amaz- ingly fortunate to have an adviser, who gave me the freedom to explore on my own. He taught me how to question my own thoughts and express ideas. The long walks with him in the woods and exploring nature helped me relax and overcome many frustrating and long days. He is truly a hero.
Dr. Ray Siferd and Dr. Saiyu Ren for serving as members of my M.S. thesis defense committee and providing necessary feedback for the creation of a productive research report.
Agasthya Ayachit for sharing his knowledge and ideas and creating many insightful discussions and suggestions, which were essential in the successful completion of this thesis.
He is my primary resource for getting my research questions answered. He is a wonderful and generous person. I admire his positive outlook and his ability to smile despite the situation. I remember my first meeting with Agasthya in the Russ Engineering Center elevator, when we had a very sweet and short conversation. After two years, today, I enjoy research, work, lunches, and many fun activities with him.
Department of Electrical Engineering for giving me the opportunity and resources to obtain my M.S. at Wright State University and continue further to pursue Ph.D. Also, my sense of gratitude goes to faculty members in EE department for their great teaching.
xvi My sincerest thanks to Dr. Mike Saville for introducing me to research and giving me a great opportunity to be his student.
Family for supporting me throughout the years. I place on record, my heartfelt thanks
to them. Things would have been different without their love and support.
Last but not the least, I would like to thank my friends for providing a warm atmosphere
and necessary help when needed.
xvii 1 Introduction
The gallium nitride (GaN) semiconductor has turned out to be the best replacement for the existing silicon technology due to its excellent material properties. GaN has a brilliant future in a variety of power electronic applications. This thesis presents an extensive study on the properties and characteristics of gallium nitride as a semiconductor material and as a transistor, its unique advantages, when compared with its other counterparts, and its applications in high switching frequency power electronic converters.
1.1 Background
The material, which we call “semiconductor”, has a rich and interesting history that begins from 1833, when Michael Faraday discovered that semiconductor electrical conductivity in- creases with increase in temperature [1], [2]. This behavior of semiconductor was different from the behavior exerted by metals, where conductivity decreases with increase in temper- ature. The progress was slow until 1948, when point contact devices were first introduced leading to the use of silicon extensively. The history of information theory was made by silicon because of its excellent characteristics. Silicon products have evolved over time and considered as a carrier of information for a long time. It has played a tremendous role in the development of high performance electronic devices, which are part of our everyday lives
[3]. Silicon is the heart of conventional computer-based technology. From our cell phones, super-fast computers to high-tech cars, most of the technology we enjoy today is because of the enormous development in computing. This advancement was possible because of the growth in the transistor industry. The transistor is one of the immense technological accomplishments of the last century. According to Intel co-founder, Gordon Moore, the number of transistors on an integrated circuit has been doubling approximately every two years to keep up with computing power we need today. This trend is called Moore’s Law
[4]. However, for how long can we keep increasing this number? With the exponentially
growing information, we are running out of space to store the data. The capacity to increase
1 the computing power by adding more and more transistors will eventually break down. Re- searchers have seriously started to figure out new methods to shrink the size of transistors as well as increase the processing speed higher than ever before. The performance of silicon devices is limited for today’s requirements because of inherent limitations of its properties
[3]-[4]. Computing power cannot sustain its exponential growth by relying on silicon any- more. Moreover, silicon has reached its theoretical limit in power conversion. It cannot fulfill the requirements in applications for high-voltage and high-power systems. The ques- tion is, what is a good replacement for silicon? Wide band gap (WBG) semiconductors have the potential to do this job.
In the last few years, gallium nitride (GaN) and silicon carbide (SiC) have been receiving
much attention. Also, SiC and GaN semiconductors are commonly attributed as compound
semiconductors because they are comprised of multiple elements from different groups in
the periodic table. These materials have challenged the long held dominance of silicon.
GaN and SiC have a wide band gap as compared to Si. The critical electric field or
breakdown field of GaN and SiC is an order of magnitude higher than that of Si. These WBG
materials can withstand high operating temperatures, high frequencies, and higher voltages
leading to much efficient power conversion systems. As a result of these characteristics, the
electronic devices can be made with low power losses and are smaller in size as compared
to the present day technology.
GaN devices, the best alternative to Si, has the ability to switch at high frequencies with
low power losses and as a result can achieve high efficiencies. High-frequency operation to
achieve high bandwidth reduces the size of passive components making it far easier to
make compact electronic circuits. With the excellent properties such as wider band gap,
high breakdown voltage, higher breakdown electric field, and higher electron mobility, GaN
devices can operate at higher voltages and high switching frequencies. In addition, GaN
material has high electron saturation velocity. This property allows the GaN based devices
to operate at much higher speeds. Also, GaN power transistors help lessen the losses due to
2 conduction and switching, hence offering a higher efficiency. The foremost application area of GaN power devices are power electronic converters and radio-frequency power amplifiers
[7]-[22].
1.2 Research Motivation
In modern society, energy is the key factor of economy. Energy-saving has become a world- wide priority. The environmental issues such as depletion of our natural resources, pollution and global warming, etc., have made the introduction of new and efficient energy sources necessary. Inefficient systems cause extra cost for wasted energy. There is an immedi- ate need to improve efficiency by choosing better components and redesigning the power systems. The requirement of efficient power devices in electrical systems for energy conser- vation is increasing. Therefore, it is crucial to optimize the efficiency of these devices to minimize energy loss during their operation. In power devices, there are two main sources for energy losses: conduction losses and switching losses.
Conduction losses: The on-resistance of power devices cause dissipation of power by • obstructing the flow of electric current through them resulting in conduction losses.
Switching losses: The parasitic capacitance of the devices store energy and dissipate • the energy during switching. This transition during on and off intervals cause switch-
ing losses. The switching losses are directly proportional to the parasitic capacitance
and to the switching frequency. The capacitance increases with the increase in the
size of the device, which increases the switching losses. In addition, the switching
losses at the gate of the transistor also increase with frequency, where the energy is
used to charge and discharge the gate-to-source and gate-to-drain capacitances of the
transistor.
GaN transistor is the next generation power device. GaN technology can lead to many
applications. It allows reduction in power losses and attain fast-speed switching because of
3 its attractive physical properties. Figure 1.1 shows the main properties of GaN, SiC, and
Si.
The motivation behind this thesis includes investigating the critical properties of the
GaN semiconductor as a material and as a device, present the necessary expression, which are relevant to making a proper transistor selection, and also to determine how well these devices perform at high switching frequencies. In addition to the current state-of-the-art, this thesis attempts to make a comprehensive analysis of GaN; a study helpful for practicing engineers, researchers in the field of electronics, and physicists. A few specific motivations are:
Current trend in power electronic circuits is focused towards high-power, high-speed • operation.
Existing literature predominantly focuses on fabrication of GaN material. •
Advanced properties of GaN must be explored to justify its applications in various • fields.
Connect the gap between the datasheet parameters with the actual physical properties • of GaN transistors.
Go beyond the state-of-the-art to determine the hard-limits of the performance of • GaN transistors (in terms of frequency of operation).
1.3 Thesis Objectives
The objectives of this thesis are as follows:
To analyze the fundamental intrinsic characteristics of the gallium nitride semicon- • ductor material and to compare its properties with silicon and silicon carbide semi-
conductor materials.
4 `Q]V` 7 1 1 : Higher Band Gap :JR$:]JV`$7V 8 8 8 Energy
CVH `QJIQG1C1 7HI ¡L8 8 Higher `V:@RQ1J`1VCRLHI 8 8 Electron Mobility
Higher Critical Field
Figure 1.1: Fundamental properties of silicon, silicon carbide, and gallium nitride materials.
To give an overview on the operation of the gallium nitride field-effect transistors in • enhancement mode.
To investigate the electrical and switching characteristics of EPC2020 gallium nitride • high electron mobility transistor [8] through simulations and to compare its properties
with its silicon counterpart.
To investigate the switching characteristics of a half-bridge switching network com- • posed of gallium nitride power MOSFET using EPC2020 half-bridge switching mod-
ule manufactured by Efficient Power Conversion (EPC), with the help of synchronous
buck dc-dc converter and Class-D resonance inverter.
To perform experiments on a buck DC-DC power converter and investigate the oper- • ation of the converter at high switching frequencies.
To validate the theoretical predictions by experimental results. • 1.4 Existing Technology
It is not possible to ignore the wonderful material properties of the Nobel Prize winning material, which is gallium nitride (GaN). The development of efficient blue LEDs was en- abled because of GaN. The excellence of GaN is explained in detail in [9]. According to the
5 article, “Efficient Blue Light-Emitting Diodes Leading to Bright and Energy-Saving White
Light Sources” [9]:
“Today, GaN-based LEDs provide the dominant technology for back-illuminated
liquid crystal displays in many mobile phones, tablets, laptops, computer mon-
itors, TV screens, etc. Blue and UV-emitting GaN diode lasers are also used
in high-density DVDs, which has advanced the technology for storing music,
pictures and movies. Future application may include the use of UV-emitting
AlGaN/GaN LEDs for water purification, as UV light destroys the DNA of bac-
teria, viruses and microorganisms. In countries with insufficient or non-existent
electricity grids, the electricity from solar panels stored in batteries during day-
light, powers white LEDs at night. There, we witness a direct transition from
kerosene lamps to white LEDs.”
Moreover, GaN high electron mobility transistor (HEMT) has proved its significance as power devices [10]. GaN power devices, due to high breakdown voltage and high power densities are in great demand. These devices are suitable for the high-speed operation of power amplifiers. According to Wood, the GaN HEMT has enabled designing very high efficient PAs involving Class-D, Class-E, Class-F, and Class-J techniques [10].
Efficient Power Conversion Corporation (EPC) is one of the biggest provider of GaN power transistors [8]. EPC introduced their first enhancement-mode GaN high-electron mobility transistors in 2009 [8]. The products of EPC include enhancement-mode GaN
FETs, enhancement-mode GaN drivers, and controllers. These products are being utilized widely in many applications such as data-communication and tele-communication systems, envelope tracking, wireless power, LIDAR, audio amplifiers, and power inverters.
The availability of gallium nitride (GaN) substrates is limited [11]. Sapphire and SiC are quality substrates, but are very costly and are not very useful in terms of commercialization.
Silicon substrates are the most refined substrates for GaN. GaN on silicon offers a low cost,
6 high performance platform for high-frequency and high-power products.
GaN will make it as the future semiconductor device in many more applications in- cluding high-speed communication systems, automotive, radar systems, radio-frequency amplifiers, integrated circuit, lasers, solid-state microwave circuits, military, and aerospace applications, etc. [12].
1.5 Organization of the Thesis
The thesis is comprised of seven chapters. The chapters are organized as follows
Chapter 2 discusses the physical properties of GaN and their comparison with the • properties of Si and SiC. Moreover, Chapter 2 presents the various expressions of
the physical properties of semiconductor materials, develops a case study for gallium
nitride semiconductor material and compares its properties with silicon and silicon
carbide semiconductors.
Based on the properties discussed in Chapter 2, Chapter 3 addresses the properties • of the gallium nitride field-effect transistor. The two types of GaN FETs namely,
depletion-mode and enhancement-mode are discussed along with their functionality.
The model of EPC2020 GaN HEMT [8] is considered and its DC and AC character-
istics are observed.
In Chapter 4, one implementation of GaN transistors in the pulse-width modulated • synchronous buck dc-dc converter is discussed. Using a practical design example, the
analysis of the converter and the performance evaluation is made at various frequencies
of interest to determine the limitations of the GaN transistor.
In Chapter 5, another implementation of GaN transistors in frequency-controlled • Class-D resonant inverters is discussed. The efficiencies of the converter at differ-
ent switching frequencies are evaluated. A comparison of its performance is made
7 with the silicon-based switching network to determine the critical differences between
the two schemes.
Chapter 6 discusses the main results of this thesis and provides the essential com- • parison results for the properties of Si, SiC and GaN materials and devices. Further,
the experimental results obtained using the laboratory prototype of the synchronous
buck dc-dc converter discussed in Chapter 4 are provided. The results of the Class-D
resonant inverter are also included.
Finally, Chapter 7 summarizes this thesis work, provides the conclusions, and suggests • scope for future work.
8 2 Overview of GaN Technology
2.1 Fundamental Properties of GaN Semiconductor Material
For years, silicon-based power MOSFETs have been used in many applications such as power conversion, radio-frequency power amplifiers, analog electronics, transducers, etc. With sil- icon reaching its performance limit, gallium nitride (GaN) has emerged as a promising technology to replace the silicon-based technology. This new technology offers many advan- tages in high voltage and high frequency power management systems, and power converters.
The basic properties of GaN semiconductors at room temperature are given in the Table
2.1 along with silicon and silicon carbide for comparison.
Gallium nitride is a compound of gallium and nitrogen, where gallium (atomic number
31) belongs to group 13 and nitrogen (atomic number 7) belongs to group 15. In nature,
GaN exists in two allotropic forms namely, wurtzite and zinc blende EPC. In both of these structures, each group III atom, in this case the gallium atom is bonded with four nitrogen
Figure 2.1: Structure of wurtzite GaN crystal.
9 atoms. Figure 2.1 shows a representation of the structure of the wurtzite GaN crystal.
In the figure, the large circles are the gallium atoms and the smaller dense circles are the nitrogen atoms. The pattern of the structure is hexagonal and is commonly referred to as
α GaN. − The structure of both forms of GaN are chemically very stable, which enhances the piezoelectric properties of GaN. GaN is usually doped to make a n-type or p-type material with silicon or magnesium, respectively [9]. Defects in the crystal enhance the electron conductivity of GaN material. Manufacturing the p-type GaN is difficult, hence it is usually a n-type extrinsic material. The structural properties of GaN lead to high conductivity.
Piezoelectric effect in the material occurs, when the crystal is subjected to a mechanical strain [8]. By disturbing the lattice structure of the crystal, the displacement of charge particles within the crystal lattice results in the generation of an electric field.
The performance of any semiconductor devices depends on many intrinsic characteristics of the material. These characteristics include conductivity, breakdown voltage, and thermal properties. The data shown in Table 2.1 determines that the GaN semiconductors are superior than silicon (Si) in term of high breakdown voltage, higher mobility, and better thermal conductivity.
2.1.1 Band Gap Energy of GaN
The band gap energy EG of semiconductors determine the energy needed to break the
covalent bonds in the lattice. Higher energy is required if these bonds are strong making it
difficult for the electrons to jump from the valence band to the conduction band within a
material. As shown in Table 2.1, the band gap energy of GaN is very high as compared to
Si, which makes it suitable for high temperature applications [8].
10 Table 2.1: Properties of Silicon, Silicon Carbide, and Gallium Nitride.
Property Symbol Unit Value
Silicon band gap energy EG(Si) eV 1.12 Silicon band gap energy E J 1.793 10 19 G(Si) × − Silicon-carbide band gap energy EG(SiC) eV 3.26 Silicon-carbide band gap energy E J 5.216 10 19 G(SiC) × − Gallium-nitride band gap energy EG(GaN) eV 3.39 Gallium-nitride band gap energy E J 5.430 10 19 G(GaN) × − Silicon breakdown electric field E V/cm 2 105 BD(Si) × Silicon-carbide breakdown electric field E V/cm 22 105 BD(SiC) × Gallium-nitride breakdown electric field E V/cm 35 105 BD(GaN) × Silicon relative permittivity ǫr(Si) – 11.7
Silicon-carbide relative permittivity ǫr(SiC) – 9.7
Gallium-nitride relative permittivity ǫr(GaN) – 8.9 Silicon electron mobility at T = 300 K µ cm2/V s 1360 n(Si) · Silicon-carbide electron mobility at T = 300 K µ cm2/V s 900 n(SiC) · Gallium-nitride electron mobility at T = 300 K µ cm2/V s 2000 n(GaN) · Silicon hole mobility at T = 300 K µ cm2/V s 480 p(Si) · Silicon-carbide hole mobility at T = 300 K µ cm2/V s 120 p(SiC) · Gallium-nitride hole mobility at T = 300 K µ cm2/V s 30 p(GaN) · Silicon effective electron mass coefficient ke(Si) – 0.26
Silicon effective hole mass coefficient kh(Si) – 0.39
Silicon-carbide effective electron mass coefficient ke(SiC) – 0.36
Silicon effective hole mass coefficient kh(SiC) – 1
Gallium-nitride effective electron mass coefficient ke(GaN) – 0.23
Gallium-nitride effective hole mass coefficient kh(GaN) – 0.24
11 Table 2.2: Summary of calculated values for the thermal velocity of charge carriers for the three semiconductors at two different temperatures
Temp. (K) Charge vth for Si (m/s) vth for SiC (m/s) vth for GaN (m/s)
T = 300 K electron 2.29 105 1.94 105 2.43 105 × × × T = 300 K hole 1.86 105 1.16 105 2.38 105 × × × T = 473 K electron 2.87 105 2.44 105 2.99 105 × × × T = 473 K hole 2.34 105 1.46 105 2.99 105 × × ×
2.1.2 Thermal Velocity of Charge Carriers
Thermal electron velocity of a semiconductor can be expressed as [13]
3kT vth(e) = , (2.1) skeme and thermal hole velocity of a semiconductor can be expressed as
3kT vth(h) = , (2.2) skhme
where k is Boltzmann’s constant equal to 1.38 10 23 J/K, T is the temperature, k is × − e
the effective mass coefficient for electrons, kh is the effective mass coefficient for holes, and
me is the mass of electrons in free space. Using equations (2.1) and (2.2) with the values
mentioned in Table 2.1, the thermal velocity of electrons and the thermal velocity of holes
for the different semiconductors at room temperature T = 300 K and at a temperature
T = 473 K are as tabulated in Table 2.2.
2.1.3 Breakdown (Critical) Electrical Field and Breakdown Voltage
A wider energy band gap results in a higher electrical field intensity required for ionization. and hence increases the potential required to cause avalanche breakdown. A higher break- down voltage VBD can be achieved, because of the high wide band gap energy of GaN. Since
the breakdown voltage of the semiconductors is directly proportional to the breakdown elec-
12 tric field EBD, the GaN-based devices are apt for high voltage applications also and is a suitable replacement with the lossy silicon transistors. Also, higher breakdown voltages reduce the size of the transistor resulting in smaller resistance for current flow. Thus, GaN exhibits lower on-state resistance, when used as transistors than the silicon-based devices and is discussed in great detail in the following chapter.
2.1.4 Intrinsic Carrier Concentration
In equilibrium and in pure form, the concentration of free electrons n and concentration of free holes p in intrinsic semiconductors are equal and can be expressed as [13]
3/2 E 2πmekT 3/4 G carriers n = p = n = 2 (k k ) e− 2kT , (2.3) i h2 e h cm3
where me is the mass of a free electron, k is the Boltzmann’s constant, T is the temperature,
ke, kh are the electron and hole mass coefficients, respectively, EG is the band gap energy,
and h is the Planck’s constant. The numbers indicate that GaN is a very good insulator at
room temperature, when compared to Si. Table 2.3 summarizes the values of the intrinsic
concentration of Si, SiC, and GaN at three different temperatures. Figures 2.2, 2.3, and
2.4 show the plots of the intrinsic carrier concentration ni for silicon, silicon carbide and
gallium nitride as functions of temperature T , respectively. It can be observed that at room
temperature and below, the Si material possesses sufficiently large number of free carriers
required to conduction, whereas the SiC and GaN materials release almost no carriers into
Table 2.3: Summary of calculated values for the intrinsic concentrations of the three semiconductors at different temperatures
3 Intrinsic concentration (cm− ) Si SiC GaN
n at T = 273 K 1.85 108 9.10 10 12 1.43 10 13 i × × − × − n at T = 300 K 1.81 109 5.31 10 9 1.07 10 10 i × × − × − n at T = 423 K 1.63 1012 7.96 10 1 3.34 10 2 i × × − × − n at T = 523 K 4.23 1013 5.58 103 3.29 102 i × × ×
13 18 10
16 10
14 10 ) 12 −3 10 (cm
i
n 10 10
8 10
6 10
200 400 600 800 1000 1200 T (K)
Figure 2.2: Intrinsic carrier concentration ni as a function of temperature T for silicon. the conduction band. However, as the temperature is increased, the forbidden energy band gap EG reduces, making way for more free carriers to enter the conduction band. In other words, at T = 473 K and beyond, while the Si semiconductor still contains free carriers in
abundance, the SiC and GaN materials slowly begin to lose the carriers in the valence band
to the conduction band.
2.1.5 Extrinsic Carrier Concentration
The n-type extrinsic semiconductor is formed by doping impurities into the material. The
conductivity of semiconductors can be significantly improved by adding donor atoms. In
n-type semiconductor, the electrons are majority carriers and holes are minority carriers.
The donor concentration ND is much higher than intrinsic carrier concentration. Consider
a n-type semiconductor material. The majority free electron concentration nn and the
minority hole concentration pn are given by [13]
2 2 ND + 4ni + ND n = , (2.4) n q 2
14 10 10
0 ) 10 −3 (cm
i n
−10 10
−20 10
200 400 600 800 1000 1200 T (K)
Figure 2.3: Intrinsic carrier concentration ni as a function of temperature T for silicon carbide.
10 10
0 10 ) −3 (cm
i n −10 10
−20 10
200 400 600 800 1000 1200 T (K)
Figure 2.4: Intrinsic carrier concentration ni as a function of temperature T for gallium nitride.
15 1018
1016 ) -3 (cm
D 14
, N 10 n , p n , n i n n 1012 i n n p n N D 1010 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 T (K)
Figure 2.5: Intrinsic carrier concentration ni, majority carrier (electrons) concentration nn, minority carrier (holes) concentration pn, and donor concentration ND as functions of temperature T for silicon with N = 5 1016 cm 3. D × −
1018
1016 ) -3 (cm
D 14
, N 10 n , p n , n i n n 1012 i n n p n N D 1010 1000 1500 2000 2500 3000 3500 T (K)
Figure 2.6: Intrinsic carrier concentration ni, majority carrier (electrons) concentration nn, minority carrier (holes) concentration pn, and donor concentration ND as functions of temperature T for silicon carbide with N = 5 1016 cm 3. D × −
16 1018
1016 ) -3 (cm
D 14
, N 10 n , p n , n i n 12 n 10 i n n p n N D 1010 1000 1500 2000 2500 3000 3500 T (K)
Figure 2.7: Intrinsic carrier concentration ni, majority carrier (electrons) concentration nn, minority carrier (holes) concentration pn, and donor concentration ND as functions of temperature T for gallium nitride with N = 5 1016 cm 3. D × −
2 2 ND + 4ni ND p = − . (2.5) n q 2
Figures 2.5, 2.6, and 2.7 show the plots of the intrinsic carrier concentration ni, majority electron concentration nn, and minority hole concentration pn as functions of temperature
T for the n-type silicon, silicon carbide, and gallium nitride semiconductor materials, re- spectively. The assumed value of the donor concentration is N = 5 1016 cm 3. From D × − these figures, the maximum junction temperature can be evaluated. The maximum junction temperature TJmax is defined as a temperature beyond which the doped semiconductor loses its extrinsic properties and behaves as an intrinsic semiconductor. Using the data provided in the figure, one may observe the junction temperature to be at approximately 1000 K, which occurs at a carrier concentration NJ , where ND = ni = pn = nn. However, a con- servative approach is considered and a temperature corresponding to NJ /10 is used as the junction temperature in this thesis. Therefore, an approximate junction temperature for Si is TJmax = 750 K or TJmax = 477 ◦C. Similarly, the maximum junction temperature for
17 SiC is relatively higher than Si. Using similar analysis, TJmax for SiC is 1800 K or 1527 ◦C.
Based on a similar approach, the TJmax for GaN is 2000 K or 1723 ◦C.
2.1.6 Charge Carrier Mobility and Saturation Velocity
The mobility of charge carriers describes the freedom of movement in a lattice. The charge
carriers move constantly in a random fashion in the lattice. When an electric field is
applied to the charge carriers, the electrons and holes gain drift velocity. In a lattice, the
electron mobility is greater than hole mobility. At low field, the charge carrier mobilities
highly depend on doping concentration. For Si, the empirical expressions for the low-field
mobilities of electrons and holes at room temperature T = 300 K are given as [13]
1268 µ = 92+ , (2.6) n(300) ND 0.91 1 + ( 1.3 1017 ) × 406.9 µ = 54.3+ , (2.7) p(300) NA 0.88 1 + ( 6.3 1016 ) × where ND is the concentration of the donor atoms in the extrinsic semiconductor, and NA is
the concentration of acceptor atoms in the extrinsic semiconductor. For SiC, the empirical
expressions for the low-field mobilities of electrons and holes at room temperature T = 300
K are 947 µ = 40+ , (2.8) n(300) ND 0.61 1 + ( 1.94 1017 ) × 124 µ = 15.9+ . (2.9) p(300) NA 0.34 1 + ( 1.76 1019 ) × Similarly, for GaN, the empirical expressions for the low-field mobilities of electrons and holes at room temperature T = 300 K are [14],
1945 µ = 55+ , (2.10) n(300) N 1.0 1 + ( 2 1017 ) × 27 µ = 30+ , (2.11) p(300) N 2.0 1 + ( 3 1017 ) ×
18 1400
1200
1000 / Vs)
2 800 (cm 600 (300) n µ 400
200
0 14 15 16 17 18 19 20 10 10 10 10 10 10 10 N (cm−3) D
Figure 2.8: Low-field electron mobility µn as a function of doping concentration at room temperature T = 300 K for silicon.
500
450
400
350 / Vs) 2 300
(cm 250 (300) p
µ 200
150
100
50 14 15 16 17 18 19 20 10 10 10 10 10 10 10 N (cm−3) A
Figure 2.9: Low-field hole mobility µp as a function of doping concentration at room tem- perature T = 300 K for silicon.
19 1000
900
800
700
600 / Vs) 2 500 (cm
400 (300) n µ 300
200
100
0 14 15 16 17 18 19 20 10 10 10 10 10 10 10 N (cm−3) D
Figure 2.10: Low-field electron mobility µn as a function of doping concentration at room temperature T = 300 K for silicon carbide.
140
130
120
110 / Vs) 2 100 (cm (300)
p 90 µ
80
70
60 14 15 16 17 18 19 20 10 10 10 10 10 10 10 N (cm−3) A
Figure 2.11: Low-field hole mobility µp as a function of doping concentration at room temperature T = 300 K for silicon carbide.
20 3 10 / Vs) 2 (cm (300) n µ 2 10
15 16 17 18 19 20 21 10 10 10 10 10 10 10 N (cm−3) D
Figure 2.12: Low-field electron mobility µn as a function of doping concentration at room temperature T = 300 K for gallium nitride.
2 10 / Vs) 2 (cm
(300) 1
p 10 µ
0 10 15 16 17 18 19 20 21 10 10 10 10 10 10 10 N (cm−3) A
Figure 2.13: Low-field hole mobility µp as a function of doping concentration at room temperature T = 300 K for gallium nitride.
21 where N is the concentration of the electrons and holes in the bulk. Figures 2.8, 2.10, and 2.12 show the plots of the low-field electron mobilities µn as a function of the doping concentration for silicon, silicon carbide, and gallium nitride, respectively at a room tem- perature T = 300 K. Figure 2.9, 2.11, and 2.13 show the plots of the low-field hole mobilities
µp as a function of the doping concentration for silicon, silicon carbide, and gallium nitride, respectively at a room temperature T = 300 K. One may observe that the electron mobility of GaN stands highest, when compared to the other two materials. At low doping, the electron mobility of Si µ is 1360 cm2/V s, and the mobility of SiC is 960 cm2/V s, n(300) · · while the mobility of GaN is 2000 cm2/V s. · The mobility of holes is the highest in Si, when compared to that of GaN and SiC.
Thus, one may assume that due to the very low hole mobilities, the size of respective semiconductor device (diode or transistor) required to conduct a specific current is very large. In this regard, Si-based devices may be preferred over SiC and GaN, where the current conduction takes place through the majority hole movement.
It is clear from the above figures that GaN has high electron mobility and is suitable for high-speed applications. However, these mobilities have a strong dependence on tempera- ture. The temperature dependance of mobility is given by the following expression [8] for all the three semiconductor materials
300 η µ = µ , (2.12) n0 n(300) T and 300 η µ = µ , (2.13) p0 n(300) T where η is a material-dependent constant, which decides the magnitude of the change in the mobility with temperature. Table 2.4 summarizes the values of η for the three different materials. Figures 2.14, 2.16, and 2.18 show the plots of low-field electron mobility µn as functions of temperature T for silicon, silicon carbide, and gallium nitride. Figures 2.15,
2.17, and 2.19 show the plots of low-field hole mobility µp as functions of temperature T
22 3500
3000
2500
/ Vs) 2000 2 (cm 0
n 1500 µ
1000
500
200 250 300 350 400 450 500 T (K)
Figure 2.14: Low-field electron mobility µn as a function of temperature T for silicon.
1000
900
800
700 / Vs)
2 600
(cm 500 0 p µ 400
300
200
100
200 250 300 350 400 450 500 T (K)
Figure 2.15: Low-field hole mobility µp as a function of temperature T for silicon. for silicon, silicon carbide, and, gallium nitride.
The average drift velocity vn of the electrons under the influence of the electric field E
23 900
800
700
600
/ Vs) 500 2
(cm 400 0 n µ 300
200
100
0 300 400 500 600 700 800 900 1000 T (K)
Figure 2.16: Low-field electron mobility µn as a function of temperature T for silicon carbide.
120
100
80 / Vs) 2 60 (cm 0 p µ 40
20
0 300 400 500 600 700 800 900 1000 T (K)
Figure 2.17: Low-field hole mobility µp as a function of temperature T for silicon carbide.
is [13]
vn = µnE. (2.14)
24 3000
2500
2000 / Vs) 2
(cm 1500 0 n µ
1000
500
200 300 400 500 600 700 800 900 1000 T (K)
Figure 2.18: Low-field electron mobility µn as a function of temperature T for gallium nitride.
800
700
600
500 / Vs) 2 400 (cm 0 p
µ 300
200
100
200 300 400 500 600 700 800 900 1000 T (K)
Figure 2.19: Low-field hole mobility µp as a function of temperature T for gallium nitride.
25 Table 2.4: List of values for η to estimate the electron and hole mobilities as a function of temperature
Type of Charge Si SiC GaN
For electrons, η = 2.4 2.15 2.0 For holes, η = 2.2 2.0 5.0
The dependence of the electron mobility on the electric field can be determined using
µ µ = n0 , (2.15) n µn0E 1+ vsat
where µn0 is the low-field mobility of the electrons and vsat is the electron saturation velocity,
which is dependent on the material properties. For Si, v = 1 105 m/s, for SiC, v = sat × sat 2.2 105 m/s, and for GaN, v = 2.5 105 m/s. Substituting equation 2.15 into equation × sat × 2.14, we obtain µ E v = n0 . (2.16) n µn0E 1+ vsat
Figures 2.20, 2.21, and 2.22 show the average electron drift velocity vn as a function of the electric field intensity E for silicon, silicon carbide, and gallium nitride, respectively.
Further, Based on these curves the electric field can be divided into three regions: the
low-field region (10
velocity is directly proportional to the electric field and attains saturated value in the high-
field region, i.e. at higher values of the electric field, the control over the velocity by the field
intensity is diminished and then vn = vsat. The trend in the average electron drift velocity is due to the behavior of the field-dependent mobility. Figures 2.23, 2.24, and 2.25 show the electron mobility µn given in equation 2.15 as function of the electric field intensity E for silicon, silicon carbide and, gallium nitride, respectively. As the electric field is increased, the mobility is reduced due to frequent collision between the carriers within the lattice.
Thus, at higher electric field values, the mobility reduces. Careful consideration must be
26 8 10
7 10
6 10 (cm/s)
n v
5 10
4 10 2 4 6 8 10 10 10 10 E (V/cm)
Figure 2.20: Average electron drift velocity vn as a function of electric field intensity E for silicon. made during the transistor design to ensure that the low-field constant mobility is achieved for constant current and voltages. Further discussion on this is made in Chapter 3.
2.1.7 Resistivity and Conductivity
Free electrons and holes results in conduction of electric current. The conductivity of intrinsic semiconductors is given by the following expression [13]
σi = qµnni, (2.17)
1 1 ρi = = , (2.18) σi qµnni where µn is the low-field mobility, q is the charge of the electron, and ni is the intrinsic
carrier concentration concentration of the intrinsic semiconductor. The conductivity of the
semiconductors highly depends on temperature, since the intrinsic carrier concentration and
the mobilities are a function of temperature as given in equations 2.3, 2.12, and 2.13. The
charge carriers encounter more obstruction to move freely with increase in the temperature.
27 Hence, the mobility of charge carriers decreases as the temperature increases. On the other hand, the resistivity increases with rise in temperature.
Table 2.5 summarized the values of the resistivity of intrinsic Si, SiC, and GaN semicon- ductors at different temperatures. A complete range of values of ρi can be observed from
Figures 2.26, 2.27, and 2.28.
The resistivity of the semiconductor reduces with increase in the temperature. In con-
trast, in metals or any conductors, the resistivity increases with temperature. This inverse
dependence of the resistivity on temperature is very critical, due to which semiconductor
devices are preferred in power electronic circuits.
For an extrinsic semiconductor with a doping concentration ND, the conductivity of the
extrinsic semiconductor is given by
σn = qµnND, (2.19)
1 1 ρn = = , (2.20) σn qµnND
8 10
7 10
6 10 (cm/s)
n v
5 10
4 10 2 4 6 8 10 10 10 10 E (V/cm)
Figure 2.21: Average electron drift velocity vn as a function of electric field intensity E for silicon carbide.
28 8 10
7 10
6 10 (cm/s)
n v
5 10
4 10 1 2 3 4 5 6 10 10 10 10 10 10 E (V/cm)
Figure 2.22: Average electron drift velocity vn as a function of electric field intensity E for gallium nitride.
3 10 / Vs) 2
2
(cm 10 n µ
1 10 1 2 3 4 5 6 10 10 10 10 10 10 E (V/cm)
Figure 2.23: Electron mobility µn as a function of electric field intensity E for silicon.
29 3 10 / Vs) 2
2
(cm 10 n µ
1 10 1 2 3 4 5 6 10 10 10 10 10 10 E (V/cm)
Figure 2.24: Electron mobility µn as a function of electric field intensity E for silicon carbide.
3 10 / Vs) 2 (cm
n 2
µ 10
1 10 1 2 3 4 5 6 10 10 10 10 10 10 E (V/cm)
Figure 2.25: Electron mobility µn as a function of electric field intensity E for gallium nitride.
30 Table 2.5: Summary of resistivities ρi at different temperatures for Si, SiC, and GaN Resistivity (Ω cm) Si SiC GaN · ρ at T = 273 K 3.27 107 1.67 1027 4.90 1028 i × × × ρ at T = 300 K 2.53 106 1.305 1024 2.90 1025 i × × × ρ at T = 423 K 3.16 103 1.21 1016 1.31 1017 i × × × ρ at T = 523 K 0.11 103 1.54 1012 1.18 1013 i × × × ρ at T = 723 K 2.25 3.92 107 2.01 108 i × × ρ at T = 873 K 3.58 10 1 3.20 105 1.37 106 i × − × × ρ at T = 1023 K 9.42 10 2 1.54 104 3.91 104 i × − × × ρ at T = 1523 K 6.39 10 3 15.51 38.18 i × − ρ at T = 1873 K 2.55 10 3 9.22 10 1 2.49 i × − × − ρ at T = 2223 K 9.80 10 4 1.58 10 1 4.03 10 1 i × − × − × −
One may observe that, the dependence of ρn on temperature is only through the mobil-
ity µn, while ND is constant. So, for any temperature less than the maximum junction
temperature TJmax, the resistivity of the extrinsic semiconductor can be controlled by
the doping concentration. However, beyond TJmax, the semiconductor loses its extrinsic
properties and the resistivity follows equation 2.18. The values for ρn can be calculated
as follows. From Table 1, consider the mobility of Si as µ = 1360 cm2/V s, mobility n · of SiC as µ = 900 cm2/V s, and mobility of GaN as µ = 2000 cm2/V s. Assume n · n · N = 10N = 10 5 1015 cm 3. Then the extrinsic resistivity are: for Si, ρ = 0.918 Ω cm, D J × × − · for SiC, ρ = 0.1.3872 Ω cm, and for GaN, ρ = 0.6242 Ω cm. Comparing these values with · · those of the intrinsic resistivity given in Table 2.5, one may make the following conclusion.
The extrinsic silicon semiconductor converts into an intrinsic semiconductor with conduc- tive properties only at around 750 K (= 473 ◦C), the extrinsic silicon carbide semiconductor becomes intrinsic and a good conductor at around 1800 K (= 1527 ◦C), and the extrinsic gallium nitride semiconductor becomes intrinsic, however remains a semiconductor up to
31 1010
108
106 cm) Ω ( i ρ 104
102
100
200 300 400 500 600 700 800 900 1000 T (K)
Figure 2.26: Resistivity ρi as a function of temperature T for silicon.
1030 cm)
Ω 20 (
i 10 ρ
1010
200 300 400 500 600 700 800 900 1000 T (K)
Figure 2.27: Resistivity ρi as a function of temperature T for silicon carbide.
around 2200 K (= 1927 ◦C).
32 1030 cm) Ω ( i 20 ρ 10
1010
200 300 400 500 600 700 800 900 1000 T (K)
Figure 2.28: Resistivity ρi as a function of temperature T for gallium nitride.
2.2 Figures-of-Merit for Semiconductor Materials
The operation of a power device in high-frequency applications highly depends on its ma- terial properties. It is demonstrated in [16] that high-frequency power devices should be fabricated based on the best material properties of semiconductors. The Figure of Merit
(FOM) assists to justify the betterness of one semiconductor material over the other as well as determine the applicability of each material in any application. Three major figure-of- merits, namely Johnson’s FOM, Baliga’s FOM, and Keyes FOM are discussed here for the three semiconductor materials.
The Johnson’s figure-of-merit (JFOM) is one of the most important metrics used to determine the high-frequency and high-power performance of transistors [17]. The Johnson
figure-of-merit takes into account the breakdown electric field EBD, and saturated electron
drift velocity vsat in defining a measure for the power handling capability at high frequencies.
This figure-of-merit can be used to compare different transistor-types based on power on
33 45
40 SiC GaN Si 35
30
25
20
Figure−of−Merit 15
10
5
0 BFOM KFOM JFOM
Figure 2.29: Comparison of the three FOMs for Si, SiC and GaN semiconductor materials. power and frequency specifications. The Johnson’s figure-of-merit is given as
E v JFOM = BD · sat , (2.21) 2π
where EBD is the breakdown voltage for semiconductors and vsat is the saturation velocity.
The Baliga figure-of-merit (BFOM) are used to determine the switching capabilities of transistors used in power electronic applications [16]. The BFOM uses the permittivity or the dielectric constant of the material ǫ, the band-gap energy Eg, and the mobility µ of the charge carriers. Since the BFOM depends on Eg, characterization of the device performance based on temperature can also be performed. The BFOM assumes the low- frequency operation of transistors, where the power loss in the transistors is mainly due to the conduction loss and the switching loss is negligible. Baliga’s figure-of-merit is given as
BFOM = ǫ ǫ µ E3 , (2.22) o · r · · BD where µ is the electron mobility.
34 The Keyes figure-of-merit (KFOM) can be used for evaluating the performance of the transistors used in power electronic and integrated circuits [18]. The KFOM combines the effect of the material’s heat dissipation capability λ and the saturated drift velocity vsat of the electrons. The saturated drift velocity of the electrons depends on various material properties such as geometry, mobility, and carrier concentration. Therefore, this figure-of- merit can be used to compare the transistor’s performance based on its thermal conductivity and its saturation velocity. The Keyes’s figure-of-merit is given as [18]
c v KFOM = λ · sat , (2.23) 4πǫ s
where λ is the thermal conductivity of material and c is the velocity of light. Figure 2.29
shows the BFOM, KFOM, and JFOM for comparison of silicon, silicon carbide, and gallium
nitride devices.
35 3 Characteristics of the Gallium Nitride Transistors
In this chapter, the characteristics of gallium nitride (GaN) transistors will be discussed using the physical properties of GaN discussed in Chapter 2. The characteristics of GaN
field-effect transistor (FET) will be compared with the silicon and silicon carbide FETs.
The differences in transistor properties, which makes GaN much promising as compared to its Si counterpart will be elaborated. The most important parameters for a transistor are the drain-to-source breakdown voltage VBD, on-resistance RDS(on), and the threshold
voltage Vt. The operating conditions of the power devices depend on these parameters, and
the analysis of the same is the focus of this Chapter.
3.1 Operation of GaN Transistors
In this Section, the physical operation of the gallium nitride field effect transistors is dis-
cussed. Primarily, similar to silicon transistors, the GaN devices can also be categorized
into (a) depletion mode (d-mode) and (b) enhancement mode (e-mode). While, the basic
functions of the two modes remain the same, few critical differences exist in terms of the
channel formation, reverse currents, and the electrical characteristics.
In the case of Si transistors, the channel required for the flow of electrons between the
source and the drain terminals is created by application of electric field at the gate terminal.
Consequently, by applying a positive charge at the drain terminal, the electrons are attracted
towards the drain, while the holes (or actual current) move towards the source terminal. In
essence, the width of the channel as well as its length is determined by the applied electric
field; the main reason for such transistors to be termed as “field-effect transistors”.
3.1.1 2D Electron Gas
In GaN devices, the channel is formed in the form of a 2-dimensional electron gas (2DEG)
layer. The 2DEG conduction layer is created due to the structural abnormalities, which
results in the charge generation. As discussed in Chapter 2, the hexagonal structure of
36 C:
:
Figure 3.1: The formation of 2DEG at the interface of GaN and AlGaN.
C:
:
Figure 3.2: Electrical field is generated by applying voltage on the terminals of the device resulting in flow of electrical current. gallium nitride leads to high conductivity. Strain is caused at the interface, when a thin layer of aluminum-gallium nitride (AlGaN) is grown on the GaN crystal. Application of electrical field at the interface induces a dense electron gas. This is called 2-dimensional electron gas (2DEG). The strain at the GaN/AlGaN junction decides the number of elec- trons in the gas. A large number of electrons confine near the interface of the GaN and
AlGaN because of which the electron mobility is very high near the interface. Figure 3.1 shows the formation of 2DEG at the interface of GaN and AlGaN. This is the basis of high conductivity of GaN [8]. Figure 3.2 shows that an electrical field is generated by apply- ing some potential on the terminals of the junction which results in flow of electrical current.
37 : V
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Figure 3.3: Structure of the depletion-mode with zero gate voltage (VG = 0).
3.1.2 Depletion-Mode Structure of GaN FET
The depletion-mode field effect transistors (FET) are commonly termed as “normally ON” devices. In depletion-mode FET, the channel is conductive and high current flows between the drain and source with zero gate voltage (VGS = 0 V). Figure 3.3 shows the GaN FET with zero gate voltage. Electrons flow constantly between source and drain terminals until the 2DEG is depleted. In other words, a gate-to-source voltage is essential in order to deplete the 2DEG and turn the FET off. A negative bias at the gate of a n-channel device and a positive bias at the gate of a p-channel device reduces the electron flow in the channel.
Conduction ceases by increasing the negative gate-to-source voltage until threshold voltage
(Vt) is reached. Since at zero gate-to-source voltage the electrons flow along the interface of GaN and AlGaN, the GaN FET is normally-on device. Figure 3.4 shows the GaN FET with a negative gate voltage.
3.1.3 Enhancement-Mode Structure of GaN FET
The enhancement-mode field effect transistors are commonly termed as “normally OFF” devices. In enhancement-mode FET, the channel is non-conductive, when the gate-to-source voltage (VGS) is zero. Figure 3.5 shows the GaN FET with zero gate voltage. The current
flows in the channel only when a gate-to-source voltage applied is higher than threshold voltage Vt. A positive voltage at the gate of a n-type and a negative voltage at the gate of
38 : V
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Figure 3.4: Structure of the depletion mode with negative gate voltage (VG < 0).
: V
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Figure 3.5: Structure of the enhancement-mode with zero gate voltage (VG = 0). p-type FET repels the holes away from the channel and let the electrons flow. By increasing the positive voltage at gate reduces the resistance of channel which in turn increases the conduction of current. Figure 3.6 shows the GaN FET with a positive gate voltage.
Enhancement-mode FETs are preferred over depletion-mode FETs because the channel
is non-conducting at zero gate-to-source voltage unlike in depletion-mode where channel
conducts at zero gate-to-source voltage. In depletion-mode transistors, a negative gate
voltage must be applied to the device at times to keep it turned off, which makes its
operation inconvenient. In order to make a depletion-mode FET work as an enhancement-
39 : V
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Figure 3.6: Structure of the depletion-mode with positive gate voltage (VG > 0). mode FET, cascode structure is being used by many researchers. The following section discusses in brief the physical implementation of the cascoded GaN structure.
3.1.4 Cascode-Configured Structure of GaN FET with Si MOSFET
Depletion-mode or normally-on feature of GaN HEMT is usually not desirable in many applications due to less efficient, complicated, and expensive circuitry [19]. The driving voltage for depletion-mode GaN HEMT is negative. A normally-off silicon MOSFET can be cascoded in series with normally-on GaN HEMT to make it operate as normally-off. A very low voltage MOSFET is sufficient to turn the GaN transistor on at very high frequencies
[20]. The cascode-configured depletion-mode GaN with enhancement-mode Si MOSFET is as shown in Figure 3.7. On applying the gate potential with a positive value, the drain-to- source voltage of the silicon MOSFET is negative and turns the d-mode GaN transistor ON.
When the gate potential goes low, the drain-to-source voltage of the silicon MOSFET is positive and turns the d-mode GaN transistor OFF. Thus, the gate-drive circuitry controls the turn on/off of the silicon MOSFET. However, since the silicon-based transistors are limited to only few megahertz of operating frequency, the cascode d-mode GaN transistor becomes poor choice for high frequency applications.
40
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¤
§¤
§ ¦
¢£¤¢ ¥¦§ ¦¢¨ U
¥ ¢
§¤
0
! ! "#
U R 0 © R
Figure 3.7: Implementation of the cascode-configuration of depletion-mode gallium nitride FET with enhancement-mode silicon MOSFET.
3.2 Device Parameters
Several device parameters are used to characterize the different transistors. In this thesis, the two main device parameters, namely breakdown voltage and the on-resistance of the transistors are determined and its comparison with the silicon transistors is performed.
3.2.1 Breakdown Voltage
The breakdown voltage in transistors depend on transistor geometry, structure, and break down electric field EBD of semiconductor material. The transistor breaks down above critical or breakdown electrical field. The breakdown electric field of GaN is much higher than that of Si which makes GaN devices withstand higher voltages. The breakdown voltage
VBD is directly proportional to the critical electric field EBD and to the drift region width wd and can be approximated as [8]
1 V w E . (3.1) BD ≈ 2 d · BD
The drift region width can be expressed as
ǫrǫ0EBD wd = , (3.2) qND
41 Gate Source Source
Source Gate Drain
On-Resistance electrons flow electrons flow
On-Resistance
Drain Gallium Nitride FET
Silicon MOSFET
Figure 3.8: Size comparison of silicon and gallium nitride FET.
where ǫr is the relative permittivity of the material, ǫ0 is the absolute permittivity, q is
charge of electrons (1.6 10 19 C), and N is the donor concentration. For GaN and Si × − D transistors with the same breakdown voltage and equal doping concentration, the ratio of
the drift region for silicon and gallium nitride FETs is given by
5 wd(GaN) EBD(Si) 2 10 1 = = × . (3.3) w E 35 105 ≈ 18 d(Si) BD(GaN) × For the same breakdown voltage, the width of drift region of GaN semiconductors can
be significantly smaller than that of their Si counterparts, which notably reduces the size of
GaN devices. Figure 3.8 shows the comparison of physical size of gallium nitride FET with
silicon MOSFET. The reduced size of FET lowers the parasitic capacitance which in turn
improves its switching speed. The high critical electric field allows GaN devices to operate
at higher voltages and lower leakage currents.
42 3.2.2 On-Resistance of a Transistor
The on-resistance RDS(on) is the internal dc resistance offered by the FET in conducting
state between the drain to source terminals i.e. with VGS > Vt for enhancement-mode and
VGS = 0 for depletion-mode. The on-resistance RDS(on) is a very important parameter of a
device to decide the device’s operation. The resistance of the drift region is given as [13]
wd ρn wd Rdr = × = , (3.4) A qµnNDA where wd is the width of the drift region, ρn is the resistivity of the drift region, and A
is the area of the device. Also, the on-resistance can be expressed as the product of drift
region resistance and area of the device as [13]
2 4VBD RDS(on) = A Rdr = 3 . (3.5) × ǫoǫrµnEBD
The on-resistance RDS(on) of the power device is inversely proportional to the cube of the electrical breakdown and electron mobility, thus resulting in low conduction resistance. In other words, GaN devices have an on-resistance approximately 3 times lower than that of Si devices theoretically. Figures 3.9, 3.10 and 3.11 show the on-resistance RDS(on) as a function of breakdown voltage VBD for silicon, silicon carbide, and gallium nitride, respectively. From
these figures, the magnitude of increase in the specific on-resistance of the different devices
with variation in the breakdown voltage can be determined. For Si transistors, higher
breakdown voltage results in a higher on-resistance. The resistance increases to the order
few kΩ for devices with V 10 kV. In contrast, the SiC and GaN transistors exhibit very BD ≥ low on-resistances at these voltages. For SiC transistors, the on-resistance is approximately
20 Ω at a VBD = 10 kV and is approximately 0.5 Ω at the same breakdown voltage for the
GaN devices.
The on-resistance of drift region wd increases as the temperature rises. The following
expression gives the specific-on resistance as a function of temperature as [13]
4V 2 T 2.4 R = BD . (3.6) DS(on) 3 300 ǫoǫrµnEBD
43 4 10
3 10
2 10 ) 2
1
cm 10 Ω (
0 10 DS(on) R −1 10
−2 10
−3 10 1 2 3 4 10 10 10 10 V (V) BD
Figure 3.9: Plot of specific on-resistance RDS(on) as a function of breakdown voltage VBD for silicon.
1 10
0 10
−1 10 ) 2
−2
cm 10 Ω (
−3 10 DS(on) R −4 10
−5 10
−6 10 1 2 3 4 10 10 10 10 V (V) BD
Figure 3.10: Plot of specific on-resistance RDS(on) as a function of breakdown voltage VBD for silicon carbide.
44 −1 10
−2 10 ) 2
cm −3 Ω
( 10
DS(on) −4 10 R
−5 10
−6 10 1 2 3 4 10 10 10 10 V (V) BD
Figure 3.11: Plot of specific on-resistance RDS(on) as a function of breakdown voltage VBD for gallium nitride.
Figures 3.12, 3.13 and 3.14 show the on-resistance RDS(on) as function of temperature
T . This is an important characteristic since most of the electronic applications are subject
to change in temperature. As can be seen from these figures, the resistance increases with
increase in the temperature, which is an obvious effect similar to conductors. However, The
magnitude of increment in the resistance is very minimal in the GaN transistors as opposed
to the Si and SiC-based devices. Thus, the GaN transistors along with SiC-based devices
are the best choices for high temperature applications.
3.2.3 On-Resistance of GaN Transistor
There are several resistive elements in the transistors which sum up to give the device’s on-
resistance RDS(on) such as gate region, channel, and parasitic elements. RDS(on) varies with
variation in temperature. Figure 3.15 shows the main resistances which give the RDS(on) of
the transistor. The resistance of the 2DEG layer is given as [8]
45 2 10 ) 2 cm Ω (
DS(on) 1
R 10
100 150 200 250 300 350 400 450 500 T (K)
Figure 3.12: Plot of specific on-resistance RDS(on) as a function of temperature T for silicon transistors.
−1 10 ) 2 cm Ω (
DS(on) R
−2 10
100 150 200 250 300 350 400 450 500 T (K)
Figure 3.13: Plot of specific on-resistance RDS(ON) as a function of temperature T for silicon carbide transistors.
46 −1 10 ) 2 cm Ω (
DS(on) R
−2 10
100 150 200 250 300 350 400 450 500 T (K)
Figure 3.14: Plot of specific on-resistance RDS(on) as a function of temperature T for gallium nitride transistors.
L(2DEG) R(2DEG) = , (3.7) qµ(2DEG)N(2DEG)W(2DEG)
where µ(2DEG) is the mobility of electrons at the interface of GaN and AlGaN, N(2DEG) is
the carrier concentration of electrons in 2DEG, W(2DEG) is the width of 2DEG, and L(2DEG) is the length of 2DEG. RDS(ON) of GaN HEMT can be expressed as
RDS(on) = 2RC + R(2DEG) + RP . (3.8)
Due to the high concentration of electrons and high electron mobility at the GaN/AlGaN
interface, GaN material makes excellent and attractive transistors. Next section discusses
the performance measures for GaN, SiC, and Si devices in terms of figure-of-merit.
3.3 Static and Dynamic Characteristics of GaN FET
This section discusses the electrical characteristics of the gallium nitride field-effect transis-
tor used in electronic applications. A commercially available transistor namely EPC2020 is
47 : V
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Figure 3.15: Different resistive elements, which constitute on-resistance RDS(on) in GaN HEMT. selected as the device-under-test. The transistor is rated to withstand a maximum voltage stress of 60 V and a maximum current stress of 40 A [8]. The device is capable of operating at frequencies as a high as 15 MHz. The on-state resistance, parasitic capacitance, and the turn-off turn-off times are very small and is a suitable candidate for high-voltage, high switching frequency power electronic applications. First the dc analysis on this transistor is performed and then the ac analysis is conducted by considering the first-order capacitance model of the transistor.
3.3.1 DC Characteristics of GaN FET
The DC analysis of GaN FET is carried by utilizing EPC2020 GaN HEMT. Using SPICE model of EPC2020, the schematic shown in Figure 3.16 is simulated on SABER simulator.
The value of the drain resistor RD = 10 Ω. The drain-to-source voltage VDS (or its power supply VDD) is fixed and the gate-to-source voltage is varied from 0.5 V to 5 V. The drain current iD is plotted using the simulation tool and the activity is repeated for different values of VDS. Figure 3.17 shows simulation results of the drain current as a function of the gate-to-source at different levels of VDS. The threshold voltage Vt is measured as approximately 1.5 V. The measured trans-conductance g 5 A/V. It can be seen that all m ≈ the curves saturate at V 2 V due to the velocity saturation effect. GS ≈
48 U 0 Z
Figure 3.16: Circuit to analyze the DC characteristics of EPC2020 GaN HEMT.
The analysis is then performed to obtain the iD vs. vDS characteristics or the output characteristics of the EPC2020 e-mode GaN FET. The dc input voltage supply VDD is varied over from 0 to 3 V to observe the trend of the curve for different fixed values of the gate-to-source voltage VGS. Figure 3.18 shows the drain current as a function of drain-to- source voltage at different fixed values of VGS. At lower VDS values lower than VGS Vt , − the transistor is in the linear mode and the drain-to-source conductance or the output trans-conductance gds is approximately 500 1/Ω. Thus, the drain-to-source resistance or the on-resistance can be estimated as rds = 1/gds = 2 mΩ. This value matches with that of the data-sheet provided in [8].
3.3.2 Small-Signal Model of GaN FET
The small-signal model is used to determine the frequency-domain characteristics of a de- vice or a circuit. The small-signal characteristics are evaluated around pre-described DC operating point. Figure 3.19.a shows the symbol of a MOSFET along with its parasitic capacitances, namely gate-to-source capacitance Cgs, drain-to-source capacitance Cds, and gate-to-drain capacitance Cgd. Figure 3.19.b shows the equivalent model of the MOSFET with gm as the small signal trans-conductance and ro as the output resistance. Figure 3.19.c shows the modified equivalent small-signal model obtained using Miller’s theorem. Figure
49 iue31:Dancurrent Drain 3.18: Figure current Drain 3.17: Figure V V DS GS . .
iD (A) iD (A) 100.0 200.0 300.0 400.0 500.0 600.0 700.0 800.0 900.0 1.0k 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0.0 0.5 0.0 0.2 1.0 0.4 i i D D 0.6 1.5 safnto fdrain-to-source of function a as safnto fgate-to-source of function a as 0.8 2.0 1.0 1.2 2.5 vGS(V) 1.4 vDS(V) 50 1.6 3.0 1.8 3.5 2.0 2.2 4.0 2.4 2.6 4.5 2.8 v v GS DS 5.0 3.0 iD (VDD=45V) iD (VDD=45V) iD (VDD=30V) iD (VDD=15V) iD (A) iD (VGS=5V) iD (VGS=4V) iD (VGS=3V) iD (VGS=2V) iD (A) o ieetvle of values different for o ieetvle of values different for : : vGS (V) vDS (V)
$R R $
^:_
$R U U
0$ 0 R Z $ $I0$ R `Q Z
^G_
U U
0$ 0 R Z $ $I0$ R `Q Z ^H_
U U 0 0 $ R Z 1 $I0$ Q `Q Z
^R_
Figure 3.19: Symbol and small-signal model of a transistor. (a) Symbol of transistor with parasitic capacitances. (b) Low-frequency small-signal model of the transistor. (c) Small-signal equivalent model obtained using Miller’s theorem with drain-to-source termi- nals short-circuited. (d) Small-signal equivalent model with lumped capacitances.
51 3.19.d shows the final modified small-signal with lumped capacitances.
The dynamic characteristics of enhancement-mode power transistor are evaluated us- ing EPC2020 GaN HEMT. From the data-sheet of enhancement-mode power transistor
EPC2020, the parasitic parameters obtained are given in Table 3.1.
The gate-to-source capacitance Cgs is
C = C C = 1.8 0.031 = 1.769 nF. (3.9) gs iss − rss −
The gate-to-drain capacitance Cgd can be calculated using
Cgd = Crss = 0.031 nF. (3.10)
The drain-to-source capacitance Cds is
C = C C = 1.1 0.031 = 1.069 nF. (3.11) ds oss − rss −
By assuming gm to be equal to 5 (A/V) and RD = 500 Ω (section 3.3.1), transistor gain
Avo can be expressed as
A = g R′ , (3.12) vo − m · D where R is the equivalent parallel resistance of R r . Since r R , R can be D′ D|| o o ≫ D D′ approximated as equal to RD. Hence equation 3.12 can be written as
A = g R = 5 500 = 2500. (3.13) vo − m · D − × −
Table 3.1: Properties of EPC2020 Parameter Value
Input Capacitance Ciss 1.8 nF
Output Capacitance Coss 1.1 nF
Reverse Transfer Capacitance Crss 31 pF
Gate Resistance RG 0.3 Ω
Gate Charge QG 16 nC
52 The equivalent capacitances C1 and C2 (see Figure 3.19.c), can be calculated as
C = C (1 A ) = 0.031 [1 ( 2500)] = 77.53 nF, (3.14) 1 gd − vo × − − and 1 1 C = C 1+ = 0.031 1+ = 31.041 pF. (3.15) 2 gd A 650 vo ×
Further, the input and output capacitances Ci and Co (see Figure 3.19.d), can be cal- culated as
Ci = C1 + Cgs = 79.29 nF. (3.16)
Co = C2 + Cds = 1.1 nF. (3.17)
The poles of the transfer function due to the input ad output capacitances can be calculated as follows
1 1 f = = = 6.69 MHz, (3.18) p1 2πr C 2 π 0.3 21.95 10 9 g i × × × × − and 1 1 f = = = 289.36 kHz. (3.19) p2 2πR C 2 π 500 1.1 10 9 D′ o × × × × − Based on the above analysis, the small-signal voltage gain of the transistor is of the form
vds gmRD′ Av = . (3.20) vgs − [s + (2πfp1)][s + (2πfp2)]
The magnitude and phase of the voltage gain Av are plotted as a function of frequency
using MATLAB. The magnitude and phase plots are shown in figures 3.20 and figure 3.21,
respectively. The dominant pole is at fp2 = 289.36 kHz and the unity-gain crossover fre-
quency fT = 69.4 MHz.
53 80
60
40
20 X: 6.94e+07 (dB) Y: 0.000758
|Av| 0
-20
-40
-60 104 105 106 107 108 109 f (Hz)
Figure 3.20: Magnitude plot of the small-signal voltage gain Av of EPC2020 GaN HEMT.
180
160
140
120
) 100 o ( Av
φ 80
60
40
20
0 104 105 106 107 108 109 f (Hz)
Figure 3.21: Phase plot of the small-signal voltage gain Av of EPC2020 GaN HEMT.
54 4 Synchronous Buck Converter Using GaN Transistors
Various applications of gallium nitride (GaN) power devices are discussed in [21] - [27] in detail. DC-DC power converters are used in many applications such as power supplies for computers, telecommunication systems, portable applications, battery chargers, radio- frequency power amplifiers, and medical devices, etc. In these converters, the output voltage is regulated using the pulse-width modulation (PWM) technique. In PWM converters, the transistor behaves as a switch, which turns ON and OFF at a switching frequency fs. The switching frequency depends on the material properties of the semiconductor.
Because of high breakdown voltage and high carrier mobility, the GaN transistors can realize high switching frequency operation at low switching losses. In addition, the size of
GaN transistors get smaller at high switching frequencies. Analysis of such properties can be performed on the circuit level. This chapter focuses on the analysis of the performance of GaN transistors in a PWM synchronous buck dc-dc converter operating at frequencies in the megahertz range. Detailed circuit operation, design, and performance evaluation of the GaN-based synchronous buck converter are presented in this Chapter.
4.1 PWM Synchronous Buck DC-DC Converter
In power converters, there is a high demand to increase the switching frequency and to reduce the size of the converter. Gallium nitride transistors are fully capable of fulfill- ing these objectives because of their outstanding material properties as mentioned in the
U R
Figure 4.1: Circuit diagram of the synchronous buck dc-dc converter.
55 earlier chapters. In [25], 96% efficiency is achieved for dc-dc boost power converter using enhancement-mode GaN FET. The ability of GaN transistors in switched-capacitor cir- cuits for high efficiency performance is well described in [26]. In [27], comparison of GaN transistors with silicon transistors are presented to evaluate the performance of LLC reso- nant converters. In this thesis, synchronous buck dc-dc converter with GaN transistors as switches is utilized for frequency and efficiency analysis.
4.1.1 Circuit Description
Figure 4.1 shows the circuit diagram of the synchronous buck dc-dc converter. The circuit consists of two power MOSFETs, an inductor, a capacitor, and a dc load resistor. As shown in Figure 4.1, M1 and M2 are the high-side and low-side MOSFETs, respectively, L is the
inductor, C is the capacitor, and RL is the load resistor. The buck converter is a step-down converter. A pulse-width modulator controls both the transistors in complimentary fashion by turning the transistors ON and OFF at a switching frequency fs or a switching period
T = 1/fs. The operation of the PWM synchronous buck converter is explained in detail in
[13]. For an ideal buck converter, the voltage transfer ratio MV DC of the output voltage
VO to the input voltage VI is the duty cycle D given as D = VO/VI . The longer the switch
must be kept ON, the higher is the required D. After a time interval DT , When the switch
M1 is closed, current flows through the inductor L and charges it to feed the load resistance
RL. When the switch M1 is turned OFF and low-side switch M2 is turned ON to provide
a path for the inductor to discharge its energy through the load. This operation ensures
a continuous current flow to the load. Synchronous operation of buck converter is more
efficient than the operation of conventional converter because replacing the diode with a
MOSFET reduces the conduction losses.
4.1.2 Circuit Design
The following analysis considers the following assumptions:
56 The reactive components are ideal, i.e., their the parasitic resistances do not vary with • temperature and frequency.
The converter is operating in steady state. •
The switching period T = 1/f is much shorter than the time constants of reactive • s components.
The average current through the inductor is equal to the current into the load. The
ripple in the inductor current is the change in the current as the switches turn ON an OFF.
The maximum inductor current ripple is
VO(1 Dmin) ∆iLmax = − , (4.1) fsLmin where Dmin is the minimum value of duty cycle, Lmin is the minimum value of inductance
required to keep the inductor current above zero and VO is the output voltage of the buck
converter.
The minimum inductance required for CCM operation is [13]
VO(1 Dmin) RLmax(1 Dmin) Lmin = − = − . (4.2) 2fsIOmin 2fs
The minimum value of capacitance is
D 1 D C = max max , − min , (4.3) min 2f r 2f r s C s C
where rC is the parasitic resistance of the capacitor, Dmin is the minimum value of the duty cycle, and Dmax is the maximum value of duty cycle.
The dc voltage transfer function of the buck dc-dc converter is
VO MV DC = = D. (4.4) VI
In reality, the components are imperfect and exert detrimental effect on the circuit
operation. Hence, for a lossy converter the equation (4.4) becomes
VO MV DC = = ηD. (4.5) VI
57 In equation 4.5, η is the efficiency and is expressed as
N η = η , (4.6) Dη
where r R r r N =1+ M C L DS1 − DS2 η V DC 6f 2L2 R s − L r R r r 2 + 1+ M C L DS1 − DS2 V DC 6f 2L2 R ( s − L M 2 r R r + r V DC C L 1+ DS2 L 3f 2L2 R − s L 1 2 2 MV DC rC RL fsCoRL rC RL 2 2 2 + 2 2 , (4.7) − 3fs L MV DC 12fs L !)
rDS2 + rL fsCoRL rC RL Dη = 2 1+ + 2 + 2 2 , (4.8) RL MV DC 12fs L ! where rL is the equivalent series resistance (ESR) of the inductor, rDS1,rDS2 are the on-
state resistances of the high-side and low-side transistors, respectively, D is the duty cycle,
RL is the load resistance, rC is the ESR of the capacitor, VO is the output voltage, fs is
the switching frequency, and Co1, Co2 are the output capacitances of the MOSFET. From
equation (4.6) it can be seen that the efficiency of the converter depends on the switching
frequency.
The voltage and current stresses of the transistors are expressed as
VSMmax = VImax, (4.9)
and
VO(1 Dmin) ISMmax = IOmax + − . (4.10) 2fsL
The following section presents a design example and the required components and their
values are estimated. Also, component selections are made based on the predicted current
and voltage stresses, which is a starting point for the simulations.
58 Table 4.1: Minimum inductance and capacitance values for the designed synchronous buck dc-dc converter fs Inductance Lmin(µH) Capacitance Cmin(µF) 100 kHz 28.0612 61.111 1 MHz 2.8061 6.1111 10 MHz 0.2806 0.6111 15 MHz 0.1871 0.4074
4.1.3 Design Example
A synchronous buck dc-dc converter is designed for the following specifications: input volt- age VI = 12 V, output voltage VO = 6 V, minimum output current IOmin = 0.7 A, maximum
output current IOmax = 1.5 A, and maximum output power POmax = 9 W. The reactive
component values are estimated at different switching frequencies. The minimum values of
the inductance and the capacitance at different selected frequencies obtained using equations
(4.2) and (4.3) are given in Table 4.1. The duty cycle is
V 6 D = O = = 0.5 (4.11) VI 12
The converter is designed to operate in the continuous-conduction mode and its analysis in
the discontinuous-conduction mode is not within the scope of this thesis.
Using the expressions for the voltage stress, it can be found that VSMmax = 12 V and
Figure 4.2: Circuit schematic for dc-dc synchronous buck converter on SABER circuit simulator
59 the maximum current stress occurs at the lowest switching frequency given by
6 (1 0.5) I = 1.5+ × − = 2.03 A (4.12) SMmax 2 100 103 28.06 10 6 × × × × − In this thesis, the EPC2020 enhancement-mode GaN power field-effect transistor by Effi- cient Power Conversion [8] is realized as the perfect candidate, which is capable of withstand- ing the predicted voltage and current stresses given above. The maximum drain-to-source voltage for EPC2020 is VDSM(max) = 60 V, the maximum drain current is IDM(max) = 60 A,
and on-resistance rDS = 2 mΩ. The different specifications of EPC2020 are given in [8] in
detail. The output capacitance Co of EPC2020 is equal 1.069 nF. Due to such a low value of the output capacitance, its transient response is very high leading to efficient operation at high switching frequencies. The switching losses of this transistor are also very small. A few of the applications of EPC2020 include high-frequency dc-dc conversion, rectification, and audio-amplifiers.
The Spice model EPC2020 was procured from the manufacturers website [8] and con-
verted to use with SABER circuit simulation software. Circuit simulations are performed
for the synchronous buck converter at different switching frequencies in order to evaluate
the its efficiency and power losses. The following section presents the simulation results
for synchronous buck converter using EPC2020 GaN transistor for different frequencies and
one test case with silicon MOSFET for comparison. Figure 4.3 shows the plot of efficiency
as a function of frequency.
Before the validation is made through simulation, a theoretical plot of the variation
in the efficiency as a function of the switching frequency can be observed. Let us assume
the following values for the parasitic components and are equal for all the frequencies:
rL = 0.11 Ω, rC = 0.02, rDS1 = rDS2 = 2 mΩ, and Co1 = Co2 = 1.069 nF. Then using
equation 4.6, the overall efficiency as a function of the switching frequency varies as shown
in Figure 4.3.
60 95
90 (%) η 85
80
5 6 7 10 10 10 f (Hz) s
Figure 4.3: Theoretically obtained plot of efficiency as a function of switching frequency for the synchronous buck dc-dc converter.
(V) : t(s)
8.0
M1_VGS
6.0
4.0 (V)
2.0
0.0
(V) : t(s)
15.0
M1_VDS
10.0 (V)
5.0
0.0
1.6m 1.605m 1.61m 1.615m 1.62m
t(s)
Figure 4.4: Simulation results of gate-to-source voltage vGS and drain-to-source voltage vDS for switch M1 at 100 kHz.
61 iue45 iuainrslso aet-orevoltage gate-to-source of results Simulation 4.5: Figure H,ad1 H.Smlto eut ftegt-osuc volt gate-to-source the of results Simulation MHz. freque 15 at and simulated MHz, is circuit The simulator. circuit SABER o switch for stebekpit eodwihpoe n ffiin operatio efficient and wa proper questionable. the which of beyond shapes point, break normal the the as from indicator deviation good Any very are converter. transistors the the of d current p voltage, drain gate-to-source output the the the of when waveforms decreased the limit that the envisaged or small very out are the levels when increased, specifications be may the limit once frequency switching differ the may results these that noted be for converter buck synchronous the in f used switching when the transistor, determine to is section this of intention The Results Simulation 4.1.4 voltage iue42sosteshmtco h ycrnu ukd-cc dc-dc buck synchronous the of schematic the shows 4.2 Figure v DS M o MOSFET for 2 t10kHz. 100 at
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(A) (V) (V) (V) iue41 hw h aet-orevoltage gate-to-source the shows 4.13 Figure , 10.0 15.0 0.0 1.0 2.0 3.0 5.0 6.0 7.0 8.0 4.245m 0.0 5.0 0.0 2.0 4.0 6.0 8.0 4.245m M 2 4.2465m 10 n iue41 hw h nutrcurrent inductor the shows 4.14 Figure and , 4.2455m MHz: 4.248m 4.246m t(s) t(s) 65 4.2495m 4.2465m i v L GS v n uptvoltage output and GS ri-osuc voltage drain-to-source , n ri-osuc voltage drain-to-source and 4.251m 4.247m v (V) iL (A) VO M2_VDS (V) M2_VGS (V) GS %. : : : : ri-osuc volt- drain-to-source , t(s) t(s) t(s) t(s) V i O L t1MHz. 1 at n output and v DS v DS for iue41:Smlto eut fgt-osuc voltage gate-to-source of results Simulation 4.12: Figure v DS iue41:Smlto eut fiptpower input of results Simulation 4.11: Figure o MOSFET for voltage icag.Teecec ftecnetra hsfeunyi frequency this at converter the of efficiency whic The transistors, discharge. the of capacitance output times the of fall effect and the rise lower exhibit ga voltage the drain-to-source However, the frequency. switching this at degree certain V O tfeunyo 0Mz.Tesae ftewvfrsaeretain are waveforms the of shapes The . MHz 10 of frequency at
M (V) (V) (W) (W) 10.0 15.0 −30.0 −20.0 −10.0 1 0.0 5.0 0.0 2.0 4.0 6.0 8.0 10.0 0.0 6.8 7.0 7.2 7.4 781.6u t1 MHz. 10 at 4.52m Ave: 7.1676 Ave: −7.3887 781.65u 781.7u 4.522m t(s) t(s) 66 P 781.75u I n uptpower output and v GS 4.524m 781.8u n ri-osuc voltage drain-to-source and eur ucettm to time sufficient require h rud81 around s PI (W) PO (W) M1_VGS (V) M1_VDS (V) hsi anydeto due mainly is This . et-orevlaeand voltage te-to-source : : : : t(s) t(s) t(s) t(s) P O . t1MHz. 1 at % n may One 4%. dt a to ed iue41:Smlto eut fgt-osuc voltage gate-to-source of results Simulation 4.13: Figure v iue41:Smlto eut fidco current inductor of results Simulation 4.14: Figure DS o MOSFET for rqec olne niae h omlbhvo ftetra the of behavior normal the th indicates of longer waveforms no voltage frequency and current the specificat that the predicted view be can in tra keeping the reduce, where drastically is MHz to 10 begins of frequency switching a that conclude
(A) (V) M (V) (V) 10.0 15.0 0.0 1.0 2.0 3.0 5.0 6.0 7.0 8.0 2 0.0 5.0 0.0 2.0 4.0 6.0 8.0 944.5u 781.6u t1 MHz. 10 at 944.6u 781.65u 944.7u 781.7u t(s) t(s) 67 944.8u 781.75u i L 944.9u n uptvoltage output and v GS 781.8u n ri-osuc voltage drain-to-source and 945u oso h ovre.It converter. the of ions (V) iL (A) VO (V) M2_VGS (V) M2_VDS nsistor. : : : : wthsbyn this beyond switches e t(s) t(s) t(s) t(s) sso performance nsistor V O t1 MHz. 10 at iue41:Smlto eut fgt-osuc voltage gate-to-source of results Simulation 4.16: Figure v DS 4. iue41:Smlto eut fiptpower input of results Simulation 4.15: Figure o MOSFET for iuainRslsat Results Simulation iue41 hw h aet-orevoltage gate-to-source the shows 4.16 Figure MOSFET osuc voltage to-source current i L M n uptvoltage output and 1
M (V) (V) (W) (W) 10.0 15.0 t1 H.Fgr .7sostegt-osuc voltage gate-to-source the shows 4.17 Figure MHz. 15 at −30.0 −20.0 −10.0 1 0.0 5.0 0.0 2.0 4.0 6.0 8.0 7.14 7.16 7.18 10.0 7.2 0.0 155.2u t1 MHz. 15 at 861.8u v DS Ave: −8.8101 Ave: 7.1716 o MOSFET for 155.232u 15 MHz V O : 155.264u tfeunyo 5Mz.I a ese that seen be can It . MHz 15 of frequency at M t(s) 862u t(s) 68 2 t1 H.Fgr .8sosteinductor the shows 4.18 Figure MHz. 15 at 155.296u P I v n uptpower output and GS ri-osuc voltage drain-to-source , v 155.328u GS 862.2u n ri-osuc voltage drain-to-source and PI (W) PO (W) M1_VGS (V) M1_VDS (V) : : : : t(s) t(s) t(s) t(s) P O t1 MHz. 10 at v GS v drain- , DS for iue41:Smlto eut fgt-osuc voltage gate-to-source of results Simulation 4.17: Figure v iue41:Smlto eut fidco current inductor of results Simulation 4.18: Figure DS o MOSFET for h aeom ftegt-osuc voltage gate-to-source the of waveforms the odcinmd n h uptvlaei sepce.How expected. 70 as be V to measured 6 curre is is inductor voltage The output the MHz. and 15 mode conduction at distorted are switches the both npeiu ae flwfeunis h wthn osare loss switching The frequencies. low of cases previous in
(A) (V) M (V) (V) 10.0 15.0 0.0 1.0 2.0 3.0 5.0 6.0 7.0 8.0 2 0.0 5.0 0.0 2.0 4.0 6.0 8.0 164.4u 155.2u t1 MHz. 15 at . 9,wihi eypo scmae oteecece calcula efficiencies the to compared as poor very is which 99%, 155.232u 164.5u 155.264u 164.6u t(s) t(s) 69 v 155.296u GS 164.7u i L n ri-osuc voltage drain-to-source and , n uptvoltage output and v GS 155.328u 164.8u n ri-osuc voltage drain-to-source and (V) iL (A) VO M2_VDS (V) M2_VGS (V) eyhg eutn na in resulting high very : : : : t(s) t(s) t(s) t(s) ti ncontinuous in is nt vr h efficiency the ever, V O t1 MHz. 15 at v DS ted of 5. iue41:Smlto eut fiptpower input of results Simulation 4.19: Figure eue ffiiny h wthn osi xrse s[13] as expressed is loss switching The efficiency. reduced where voltage iuainRslsfrSnhoosBc ovre ihSlcnMO Silicon with Converter at FETs Buck Synchronous for Results Simulation MOSFET. bu silicon synchronous for results simulation recomme the not presents is section MHz o 10 beyond can operation transistor an GaN However, EPC2020 quencies. ca that frequency concluded in is increase It further Any breakdown. linear. be to assumed is icse eo.Fgr .0sostegt-osuc voltag gate-to-source the shows 4.20 Figure r different the and below. repeated discusses is activity alr The the IRF540. by of replaced models are transistors GaN The synch MOSFETs. the silicon for obtained are results simulation of set Similar f s v DS stesicigfeunyand frequency switching the is 5 MHz o iio MOSFET silicon for
(W) (W) −30.0 −20.0 −10.0 10.0 7.15 7.25 0.0 7.1 7.2 : 183u Ave: −10.088 Ave: 7.1617 M P 1 SW n iue42 hw h aet-orevoltage gate-to-source the shows 4.21 Figure and , t(s) 70 C = o f sotu aaiac fatasso,which transistor, a of capacitance output is s C P O I V n uptpower output and I 2 , oosbc ovre with converter buck ronous kcnetruigIRF540 using converter ck PI (W) PO (W) : : e slsaeotie as obtained are esults sstetasso to transistor the uses t(s) t(s) v ayaalbeSpice eady-available dd h following The nded. GS eaea ihfre- high at perate P O drain-to-source , t1 MHz. 15 at (4.13) S- iue42:Smlto eut fgt-osuc voltage gate-to-source of results Simulation 4.21: Figure voltage gate-to-source of results Simulation 4.20: Figure v v DS DS o iio MOSFET silicon for MOSFET silicon for hw h nutrcurrent inductor the shows power tcnb enta h aeom ftedant-orevoltag drain-to-source the of waveforms the that seen be can It v GS ri-osuc voltage drain-to-source , P I n uptpwrwt iio MOSFET silicon with power output and
(V) (V) (V) (V) −10.0 −10.0 10.0 20.0 10.0 20.0 0.0 0.0 2.0 4.0 6.0 8.0 0.0 0.0 2.0 4.0 6.0 8.0 366.6u 366.6u M M 2 1 t5MHz. 5 at MHz. 5 at i 366.7u 366.7u L v n uptvoltage output and DS ihslcnMOSFET silicon with 366.8u 366.8u t(s) t(s) 71 366.9u 366.9u V O P n iue42 hw h input the shows 4.23 Figure and , v v O GS GS t5MHz. 5 at 367u 367u n ri-osuc voltage drain-to-source and voltage drain-to-source and M M1_VDS (V) M1_VGS (V) M2_VDS (V) M2_VGS (V) 2 : : : : t5Mz iue4.22 Figure MHz. 5 at t(s) t(s) t(s) t(s) e v DS fbt the both of iue42:Smlto eut fidco current inductor of results Simulation 4.22: Figure iue42:Smlto eut fiptpower input of results Simulation 4.23: Figure wthsaecmltl itre t5Mz h uptvolta output The MHz. 5 at distorted completely are switches rvsta iio rnitr r a hie o high-fre for choices bad hig are even transistors the silicon at that transistor proves GaN with whi converter 48%, the be of to measured efficiency is converter the of efficiency the Also,
(W) (W) (A) (V) 0.0 1.0 2.0 3.0 5.0 6.0 7.0 8.0 366.6u −50.0 −25.0 6.15 6.25 25.0 6.2 6.3 0.0 366.6u Ave: −13.0 Ave: 6.2415 366.7u 366.7u 366.8u t(s) 366.8u 72 t(s) P 366.9u 366.9u I i L n uptpower output and n uptvoltage output and 367u 367u unyconverters. quency (W) iL (A) VO (V) PI (W) PO : : : : ei eue o5 to reduced is ge t(s) t(s) e rqece.This frequencies. her hi a esta the than less far is ch t(s) t(s) P O V t5MHz. 5 at O t5MHz. 5 at . V. 5 5 Half-Bridge Class-D Series Resonant Inverter Using GaN Transistor
High-frequency and high-power application requirements are based on characteristics of transistors. High-frequency operation of transistors depends on semiconductor material.
Semiconductor materials with wide-band gap, which results in high breakdown voltage and high electron velocity can achieve high-frequency operation. Resonant inverters are used in variety of applications including dc-dc resonant converters, radio-frequency power trans- mitters, electronic ballasts, and fiber-optics production etc [28]. The performance of these inverters is highly affected by the characteristics of the transistors. Low on-resistance of transistors reduces the conduction losses, yielding high efficiency. Due to low on-resistance, high carrier concentration, and low capacitance gallium nitride FET offers fast switching and high efficiency performance. This chapter presents an application of GaN based tran- sistors in class-D resonant inverter.
5.1 Class-D Resonant Inverter
A few of the many applications of class-D resonant inverters include wireless power charging, induction heating, motor-drives, and isolated power converters. Operation at high switch- ing frequency to achieve high efficiency with low switching losses is in increasing demand.
M1
CR VI LR +
M2 R vo _
Figure 5.1: Circuit diagram of half-bridge Class-D series resonant inverter.
73 The low output capacitance and low reverse recovery charge allow the transistors higher switching frequency and lower switching loss. Resonant inverter converts a DC voltage into a sinusoidal voltage, which provides ac power to a load. The GaN transistors are capable of achieving high power density, show the benefits of higher efficiency in resonant invert- ers [27]. In this thesis work, Class-D resonant inverter with GaN transistor as a switch is utilized for frequency and efficiency analysis.
5.1.1 Circuit Description
Figure 5.1 shows the circuit of Class-D half-bridge series resonant inverter. The circuit consists of two transistors M1 and M2, an inductor LR, a capacitor CR, and a load resistor
R. The transistors behave as switches and turn ON and OFF alternatively at a switching frequency fs. The input voltage at the series-resonant circuit is the voltage across the switch
M2, which is square-wave of magnitude equal to the input voltage VI . The operation of
the Class-D half-bridge series resonant inverter is explained in details in [28]. The switch
in synchronous class-D can conduct positive or negative current. For operating frequency
higher or lower than resonance frequency, the current flows through the anti-parallel diode.
Cross-conduction or shoot-through occurs if drain-to-source voltages vGS for switch M1 and
M2 overlap. Very high current spikes due to cross-conduction can cause device failure. To
prevent this condition, dead time between the ON and OFF states of both switches can be
provided.
5.1.2 Circuit Design
The following assumptions are made for the analysis of Class-D inverter:
The loaded quality factor of series resonance circuit is high to ensure the sinusoidal • shape of current through the resonant circuit.
The operation of Class-D is above resonance. •
74 The resonant frequency of the series resonant circuit is
1 ωo = . (5.1) √LC
The loaded quality factor is expressed as
ωoL 1 QL = = , (5.2) R + r ωoC(R + r) where
r = rDS + rL + rC , (5.3) and rDS, rL, and rC are the parasitic resistances of the transistor, inductor, and capacitor, respectively. The resonant inductance is
Q (R + r) L = L . (5.4) ωo
The resonant capacitance is 1 C = . (5.5) ωoQL(R + r) The efficiency of the Class-D inverter is
P η = O , (5.6) PO + PL where PO is the output power and PL is the total power loss in the Class D inverter.
For above resonance i.e fs > fo, (where fs is switching frequency and fo is the resonant frequency), the power loss is expressed as
PL = 2PrDS + PrL + PrC + 2PSW off + 2PG, (5.7)
where PrDS is the conduction loss in each transistor, PrL is the conduction loss in the inductor, PrC is the conduction loss in the capacitor, PSW off is the turn-off switching loss, and PG is the gate-drive power loss in the MOSFETs.
The turn-off switching power loss PSW off is expressed as
t t P = f V I r + f , (5.8) SW off s I off 3 2 75 where IOF F is the switch current through M2 during rise time, tr, and tf are the switch current rise and fall times, respectively. Also the gate-drive power loss PG is expressed as
PG = 2fsQgVGSpp, (5.9)
where Qg is the gate charge of each MOSFET and VGSpp is the peak-to-peak (or maximum) value of the gate-to-source voltage vGS. The voltage and current stresses of the transistors are expressed as 2 V = V = V , (5.10) DSMmax I π m and
IDSMmax = Im = πII . (5.11)
5.1.3 Design Example
A Class-D half-bridge series resonant inverter is designed for the following specifications: input voltage VI = 12 V, output power PO = 10 W, and loaded quality factor QL = 5.5.
The switching frequency fs is varied as 100 kHz, 1 MHz, 10 MHz, and 15 MHz. According to
[24], high efficiency can be achieved if operating frequency of Class-D dc-dc series resonant
converter is higher than resonant frequency. Hence, the circuit is simulated at operating
frequency higher than resonant frequency. The values of components for the resonant circuit
are calculated ensuring the operation above resonance and given in Table 5.1. In this
thesis, the EPC2020 enhancement-mode GaN power field-effect transistor by Efficient Power
Conversion [8] is realized as the perfect candidate, which is capable of withstanding the
predicted voltage and current stresses given above. The maximum drain-to-source voltage
Table 5.1: Component values for half-bridge Class-D power amplifier fs Inductance L (µH) Capacitance C (nF) 100 kHz 27.5867 110.1849 1 MHz 2.75867 11.01849 5 MHz 0.5517 2.2037 10 MHz 0.2759 1.1018 15 MHz 0.1839 0.7346
76 for EPC2020 is VDSM(max) = 60 V, the maximum drain current is IDM(max) = 60 A, and on-resistance rDS = 2 mΩ. The different specifications of EPC2020 are given in [8] in detail.
The output capacitance Co of EPC2020 is equal 1.069 nF. Due to such a low value of the output capacitance, its transient response is very high leading to efficient operation at high switching frequencies. The switching losses of this transistor are also very small. A few of the applications of EPC2020 include high-frequency dc-dc conversion, rectification, and audio-amplifiers.
The Spice model EPC2020 was procured from the manufacturers website [8] and con-
verted to use with SABER circuit simulation software. Circuit simulations are performed
for the synchronous buck converter at different switching frequencies in order to evaluate
the its efficiency and power losses. The following section presents the simulation results for
synchronous buck converter using EPC2020 GaN transistor for different frequencies and one
test case with silicon MOSFET for comparison. Figure 4.3 shows the plot of efficiency as a
function of frequency. Before the validation is made through simulation, a theoretical plot
Figure 5.2: Circuit schematic for Half-Bridge Class-D RF power amplifier in SABER sim- ulator.
77 100
95
90
85
80
75 (%) η 70
65
60
55
50 105 106 107 f (Hz) s
Figure 5.3: Theoretically obtained plot of efficiency as a function of the switching frequency of the Class-D series resonant inverter. of the variation in the efficiency as a function of the switching frequency can be observed.
Let us assume the following values for the parasitic components and are equal for all the fre- quencies: rL = 0.11 Ω, rC = 0.02, rDS1 = rDS2 = 2 mΩ, and Co1 = Co2 = 1.069 nF. From equation 5.6 it can be seen that the efficiency of the converter depends on the switching frequency. Figure 5.3 shows the plot of efficiency as a function of frequency.
5.1.4 Simulation Results
Figure 5.2 shows the circuit of Class-D half-bridge series resonant inverter in SABER circuit simulator. The circuit is simulated at the frequencies of 100kHz, 1MHz, 10MHz, and 15MHz.
Simulation results for gate-to-source voltage VGS, drain-to-source voltage VDS, and drain
current iD, for MOSFET M1 and M2 are obtained. In addition, input and output power
waveforms are plotted. Efficiency is measured at each frequency operation.
78 iue55 iuainrslso aet-orevoltage gate-to-source of results Simulation 5.5: Figure voltage gate-to-source of results Simulation 5.4: Figure o switch for switch for 1. iue54sostegt-osuc voltage gate-to-source the shows 5.4 Figure iuainRslsat Results Simulation FET o MOSFET for M M M 2 1 1 iue55sostegt-osuc voltage gate-to-source the shows 5.5 Figure , t10kHz. 100 at kHz. 100 at
(V) (V) (V) (V) M 2 10.0 15.0 10.0 15.0 −5.0 −5.0 iue56sostedancurrent drain the shows 5.6 Figure , 0.0 2.0 4.0 6.0 8.0 0.0 2.0 4.0 6.0 8.0 0.0 5.0 0.0 5.0 890u 890u 100 900u 900u kHz : 910u 910u t(s) t(s) 79 v GS ri-osuc voltage drain-to-source , 920u 920u v v GS GS v n ri-osuc voltage drain-to-source and voltage drain-to-source and GS i D 930u 930u ri-osuc voltage drain-to-source , hog h MOSFETs the through M1_VDS (V) M1_VGS (V) M2_VDS (V) M2_VGS (V) : : : : t(s) t(s) t(s) t(s) v DS o MOS- for v v v M DS DS DS 1 iue56 iuainrslso ri current drain of results Simulation 5.6: Figure iue57 iuainrslso nu power input of results Simulation 5.7: Figure h aet-orevoltage gate-to-source the power and r eycoet h da aea 0 H.Tepasi h dra the c in and transistors peaks the The in cross-conduction kHz. to 100 due at are case switches ideal the to close very are M 2 P O tfeunyo 0 H,adFgr . hw h nu power input the shows 5.7 Figure and kHz, 100 of frequency at tasicigfeunyo 0 H.I a ese httewav the that seen be can It kHz. 100 of frequency switching a at
(W) (W) (A) (A) −20.0 −2.0 −1.0 −2.0 −1.0 10.0 20.0 0.0 1.0 2.0 0.0 1.0 2.0 0.0 5.0 0.0 890u 890u Ave: 4.4039 Ave: −4.7259 v 900u GS 900u n ri-osuc voltage drain-to-source and 910u t(s) 910u t(s) 80 P i D I 920u 920u n uptpower output and o switch for 930u 930u M (W) ID_M2 (A) ID_M1 (A) PO (W) PI v 1 nb lmntdb pro- by eliminated be an DS : : : : and t(s) t(s) t(s) t(s) fbt h switches the both of P M ncreto both of current in O 2 t10kHz. 100 at t10kHz. 100 at P I n output and frsof eforms iue58 iuainrslso aet-orevoltage gate-to-source of results Simulation 5.8: Figure o switch for 2. iue58sostegt-osuc voltage gate-to-source the shows 5.8 Figure iuainRslsat Results Simulation th frequency, this At power. input low. the to output the of values ob 93 be to results simulation the From times. dead appropriate viding FET o MOSFET for and rqec f1Mz h aet-orevoltage gate-to-source The MHz. 1 of frequency iuainrslsteecec smaue ob 92%. be to measured is t efficiency at the results conditions simulation operating normal reflect switches the both of M M M 2 1 1 iue51 hw h nu power input the shows 5.11 Figure , iue59sostegt-osuc voltage gate-to-source the shows 5.9 Figure , . t1MHz. 1 at % h ffiinywsetmtdb osdrn h ai fth of ratio the considering by estimated was efficiency The 2%.
(V) (V) M 2 10.0 15.0 −5.0 iue51 hw h ri current drain the shows 5.10 Figure , 0.0 2.0 4.0 6.0 8.0 0.0 5.0 620u 1 MHz 630u : 640u t(s) 81 v GS P I ri-osuc voltage drain-to-source , 650u n uptpower output and v v GS GS v n ri-osuc voltage drain-to-source and n ri-osuc voltage drain-to-source and GS i D 660u ri-osuc voltage drain-to-source , hog h MOSFETs the through M1_VDS (V) M1_VGS (V) h ffiinyi measured is efficiency the i rqec.Fo the From frequency. his : : t(s) t(s) wthn ossare losses switching e P O taswitching a at v DS average e o MOS- for v v v M DS DS DS 1 iue59 iuainrslso aet-orevoltage gate-to-source of results Simulation 5.9: Figure o switch for 3. iue51:Smlto eut fdancurrent drain of results Simulation 5.10: Figure iuainRslsat Results Simulation iue51 hw h aet-orevoltage gate-to-source the shows 5.12 Figure MOSFET age v M DS 2 o MOSFET for t1MHz. 1 at M 1
(A) (A) (V) (V) iue51 hw h aet-orevoltage gate-to-source the shows 5.13 Figure , −2.0 −1.0 −2.0 −1.0 0.0 1.0 2.0 0.0 1.0 2.0 10.0 15.0 −5.0 0.0 2.5 5.0 7.5 0.0 5.0 620u 620u M 2 10 iue51 hw h ri current drain the shows 5.14 Figure , 630u 630u MHz : 640u t(s) 640u t(s) 82 i D 650u 650u v GS o switch for v GS ri-osuc voltage drain-to-source , n ri-osuc voltage drain-to-source and 660u 660u M2_VDS (V) M2_VGS (V) ID_M2 (A) ID_M1 (A) M v GS : : 1 : : t(s) t(s) and t(s) t(s) ri-osuc volt- drain-to-source , i D hog h MOS- the through M 2 t1MHz. 1 at v DS v DS for (W) : t(s)
PI
20.0
Ave: −4.7226
0.0 (W)
−20.0
(W) : t(s)
10.0
PO
Ave: 4.3711
5.0 (W)
0.0
720u 740u 760u
t(s)
Figure 5.11: Simulation results of input power PI and output power PO at 1 MHz.
(V) : t(s)
8.0
M1_VGS
6.0
4.0 (V)
2.0
0.0
(V) : t(s)
15.0
M1_VDS
10.0 (V)
5.0
0.0
70.5u 70.6u 70.7u 70.8u 70.9u
t(s)
Figure 5.12: Simulation results of gate-to-source voltage vGS and drain-to-source voltage vDS for switch M1 at 10 MHz.
FETs M1 and M2, and Figure 5.15 shows the input power PI and output power PO
at a switching frequency of 10 MHz. It can be seen that, while the gate-to-source
voltage waveform vGS has retained its shape, the drain-to-source voltage waveform
vDS shows a lower fall time due to slower discharge time of the output capacitance.
High peaks are observed in drain current of both switches, causing switching losses.
83 iue51:Smlto eut fgt-osuc voltage gate-to-source of results Simulation 5.13: Figure v DS iue51:Smlto eut fdancurrent drain of results Simulation 5.14: Figure 4. o switch for rmtesmlto eut,teecec smaue ob 6 be to measured is efficiency the results, simulation the From iuainRslsat Results Simulation iue51 hw h aet-orevoltage gate-to-source the shows 5.16 Figure MOSFET M M 2 1
(A) (A) MHz. 10 at (V) (V) iue51 hw h aet-orevoltage gate-to-source the shows 5.17 Figure , 20.0 40.0 60.0 20.0 40.0 60.0 10.0 15.0 0.0 0.0 0.0 5.0 0.0 2.5 5.0 7.5 70.5u 15 70.6u MHz : 70.7u t(s) t(s) 84 i D 70.8u v o switch for GS ri-osuc voltage drain-to-source , v GS 70.9u 81u n ri-osuc voltage drain-to-source and M M2_VDS (V) M2_VGS (V) ID_M2 (A) ID_M1 (A) v GS 1 : : : : 5 and t(s) t(s) t(s) t(s) ri-osuc volt- drain-to-source , . 3%. M 2 t1 MHz. 10 at v DS for (W) : t(s)
200.0
PI
0.0
Ave: −6.7911
−200.0 (W)
−400.0
−600.0
(W) : t(s)
10.0
PO
Ave: 4.434
5.0 (W)
0.0
67u
t(s)
Figure 5.15: Simulation results of input power PI and output power PO at 10 MHz.
(V) : t(s)
8.0
M1_VGS
6.0
4.0 (V)
2.0
0.0
(V) : t(s)
15.0
M1_VDS
10.0 (V)
5.0
0.0
70.7u 70.8u 70.9u 71u
t(s)
Figure 5.16: Simulation results of gate-to-source voltage vGS and drain-to-source voltage vDS for switch M1 at 15 MHz.
age vDS for MOSFET M2, Figure 5.18 shows the drain current iD through the MOS-
FETs M1 and M2, and Figure 5.19 shows the input power PI and output power PO at
a switching frequency of 15 MHz. It can be observed that the waveforms of the gate-
to-source voltage vGS, and drain-to-source voltage vDS of both the switches totally
distorted and the operation of the inverter at this frequency is inappropriate. High
85 iue51:Smlto eut fgt-osuc voltage gate-to-source of results Simulation 5.17: Figure v DS iue51:Smlto eut fdancurrent drain of results Simulation 5.18: Figure o switch for ovre sn R50slcnMOSFET. silicon IRF540 resu using simulation converter the presents section following The beyo mended. operation an However, frequencies. high at operate can ffiinyi esrdt e45 be to th measured From is switches. efficiency both of current drain in observed are peaks M 1
(A) (A) MHz. 15 at (V) (V) 20.0 40.0 60.0 20.0 40.0 60.0 10.0 15.0 0.0 0.0 0.0 5.0 0.0 2.5 5.0 7.5 70.7u 70.8u . 5.I scnlddta P22 a transistor GaN EPC2020 that concluded is It 75%. t(s) t(s) 86 70.9u i D o switch for v GS 71u 81u n ri-osuc voltage drain-to-source and M M2_VDS (V) M2_VGS (V) ID_M2 (A) ID_M1 (A) d1 H sntrecom- not is MHz 10 nd t o ycrnu buck synchronous for lts 1 : : : : iuainrslsthe results simulation e and t(s) t(s) t(s) t(s) M 2 t1 MHz. 15 at (W) : t(s)
200.0
PI Ave: −9.7776
0.0
−200.0 (W)
−400.0
−600.0
(W) : t(s)
10.0
PO
Ave: 4.4737
5.0 (W)
0.0
67u
t(s)
Figure 5.19: Simulation results of input power PI and output power PO at 15 MHz.
5. Simulation Results with Silicon MOSFETs at 5 MHz:
Similar set of simulation results are obtained for the Class-D series resonant inverter
with silicon MOSFETs. The GaN transistors are replaced by the already-available
Spice models of IRF540. The activity is repeated and the different results are obtained
as discusses below.
Figure 5.20 shows the gate-to-source voltage vGS, drain-to-source voltage vDS for
MOSFET M1, Figure 5.21 shows the gate-to-source voltage vGS, drain-to-source volt-
age vDS for MOSFET M2, Figure 5.22 shows the inductor current iL and output
voltage VO, and Figure 5.23 shows the input power PI and output power PO at a
switching frequency of 5 MHz. It can be seen that the waveforms of the drain-to-
source voltage vDS of both the switches are completely distorted at 5 MHz. Also,
the efficiency of the converter is measured to be 41.84%, which is far less than the
efficiency of the converter with GaN transistor at the even higher frequencies. This
proves that silicon transistors are bad choices for high-frequency converters.
87 iue52:Smlto eut fgt-osuc voltage gate-to-source of results Simulation 5.21: Figure voltage gate-to-source of results Simulation 5.20: Figure v v DS DS ihslcnMOSFET silicon with MOSFET silicon with
(V) (V) (V) (V) 10.0 10.0 15.0 10.0 10.0 15.0 0.0 5.0 0.0 5.0 0.0 5.0 0.0 5.0 M M 80.1u 80.1u 2 1 t5MHz. 5 at MHz. 5 at 80.4u 80.4u t(s) t(s) 88 80.7u 80.7u v v GS GS n ri-osuc voltage drain-to-source and voltage drain-to-source and M1_VDS (V) M1_VGS (V) M2_VDS (V) M2_VGS (V) : : : : t(s) t(s) t(s) t(s) (A) : t(s)
6.0
ID_M1
4.0
2.0 (A)
0.0
(A) : t(s)
6.0
ID_M2
4.0
2.0 (A)
0.0
80.1u 80.4u 80.7u
t(s)
Figure 5.22: Simulation results of drain current iD with silicon MOSFETs M1 and M2 at 5 MHz.
(W) : t(s)
20.0
PI
0.0
−20.0 Ave: −9.383 (W)
−40.0
−60.0
(W) : t(s)
8.0
PO
6.0
Ave: 3.9258
4.0 (W)
2.0
0.0
80.1u 80.4u 80.7u
t(s)
Figure 5.23: Simulation results of input power PI and output power PO with silicon MOS- FETs at 5 MHz.
89 6 Results
6.1 Summary of Results
The material properties of gallium nitride (GaN) have been analyzed in detail and • compared with silicon (Si) and silicon carbide (SiC) semiconductor materials in Chap-
ter 2. Few important results are discussed in this Chapter in Section 6.2.
The device properties of GaN, SiC, and Si have been analyzed in great depth in • Chapter 3 and compared with those of Si and SiC. The results are discussed in Section
6.3.
The performance of the GaN-based transistors in PWM synchronous buck dc-dc con- • verters was evaluated in Chapter 4. The theoretically predicted and simulation results
are validated through experiments and the results are presented in Section 6.4.
The performance of the GaN-based transistors in Class-D resonant inverters was eval- • uated in Chapter 5. The theoretical and simulation results are presented in this
Chapter in Section 6.5.
6.2 Comparison of Material Properties of Gallium Nitride, Silicon Car- bide, and Silicon
Figure 6.1 shows the plots of intrinsic carrier concentration ni of gallium nitride, silicon
carbide, and silicon as functions of temperature T . At room temperature, the intrinsic
carrier concentration ni for GaN is very low, when compared to that of Si. The values
indicate that almost no free electron is available for conduction in the GaN semiconductor
at room temperature, making it a good insulator. The difference in carrier concentration
of GaN and SiC is relatively low due to similar values of the band gap energy.
At any temperature, the electron mobility of GaN is very high, when compared to Si.
Figure 6.2 shows the plot of electron mobility µn of gallium nitride, silicon carbide, and
silicon as a function of temperature T . The movement of charges takes place in confined
90 1015
1010 ) -3
(cm 5
i 10 n
100 SiC GaN Si
200 300 400 500 600 700 800 900 1000 1100 1200 T (K)
Figure 6.1: Intrinsic carrier concentration ni as functions of temperature T for gallium nitride, silicon carbide, and silicon.
layers of the 2-dimensional electron gas (2-DEG). The conductivity of this layer is very high
and increases with increase in temperature. Thus, GaN semiconductors are a great choice
for high-speed applications resulting in compact transistor size.
The low electric-field drift electron velocity is directly proportional to the electric field
intensity E and saturates at high electric field values. Saturation drift electron velocity is higher for GaN as compared to Si. Figure 6.3 shows the plot of drift electron velocity µn of gallium nitride, silicon carbide, and silicon as functions of electric field intensity E.
6.3 Comparison of Device Properties of Gallium Nitride, Silicon Carbide, and Silicon
Silicon MOSFETs have a high RDS(on) over a unit area. A large die size is required to achieve
a low RDS(on). The RDS(on) is directly proportional to the breakdown voltage VBD. As the
die area gets bigger, the on-resistance increases proportionally to the breakdown voltage.
Hence, for a specific VBD and die size, the RDS(on) of a GaN FET will be less than that
of the Si MOSFET. Figure 6.4 shows the on-resistance of GaN, SiC, and Si transistors as
91 2000 Silicon 1800 Silicon Carbide Gallium Nitride 1600
1400
/ Vs) 1200 2
1000 (cm n µ 800
600
400
200 300 320 340 360 380 400 420 440 460 480 500 T (K)
Figure 6.2: Electron mobility µn as functions of temperature T for gallium nitride, silicon carbide, and silicon.
107
106 (cm/s) v
5 10 Silicon Silicon Carbide Gallium Nitride
102 104 106 108 E (V/cm)
Figure 6.3: Drift electron velocity µn as functions of electric field intensity E for gallium nitride, silicon carbide, and silicon. a function of breakdown voltage. Specific on-resistance increases with increase in junction temperature. Figure 6.5 shows, the variation in on-resistance RDS(on) with variation in
92 Silicon 101 Silicon Carbide Gallium Nitride
100 ) 2 cm
Ω -1 ( 10
DS(on) -2
R 10
10-3
10-4 101 102 103 104 V (V) BD
Figure 6.4: On-resistance R(DSon) of gallium nitride, silicon carbide, and silicon transistors as functions of breakdown voltage VBD.
temperature T . The RDS(on) for GaN FETs is very low as compared to that of Si MOSFET at the same temperature. The product of on-resistance RDS(on) and gate charge Qg of
gallium nitride, silicon carbide, and silicon transistors as a function of temperature T is shown in Figure 6.6. The inverse of the product of on-resistance R(DSon) and gate charge
Qg of gallium nitride, silicon carbide, and silicon transistors as functions of temperature
T is shown in Figure 6.7. The Figure-of-Merit (FOM), which is R Q is a very DS(on) × g good indicator of the device’s conduction losses, switching losses, and the speed. A higher
FOM like that of GaN indicates minimization of losses and improvement in the speed of operation.
6.3.1 Figure-of-Merit
The gate charge Qg is the amount of charge required by the gate of the transistor to turn-on completely. The transistor’s speed directly depends on the gate charge. High speed and
93 103
102
) 101 2 cm Ω ( 100 DS(on)
R 10-1
10-2 Silicon Silicon Carbide Gallium Nitride 10-3 100 150 200 250 300 350 400 450 500 T (K)
Figure 6.5: On-resistance R(DSon) of gallium nitride, silicon carbide, and silicon transistors as functions of temperature T . low gate losses are achieved with low gate charge which results in high efficiency. The on- resistance R(DSon) determine the conduction losses of a transistor. The product of required gate charge Qg and R(DSon) provides the insight into the transistor’s performance. The lower this product the better the transistor is. Figure 6.8 shows the (R Q 1) (DSon) × g− figure-of-merit. The higher the inverse of this product is the better the device.
6.4 Results for PWM Synchronous Buck DC-DC Converter
For the design example discussed in Chapter 4, the summary of results for the performance of the PWM synchronous buck dc-dc converter using EPC2020 GaN FETs at different switching frequencies is analyzed. It is observed that the efficiency of circuit of PWM syn- chronous buck dc-dc converter highly depends on the operating frequency. The efficiency of
PWM synchronous buck dc-dc converter using GaN FET is much higher that the efficiency of the same circuit using Si MOSFET at same frequency. Moreover, Si MOSFET gives
94 10-5 ) -1 10-6 (sV
g Q × DS(on) R
10-7 Silicon Silicon Carbide Gallium Nitride
100 150 200 250 300 350 400 450 500 T (K)
Figure 6.6: The product of on-resistance R(DSon) and gate charge Qg of gallium nitride, silicon carbide, and silicon transistors as functions of temperature T . up at much lower frequencies than that of GaN FET. Figure 6.9 shows the comparison of theoretical efficiency of PWM synchronous buck dc-dc converter for GaN and Si transistors.
In order to validate the analysis, experiments are performed on a laboratory prototype of a synchronous buck dc-dc converter. Following this is the comparison of the theoretical, simulation, and experiments.
6.4.1 Comparison of Theoretical and Simulation Results
Figure 6.10 shows the comparison of theoretical and simulated efficiencies of PWM syn- chronous buck dc-dc converter using EPC2020 GaN FET for the circuit design example mentioned in Chapter 4. The simulation results are in good agreement with theoretical results.
95 Silicon Silicon Carbide Gallium Nitride
7 ) 10 -1 (Vs
-1 ) g Q ×
106 DS(on) (R
105 100 150 200 250 300 350 400 450 500 T (K)
Figure 6.7: The inverse of the product of on-resistance R(DSon) and gate charge Qg of gallium nitride, silicon carbide, and silicon transistors as functions of temperature T .
5
4
3
2 Figure-of-Merit
1
0 Silicon Silicon Carbide Gallium Nitride
Figure 6.8: The bar graph of figure-of-merit (R Q 1) of gallium nitride, silicon (DSon) × g− carbide, and silicon transistors.
96 100
95
90
85
80
75 (%) η 70
65
60 Gallium Nitride 55 Silicon
50 105 106 107 f (Hz) s
Figure 6.9: The comparison of theoretical efficiency of PWM synchronous buck dc-dc con- verter using gallium nitride and silicon transistors.
6.4.2 Experimental Results
A laboratory prototype of the PWM synchronous buck dc-dc converter was built to evaluate the efficiencies of the converter at high-frequencies using the gallium nitride (GaN) tran- sistors. EPC9037 development board from Efficient Power Conversion was used in place of the half-bridge network for the synchronous buck converter. The EPC9037 development board is a half-bridge configuration with two enhancement-mode GaN FETs and on-board gate drivers. The factory-built EPC2101 is driven by high-frequency gate-driver namely
LM5113 manufactured by Texas Instruments. The pulse-width modulated waveforms to the two transistors are enabled using a NAND logic, which offers the required delay for the gating pulses.
The specifications of the synchronous buck dc-dc converter presented in Chapter 4 was considered and is repeated here for the sake of convenience:
97 100
95
90
85 (%) η
80
75 Theoretical Efficiency Simulated Efficiency 70 105 106 107 f (Hz) s
Figure 6.10: The comparison of theoretical and simulated efficiency of PWM synchronous buck dc-dc converter using gallium nitride transistors.
Input voltage V = 12 V • I
Output voltage V = 6 V • O
Minimum output current I = 0.7 A • Omin
Load resistance R = 5 Ω • L
Switching frequencies f = 100 kHz, 500 kHz, 1 MHz, 2 MHz, 5 MHz, 8 MHz, 10 • s MHz
The minimum value of inductance and the minimum value of capacitance required for CCM
Table 6.1: Inductance and capacitance values for the synchronous buck dc-dc converter
fs Lmin (µH) Used L (µH) Cmin (µF) Used C (µF) 100 kHz 28.0612 33 61.111 100 1 MHz 2.8061 3.3 6.1111 10 2 MHz 1.4031 1.8 3.0556 5 8 MHz 0.3508 0.47 0.7639 1
98 operation at switching frequencies mentioned above were calculated. The values of these components and the correspondingly chosen values for the experiment are given in Table
6.1.
Figure 6.11 shows the photograph of full experimental set-up. The circuit of PWM synchronous buck dc-dc converter using EPC9037 development board was constructed as shown in Figure 6.12. The experiment was performed by changing the switching frequency to different values: 100 kHz, 1 MHz, 10 MHz, and 15 MHz. A zoomed in picture of
EPC9037 development board is shown in figure 6.12. The high-frequency pulse-width mod- ulated signals to the gate-driver were generated using the Tektronix AFG3251 arbitrary function generator. The inductor currents were measured using the Tektronix AM 503B high-bandwidth high sensitivity current dc/ac current probe. The various voltage and cur- rent waveforms were recorded using the Tektronix TDS2004C digital oscilloscope.
QC :$V %]]C7 `Q` $: VRR`10V H1`H%1 QC :$V %]]C7 `Q` ]Q1V` :$V
V@ `QJ16 `1:J$%C:`R1:0V $VJV`: Q` V@ `QJ16 H1CCQ HQ]V
1$.RG:JR11R . H%``VJ ]`QGV
7JH8 G%H@ HQJ0V` V` 11 . *+ :C` .`1R$V IQR%CV
Figure 6.11: Picture of full experimental set-up.
99 J]% 0QC :$V Q J]% 0QC :$V Q $: VRR`10VH1`H%1 ]Q1V` :$V
: VRR`10V :JR :$V
`QI]%C VR11R . IQR%C: Q`
% ]% `1C V` JV 1Q`@
Figure 6.12: Picture of PWM synchronous buck dc-dc converter with EPC9037 half bridge module.
Figure 6.14 shows the experimentally obtained waveforms of the gate-to-source voltage, drain-to-source voltage, and the inductor current for a switching frequency of 100 kHz.
Due to the use of an ac current probe, only the ac component of the inductor current was recorded. However, for an output voltage of 6 V and a load resistance of 5 Ω, the average inductor current is 1.2 A. By adding the average inductor current with its ac component indicates the operation of the converter well in the continuous-conduction mode. The maximum voltage across the lower transistor was equal approximately equal to VI . A maximum value of 14.62 V was observed and the ripple voltage due to transistor switching was also evident in the observations. In summary, the shapes of these critical waveforms were in good shape and in an acceptable condition yielding an efficiency as high as 96.75%.
Figure 6.15 shows the experimentally obtained waveforms of the gate-to-source voltage,
100 QC :$V %V$%C: Q`
1$.R `V_8 `:J 1 Q` : VR!`10V` :C`R`1R$V
(J]% V`I1J:C
Figure 6.13: Picture of EPC9037 half bridge module, which includes the voltage regu- lator MCP1703, high-frequency gate-drive LM5113, and EPC2101 half-bridge module of enhancement-mode GaN transistors. drain-to-source voltage, and the inductor current for a switching frequency of 500 kHz.
Some undesirable ringing is observed in the gate-to-source voltage waveform, which is pre- dominantly due to the probe reactance and traces of the inductance of the breadboard. On the whole, the shapes of the waveforms represented a proper buck action and resulted in an overall converter efficiency of 95.85%.
Figure 6.16 shows the experimentally obtained waveforms of the gate-to-source volt-
age, drain-to-source voltage, and the inductor current for a switching frequency of 1 MHz.
This frequency can be treated as a high-frequency case for the converter. At 1 MHz, the
transistor’s performance was well within acceptable conditions. The overall efficiency was
observed to be 93.98%.
Figure 6.17 shows the experimentally obtained waveforms of the gate-to-source voltage,
drain-to-source voltage, and the inductor current for a switching frequency of 2 MHz. The
shapes of the drain-to-source voltage and the inductor current were retained at normal
101 conditions, whereas the shape of the gate-to-source voltage waveform was highly distorted due to severe ringing. The fall time of the drain-to-source voltage waveform was decreased at this frequency. The overall efficiency was reported to be 88.68%.
Further experimentation involved high switching frequencies. As the switching frequency was increased beyond 5 MHz, the ringing in the gate-to-source voltage waveform was very dominant and was not in representable condition. The inductor current waveform also did not reflect better waveforms, owing to the probe reactance and limited bandwidth of the current probe, thus it has not been shown in the future figures.
Figure 6.18 shows the experimentally obtained waveforms of the drain-to-source voltage and the output voltage for a switching frequency of 5 MHz. From the plot it can be seen that the transistor’s rise and fall times have become comparable with the switching period.
The output voltage was reduced to only 3.63 V as opposed to a rated value of 6 V. One may consider the operation at this frequency to be unacceptable. Similar waveforms were obtained through simulations at a switching frequency of 8 MHz. However, due to the nat- urally existing parasitics in the converter set-up, the converter exhibited poor performance at 5 MHz. The overall efficiency as observed as 78.96%.
Final set of results were obtained at 8 MHz. Figure 6.19shows the experimentally obtained waveforms of the drain-to-source voltage and the output voltage for a switching frequency of 8 MHz. The drain-to-source voltage waveform indicated a poor performance situation, where the waveform could cease to discharge completely to zero before the start of the next cycle. Also, the output voltage was extremely lower, approximately 3 V. This frequency was considered as the hard limit beyond which the converter fails to perform any switching.
For the sake of curiosity, the frequency was increased to 10 MHz and the waveforms were observed. The drain-to-source voltage failed to reduce to zero at this frequency due to the incapability of the output capacitance to discharge to zero. The input current increased since the transistor conducted through the output capacitance. This undesirable effect can
102 Figure 6.14: Experimentally obtained plots of gate-to-source voltage vGS (upper trace), drain-to-source voltage vDS (middle trace), and inductor current iL (lower trace) at fs = 100 kHz.
Table 6.2: Theoretical, simulated, and measured efficiencies of sync. buck dc-dc converter Switching Frequency Theoretical % Simulated % Experimental % 100 kHz 99.30 98.42 96.75 500 kHz 98.50 98.13 95.85 1 MHz 97.51 97.82 93.98 2 MHz 95.60 93.81 88.68 5 MHz 90.29 88.63 78.96 8 MHz 85.54 82.04 70.55 10 MHz 82.64 81.45 - 15 MHz 76.18 71.08 - be avoided only if the switching frequency is held below 8 MHz.
The values for theoretical, simulated, and experimental efficiencies are obtained and are shown in Table 6.2. Figure 6.20 shows the comparison of theoretical and experimental efficiencies obtained for the design example discussed in Chapter 4. The experimental efficiency is lower than that of theoretical efficiency.
103 Figure 6.15: Experimentally obtained plots of gate-to-source voltage vGS (upper trace), drain-to-source voltage vDS (middle trace), and inductor current iL (lower trace) at fs = 500 kHz.
6.5 Results for Half-Bridge Class-D Resonant Inverter Using GaN Tran- sistor
6.5.1 Comparison of Theoretical and Simulation Results
The values for theoretical and simulated efficiencies of half-bridge class-D resonant inverter
using EPC2020 GaN FET for the circuit design example mentioned in Chapter 5 are ob-
tained and are shown in Table 6.3. Figure 6.21 shows the plots of theoretical and simulated
efficiencies. The simulation results are in good agreement with the theoretical results.
Table 6.3: Theoretical and simulated efficiencies of Class-D resonant inverter Switching Frequency Theoretical % Simulated % 100 kHz 94.15 93.22 1 MHz 89.16 88.56 5 MHz 72.17 70.02 8 MHz 63.15 62.51 10 MHz 58.29 60.29 15 MHz 48.89 45.75
104 Figure 6.16: Experimentally obtained plots of gate-to-source voltage vGS (upper trace), drain-to-source voltage vDS (middle trace), and inductor current iL (lower trace) at fs = 1 MHz.
Figure 6.17: Experimentally obtained plots of gate-to-source voltage vGS (upper trace), drain-to-source voltage vDS (middle trace), and inductor current iL (lower trace) at fs = 2 MHz.
105 Figure 6.18: Experimentally obtained plots of drain-to-source voltage vDS (upper trace) and output voltage VO (lower trace) at fs = 5 MHz.
Figure 6.19: Experimentally obtained plots of rain-to-source voltage vDS (upper trace) and output voltage VO (lower trace) at fs = 8 MHz.
106 100
95
90
85 (%) η
80
75 Theoretical Efficiency Experimental Efficiency 70 105 106 107 f (Hz) s
Figure 6.20: The comparison of theoretical and experimental efficiency of PWM synchronous buck dc-dc converter with gallium nitride transistors.
100
90
80
70 (%) η
60
50 Theoretical Efficiency Simulated Efficiency 40 105 106 107 f (Hz) s
Figure 6.21: The comparison of theoretical and simulated efficiency of half-bridge class-D resonant inverter using gallium nitride transistors.
107 7 Conclusions and Future Work
7.1 Thesis Summary
The three aspects related to gallium nitride (GaN), which have been presented in this thesis are as follows:
GaN Semiconductor Material: • A detailed study on the properties of the gallium-nitride (GaN) semiconductor ma-
terial has been presented. The various expressions of the physical properties of GaN
semiconductor materials have been presented. Moreover, the effect of temperature
on the intrinsic carrier concentration, the carrier mobilities, and the resistivity for
the silicon (Si), silicon carbide (SiC), and GaN semiconductor materials have been
discussed and compared. The different figures-of-merit (FOM) for the GaN, Si, and
SiC semiconductor materials have been presented and compared.
GaN Field-Effect Transistors: • The properties of the GaN field-effect transistor (FET) have been compared with
silicon Si and SiC counterparts. The principle of operation of the GaN FET has
been discussed. The critical differences in the process of formation of the electron
conduction path in Si and GaN transistors have been highlighted. The figure-of-merit
for the GaN power transistor has been explained and compared with that of Si and
SiC transistors. Further, using the Spice model of EPC2020 enhancement-mode GaN
power transistor, the dc and ac dynamic characteristics have been investigated and
the results agreed with those presented in the manufacturer’s datasheet.
Applications of GaN transistors in Power Electronic Circuits: • The applications of the GaN power transistor in power electronic circuits has been
explored. Two practical implementation of the GaN power transistors are (a) pulse-
width modulated (PWM) synchronous buck dc-dc power converter and (b) half-bridge
108 class-D series resonant inverter. These circuits have been designed for practical design
specifications. Theoretical power losses of all the components and efficiencies were
derived, and the voltage and current stresses of all the components were determined.
Circuit simulations were performed on these circuits using SABER circuit simulator.
The EPC2020 enhancement-mode GaN transistors from Efficient Power Conversion
Corporation (EPC) were used in the half-bridge switching network. Initial observa-
tions were first made at lower switching frequencies to verify the correctness of the
designed circuit. Further, the switching frequency was increased to higher values to de-
termine the maximum operable limits of the GaN transistor. Similar simulations were
performed using the Si transistor. The shape of the drain-to-source voltage waveforms
were observed after each trial. The circuit with Si transistor produced highly distorted
waveforms due to very high switching losses at about 5 MHz, whereas the circuit with
GaN transistors performed well at high efficiencies until 15 MHz. The deviation from
the normal shape of the drain-to-source voltage waveform was observed only above
15 MHz. Experimental validations were performed on the PWM synchronous buck
converter operating in continuous-conduction mode. The prototype of the converter
was built using the EPC9037 half-bridge switching network module, which was driven
using the LM5113 high-speed, dual-side gate-driver. The performance of the converter
has been evaluated at different switching frequencies, starting from 100 kHz to 8 MHz.
It was observed that at 8 MHz, the drain-to-source capacitor ceased to discharge and
the converter failed to perform the switching action. An efficiency of about 98% has
been recorded at 100 kHz and 55% at 8 MHz. The theoretical predictions were in
agreement with the simulation and experimental results.
7.2 Semiconductors and Their Target Applications
Every semiconductor has its own market and target consumers. The reliability of silicon
(Si) transistors is fairly high in the CMOS and microelectronics industry, whereas the appli-
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Figure 7.1: Various application areas for gallium nitride, silicon, and silicon carbide dis- tributed according to operating voltage, operating temperature, and operating frequency requirements. cability of silicon carbide (SiC) is better in high-voltage and high-temperature conditions.
The introduction of gallium nitride (GaN) and a solid research in its application domain has shown that the GaN devices share the markets of both Si and SiC. Figure 7.1 shows a chart of the different areas of applications, where GaN devices are being used. The applications shown in the chart can be divided into three different categories, namely: (a) high/low- voltage and low-frequency, (b) low-voltage and high-frequency, and (c) high-voltage and high-frequency.
110 7.2.1 High/Low-Voltage and Low-Frequency Applications
The number of applications in this voltage and frequency range is manifold. The frequency range is 100 kHz to 10 MHz while the voltage range is 50 V to 600 V. Most of the switched- mode power supplies for portable applications, lighting, consumer electronic applications, etc., appear in this category. For frequencies of 100 kHz to 1 MHz and a voltage range of 50
V to 200 V, the use of Si is justified in this range since its switching losses and conduction losses are low. Due to the nature of the application, the temperature at which they operate is also low, resulting in smaller heat sinks and much compact modules. Thus, for these voltage values and the above mentioned frequency range, the silicon transistors operate at efficiencies, which are comparable with those of GaN transistors.
The Si MOSFETs exhibit huge on-resistance at a higher voltage range, i.e. 200 V and above and at low frequencies, which is undesirable for high-voltage applications. While the
SiC transistors rule the high-voltage market, the GaN transistors have also begun to show their presence. The inherent capability of SiC to withstand higher temperatures due to high thermal conductivity and achieve high breakdown voltages due to higher breakdown electric field makes them the best choice amongst the three semiconductor types. Therefore, at these voltages and frequencies a strong competitor to SiC is the GaN transistor. However, its use may be limited due to its cost and availability, when compared with SiC devices.
7.2.2 Low-Voltage and High-Frequency Applications
Present day research is gaining pace in this category of applications. The advent of wirelessly charged portable applications, high-bandwidth mobile, and cellular transmitter schemes have been demanding much efficient power supplies. The frequency range is 10 MHz to 5
GHz while the voltage range is 50 V to 600 V. The use of Si beyond 2.5-5 MHz and 500 V is not justified due to its severely high switching losses. The SiC cannot be used due to the bulky nature of the switching modules. Thus, GaN shows a superiority over the other two devices and is a potential candidate for future applications in this voltage and frequency
111 range.
However, at low voltages and at very high frequencies, such as 2 GHz to 5 GHz, Si transistors have shown their major importance. This is due to their high reliability, ease in fabrication, and most importantly the abundance of silica in nature. The CMOS and IC technology, which runs today’s electronic world has a very high dependence on Si and will definitely take few years for GaN to prove its feasibility in this field of applications.
7.2.3 High-Voltage and High-Frequency Applications
This category is where GaN can make its mark, where Si and SiC fail to operate reliably.
Few applications in this category are AM and FM radio broadcasting stations, high-voltage rectifiers, power supplies for aircraft, ships, military vehicles, etc. These applications involve generation of very high voltages (to the order of 20 kV 25 kV) and at frequencies of around − 15 MHz - 20 MHz. A higher frequency is usually a consequence of high ac line voltage
frequency, which is usually 250 Hz to 400 Hz. The cost of the equipment is back-burnered
since its reliability, safety, and effectiveness are given higher importance.
7.3 Take-Home Lessons
In the process of working on this thesis, various lessons have been learned. I made a decision
to do some challenging research on a topic, which has shown a growing interest in many
research areas in electrical and electronic communities. That special topic has turned out to
be the topic of my M.S. thesis. The most important lessons, which also apply to any research
were to read, read, and read. Writing an M.S. thesis imposes some special challenges such as
literature survey, analysis, simulations, experiments, comparisons, and drawing conclusions.
I have garnered many skills during the process. Although the topic was challenging, I have
learned about a new technology, which has not been discussed in detail in the text books.
The entire process of working on this thesis also helped me connect the diverse technical
knowledge I had. The topic of this M.S. thesis was a great education experience for me.
112 7.4 Conclusions
The following conclusions can be drawn from this M.S. thesis:
1. The gallium nitride semiconductors are superior than the silicon (Si) semiconductors in
several aspects including mobility, maximum junction temperature, thermal velocity,
and conductivity.
2. Due to the wide band gap energy of GaN semiconductors (similar to silicon carbide),
it possesses a very high temperature handling capability; a major requirement for high
power, high current, and high temperature applications.
3. The 2-dimensional electron gas (2-DEG) contributes to the majority of the current
conduction at the interface between AlGaN and GaN hetero-structures. The mobility
of electrons in the 2-DEG is of the order of 2000 cm2/V s. ·
4. The specific on-resistance is very low, which is a major improvement over the Si
transistors and is mainly due to the high electron mobility and the wide band gap
energy of GaN. This is also the main reason for smaller transistor size, when compared
to Si transistors.
5. For the GaN transistors, the trans-conductance is at least twice that of Si. Also, the
low intrinsic capacitances (Cgs and Cgd) result in a higher unity-gain frequency fT for
the GaN transistors, which is a good indicator of high-speed devices.
6. The drain-to-source capacitance Cds is also very low. Thus, the switching losses
are very low in GaN transistors, which is an attractive feature for high-frequency
applications.
7. The GaN enhancement-mode FET is much easier to drive than the depletion-mode
FET.
113 8. For synchronous buck converters with practical specifications, the simulations results
show that the overall efficiency of the converters using GaN-based transistors reduced
to 60% at around 15 MHz, while the overall efficiency of the Si-based power converters
reduced to 40% at 5 MHz. The experimental limit of switching frequencies is 8
MHz. Operation beyond this range resulted in switching intervals, where the output
capacitance ceased to discharge, which is undesirable for normal operating conditions.
9. For Class-D series resonant converter, the simulations have indicated efficiencies up
to the order of 80% even at 5 MHz using GaN-based transistors, whereas 40% at
5 MHz using Si-based transistors. Also, by operating the inverter at zero-voltage
switching (ZVS), the maximum achievable switching frequency with lower losses is
around 10 MHz. Operation beyond this resulted in improper shapes of the waveforms
and unpredictable current and voltage spikes.
10. A careful layout of the circuit prototype in the megahertz range is important because
the circuit parasitic components become dominant leading to unpredictable behavior.
7.5 Contributions
1. The material properties of GaN have been studied and compared with SiC and Si,
which include thermal velocity of charge carriers, breakdown voltage, breakdown elec-
trical field, intrinsic carrier concentration, extrinsic carrier concentration, charge car-
rier mobility, saturation velocity, resistivity, and conductivity.
2. The properties and features of the GaN transistor used in power electronic circuits
such as: (a) figure-of-merit, (b) specific-on resistance, and (c) device operation have
been summarized and presented.
3. The dc and dynamic ac characteristics of EPC2020 enhancement-mode GaN have
been evaluated.
114 4. The performance of the synchronous buck dc-dc converter using GaN half-bridge
module through simulations has been evaluated and validated through experiments
for a range of frequencies (100 kHz to 15 MHz).
5. The performance of the half-bridge class-D resonant inverter using GaN half-bridge
module has been evaluated through simulations for a range of frequencies (100 kHz
to 15 MHz).
7.6 Future Work
The following research topics are suggested for the future work:
Analysis of the effect of temperature on the performance of the gallium-nitride (GaN) • transistors and comparison with silicon-carbide power transistors.
Development of a robust mathematical model for the drain current in the GaN field- • effect transistor.
Development of spice models for the enhancement-mode and depletion-mode GaN • transistors based on the EKV model.
Analysis of the behavior of the nonlinear capacitances of the GaN transistors as a • function of the applied voltage.
115 8 Bibliography
GaN Material
[1] T. Jenkins, “A brief history of semiconductors,” Physics Education, vol. 40, no. 5,
pp. 430-439, September 2005.
[2] G. L. Pearson and W. H. Brattain, “History of semiconductor research,” in Proceedings
of the IRE, vol. 43, no. 12, pp. 1794-1806, December 1955.
[3] S. Hassan and A. Mamoona, “Limitation of silicon based computation and future
prospects,” in Proc. IEEE Computer Society Second International Conf. on Commu-
nication Software and Networks, Singapore, 2010, pp. 559-561.
[4] R. R. Schaller, “Moore’s law: past, present and future,” IEEE Spectrum, vol. 34, no.
6, pp. 52-59, June 1997.
GaN Transistors
[5] L. F. Eastman and U. K. Mishra, “The toughest transistor yet (GaN transistors),”
IEEE Spectrum, vol. 39, no. 5, pp. 28-33, May 2002.
[6] T. Kachi, M. Kanechika, and T. Uesugi, “Automotive applications of GaN power de-
vices,” in Proc. IEEE Compound Semiconductor Integrated Circuit Symp., Waikoloa,
HI , October 2011, pp. 1-3.
[7] M. D. Seeman, S. R. Bahl, D. I. Anderson, and G. A. Shah, “Advantages of GaN in a
high-voltage resonant LLC converter,” in Proc. IEEE Applied Power Electron. Conf.
Expo. (APEC), Fort Worth, TX , March 2014, pp. 476-483.
[8] A. Lidow, “GaN Transistors - The best emerging technology for power conversion
from DC through RF,” in Proc. IEEE Compound Semiconductor Integrated Circuit
Symp., Monterey, CA , October 2013, pp. 1-4.
116 [9] Kungl. Vetenskaps-Akademien, “Efficient blue light-emitting diodes leading to bright
and energy-saving white light sources,” The Royal Swedish Academy of Science, Oc-
tober 2014.
[10] R. S. Pengelly, S. M. Wood, J. W. Milligan, S. T. Sheppard, and W. L. Pribble, “A
review of GaN on SiC high electron-mobility power transistors and MMICs,” IEEE
Trans. Microwave Theory Tech., vol. 60, no. 6, pp. 1764-1783, June 2012.
[11] High-quality, low-cost bulk gallium nitride substrates, U.S. Department of Energy.
Available at: http:// energy.gov/sites.
[12] M. Charles, “Gallium nitride applications,” The Institute of Engineering and Tech-
nology, 2008.
[13] M. K. Kazimierczuk, Pulse-Width Modulated DC-DC Power Converters, 2nd Ed.,
Chichester, United Kingdom: John Wiley & Sons Inc., 2015.
[14] T. T. Mnatsakanov, M. E. Levinshtein, L. I. Pomortseva, S. N. Yurkov, G. S. Simin,
and M. A. Khan, “Carrier mobility model for GaN,” IEEE Trans. Solid State Elec.,
vol. 47, no. 1, pp. 111-115, January 2003.
[15] P.Javorka, “Fabrication and characterization of AlGaN/GaN high electron mobility
transistors,” Institute of Thin Films and Interfaces, 2004.
[16] B. J. Baliga, “Power semiconductor device figure of merit for high-frequency applica-
tions,” IEEE Electron Device Letters, vol. 10, no. 10, pp. 455-457, October 1989.
[17] E. Johnson, ”Physical limitations on frequency and power parameters of transistors,”
IRE International Convention Record, vol. 13, pp. 27-34, March 1966.
[18] R. W. Keyes, “Figure of merit for semiconductors for high-speed switches,” in Pro-
ceedings of the IEEE, February, 1972, vol. 60, no. 2, pp. 225-225.
117 [19] J. J. Zhang, “GaN-based device cascoded with an integrated FET/Schottky diode
device,” U.S. Patent 8084783 B2, November 9, 2009.
[20] W. Zhang, Z. Xu, Z. Zhang, F. Wang, L. M. Tolbert, and B. J. Blalock, “Evaluation
of 600 V cascode GaN HEMT in device characterization and all-GaN-based LLC
resonant converter,” in Proc. IEEE Energy Conversion Congress and Expo. (ECCE),
September 2013, pp. 3571-3578.
GaN Applications
[21] T, Kachi, “GaN power devices for automotive applications,” in Proc. IEEE Compound
Semiconductor Integrated Circuit Symp., October 2007, pp. 1-4.
[22] U. K. Mishra, L. Shen, T.E. Kazior, and W. Yi-Feng, “GaN-based RF power devices
and amplifiers,” Proceedings of the IEEE, February, 2008, vol. 96, no. 2, pp. 287-305.
[23] Y. Ohno and M. Kuzuhara, “Application of GaN-based heterojunction FETs for ad-
vanced wireless communication,” IEEE Trans. Electron Devices, vol. 48, no. 3, pp.
517-523, March 2001.
[24] M.K. Kazimierczuk and C. Wu, “Frequency-controlled series-resonant converter with
synchronous rectifier,” IEEE Trans. Aerospace and Electron. Syst, vol. 33, no. 3, pp.
939-948, July 1997.
[25] J. Das, J. Everts, J. Van den Keybus, M. Van Hove, D. Visalli, P. Srivastava, D.
Marcon, K. Cheng, M. Leys, S. Decoutere, J. Driesen, G. Borghs, “A 96% efficient
high-frequency dc-dc converter using e-mode GaN DHFETs on Si,” IEEE Electron
Device Letters, vol. 32, no. 10, pp. 1370-1372, October 2011.
[26] M.J. Scott, Z. Ke, W. Jin, C. Chingchi, S. Ming, and C. Lihua, “A gallium-nitride
switched-capacitor circuit using synchronous rectification,” in IEEE Trans. Industry
Applications, June 2013, pp. 1383-1391.
118 [27] Z. Weimin, L. Yu, Z. Zheyu, F. Wang, L.M. Tolbert, B.J. Blalock, S. Henning, C.
Wilson, and R. Dean, “Evaluation and comparison of silicon and gallium nitride power
transistors in LLC resonant converter,” in Proc. IEEE Energy Conversion Congress
and Exposition (ECCE), September 2012, pp. 1362-1366.
[28] M. K. Kazimierczuk, D. Czarkowski, Resonant Power Converters, 2nd Ed., Hoboken,
New Jersey: John Wiley & Sons, Inc., 2011.
[29] O. Djekic, M. Brkovic, and A. Roy, “High frequency synchronous buck converter for
low voltage applications,” in Proc. IEEE Power Electron. Specialists Conf., Fukuoka,
1998, vol. 2, pp. 1248-1254.
[30] M. Mulligan, B Broach, and T. Lee, “A constant-frequency method for improving
light-load efficiency in synchronous buck converters,” IEEE Power Electron. Letters,
vol. 3, pp. 24-29, 2005.
[31] A. Stratakos and R. Broderson, “A low-voltage CMOS dc-dc converter for a portable
battery-operated system,” in Proc. IEEE Power Electron. Specialists Conf., Taipei,
June 1994, pp. 619-626.
[32] A. Panda and K. Aroul, “A novel technique to reduce the switching losses in a syn-
chronous buck converter,” in Proc. IEEE Intl. Conf. Power Electronics, Drives, and
Energy Systems, New Delhi, 2006, pp. 1-5.
[33] V. Yousefzadeh and D. Maksimovic, “Sensorless optimization of dead times in dc-dc
converters with synchronous rectifiers,” IEEE Trans. Power Electronics, vol. 21, pp.
994-1002, July 2006.
[34] G. Moschopoulos, P. Jain, and G. Joos, “A novel zero-voltage switched PWM boost
converter,” in Proc. IEEE Power Electronics Specialist Conf., Atlanta, GA, 1995, pp.
694-700.
119 [35] K. Smith and K. Smedley, “A comparison of voltage-mode soft switching methods
for PWM converters,” IEEE Trans. Power Electronics, vol. 12, pp. 376-386, March
1997.
[36] G. Hua, C. Liu, Y. Jiang, and F. Lee, “Novel zero-voltage-transition PWM converter,”
IEEE Trans. Power Electronics, vol. 9, pp. 213-219, March 1994.
[37] L. Yang and C. Lee, “Analysis and design of boost zero-voltage-transition PWM
converter,” Proc. IEEE Applied Power Electronics Conf., San Diego, CA, 1993, pp.
707-713.
[38] A. Elasser and D. Torrey, “Soft switching active snubbers for dc-dc converters,” in
IEEE Trans. Power Electronics, vol. 11, no. 5, pp. 710-722, September 1996.
[39] C. Tseng and C. L. Chen, “Novel ZVT-PWM converter with active snubbers,” IEEE
Trans. Power Electronics, vol. 13, no. 5, pp. 861-869, September 1998.
[40] G. Moschopoulos, P. Jain, G. Joos, and Y. F. Liu, “Zero voltage switched PWM boost
converter with an energy feedback auxiliary circuit,” IEEE Trans. Power Electronics,
vol. 14, no. 4, pp. 653-662, July 1999.
[41] M. L. Martins, J. Russi, H. Pinheiro, H. A. Grundling, and H. L. Hey, “Unified design
for ZVT PWM converter with resonant auxiliary circuit,” in Proc. IEEE Electric
Power Applications, vol. 151, no. 3, May 1998, pp. 303-312.
[42] W. Huang, G. Moschopoulos, “A new family of zero-voltage-transition PWM convert-
ers with dual active auxiliary circuits,” IEEE Trans. Power Electronics, vol. 21 no.
2, pp.370-379, March 2006.
[43] T. Song, N. Huang, and A. Ioinovici, “A family of zero-voltage and zero-current-
switching (ZVZCS) three-level DC-DC converters with secondary-assisted regener-
120 ative passive snubber,” IEEE Trans. Circuits and Systems, vol. 52, no. 11, pp.
2473-2481, November 2005.
[44] J. H. Kim, D. Y. Lee, H. S. Choi, and B. H. Cho, “High performance boost PFP
with an improved ZVT converter,” in Proc. IEEE Applied Power Electronics Conf.,
Anaheim, CA, pp. 337-342, 2001.
[45] C. J. Tseng and C. L. Chen, “Novel ZVT-PWM converter with active snubbers,”
IEEE Trans. Power Electronics, vol. 13, no. 5, pp. 861-869, September 1998.
[46] S. Ben-Yaakov, G. Ivensky, O. Levitin, and A. Trainer, “Optimization of the auxiliary
switch components in ZVS PWM converters,” International Journal of Electronics,
vol. 81, no. 6, pp. 699-712, December 1996.
[47] E. Adib and H. Farzanehfard, “Family of zero current zero voltage transition PWM
converters,” IEEE Trans. Power Electron., vol. 1, no. 2, pp. 214-223, Jan. 2008.
[48] E. Adib and H. Farzanehfard, “Zero-voltage transition current-fed full-bridge PWM
converter,” IEEE Trans. Power Electronics, vol. 24, no. 4, pp. 1041-1047, April
2009.
[49] S. Urgun, “Zero-voltage transition-zero-current transition pulse width modulation dc-
dc buck converter with zero-voltage switching-zero-current switching auxiliary cir-
cuit,” IET Power Electronics, vol. 5, no. 5, pp. 627-634, March 2012.
[50] Y. Hong-Tzer, L. Jian-Tang, and C. Xiang-Yu, “Zero-Voltage-Transition auxiliary
circuit with dual resonant tank for dc-dc converters with synchronous rectification,”
IET Power Electronics, vol. 6, no. 6, pp. 1157-1164, July 2013.
[51] A. Stratakos, “High-efficiency, low-voltage dc-dc conversion for portable applications,”Ph.D.
dissertation University California, Berkeley, 1999.
121 [52] A. J. Stratakos, S. R. Sanders, and R. W. Broderson, “A low-voltage CMOS dc-dc
converter for a portable battery-operated system,” Proc. IEEE Power Electronics
Specialists Conf., Taipei, Taiwan, vol. 1, pp. 619-626, June 1994.
[53] A. V. Stankovic, L. Nerone, and P. Kulkarni, “Modified synchronous-buck Converter
for a dimmable HID electronic ballast,” IEEE Trans. Power Electronics, vol. 59, no.
4, pp. 1815-1824, April 2012.
[54] T. A. Smith, S. Dimitrijev, and H. B. Harrison, “Controlling a dc-dc converter by
using the power MOSFET as a voltage controlled resistor,” IEEE Trans. Circuits
Systems, vol. 47, no. 3, pp. 357-362, March 2003.
[55] M. Siu, P. K. T. Mok, K. N. Leung, Lam, Y. H. Lam, and K. Wing-Hung, “A voltage-
mode PWM buck regulator with end-point prediction,” IEEE Trans. Circuits Systems
- II, vol. 53, no. 4, pp. 294-298, April 2006.
[56] R. D. Middlebrook, “Small-signal modeling of pulse-width modulated switched-mode
power converters,” Proc. IEEE, vol. 76, no. 4, pp. 343-354, April 1988.
[57] A. Le and D. Lu, “Design of a single-switch dc-dc converter for a PV-battery-powered
pump system with PFM+PWM control,”IEEE Trans. Power Electronics, vol. 62,
no. 2, pp. 910-921, February 2015.
[58] S. Zhonghan, Y. Na, and M. Hao, “A multimode digitally controlled boost converter
with PID auto tuning and constant frequency/constant off-time hybrid PWM control,”
IEEE Trans. Power Electronics, vol. 26, no. 9, pp. 2588-2598, September 2011.
[59] J.A. Abu Qahouq, “Control scheme for sensorless operation and detection of CCM
and DCM operation modes in synchronous switching power converters,” IEEE Trans.
Power Electronics, vol. 25, no. 10, pp. 2489-2495, October 2010.
122 [60] J. A. Qahouq, O. A. Rahman, L. Huang, and I. Batarseh, “On load adaptive control
of voltage regulators for power managed loads: control schemes to improve converter
efficiency and performance,” IEEE Trans. Power Electronics, vol. 22, no. 5, pp.
1806-1819, September 2007.
[61] H. L. Do, “Zero-voltage-switching synchronous buck converter with a coupled induc-
tor,” IEEE Trans. Power Electronics, vol. 58, pp. 3440-3447, August 2011.
[62] C. Yeh and Y. Lai, “Digital pulse-width modulation technique for a synchronous buck
dc-dc converter to reduce switching frequency,” IEEE Trans. Power Electronics, vol.
59, no. 1, pp. 550-561, January 2012.
123 Publications
[1] A. Ayachit, D. K. Saini, and M. K. Kazimierczuk, “Two-Phase Buck DC-AC Converter
as Dynamic Power Supply for Amplitude-Modulated Class-DE Power Amplifier.” Ac-
cepted for publication at IEEE Midwest Symposium on Circuits and Systems, Fort
Collins, Colorado, August 2-5, 2015.
[2] A. Ayachit, D. K. Saini, and M. K. Kazimierczuk, “Three-Coil Wireless Power Transfer
Systems using Class E2 Resonant DC-DC Converter.” Accepted for publication at
IEEE International Telecommunications Energy Conference, Osaka, Japan, October
18-22, 2015.
[3] D. K. Saini and M. K. Kazimierczuk, “Analysis of Physical Properties of GaN and its
Performance in High-Frequency Power Electronic Circuits.” In review at IEEE Applied
Power Electronics Conference, Long Beach, California, March 20-24, 2016. Submitted
in July 2015.
[4] D. K. Saini, A. Ayachit, and M. K. Kazimierczuk, “Buck DC-AC Converter Using
Gallium Nitride FETs for Amplitude-Modulated Class-E RF Power Amplifiers.” In
review at IEEE Industrial Electronics Society Conference, Yokohama, Japan, Novem-
ber 9-12, 2015. Submitted in May 2015.
[5] D. K. Saini, A. Ayachit, and M. K. Kazimierczuk, “Small-Signal Analysis of PWM
Boost Converter in CCM with Complex Impedance Load.” In review at IEEE Indus-
trial Electronics Society Conference, Yokohama, Japan, November 9-12, 2015. Sub-
mitted in May 2015.
[6] A. Ayachit, D. K. Saini, and M. K. Kazimierczuk, “Analysis and Design of GaN
Synchronous Buck Dynamic Power Supply.” In review at IEEE Transactions on Power
Electronics. Submitted in June 2015.
124 [7] M. A. Saville, D. K. Saini, and J. Smith, “Commercial Vehicle Classification from
SPLIT-Attributed SAR Imagery.” In review at IET Radar, Sonar, and Navigation.
Submitted in June 2015.
125 Appendix A
Physical Constants and Values of Semiconductor Material Properties
This appendix provides the values of the physical constants and the values of the physical properties of silicon (Si), silicon-carbide (SiC), and gallium nitride (GaN) semiconductor materials.
Table A.1 provides the values of physical properties. Table A.2 lists the values of all the critical physical properties of Si, SiC, and GaN semiconductor materials.
Table A.1: Physical constants and their values Property Symbol Unit Value
kT Thermal voltage VT = q V 0.0259 at T = 300 K Boltzmann’s constant k = ET J/K 1.3806488 10 23 T × − Boltzmann’s constant k = ET eV/K 8.62 10 5 T × − Planck’s constant h J s 6.62617 10 34 · × − Planck’s constant h eV s 4.14 10 15 · × − Magnitude of electron charge q C 1.60218 10 19 × − −9 Free-space permittivity ǫ = 10 F/m 8.85418 10 12 0 36π × − Free-space permeability µ H/m 4π 10 7 0 × − Speed of light in free space c = 1 m/s 2.998 108 √ǫ0µ0 × Mass of free electron m kg 9.31 10 31 e × − Mass of free hole m kg 1.673 10 27 h × −
126 Table A.2: Properties of silicon, silicon carbide, and gallium nitride
Property Symbol Unit Value
Silicon band gap energy EG(Si) eV 1.12 Silicon band gap energy E J 1.793 10 19 G(Si) × − Silicon-carbide band gap energy EG(SiC) eV 3.26 Silicon-carbide band gap energy E J 5.216 10 19 G(SiC) × − Gallium-nitride band gap energy EG(GaN) eV 3.39 Gallium-nitride band gap energy E J 5.430 10 19 G(GaN) × −
Silicon-dioxide band gap energy EG(SiO2) eV 9 Silicon-dioxide band gap energy E J 14.449 10 19 G(SiO2) × − Silicon breakdown electric field E V/cm 2 105 BD(Si) × Silicon-carbide breakdown electric field E V/cm 22 105 BD(SiC) × Gallium-nitride breakdown electric field E V/cm 35 105 BD(GaN) × Silicon-dioxide breakdown electric field E V/cm 60 105 BD(SiO2) × Silicon relative permittivity ǫr(Si) – 11.7
Silicon-carbide relative permittivity ǫr(SiC) – 9.7
Gallium-nitride relative permittivity ǫr(GaN) – 8.9
Silicon-dioxide relative permittivity ǫr(SiO2) – 3.9 Silicon electron mobility at T = 300 K µ cm2/V s 1360 n(Si) · Silicon-carbide electron mobility at T = 300 K µ cm2/V s 900 n(SiC) · Gallium-nitride electron mobility at T = 300 K µ cm2/V s 2000 n(GaN) · Silicon hole mobility at T = 300 K µ cm2/V s 480 p(Si) · Silicon-carbide hole mobility at T = 300 K µ cm2/V s 120 p(SiC) · Gallium-nitride hole mobility at T = 300 K µ cm2/V s 30 p(GaN) · Silicon effective electron mass coefficient ke – 0.26
Silicon effective hole mass coefficient kh – 0.39
Silicon-carbide effective electron mass coefficient ke – 0.36
Silicon effective hole mass coefficient kh – 1
Gallium-nitride effective electron mass coefficient ke – 0.23
Gallium-nitride effective hole mass coefficient kh – 0.24
127