Datasheet Industrial Computing Module Byteengine I.MX6 Plus Ver

Datasheet industrial computing module byteENGINE i.MX6 Plus Ver. 0.2 – 14. 07 2019 DataSheet industrial computing module byteENGINE i.MX6 Plus Copyright notice

Reproduction in any form or by any prior written permission of the compa- to change without notice. While rea- means without permission is prohibit- ny. Information provided in this manual sonable efforts have been made in the ed. bytes at work reserves the right to is intended to be accurate and reliable. preparation of this document to assure make improvements to the products de- However, bytes at work assumes no its accuracy, bytes at work assumes no scribed in this manual at any time with- responsibility for its use, or for any in- liabilities resulting from errors or omis- out notice. fringements upon the rights of third par- sions in this document, or from the use ties that may result from its use. of the information contained herein. No part of this manual may be repro- bytes at work reserves the right to make duced, copied, translated, or transmitted The material in this document is for changes in the product design without in any form or by any means without the product information only and is subject notice to its users. Trademarks Product names, logos, brands, and other trademarks featured, or referred to are the property of their respective trademark holders. These include, but are not limited to uboot, Linux and ARM.

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Table of Contents

1. Hardware Revisions 4 2. Revisions history 4 2.1 Hardware revision 0.0 4 3. Overview 4 3.1 General Information 4 3.2 Technical Data 5 3.3 i.MX6 main processor block diagram 6 3.4 STM32F446 block diagram 7 3.5 Decision guidance byteENGINE i.MX6 Plus 8 3.6 Mechanical specification 8 3.7 byteENGINE i.MX6 Plus Connectors Overview 9 3.8 PINS TOOL IMX - configuring the i.MX6 Processor 10 4. Pinouts 11 4.1 Carrier board connectors SMARC 1.1 11 4.2 STM32F446 SWD Interface 18 4.3 SMARC voltage levels 18 5. Electrical specification 19 6. Boot Modes byteENGINE i.MX6 Plus 19 7. Thermal specification 19 8. Ordering Info 20 9. References 20 10. Contact information 21

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1. Hardware Revisions

Hardware Revision Marking on PCB Release Date 0.0 m4 Rev. 0.0 2017

2. Revisions history 2.1 Hardware revision 0.0

>> 0.0 is the first version available on sales.

3. Overview 3.1 General Information

The byteENGINE i.MX6 is a high perfor- cessor family. The i.MX6 features a Vi- The module is based on the SMARC 1.1 mance industrial oriented computing vanteTM Graphics Accelerator Subsys- standard which allows the integration module. It allows a short time-to-market, tem for 3D graphics acceleration. with our SMARC carrier board, existing reducing development costs and sub- 3rd party carrier boards or your own cus- stantial design risks. The STM32 co-processor allows for tom solution. realtime applications and the program- The system on module (SOM) uses the mable ESP32 wifi chip ensures wireless nxp i.MX6 industrial applications pro- connectivity.

Scalable platform Expandable design

>> The ARM© CortexTM A9 Processor Family consists of >> The module provides a matching Linux-Kernel. 5 PIN-compatible devices. As a result, the byteENGINE offers flexibility for almost any requirement. >> The i.MX 6 series of applications processors combines scalable platforms with broad levels of integration and >> The free available open-source code allows power-efficient processing capabilities particularly suited reliable functionality and maximum extensibility. to multimedia applications.

>> The module byteENGINE i.MX6 is the perfect basis for innovative developments.

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3.2 Technical Data

Feature Details CPU Architecture ARM® Cortex™ -A9 nxp i.MX6 QUAD/DUAL/DUAL LITE/SOLO: CPU LINK: Data Sheet i.MX Processors Frequency (max) 1200 MHz Floating Point YES (NEON™, SIMD & VFP) Cores 1-4 Co Processor STM32F446 32-bit ARM® Cortex®-M4 with FPU/MPU up to 180Mhz Memory SDRAM up to 4 GB DDR3 Flash up to 64 GB eMMC, additional eMMC on carrier board possible SPI-NOR 16 MB EEPROM 32 KB (containing HW configuration and user data) Ethernet Speed 1x 10/100/1.000 (Mbit/s) Multimedia Video Parallel RGB 24bit, LVDS, HDMI 2D/3D Graphics Vivante Touchscreen Supported Audio I2S, S/PDIF Camera MIPI Camera Serial Interface (CSI) Expansion SD/MMC/SDIO 1 eMMC 1 SATA 1 PCIe 1 Serial SPI 2 I2C 4 UART 4 CAN 2 USB Host 2 HS (2.0) OTG 2 HS (2.0) Miscellaneous Watchdog Timers 2 JTAG Yes Serial Console 1 GPIO 12 GPIOS PWM / ECAP / QEP as alternate function Boot Mode Selectable with Strapping Pins on Baseboard Mechanical Input, I/O Voltage 5 V, 1.8 V Information Power Consumption ~7 W Dimensions 82 x 50 mm Operational Temperature -40° to +85° C Connector SMARC 1.1: follow LINK Operating System Yes Linux (yocto) meta-bytesatwork available on github: follow LINK

LINK: LINK: SMARC 1.1 meta-bytesatwork on github

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3.3 i.MX6 main processor block diagram The NXP i.MX6 processor is based on scalable ARM© Cortex©-A9 core which is a high-performance processor designed around the high efficiency dual-issue superscalar. It delivers exceptional levels of performance and power efficiency with the functionality required for leading edge products across the broad range of consumer, networking, enterprise and mobile applications. The i.MX6 microprocessor contains the subsystems shown in the Functional Block Diagram:

Key features of i.MX6 Plus LINK: Data Sheet i.MX6 Processor >> ARM© Cortex©-A9 processor with 1.2GHz, scalable up to quad core

>> Enhanced capabilities of high-tier portable applications by fulfilling MIPS needs of operations systems and games

>> Multilevel memory system

>> Smart speed technology that enables the designer to deliver a feature-rich product, requiring levels of power far lower than industry expectations

>> Dynamic voltage and frequency scaling

>> Powerful graphics acceleration in HD quality

>> Interface flexibility

>> Integrated power management throughout the device

>> Advanced hardware-enabled security

>> The scalable memory (up to 4GB) can be operated from -40˚ up to +85˚ Celsius

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3.4 STM32F446 block diagram The STM32F446 product line enables high performance and rich connectivity into a highly integrated and energy efficient product, starting from 256K Flash. It leverages ST’s proprietary ART Accelerator™, smart architecture, advanced Flash technology and its embedded ARM© Cortex©-M4 core to achieve leading performance. Efficient simultaneous communication via multiple interfaces enables smarter and more interactive industrial, scientific, medical, and Internet-of-Things (IoT) applications. Advanced process technology, dynamic voltage scaling, extensive clock gating and flexible sleep modes allow significant power savings. The microprocessor contains the subsystems shown in the Functional Block Diagram: LINK: Data Sheet STM32F446 Processor Key Features of STM32F446

>> Performance: At 180 MHz, the STM32F446 delivers 225 DMIPS/608 CoreMark performance executing from Flash memory, with 0-wait states thanks to ST’s ART Accelerator. The DSP instructions and the floating point unit enlarge the range of addressable applications.

>> Power efficiency: ST’s 90 nm process, ART Accelerator and the dynamic power scaling enables the current consumption in run mode and executing from Flash memory to be as low as 200 µA/MHz at 180 MHz. In Stop mode, the power consumption is 50 µA typical.

>> Integration: 2 dedicated audio PLL, SPDIF input, 3 half duplex I²S , and 2 serial audio interfaces (SAI) supporting full duplex I²S as well as time division multiplex (TDM) mode. Up to 20 communication interfaces (including 4x USARTs plus 2x UARTs running at up to 11.25 Mbit/s, 4x SPI running at up to 45 Mbit/s, 3x I²C with a new optional digital filter capa- bility, 2x CAN, SDIO, HDMI CEC and camera interface.

512-Kbyte ART Accelerator™ Flash memory Control 128-Kbyte SRAM 2x 16-bit motor control System External memory interface PWM W/SDRAM support synchronized AC timer Power supply 1.2V internal regulator POR/PDR/PVD 80-byte + 4-Kbyte 2x 32-bit timers 180 MHz backup data 10x 16-bit timers Xtal oscillators ® ® 32 kHz +4 ~26 MHz ARM Cortex -M4 512 OTP bytes Internal RC oscillators CPU Dual Quad SPI 32 kHz + 16 MHz Floating Point Unit PLL (FPU) Connectivity Clock control Nested Vector Interrupt Controller (NVIC) Camera interface RTC/AWU JTAG/SW debug 4x SPI (3x with I2S) 1x SysTick timer Embedded Trace 2x CAN 2.0B Analog 2x watchdogs Macrocell (ETM) 2 (independent and window) 4x I C 2x 12-bit DAC Memory Protection 1x USB 2.0 OTG FS 2-channel 50/63/81/114 I/Os Unit (MPU) 1x USB 2.0 OTG FS/HS Up to 3x 12-bit ADC Cyclic Redundancy Check (CRC) 2.4 MSPS 1x SDMMC 96-bit unique ID Up to 24 channels 4x USART + 2x UART LIN, 7.2 MSPS Voltage scaling smartcard, IrDA, modern control Temperature sensor Multi-AHB bus matrix 2x SAI (Serial Audio Interface) 16-channel DMA HDMI CEC SPDIF input x4

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3.5 Decision guidance byteENGINE i.MX6 Plus

The following three steps help identifying the suitable NXP i.MX6 Processor for the specific customer application.

>> Step 1: The choice of needed CPU Cores.

>> CPU Cores: SOLO, DUAL LITE, DUAL, QUAD

>> Step 2: The choice of needed eMMC capacity.

>> Min: 8 GB (eMMC)

>> Max: 64 GB (eMMC)

>> Step 3: The choice of needed RAM capacity.

>> Min: 256 MB (DDR3)

>> Max: 4 GB MB (DDR3)

3.6 Mechanical specification

The byteENGINE i.MX6 module conforms to version 1.1 of the SMARC specification. The following figure details the basic proportions of the Follow LINK: SMARC format of the byteENGINE i.MX6 module. For a detailed descrip- SMARC 1.1 tion please refer to the LINK: SMARC 1.1.

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3.7 byteENGINE i.MX6 Plus Connectors Overview

The following illustration shows the „Default-Configuration“ of the byteENGINE i.MX6 Plus. The function ofthe components shown in blue squares cannot be changed. The yellow squares shows the SMARC 1.1 module connectors. The functions of the SMARC 1.1 can be adapted and each connector module serves multiple functions. The detailled pinout-functions are shown in chapter „4. Pinouts“

LINK: „3.5 Decision guidance byteENGINE i.MX6 Plus“

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3.8 PINS TOOL IMX - configuring the i.MX6 Processor

The PINS TOOL for i.MX Application The Pins Tool for i.MX Application Pro- Processors is the successor of Pro- cessors is installed as a desktop tool NOTICE Follow the Link to PINS-TOOL-IMX. cessor Expert® Software for i.MX Pro- which then loads additional device infor- Click on “DOWNLOAD” and choose the cessors. The new Pins Tool makes pin mation through a network connection, PINS-TOOL for your specific Operation configuration easier and faster with an but does not need internet connection. It System (Linux, Windows or OSX). intuitive and easy user interface, which does not require a project setup, as all then generates normal C code that can the settings are stored in text and gen- LINK: then be used in any C and C++ applica- erated source files, which then can be PINS-TOOL-IMX tion. The Pins Tool configures pin signals easily stored in a version control system from multiplexing (muxing) to the electri- or exchanged with other users. cal properties of pins, and it also creates LINK: Device Tree Snippets Include (.dtsi) files The LINK on the right side delivers a and reports in CSV format. prepared PINS TOOL File and a prepared Prepared PINS-TOOL-File Step Model from bytes at work:

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4. Pinouts The multiple pin configurations must be taken note when using processor signals. The pins of the module connectors are described in detail in the following tables.

4.1 Carrier board connectors SMARC 1.1

Pin MARC Pin Name Power Domain Note Pin Name IC IC P1 PCAM_PXL_CK1 n/c P2 GND P3 CSI1_CK+ / PCAM_D0 n/c P4 CSI1_CK- / PCAM_D1 n/c P5 PCAM_DE n/c P6 PCAM_MCK n/c P7 CSI1_D0+ / PCAM_D2 n/c P8 CSI1_D0- / PCAM_D3 n/c P9 GND P10 CSI1_D1+ / PCAM_D4 n/c P11 CSI1_D1- / PCAM_D5 n/c P12 GND P13 CSI1_D2+ / PCAM_D6 n/c P14 CSI1_D2- / PCAM_D7 n/c P15 GND P16 CSI1_D3+ / PCAM_D8 n/c P17 CSI1_D3- / PCAM_D9 n/c P18 GND P19 GBE_MDI3- TRXN3 GBE PHY P20 GBE_MDI3+ TRXP3 GBE PHY P21 GBE_LINK100# P22 GBE_LINK1000# P23 GBE_MDI2- P24 GBE_MDI2+ P25 GBE_LINK_ACT# P26 GBE_MDI1- P27 GBE_MDI1+ P28 GBE_CTREF n/c P29 GBE_MDI0- P30 GBE_MDI0+ P31 SPI0_CS1# NVCC_EIM0 EIM_A25 i.MX6 P32 GND P33 SDIO_WP NVCC_GPIO Voltage-Level Shifter GPIO_2 i.MX6 P34 SDIO_CMD NVCC_SD2 SD2_CMD i.MX6 P35 SDIO_CD# NVCC_GPIO Voltage-Level Shifter GPIO_4 i.MX6 P36 SDIO_CK NVCC_SD2 SD2_CLK i.MX6 P37 SDIO_PWR_EN NVCC_GPIO Voltage-Level Shifter KEY_ROW1 i.MX6 P38 GND P39 SDIO_D0 NVCC_SD2 SD2_DAT0 i.MX6

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Pin MARC Pin Name Power Domain Note Pin Name IC IC P40 SDIO_D1 NVCC_SD2 SD2_DAT1 i.MX6 P41 SDIO_D2 NVCC_SD2 SD2_DAT2 i.MX6 P42 SDIO_D3 NVCC_SD2 SD2_DAT3 i.MX6 P43 SPI0_CS0# NVCC_EIM0 EIM_D20 i.MX6 P44 SPI0_CK NVCC_EIM0 EIM_D21 i.MX6 P45 SPI0_DIN NVCC_EIM0 EIM_D22 i.MX6 P46 SPI0_DO NVCC_EIM0 EIM_D28 i.MX6 P47 GND P48 SATA_TX+ SATA_VPH SATA_TXP i.MX6 P49 SATA_TX- SATA_VPH SATA_TXM i.MX6 P50 GND P51 SATA_RX+ SATA_VPH SATA_RXP i.MX6 P52 SATA_RX- SATA_VPH SATA_RXM i.MX6 P53 GND P54 SPI1_CS0# NVCC_EIM1 EIM_RW i.MX6 P55 SPI1_CS1# NVCC_EIM1 EIM_LBA i.MX6 P56 SPI1_CK NVCC_EIM1 EIM_CS0 i.MX6 P57 SPI1_DIN NVCC_EIM1 EIM_OE i.MX6 P58 SPI1_DO NVCC_EIM1 EIM_CS1 i.MX6 P59 GND P60 USB0+ USB_OTG_DP i.MX6 P61 USB0- USB_OTG_DN i.MX6 P62 USB0_EN_OC# NVCC_ENET ENET_TXD0 i.MX6 P63 USB0_VBUS_DET USB_OTG_VBUS i.MX6 P64 USB0_OTG_ID NVCC_ENET ENET_RX_ER i.MX6 P65 USB1+ DP1 USBHUB P66 USB1- DM1 USBHUB P67 USB1_EN_OC# CSB1 USBHUB P68 GND P69 USB2+ DP2 USBHUB P70 USB2- DM2 USBHUB P71 USB2_EN_OC# CSB2 USBHUB P72 PCIE_C_PRSNT# n/c P73 PCIE_B_PRSNT# n/c P74 PCIE_A_PRSNT# n/c P75 PCIE_A_RST# NVCC_ENET ENET_RXD0 i.MX6 P76 PCIE_C_CKREQ# n/c P77 PCIE_B_CKREQ# n/c P78 PCIE_A_CKREQ# n/c P79 GND P80 PCIE_C_REFCK+ n/c P81 PCIE_C_REFCK- n/c P82 GND P83 PCIE_A_REFCK+ CLK1_P i.MX6 P84 PCIE_A_REFCK- CLK1_N i.MX6 P85 GND P86 PCIE_A_RX+ PCIE_RXP i.MX6 P87 PCIE_A_RX- PCIE_RXM i.MX6

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Pin MARC Pin Name Power Domain Note Pin Name IC IC P88 GND P89 PCIE_A_TX+ PCIE_TXP i.MX6 P90 PCIE_A_TX- PCIE_TXM i.MX6 P91 GND P92 HDMI_D2+ HDMI_D2P i.MX6 P93 HDMI_D2- HDMI_D2M i.MX6 P94 GND P95 HDMI_D1+ HDMI_D1P i.MX6 P96 HDMI_D1- HDMI_D1M i.MX6 P97 GND P98 HDMI_D0+ HDMI_D0P i.MX6 P99 HDMI_D0- HDMI_D0M i.MX6 P100 GND P101 HDMI_CK+ HDMI_CLKP i.MX6 P102 HDMI_CK- HDMI_CLKM i.MX6 P103 GND P104 HDMI_HPD HDMI_VPH HDMI_HPD i.MX6 P105 HDMI_CTRL_CK selectable by R42/R43 KEY_COL3/EIM_EB2 i.MX6 P106 HDMI_CTRL_DAT selectable by R44/R45 KEY_ROW3/EIM_D16 i.MX6 P107 HDMI_CEC HDMI_DDCCEC i.MX6 P108 GPIO0 / CAM0_PWR# 3.3V P109 GPIO1 / CAM1_PWR# 3.3V P110 GPIO2 / CAM0_RST# 3.3V P111 GPIO3 / CAM1_RST# 3.3V P112 GPIO4 / HDA_RST# 3.3V P113 GPIO5 / PWM_OUT 3.3V P114 GPIO6 / TACHIN 3.3V P115 GPIO7 / PCAM_FLD 3.3V P116 GPIO8 / CAN0_ERR# 3.3V P117 GPIO9 / CAN1_ERR# 3.3V P118 GPIO10 3.3V P119 GPIO11 3.3V P120 GND P121 I2C_PM_CK NVCC_GPIO KEY_COL3 i.MX6 P122 I2C_PM_DAT NVCC_GPIO KEY_ROW3 i.MX6 P123 BOOT_SEL0# DIFFIO_B1p CPLD P124 BOOT_SEL1# DIFFIO_B1n CPLD P125 BOOT_SEL2# DIFFIO_B2p CPLD P126 RESET_OUT# NVCC_NANDF NANDF_CLE i.MX6 P127 RESET_IN# P128 POWER_BTN# VDD_SNVS_IN ONOFF i.MX6 P129 SER0_TX NVCC_CSI CSI0_DAT12 i.MX6 P130 SER0_RX NVCC_CSI CSI0_DAT13 i.MX6 P131 SER0_RTS# NVCC_CSI CSI0_DAT16 i.MX6 P132 SER0_CTS# NVCC_CSI CSI0_DAT17 i.MX6 P133 GND P134 SER1_TX NVCC_CSI CSI0_DAT10 i.MX6 P135 SER1_RX NVCC_CSI CSI0_DAT11 i.MX6

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Pin MARC Pin Name Power Domain Note Pin Name IC IC shared with wifi/BLE P136 SER2_TX NVCC_CSI CSI0_DAT14 i.MX6 module shared with wifi/BLE P137 SER2_RX NVCC_CSI CSI0_DAT15 i.MX6 module shared with wifi/BLE P138 SER2_RTS# NVCC_CSI CSI0_DAT18 i.MX6 module shared with wifi/BLE P139 SER2_CTS# NVCC_CSI CSI0_DAT19 i.MX6 module P140 SER3_TX NVCC_EIM0 EIM_D26 i.MX6 P141 SER3_RX NVCC_EIM0 EIM_D27 i.MX6 P142 GND P143 CAN0_TX NVCC_GPIO KEY_COL2 i.MX6 P144 CAN0_RX NVCC_GPIO KEY_ROW2 i.MX6 P145 CAN1_TX NVCC_GPIO KEY_COL4 i.MX6 P146 CAN1_RX NVCC_GPIO KEY_ROW4 i.MX6 P147 VDD_IN 5.0V P148 VDD_IN 5.0V P149 VDD_IN 5.0V P150 VDD_IN 5.0V P151 VDD_IN 5.0V P152 VDD_IN 5.0V P153 VDD_IN 5.0V P154 VDD_IN 5.0V P155 VDD_IN 5.0V P156 VDD_IN 5.0V S1 PCAM_VSYNC n/c S2 PCAM_HSYNC n/c S3 GND S4 PCAM_PXL_CK0 n/c S5 I2C_CAM_CK NVCC_CSI CSI0_DAT9 i.MX6 shared with AUDIO_MCK S6 CAM_MCK NVCC_GPIO GPIO_0 i.MX6 (R128) S7 I2C_CAM_DAT NVCC_CSI CSI0_DAT8 i.MX6 S8 CSI0_CK+ / PCAM_D10 NVCC_MIPI CSI_CLK0P i.MX6 S9 CSI0_CK- / PCAM_D11 NVCC_MIPI CSI_CLK0M i.MX6 S10 GND S11 CSI0_D0+ / PCAM_D12 NVCC_MIPI CSI_D0P i.MX6 S12 CSI0_D0- / PCAM_D13 NVCC_MIPI CSI_D0M i.MX6 S13 GND S14 CSI0_D1+ / PCAM_D14 NVCC_MIPI CSI_D1P i.MX6 S15 CSI0_D1- / PCAM_D15 NVCC_MIPI CSI_D1M i.MX6 S16 GND S17 AFB0_OUT STM_GPIO1 PB12 STM32 S18 AFB1_OUT STM_GPIO2 PC6 STM32 S19 AFB2_OUT STM_PWM PB8 STM32 S20 AFB3_IN STM_GPIO3 PB14 STM32 S21 AFB4_IN STM_GPIO4 PB15 STM32 S22 AFB5_IN STM_eCAP PA8 STM32 S23 AFB6_PTIO STM_ADC0 ?PA0-WKUP PA0 STM32 S24 AFB7_PTIO STM_ADC1 PA1 STM32

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Pin MARC Pin Name Power Domain Note Pin Name IC IC S25 GND S26 SDMMC_D0 NVCC_NANDF SD4_DAT0 i.MX6 S27 SDMMC_D1 NVCC_NANDF SD4_DAT1 i.MX6 S28 SDMMC_D2 NVCC_NANDF SD4_DAT2 i.MX6 S29 SDMMC_D3 NVCC_NANDF SD4_DAT3 i.MX6 S30 SDMMC_D4 NVCC_NANDF SD4_DAT4 i.MX6 S31 SDMMC_D5 NVCC_NANDF SD4_DAT5 i.MX6 S32 SDMMC_D6 NVCC_NANDF SD4_DAT6 i.MX6 S33 SDMMC_D7 NVCC_NANDF SD4_DAT7 i.MX6 S34 GND S35 SDMMC_CK NVCC_NANDF SD4_CLK i.MX6 S36 SDMMC_CMD NVCC_NANDF SD4_CMD i.MX6 S37 SDMMC_RST# NVCC_NANDF NANDF_ALE i.MX6 shared with CAM_MCK S38 AUDIO_MCK NVCC_GPIO GPIO_0 i.MX6 (R129) S39 I2S0_LRCK NVCC_CSI CSI0_DAT6 i.MX6 S40 I2S0_SDOUT NVCC_CSI CSI0_DAT5 i.MX6 S41 I2S0_SDIN NVCC_CSI CSI0_DAT7 i.MX6 S42 I2S0_CK NVCC_CSI CSI0_DAT4 i.MX6 S43 I2S1_LRCK n/c S44 I2S1_SDOUT n/c S45 I2S1_SDIN n/c S46 I2S1_CK n/c S47 GND S48 I2C_GP_CK NVCC_GPIO bitbang GPIO_7 i.MX6 S49 I2C_GP_DAT NVCC_GPIO bitbang GPIO_8 i.MX6 S50 I2S2_LRCK n/c S51 I2S2_SDOUT n/c S52 I2S2_SDIN n/c S53 I2S2_CK n/c S54 SATA_ACT# n/c STM_ADC2 BL- S55 AFB8_PTIO VDDA STM32 M21AG601SN S56 AFB9_PTIO STM_ADC3 VSSA STM32 S57 PCAM_ON_CSI0# n/c S58 PCAM_ON_CSI1# n/c S59 SPDIF_OUT NVCC_GPIO GPIO_17 i.MX6 S60 SPDIF_IN NVCC_GPIO GPIO_16 i.MX6 S61 GND S62 AFB_DIFF0+ STM_MOSI PC1 STM32 S63 AFB_DIFF0- STM_MISO PC2 STM32 S64 GND S65 AFB_DIFF1+ STM_SCLK PC7 STM32 S66 AFB_DIFF1- STM_CS (NJTRST) PB4 STM32 S67 GND S68 AFB_DIFF2+ STM_I2C_SDA PB9 STM32 S69 AFB_DIFF2- STM_I2C_SCL PB6 STM32 S70 GND

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Pin MARC Pin Name Power Domain Note Pin Name IC IC S71 AFB_DIFF3+ STM_UART_RX PC5 STM32 S72 AFB_DIFF3- STM_UART_TX PB10 STM32 S73 GND S74 AFB_DIFF4+ STM_CAN_RX PB5 STM32 S75 AFB_DIFF4- STM_CAN_TX PB13 STM32 S76 PCIE_B_RST# n/c S77 PCIE_C_RST# n/c S78 PCIE_C_RX+ n/c S79 PCIE_C_RX- n/c S80 GND S81 PCIE_C_TX+ n/c S82 PCIE_C_TX- n/c S83 GND S84 PCIE_B_REFCK+ n/c S85 PCIE_B_REFCK- n/c S86 GND S87 PCIE_B_RX+ n/c S88 PCIE_B_RX- n/c S89 GND S90 PCIE_B_TX+ n/c S91 PCIE_B_TX- n/c S92 GND S93 LCD_D0 NVCC_LCD DISP0_DAT0 i.MX6 S94 LCD_D1 NVCC_LCD DISP0_DAT1 i.MX6 S95 LCD_D2 NVCC_LCD DISP0_DAT2 i.MX6 S96 LCD_D3 NVCC_LCD DISP0_DAT3 i.MX6 S97 LCD_D4 NVCC_LCD DISP0_DAT4 i.MX6 S98 LCD_D5 NVCC_LCD DISP0_DAT5 i.MX6 S99 LCD_D6 NVCC_LCD DISP0_DAT6 i.MX6 S100 LCD_D7 NVCC_LCD DISP0_DAT7 i.MX6 S101 GND S102 LCD_D8 NVCC_LCD DISP0_DAT8 i.MX6 S103 LCD_D9 NVCC_LCD DISP0_DAT9 i.MX6 S104 LCD_D10 NVCC_LCD DISP0_DAT10 i.MX6 S105 LCD_D11 NVCC_LCD DISP0_DAT11 i.MX6 S106 LCD_D12 NVCC_LCD DISP0_DAT12 i.MX6 S107 LCD_D13 NVCC_LCD DISP0_DAT13 i.MX6 S108 LCD_D14 NVCC_LCD DISP0_DAT14 i.MX6 S109 LCD_D15 NVCC_LCD DISP0_DAT15 i.MX6 S110 GND S111 LCD_D16 NVCC_LCD DISP0_DAT16 i.MX6 S112 LCD_D17 NVCC_LCD DISP0_DAT17 i.MX6 S113 LCD_D18 NVCC_LCD DISP0_DAT18 i.MX6 S114 LCD_D19 NVCC_LCD DISP0_DAT19 i.MX6 S115 LCD_D20 NVCC_LCD DISP0_DAT20 i.MX6 S116 LCD_D21 NVCC_LCD DISP0_DAT21 i.MX6 S117 LCD_D22 NVCC_LCD DISP0_DAT22 i.MX6

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Pin MARC Pin Name Power Domain Note Pin Name IC IC S118 LCD_D23 NVCC_LCD DISP0_DAT23 i.MX6 S119 GND S120 LCD_DE NVCC_LCD DI0_PIN15 i.MX6 S121 LCD_VS NVCC_LCD DI0_PIN3 i.MX6 S122 LCD_HS NVCC_LCD DI0_PIN2 i.MX6 S123 LCD_PCK NVCC_LCD DI0_DISP_CLK i.MX6 S124 GND S125 LVDS0+ NVCC_LVDS_2P5 LVDS0_TX0_P i.MX6 S126 LVDS0- NVCC_LVDS_2P5 LVDS0_TX0_N i.MX6 S127 LCD_BKLT_EN NVCC_NANDF NANDF_CS2 i.MX6 S128 LVDS1+ NVCC_LVDS_2P5 LVDS0_TX1_P i.MX6 S129 LVDS1- NVCC_LVDS_2P5 LVDS0_TX1_N i.MX6 S130 GND S131 LVDS2+ NVCC_LVDS_2P5 LVDS0_TX2_P i.MX6 S132 LVDS2- NVCC_LVDS_2P5 LVDS0_TX2_N i.MX6 S133 LCD_VDD_EN NVCC_NANDF NANDF_CS1 i.MX6 S134 LVDS_CK+ NVCC_LVDS_2P5 LVDS0_CLK_P i.MX6 S135 LVDS_CK- NVCC_LVDS_2P5 LVDS0_CLK_N i.MX6 S136 GND S137 LVDS3+ NVCC_LVDS_2P5 LVDS0_TX3_P i.MX6 S138 LVDS3- NVCC_LVDS_2P5 LVDS0_TX3_N i.MX6 S139 I2C_LCD_CK NVCC_GPIO GPIO_3 i.MX6 S140 I2C_LCD_DAT NVCC_GPIO GPIO_6 i.MX6 S141 LCD_BKLT_PWM NVCC_GPIO GPIO_9 i.MX6 S142 RSVD n/c S143 GND S144 RSVD / EDP_HPD n/c S145 WDT_TIME_OUT# S146 PCIE_WAKE# S147 VDD_RTC RTC backup battery S148 LID# S149 SLEEP# S150 VIN_PWR_BAD# S151 CHARGING# S152 CHARGER_PRSNT# S153 CARRIER_STBY# S154 CARRIER_PWR_ON S155 FORCE_RECOV# n/c S156 BATLOW# S157 TEST# n/c S158 GND

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4.2 STM32F446 SWD Interface Pin Name The new ARM® Cortex®--M4 CPU does not require trace. So, an even 1 Vref (1.8V) smaller connector can be used. JTAG was the traditional mechanism 2 SWDIO for debug connections for ARM7/9 parts, but with the Cortex®-M fami- 3 GND ly, ARM® introduced the Serial Wire Debug (SWD) Interface. SWD is de- 4 SWCLK signed to reduce the pin count required for debug. The Cortex® Debug 5 GND Connector SL2 has only 10 pins. See the chart on the right side: 6 NC 7 NC 8 NC 9 GND 10 Reset

4.3 SMARC voltage levels

The SMARC („Smart Mobility ARChitecture“) is a versatile Component Voltage small form factor computer Module definition targeting LCD CMOS 1.8V applications that require low power, low costs, and high LCD Support Signals CMOS 1.8V performance. The following table summarizes the major LVDS LVDS LCD pin groupings and shows the pin count associated with HDMI Diff TMDS supporting the group. HDMI CTRL CMOS 1.8V CAM Support Signals CMOS 1.8V CAM I2C CMOS 1.8V CAM DIFF LVDS -D-PHY ATTENTION Parallel CAM CMOS 1.8V Not all components are on the same voltage level. The yellow SDIO CARD CMOS 3.3V marked „components“ require a different voltage level than 1.8 V. eMMC CMOS 1.8V SPI0 CMOS 1.8V SPI1 CMOS 1.8V I2S CMOS 1.8V HDA CMOS 1.8V SPDIF CMOS 1.8V I2C CMOS 1.8V SERIAL CMOS 1.8V CAN CMOS 1.8V USB_EN_OC# CMOS 3.3V USB_OTG_ID CMOS 3.3V USB_VBUS_DET VBUS 5V PCIE_DIFF LVDS PCIe PCIE_RST,PRSNT,CKREQ CMOS 3.3V PCIE_WAKE# CMOS 3.3V SATA DIFF SATA SATA_ACT# CMOS 3.3V GBE Diff GBE MDI GBE_LINK100# CMOS 3.3V GBE_LINK1000# CMOS 3.3V GBE_ACT# CMOS 3.3V GBE_CTREF Center Tap (VREF) WDT CMOS 1.8V GPIOs CMOS 1.8V Management Pins CMOS 1.8V VIN_PWR_BAD# CMOS VDD_IN Bootselect CMOS 1.8V

5. Electrical specification

>> The nominal input voltage VDD_IN is 5 V. It is converted to 4.2 V for the SoC by a buck converter.

>> Most I/O pins are rated at 1.8 V, with a few exceptions. For details please refer to the Pinout section.

>> The module powers on as soon as VIN_POWER_BAD is set to high.

>> For the i.MX6 QUAD variant, a 42 Watt power supply is recommended.

6. Boot Modes byteENGINE i.MX6 Plus

>> According to the SMARC 1.1 specification, LINK: the boot source is selected by the pins Data Sheet i.MX6 Processor BOOT_SEL0# - BOOT_SEL2#.

>> This pins are pulled up by the byteENGINE Module and LINK: must be connected to GND or left floating. Schematic of SMARC 1.1 Connector

Carrier Connection Boot Source BOOT_SEL2# BOOT_SEL1# BOOT_SEL0# GND GND GND Carrier SATA GND GND Float Carrier SD Card GND Float GND Carrier eMMC Flash GND Float Float Carrier SPI Float GND GND Module device (NAND, NOR) Float GND Float Remote boot (GBE, serial) Float Float GND Module eMMC Flash Float Float Float Module SPI

NOTICE 7. Thermal specification For specifics concerning heat spreader and heat sink solutions, please refer to the chapters „6.9 Thermal Attachment The components used on the Heat spreader and heat sink solutions Points“ and „6.10 Heat Spreader – 82mm x 50mm Module“ in the SMARC byteENGINE i.MX6 are rated for an op- are defined in the SMARC specification, 1.1 Hardware Specification manual. erating temperature between -40° and for specifics please refer to the sections +85° Celsius. The i.MX6 SoC produces „6.9 Thermal Attachment Points“ and LINK: a significant amount of heat. And this „6.10 Heat Spreader – 82mm x 50mm must be taken into account, when de- Module“ in the Smart Mobility ARChitec- SMARC 1.1 Hardware signing a heat dissipation solution. ture Hardware Specification manual. Specification Manual

8. Ordering Info

The Ordering Code allows the customer to recognize easily the detailed specification of the ordered SOM. Please refer to LINK: Data Sheet i.MX Processors for possible CPU type and clock speed combinations.

SOM-i.MX6_Plus[x]_[SPEED]_R[xxx MB]_[E][GB]_[C, I] i.MX6_Plus[x]: CPU type Q: nxp i.MX6 Quad [SPEED GHz]: Clock speed 4 x 1.0, 4 x 1.2 R[xxx MB]: RAM size 256, 512, 1024, 2048, 4096 MB [E]: FLASH type [E] eMMC [GB]: FLASH size eMMC: 8, 16, 32, 64 GB [C, I]: Temperature range [C] Customer 0° to +70° Celsius [I] Industrial -40° to +85° Celsius

9. References

NOTICE Files can only be downloaded with login credentials. Please request your download credentials via [email protected] or contact your sales representative.

LINKS:

>> Prepared PINS-TOOL file Chapter: 3.8

>> NXP Pins Tool Chapter: 3.8

>> Prepared Step Model

>> Schematic of SMARC 1.1 connector Chapter: 4.1

>> meta-bytesatwork on github Chapter: 3.2

>> NXP i.MX6 Series WEB LINK Chapter: 3.2, 3.3

>> NXP i.MX6Q Processors Data Sheet Chapter: 3.3

>> STM32F446 Processors Data Sheet Chapter: 3.4

>> SMARC 1.1 (Smart Mobility ARChitecture) Chapter: 3.6

10. Contact information

>> bytes at work AG Technoparkstrasse 7 CH-8406 Winterthur Switzerland >> Phone: +41 52 213 79 79 Fax: +41 52 203 27 13

>> eMail: [email protected]

>> Product Information: www.bytesatwork.io

>> Help: www.bytesatwork.io/support