Intel® Xeon® E-2100 Processor Family Datasheet, Volume 1 of 2 August 2018 Revision 001 Document Number: 338012-001 Legal Lines and Disclaimers Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Learn more at Intel.com, or from the OEM or retailer. No computer system can be absolutely secure. Intel does not assume any liability for lost or stolen data or systems or any damages resulting from such losses. You may not use or facilitate the use of this document in connection with any infringement or other legal analysis concerning Intel products described herein. You agree to grant Intel a non-exclusive, royalty-free license to any patent claim thereafter drafted which includes subject matter disclosed herein. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. 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All rights reserved. 2 Intel® Xeon® E-2100 Processor Family Datasheet, Volume 1 of 2, August 2018 Contents 1Introduction..............................................................................................................9 1.1 Supported Technologies ..................................................................................... 12 1.2 Power Management Support ............................................................................... 12 1.2.1 Processor Core Power Management........................................................... 12 1.2.2 System Power Management..................................................................... 12 1.2.3 Memory Controller Power Management...................................................... 13 1.2.4 Processor Graphics Power Management ..................................................... 13 1.3 Thermal Management Support ............................................................................ 13 1.4 Package Support ............................................................................................... 14 1.5 Ballout Information............................................................................................ 14 1.6 Processor Testability .......................................................................................... 14 1.7 Terminology ..................................................................................................... 14 1.8 Related Documents ........................................................................................... 16 2Interfaces................................................................................................................ 18 2.1 System Memory Interface .................................................................................. 18 2.1.1 System Memory Technology Supported ..................................................... 18 2.1.2 System Memory Timing Support............................................................... 19 2.1.3 System Memory Organization Modes......................................................... 20 2.1.4 System Memory Frequency...................................................................... 21 2.1.5 Technology Enhancements of Intel® Fast Memory Access (Intel® FMA).......... 21 2.1.6 Data Scrambling .................................................................................... 22 2.1.7 DDR I/O Interleaving .............................................................................. 22 2.1.8 Data Swapping ...................................................................................... 23 2.1.9 DRAM Clock Generation........................................................................... 23 2.1.10 DRAM Reference Voltage Generation......................................................... 23 2.2 PCI Express* Graphics Interface (PEG)................................................................. 23 2.2.1 PCI Express Support ............................................................................... 23 2.2.2 PCI Express Architecture ......................................................................... 25 2.2.3 PCI Express Configuration Mechanism ....................................................... 26 2.2.4 PCI Express Equalization Methodology....................................................... 26 2.3 Direct Media Interface (DMI)............................................................................... 27 2.3.1 DMI Lane Reversal and Polarity Inversion .................................................. 27 2.3.2 DMI Error Flow....................................................................................... 28 2.3.3 DMI Link Down ...................................................................................... 28 2.4 Processor Graphics ............................................................................................ 29 2.4.1 Operating Systems Support ..................................................................... 29 2.4.2 API Support (Windows*) ......................................................................... 29 2.4.3 Media Support (Intel® QuickSync and Clear Video Technology HD) ............... 30 2.4.4 Switchable/Hybrid Graphics ..................................................................... 32 2.4.5 Gen 9 LP Video Analytics ......................................................................... 33 2.4.6 Gen 9 LP (9th Generation Low Power) Block Diagram .................................. 34 2.4.7 GT2 Graphic Frequency ........................................................................... 34 2.5 Display Interfaces ............................................................................................. 35 2.5.1 DDI Configuration .................................................................................. 35 2.5.2 eDP* Bifurcation .................................................................................... 36 2.5.3 Display Technologies .............................................................................. 36 2.5.4 DisplayPort* .......................................................................................... 39 2.5.5 High-Definition Multimedia Interface (HDMI*) ............................................ 39 2.5.6 Digital Video Interface (DVI).................................................................... 40 2.5.7 embedded DisplayPort* (eDP*) ................................................................ 40 Intel® Xeon® E-2100 Processor Family 3 Datasheet, Volume 1 of 2, August 2018 2.5.8 Integrated Audio ....................................................................................40 2.5.9 Multiple Display Configurations (Dual Channel DDR) ....................................41 2.5.10 Multiple Display Configurations (Single Channel DDR) ..................................42 2.5.11 High-Bandwidth Digital Content Protection (HDCP) ......................................42 2.5.12 Display Link Data Rate Support ................................................................43 2.5.13 Display Bit Per Pixel (BPP) Support............................................................44 2.5.14 Display Resolution per Link Width .............................................................44 2.6 Platform Environmental Control Interface (PECI) ....................................................44