Analog Integrated Circuits Jieh-Tsorng Wu 6 de febrero de 2003 1. Introduction Complete Small-Signal Model with Extrinsic Components 2. PN Junctions and Bipolar Junction Transis- tors Typical values of Extrinsic Components PN Junctions 3. MOS Transistors Small-Signal Junction Capacitance MOS Transistors Large-Signal Junction Capacitance Strong Inversion PN Junction in Forward Bias Channel Charge Transfer Characteristics PN Junction Avalanche Breakdown Simplified Channel Charge Transfer Charac- PN Junction Breakdown teristics Bipolar Junction Transistor (BJT) MOST I-V Characteristics Minority Carrier Current in the Base Region Threshold Voltage Gummel Number (G) Square-Law I-V Characteristics Base Transport Current Channel-Length Modulation Forward Current Gain MOST Small-Signal Model in Saturation Re- gion BJT DC Large-Signal Model in Forward- Active Region OST Small-Signal Model in Saturation Re- gion Dependence of BF on Operating Condition MOST Small-Signal Capacitances in Satura- Collector Voltage Effects tion Region Base Transport Model Channel Capacitance in Saturation Region Ebers-Moll Model Complete MOST Small-Signal Model in Sat- Leakage Current uration Region Common-Base Transistor Breakdown MOST Small-Signal Model in Triode Region Common-Emitter Transistor Breakdown MOST Small-Signal Model in Cutoff Region Small-Signal Model of Forward-Biased BJT Carrier Velocity Saturation Charge Storage Effects of Carrier Velocity Saturation 1 Hot Carriers 5. Single-Transistor Gain Stages Short-Channel Effects Unilateral Two-Port Network Subthreshold Conduction in MOST Common-Emitter Configuration Common-Emitter Configuration - Bias Analy- 4. Integrated Circuit Technologies sis Integrated-Circuit NPN Transistor Common-Emitter Configuration - Small- Lateral PNP Transistor Signal Analysis Common-Source Amplifier Vertical PNP Transistors Common-Source Configuration - Small- Advanced-Technology NPN Transistor Signal Analysis Base and Emitter Diffused Resistors Common-Emitter Configuration Small-Signal Base Pinch Resistor AC Analysis Epitaxial Resistor Common-Source Configuration Small-Signal AC Analysis Properties of IC Resistor Miller Approximation Capacitors Miller Approximation Equivalent Circuit Diodes Short-Circuit Current Gain CMOS Integrated-Circuit Technologies BJT Transition Frequency MOS Transistors MOST Transition Frequency Parasitic BJTs in CMOS Technologies MOST Transition Frequency - Weak Inversion Resistors in CMOS Technologies Complete AC Analysis of Common- Capacitors in CMOS Technologies Emitter(Source) Amplifier Matching Issues Complete AC Analysis of Common- Emitter(Source) Amplifier Guidelines for Better Device Matching Common-Emitter Amplifier with Emitter De- Transistor Pair Layout Example generation Resistor Pair Layout Example Common-Emitter Amplifier with Emitter De- generation Capacitor Pair Layout Example Common-Source Amplifier with Source De- Capacitor Errors generation Capacitor Layout Design Common-Base Configuration Analog Section Floor Plan Example Common-Base Configuration AC Analysis Noise-Coupling Layout Considerations Common-Gate Configuration Latch-Up in CMOS Technologies Common-Gate Configuration AC Analysis Common-Collector Configuration (Emitter 7. Differential Gain Stages Follower) Emitter-Coupled Pair Emitter Follower’s Voltage Gain Emitter-Coupled Pair Large-Signal Behavior Emitter Follower’s Input Impedance Emitter-Coupled Pair with Emitter Degenera- tion Emitter Follower’s Output Impedance Source-Coupled Pair Common-Drain Configuration (Source Fol- lower) Source-Coupled Pair Large-Signal Behavior Source Follower’s Gate Voltage Gain Small-Signal Analysis of Differential Ampli- fiers Source Follower’s Gate Input Impedance Emitter-Coupled Pair Differential-Mode Half Source Follower’s Output Impedance Circuit Source Follower’s Complete Frequency Re- Emitter-Coupled Pair Common-Mode Half sponse Circuit Emitter-Coupled Pair Input Resistances Compensated Source Follower Emitter-Coupled Pair Frequency Response Floating-Well Source Follower Emitter-Coupled Pair Input Offset Voltage and Current 6. Multiple-Transistor Gain Stages Dominant-Pole Approximation Emitter-Coupled Pair Input Offset Voltage Source-Coupled Pair Input Offset Voltage Zero-Value Time Constants Unbalanced Resistor Circuit Analysis Zero-Value Time Constant Example Unbalanced gm Circuit Analysis Darlington Configuration Unbalanced Differential Amplifier BJT Cascode Configuration Simplified Analysis for Unbalanced Differen- BJT Cascode Characteristics tial Amplifier MOST Cascode Configuration 8. Current Mirrors and Active Loads MOST Cascode Low-Frequency Characteris- Simple BJT Current Mirror tics Simple BJT Current Mirror with Beta Helper MOST Cascode Zero-Value Time Constant Simple BJT Current Mirror with Emitter De- Analysis generation MOST Cascode AC Characteristics Matching Consideration in BJT Current Mir- rors Active Cascode Configuration Simple MOST Current Mirror Active Cascode Characteristics Matching Consideration in Simple MOST Super Source Follower Configuration Current Mirror Layout Considerations Self-Biasing MOST VBE and UT Referenced Current Source BJT Cascode Current Mirror Band-Gap References MOST Cascode Current Mirror Kujik Band-Gap References MOST High-Swing Cascode Current Mirror Ahuja Band-gap Reference MOST Sooch Cascode Current Mirror Brokaw Band-Gap References MOST Low-Voltage High-Swing Cascode Widlar Band-Gap Reference Current Mirror Song Band-Gap Reference S¨ackinger Current Mirror Band-Gap Reference Output Issues Gatti Current Mirror 10. Output Stages BJT Wilson Current Mirror Output Stage Requirements MOST Wilson Current Mirror Output Stage Design Issues Complementary Current Source Load Nonlinearity and Harmonic Distortion Current Mirror Load Class-A BJT Emitter Follower Diode-Connected Load Class-A BJT Emitter Follower Output Power Instantaneous Power Dissipation 9. Voltage and Current References Class-A MOST Source Follower Sensitivity and Temperature Coefficient Distortion in the MOST Source Follower Simple Current Sources Class-A BJT Common-Emitter Stage BJT Widlar Current Source Distortion in Class-A BJT Common-Emitter MOST Widlar Current Source Stage BJT Peaking Current Source Class-A MOST Common-Source Stage Class-B Push-Pull Emitter Follower MOST Peaking Current Source Output Power of Class-B Push-Pull Emitter BJT VBE Referenced Current Source Follower MOST Vt Referenced Current Source Class-AB Push-Pull Emitter Followers Self-Biasing BJT VBE Reference Class-AB Push-Pull Source Followers Self-Biasing BJT VBE Reference with Start- Class-AB Push-Pull Common-Source Stage Up Circuit Class-AB Quasi-Complementary Configura- Self-Biasing BJT UT Reference tion An Error Amplifier Example Self-Biasing MOST Vt Referenced Current Source Combined Common-Drain Common-Source Configuration Self-Biasing MOST gm Referenced Current Source Parallel Common-Source Configuration 11. Noise Analysis and Modelling Noise Factor of an FET Common-Source Stage Noise in Time Domain Noise Performance of Other Configurations Probability Density Function Emitter-Coupled Pair Noise Performance Noise in Frequency Domain Effect of Ideal Feedback on Noise Perfor- Filtered Noise mance Noise Summation Effect of Input Series Feedback Feedback on Piecewise Integration of Noise Noise Performance Thermal Noise Effect of Input Shunt Feedback Feedback on Noise Performance Thermal Noise with Loading Effect of Feedback on Noise Performance Shot Noise Effect of Cµ on Noise Performance Flicker Noise (1/f Noise) Single-Stage Amplifier with Local Feedback BJT Noise Model Operational Amplifier Noise Model FET Noise Model A Low-Pass Filter Example Equivalent Input Noise Generators A Current Amplifier Example Noise Factor and Input Noise Generators Noise Generators of a BJT Common-Emitter 12. Feedback and Compensation Stage Feedback Noise Voltage Generator of a BJT Common- Effect of Negative Feedback on Distortion Emitter Stage Series-Shunt Feedback Configuration Noise Current Generator of a BJT Common- Emitter Stage Shunt-Shunt Feedback Configuration BJT Equivalent Input Shot Noise Spectral Shunt-Series Feedback Configuration Density Series-Series Feedback Configuration Total Equivalent Noise Voltage of a BJT Common-Emitter Stage Two-Port Analysis of Feedback Amplifier Noise Generators of a FET Common-Source Loading Approximation Method Stage Two-Port Analysis of a Shunt-Shunt Feedback Noise Voltage Generator of a FET Common- Amplifier Source Stage Return Ratio MOST Equivalent Input Noise Voltage Spec- Closed-Loop Gain Using Return Ratio tral Density Blackman’s Impedance Formula Noise Current Generator of a FET Common- Source Stage A Transresistance Feedback Amplifier Noise Factor of a BJT Common-Emitter Stage Frequency Response of Feedback Amplifiers Single-Pole Model Input Stage Common-Mode Transconduc- tance Nyquist Diagram Input Stage Voltage Gain Nyquist Criterion Simplified Two-Stage Model Phase Margin Pseudo Dominant-Pole Model Frequency Compensation Using Nulling Re- sistor Phase Margin of the Pseudo Dominant-Pole Model Frequency Compensation Using Zero-Nulling Resistor Closed-Loop Response of the Pseudo Dominant-Pole Model Voltage and Current Range Quality Factor (Q) and Phase Margin Slew Rate Dominant-Pole Compensation Settling Time Dominant-Pole Compensation Input Impedance Miller (Pole-Splitting) Compensation Output Impedance Feedforward Zero in Miller Compensation Systematic Input Offset Voltage Miller Compensation With Unity-Gain Buffer Random Input Offset Voltage Miller Compensation With Common-Gate Input Offset Voltage and Common-Mode Re- Stage jection Ratio Miller