Blending Radio and Power Management Technologies for Greatly Improved Performance -or- Why is an RF guy doing Power Management?! Earl McCune, Ph.D., F-IEEE Thursday, Aug. 23, 2018 Texas Instruments Building E Conference Center 2900 Semiconductor Blvd. Santa Clara, CA 95051 6:30pm - 7:00pm: Dinner and Networking 7:00pm - 8:00pm: Talk and Q & A Outline • State of the art in switch-based radio transmitters • Common physics with switching power converters • Zero-Power Idle (ZPI) supply • Very-high Dimming Ratio (VHDR) efficient driver • Bridge rectifier elimination • Power factor correction Earl McCune [email protected] Linear PA Efficiency Ceilings • Entire output signal – peak Envelope PDF to peak – must fit within the linear PA load line Signal envelope • PA is scaled for signal peak power • Signal average power sets 0.03 communication range 0.025 0.02 • Low average power (A) 0.015 C I increases PA heat 0.01 – A direct consequence of 0.005 Ohm’s Law 0 0 0.5 1 1.5 2 2.5 3 3.5 GaAs HBT VCE (V) Earl McCune [email protected] 3 Linear PA Efficiency: Business Impact Efficiency vs. PAPR 5G-NR Cost vs. Efficiency 10 9 Power supply size Input Power 8 Power Dissipation 7 LTE 2G 6 5 4 3G 2.5G COST TX power 3 Heatsink 2G 2.5G 2 3G LTE size 5G-NR 1 Power / Output power (Normalized) power / Output Power 0 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% Circuit Energy Efficiency • Signal design progression forces linear PA efficiency to decrease • Costs therefore rise – Higher input power is required (larger power supply) – Thermal management of the corresponding PA heat • Preferred radio efficiency range by industry: between 40 to 70 % • 5G must be profitable to build and operate – or it will fail Earl McCune [email protected] 4 Physically Available Options Actual transmitter objective: modulation accuracy at-power • Traditional approach: Linear Theory VDD – Modulate at small signal levels Vout= IR D ⋅ L R – Increase signal power with linear amplifiers L – Maintains modulation accuracy, Large PSAT • as long as all amplifiers remain linear (mathematical sense) VIN • Alternative approach: Sampling Theory VDD – Sample the envelope with phase-modulated carrier RL PSAT VSUPPLY VRout = ⋅ L Large VIN RRL+ ON RON Earl McCune [email protected] 5 Implementation Differences Linear Operation 1 VDD Output range is bounded 0.8 • RL by the knee voltage 0.6 P • Signal always stays on the Large SAT 0.4 Drain Current (A) VIN load line 0.2 0 0 0.5 1 1.5 2 2.5 3 3.5 VDS (V) VDD Switching Operation 0.03 ON state • Output range is bounded RL 0.025 by the ON resistance PSAT 0.02 Large VIN (A) 0.015 • Circuitry operates at the C I 0.01 endpoints of the load line RON 0.005 • Efficiency increases 0 0 0.5 1 1.5 2 2.5 3 3.5 VCE (V) OFF state Earl McCune [email protected] 6 Sampling Transmitter Operation 1 VVout SUPPLY ILOAD = = 0.8 RL RR L+ ON 0.6 • Phase modulated carrier samples the signal envelope 0.4 Drain Current (A) • Dynamic Power Supply (DPS) 0.2 sets the instantaneous 0 0 0.5 1 1.5 2 2.5 3 3.5 envelope value VDS (V) Dynamic Power Supply • Switch-mode mixer modulator 3 VSUPPLY (SM ) does the sampling at- A(t) power Envelope DPS • Switching forces use of polar cos(ωφtt+ ( )) At( )cos(ωφ t+ ( t)) Phase SM3 signal processing Modulated RF Earl McCune [email protected] 7 Operating Modes: L-mode, C-mode, and P-mode VSUPPLY Booth Surface VS , IS Control DPS PDto heatsink 30 20 VDPS , IDPS New Interface 10 P = V * I 0 DC PA PA } -10 -20 -30 PA -40 PIN POUT -50 5.0 P-mode -60 RF Power 4.0 -70 (dBm) Power Output PA PD 3.0 15 -5 5 Transistor To heatsink 2.0 -15 -35 -25 1.0 -55 -45 PA Supply Voltage (V) Input RF Power (dBm) 0.0 • All power transistors are 3-port circuits • 3 operating modes appear when both supply voltage (dynamic power supply (DPS)) and input RF power are varied – L-mode: conventional linear “PA” operation – C-mode: fully compressed operation Eridan operates in C-P mode – P-mode: low voltage “gain-collapse” region Earl McCune [email protected] 8 Measured Efficiency vs. Signal PAPR 70% • Use of switching 60% circuitry greatly 50% 5G NR improves LTE DL 40% measured LTE UL efficiency 30% 3G QAMs • Modulation Stack Efficiency 20% EDGE accuracy is 10% GSM-CE maintained 0% 0 2 4 6 8 10 12 14 • Modulation Signal PAPR (dB) generality is not compromised 16384 QAM LTE Downlink 5G-NR • Reported efficiency is fully linearized -51dB ACLR Earl McCune [email protected] 9 Backup: Switching PA Efficiency Bounds 100 RL/RON=100 80 RL/RON=30 5 4 R /R =10 5 L ON 3 4 60 2 3 1 2 0 1 -1 0 90.0 90.5 91.0 91.5 92.0 time, nsec 40 -1 6 90.0 90.5 91.0 91.5 92.0 5 time, nsec 4 3 20 2 1 Achievable Efficiency (%) 0 -1 90.0 90.5 91.0 91.5 92.0 time, nsec 0 9 0 1 2 3 10 10 10 10 fT / fo • Maximum efficiency depends on RL/RON • Transistors need to have fT > 50fo to operate well as a switching PA • Efficiency drops rapidly when fT < 10fo – Dissipation during transitions becomes much more significant [email protected] Earl McCune 10 Technology Similarities • SM RF Power VERY important to carefully manage the switching duty cycle of the RF drive! • Boost DC-DC Earl McCune [email protected] Switching Supplies • Switching supplies are not voltage sources Inductor current • Energy is stored in both L and C Load current L R 2 C LD 112 VOUT 1 2 ELL= LI ⋅= L ⋅EC = CV ⋅ OUT 22RLD 2 SM PS c o n t r o l • Matching inductor current to load current requires a feedback controller – Loop dynamics constraint appears – Mis-match errors are all handled by the storage capacitor C Earl McCune [email protected] 12 Switching Supply: Output Agility Change from VO1 → VO2 1 L ∆ =∆ +∆ = +22 − E ELC E2 CV( OO21 V ) 2 RLD L = +C ∆⋅ V avg( V, V ) Greater the higher the 2 O OO21 output voltage is RLD (PROBLEM) Fast switching voltage (within TSTEP): ∆EL∆⋅VO avg( V OO21, V ) Goes to infinity as the = + C TR2 T step time goes to zero STEP LD STEP (PROBLEM) If the switching time gets very short, changing energy in the digital supply requires kilowatts of transient power Supply agility is therefore much slower than logic operating speeds Earl McCune [email protected] Power Management Topic • CPU power recovery (MicroNap / MicroWake) • LED drivers: Special capabilities • Direct (bridgeless) downconverting AC-DC + PFC • Duty cycle frequency multiplier (digital) Earl McCune [email protected] Solution: Hold the Energy for Later 50 microseconds per division • Connect the load (or not) on command OFF ON OFF ON OFF • Example: 40 us OFF intervals – Load current is 17A for this measurement – 10 ns edge transition time on the device power supply • Spacing between and width of these OFF intervals is completely arbitrary Dynamic Power Supply Voltage waveform Why we care: Inductor Keep C large for storage good regulation switch L C DC input DC output Synchronous Capacitor rectifier storage switch Earl McCune [email protected] Configurations Normal Operation Hold energy while OFF • Storing inductor current and electric charge within a DC-DC converter • Linear regulators can also take advantage of this output filter (storage) switching Earl McCune [email protected] Power Proportional Computing • Input power is saved whenever Personal, Embedded Server region the output is not powered region – Input current falls as the output duty cycle is reduced, maintaining DC-DC conversion efficiency – ON time for this test is 200 microseconds • This regulator has an observed input bias current of 12 mA • Linear tracking is very good with duty cycle Earl McCune [email protected] ACPI States 10 nanoseconds per transition • Nearly immediate transition between power states: no “friction” • Controlled by job scheduler • Optimum when applied to each core ACPI: C0 ACPI: C0 individually • Spacing between and width of these OFF intervals is completely arbitrary ACPI: C2 / C3 Scheduler Assignments messages Server cluster Responses Earl McCune [email protected] Low Processing-Demand Case Wide time view Zoom-in view ON OFF ON OFF ON OFF ON OFF Control Command 1 A Controlled Power Supply • Energy is maintained within the power supply while the output is OFF • Turn-on edge here remains at 10 ns even after 2 milliseconds of OFF time – Output (20 us) pulse remains the same even when the OFF time exceeds 1 second (0.002% duty cycle) • No loss of processing throughput performance Switch and Capacitor technology combine to set available ZPI hold time Inductor storage switch L C Earl McCune [email protected] DC input DC output Proving the ZPI Concept • Modified existing DC-DC converter evaluation board – Additional control to the regulator – Switches to manage internal energy storage • Applies more easily to linear regulators • Nanosecond stop and start of amperes to the load is achieved – No overshoot on any transient • Brings RF transmitter technology to power supplies for Computing • US patents issued Earl McCune [email protected] Power Management Topic • CPU power recovery (MicroNap / MicroWake) • LED drivers: Special capabilities • Direct (bridgeless) downconverting AC-DC + PFC • Duty cycle frequency multiplier (digital) Earl McCune [email protected] LED Dimming Method Options Options for dimming already in production include • Shunt-switch pulsewidth modulation SS-PWM • Pulsewidth modulation PWM • Linear Current Regulation IREG • Series Resistor (sense) RSNS And now a new method is added • Variable-resistance Var_R Source DC-DC • Provide a widely varying resistor value in series with supply converter the