How Open Source and Collaboration aid Innovation in VLSI CAD Gilda Garretón Sun Microsystems Laboratories February 2010 Agenda • Collaboration in a research lab • VLSI circuit research • VLSI CAD research • VLSI design process • CAD projects in multithreading • Conclusions 2 Garretón Sun Microsystems Laboratories @ 2010 Copyrights A Research Lab • Applied research aligned with company business • Expert in n engineering fields, but knowledgeable in m (where m > n) • Communicate and collaborate with colleagues • Collaborate with universities • Contribute to open-source and standards initiatives • “Innovate, Demonstrate, Transfer” 3 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Technology Changes the World Fortress Sun SPOT Darkstar Digital Rights Tools for Demand Search Solaris on Honeycomb Elliptic Curve Forecasting Power PC Cryptography UltraSPARC® V9 Electric Sun Cluster Sun Ray Developed in Sun Labs, transferred to Sun products and to the outside world 4 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Projects Clustering System System Network System Science Hardware Software Clients 5 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Projects Clustering System System Network System Science Hardware Software Clients 6 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Research Research Cloud VLSI Circuit Optics/photonics Research Research VLSI CAD Datacenter Research Switch Research Proximity CAD Tools Packaging Communication Prototype Test Chips Switch Prototype 7 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Overview Research Cloud VLSI Circuit Optics/photonics Research Research VLSI CAD Datacenter Research Switch Research Proximity CAD Tools Packaging Communication Prototype Test Chips Switch Prototype 8 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Research Interaction Research Cloud VLSI Circuit Optics/photonics Research Research VLSI CAD Datacenter Research Switch Research Proximity CAD Tools Packaging Communication Prototype Test Chips Switch * VLSI = “Very Large Scale Integration” Prototype CAD = “Computer Aided Design” 9 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Usual Interaction Model Company A Company B Circuit CAD Design Development 10 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Usual Interaction Model Sales Company A Company B Circuit !#@! CAD Design Development 11 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Circuit and CAD Research Group • Diverse group (~23) > Hardware (19) Moscow > Software (3) > Both (1) • Education > BS, MS, PhD • Rank > 1 PE, 4 DEs and 1 Sun Fellow • 13% female (2 HW, 1SW) 12 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Circuit Research Research Cloud VLSI Circuit Optics/photonics Research Research VLSI CAD Datacenter Research Switch Research Proximity CAD Tools Packaging Communication Prototype Test Chips Switch * VLSI = “Very Large Scale Integration” Prototype CAD = “Computer Aided Design” 13 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Circuit Research • Design circuits to enable novel architectures • Low-power circuits • High-speed circuits • Communication Links • Asynchronous circuits 14 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Circuit Research: Proximity Communication (1/4) • What is a capacitor? > Parallel metal plates form a capacitor 1 > Change in voltage on one side results in corresponding 2 change on the other side > Can only communicate changes, not real values 15 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Circuit Research: Proximity Communication (2/4) = 16 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Circuit Research: Proximity Communication (3/4) Chip2 Chip1 Transmit Receive Receive Transmit 17 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Circuit Research: Proximity Communication (4/4) Huge Bandwidth Gain Comparison of Scale 2 10 Tbps per mm Proximity Communication 4000 2 m m 15 400 μm r Proxim- e p ity I/O s 40 Area Area Ball Bonding e n Ball a l 4 Bonding O / I 0.4 2003 2005 2007 2009 120 Year μm 18 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Circuit Research Research Cloud VLSI Circuit Optics/photonics Research Research VLSI CAD Datacenter Research Switch Research Proximity CAD Tools Packaging Communication Prototype Test Chips Switch * VLSI = “Very Large Scale Integration” Prototype CAD = “Computer Aided Design” 19 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI CAD Research • Challenges > Design sizes > Acceptable performance > Hierarchical representation > Shrinking technologies • Research topics > Handling of large data set > Geometric algorithms > Visualization > Collaboration > Parallization/multiprocessing Collaboration with Harvey Mudd College 20 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI CAD Research • In-House > Third-party integration • CAD Tools > Transistor sizing > Analysis tools Stipple Patterns Java3D Transparency > Route and placement • Software Research > Client/server model > 2D/3D visualization > Multithreading > Area coverage Metal Cage Structure 21 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI CAD Research Platform • Electric VLSI Design SystemTM • Benefits for HW/SW research • Java development platform • External/Open source community > www.staticfreesoft.com > OpenSparc > Google VLSI forum • Dynamic development cycle > Bug tracking system > Source control > Verification Electric Framework 22 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Benefits of Research Platform • Prototype innovative solutions/flows > Reduce third party dependency > Avoid integration overhead > Rapid access to solutions • Open source sandbox > Academia > Internships > Collaborators Fleet Architecture Marina 2009 23 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Circuit Research Research Cloud VLSI Circuit Optics/photonics Research Research VLSI CAD Datacenter Research Switch Research Proximity CAD Tools Packaging Communication Prototype Test Chips Switch * VLSI = “Very Large Scale Integration” Prototype CAD = “Computer Aided Design” 24 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Making Test Chips: Custom VLSI Chip Design Flow Chip Building Process CAD Testing Process 25 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Making Test Chips: Custom VLSI Chip Design Flow 1.Schematic Entry and Transistor Sizing > Logical Effort support 26 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Making Test Chips: Custom VLSI Chip Design Flow 1.Schematic Entry and Transistor Sizing 2.Simulation > Interface to CAD Tools of Our Choice > Waveform Viewer and Cross-Probing 27 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Making Test Chips: Custom VLSI Chip Design Flow 1.Schematic Entry and Transistor Sizing 2.Simulation 3.Layout > Network Consistency Checker (NCC, LVS) > Design Rules Checker (DRC) > Automatic fill generator > Placement, routing, auto stitching tool 28 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Making Test Chips: Custom VLSI Chip Design Flow 1.Schematic Entry and Transistor Sizing 2.Simulation 3.Layout 4.Fabrication Foundry Input Foundry Output 29 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Making Test Chips: Custom VLSI Chip Design Flow 1.Schematic Entry and Transistor Sizing 2.Simulation 3.Layout 4.Fabrication 5.Testing PxIO Testing Board 30 Garretón Sun Microsystems Laboratories @ 2010 Copyrights VLSI Circuit Research Research Cloud VLSI Circuit Optics/photonics Research Research VLSI CAD Datacenter Research Switch Research Proximity CAD Tools Packaging Communication Prototype Test Chips Switch * VLSI = “Very Large Scale Integration” Prototype CAD = “Computer Aided Design” 31 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Research Application: Switch Prototype Research Lab VLSI Circuit Research Datacenter VLSI CAD Switch Research Research Proximity Communication CAD Tools Packaging Research Test Chips Switch Prototype 32 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Research Application: Switch Prototype Line Card 1 Line Card 3 Line Card 2 Line Card 4 Line Card Line Card Switch Line Card Line Card RTM RTM RTM RTM FPGA FPGA FPGA FPGA Backplane Scalable Switch for Data Centers Baseboard 33 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Multi-Threading in VLSI CAD • How to split tasks? • How to merge sub results? • How to communicate between threads? > Interprocess communication • How to access share objects? > Lock contention, race conditions, deadlock • How to minimize overhead? 34 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Multi-Threading in Electric • In schematics/layout phases > Routing tool > Analysis tools > Placement tool • Multi-threading projects > Using directly JDK threading classes: routing tool > Using built-in Electric's capabilities: DRC tool > Lab at University of Karlsruhe: placement tool • Available in GNU release: Feb 2010 > www.staticfreesoft.com 35 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Multi-Threading a Routing Tool • Routing using cost functions > Based on Dijkstra search > Two parallel techniques > Tech 1: two directions (A<->B) > Tech 2: multiple routes • Implementation > Runtime.getRuntime().availableProcessors() > Class RouteInThread extends Thread > Class Semaphore > acquireUninterruptibly() > release() 36 Garretón Sun Microsystems Laboratories @ 2010 Copyrights Multi-Threaded Routing Results Example: 682 segments