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Box 3453 Sunnyvale, CA 94088-3453 www.amd.com ii ATI R700 Technology Contents Contents Preface Chapter 1 Introduction Chapter 2 Program Organization and State 2.1 Program Types ................................................................................................................................. 2-1 2.1.1 Data Flows ........................................................................................................................2-2 2.1.2 Geometry Program Absent .............................................................................................2-2 2.1.3 Geometry Shader Present...............................................................................................2-3 2.2 Instruction Terminology .................................................................................................................. 2-4 2.3 Control Flow and Clauses .............................................................................................................. 2-6 2.4 Instruction Types and Grouping .................................................................................................... 2-8 2.5 Program State................................................................................................................................... 2-8 2.6 Data Sharing................................................................................................................................... 2-12 2.6.1 Types of Shared Registers............................................................................................2-13 2.6.2 Local Data Share (LDS).................................................................................................2-15 Chapter 3 Control Flow (CF) Programs 3.1 CF Microcode Encoding.................................................................................................................. 3-2 3.2 Summary of Fields in CF Microcode Formats ............................................................................. 3-3 3.3 Clause-Initiation Instructions.......................................................................................................... 3-5 3.3.1 ALU Clause Initiation.......................................................................................................3-6 3.3.2 Vertex-Fetch Clause Initiation and Execution...............................................................3-6 3.3.3 Texture-Fetch Clause Initiation and Execution.............................................................3-6 3.4 Import and Export Instructions...................................................................................................... 3-7 3.4.1 Normal Exports (Pixel, Position, Parameter Cache)....................................................3-7 3.4.2 Memory Writes..................................................................................................................3-8 3.4.3 Memory Reads..................................................................................................................3-9 3.5 Synchronization with Other Blocks............................................................................................. 3-10 3.6 Conditional Execution ................................................................................................................... 3-11 3.6.1 Valid and Active Masks .................................................................................................3-11 3.6.2 WHOLE_QUAD_MODE and VALID_PIXEL_MODE........................................................3-12 3.6.3 The Condition (COND) Field ..........................................................................................3-13 3.6.4 Computation of Condition Tests ..................................................................................3-14 iii Copyright © 2009 Advanced Micro Devices, Inc. All rights reserved. ATI R700 Technology 3.6.5 Stack Allocation .............................................................................................................3-15 3.7 Branch and Loop Instructions ..................................................................................................... 3-16 3.7.1 ADDR Field......................................................................................................................3-17 3.7.2 Stack Operations and Jumps .......................................................................................3-17 3.7.3 DirectX9 Loops...............................................................................................................3-18 3.7.4 DirectX10 Loops.............................................................................................................3-19 3.7.5 Repeat Loops..................................................................................................................3-19 3.7.6 Subroutines.....................................................................................................................3-20 3.7.7 ALU Branch-Loop Instructions.....................................................................................3-20 Chapter 4 ALU Clauses 4.1 ALU Microcode Formats ................................................................................................................. 4-1 4.2 Overview of ALU Features.............................................................................................................. 4-1 4.3 ALU Instruction Slots and Instruction Groups ............................................................................ 4-3 4.4 Assignment to ALU.[X,Y,Z,W] and ALU.Trans Units.................................................................... 4-4 4.5 OP2 and OP3 Microcode Formats ................................................................................................. 4-5 4.6 GPRs and Constants ....................................................................................................................... 4-5 4.6.1 Relative Addressing.........................................................................................................4-6 4.6.2 Previous Vector (PV) and Previous Scalar (PS) Registers .........................................4-7 4.6.3 Out-of-Bounds Addresses...............................................................................................4-7 4.6.4 ALU Constants .................................................................................................................4-8 4.7 Scalar Operands............................................................................................................................... 4-9 4.7.1 Source Addresses............................................................................................................4-9 4.7.2 Input Modifiers................................................................................................................4-10 4.7.3 Data Flow ........................................................................................................................4-10 4.7.4 GPR Read Port Restrictions .........................................................................................4-11 4.7.5 Constant Register Read Port Restrictions..................................................................4-11 4.7.6 Literal Constant Restrictions........................................................................................4-12 4.7.7 Cycle Restrictions for ALU.[X,Y,Z,W] Units.................................................................4-12 4.7.8 Cycle Restrictions for ALU.Trans.................................................................................4-14