paper-tape form, as an alternative to buying a set of PROMs. A tape costs $15, and may be ordered direct from NS Elec- tronics, Cnr Stud Road and Mountain Microcomputer Highway, Bayswater, Victoria 3153. Faster SC/MP chip, too News & Products National Semiconductor has also announced a new N-channel version of the SC/MP chip itself. It offers three main features over the existing P-channel chip: Twice the speed, one quarter the power, and only a single + 5V supply. Designated SC/MP-II, the new chip will be available in Australia shortly, from NS Electronics and their various distribu- tors in each state. SC/MP Tiny BASIC Back in the December 1976 issue, we announced that National Semiconductor was coming out with a Tiny-BASIC interpreter for their SC/MP, called NIBL. At that stage only a 3k bytes preliminary version was available, with an improved 4k version still to come. Well, the 4k version of NIBL has now arrived, and it's even better than was predicted. It is .now very much an extended Tiny-BASIC, with many power- ful features which should make it of great interest and value to professional and hobby computer users alike. As predicted, it now offers an RND function to generate 16-bit random num- New MC6800 kit bers, and a LINK statement to allow call- Motorola Semiconductor Products has ing machine language subroutines. The released a new evaluation kit for their hoped-for DO . .. UNTIL statements are well-known MC6800 microprocessor. also provided, too. Called the MEK6800D2, the new kit has In addition, there is now the ability to its own 24-key keyboard and 6-digit hex perform FOR ... NEXT loops as in many display, obviating the need for an expen- full BASICs. There is also the ability to sive data terminal. It also features an handle character strings, and to handle inbuilt audio cassette interface, for con- hexadecimal constants. There is also a venient program storage at low cost. REM statement for remarks, a MOD The kit comes with 256 bytes of RAM function for absolute values, a STAT func- for user programs, a 1k byte ROM with tion to return the current value of a debug/monitor called MUG, and 16 SC/MP's status register (allowing the lines of parallel I/O via a PIA. Provision program to manipulate flag and sense is made for easy expansion. lines), and paging functions. By the time you read this, the new kits NIBL's formal grammar is now some- should be available from local Motorola what more flexible, too, allowing greater distributors for around $240. programming efficiency. Multiple By courtesy of Motorola, EA has one statements per line are now allowed, of the new kits and we are currently put- while LET is no longer mandatory in ting it through its paces. We hope to assignment statements. publish the results next month, all going And you can now buy NI BL in punched well. ELECTRONICS Australia, April, 1977 73 MOTOROLA M6800 (ik EVALUATION KIT MEK6800D2 provides a useful and expandable tool for those who wish to develop systems with the M6800 Microprocessor without investing in expensive terminals. All parts needed to complete the system and get up and running are provided in the kit with the exception of the power supply. In addition to the expansion available on the basic microcomputer module, additional RAM, ROM and I/O parts can be accommodated at a later date to implement more complex systems. Machine language programs can be entered through the system keyboard or via a built-in audio cassette interface system. Hexademical LED displays are provided for monitoring data and address information. A crystal-controlled clock generator is used to eliminate timing adjustments. • JBUG Monitor. Trace One Instruction. Set up to Five Breakpoints. Examine and Change Memory and Registers. • Parallel and Serial Interface Capability. • 16 I JO Lines, 4 Control Lines. MEK6800 D2 FIRMWARE FEATURES HARDWARE FEATURES The monitor firmware included with this system sets a new Three I/O devices are provided in the kit. One Peripheral standard of performance for evaluation kits. The function Interface Adapter (PIA) is dedicated to the hexadecimal of the JBUG monitor is to allow the user to communicate keyboard and display module. A second PIA is made with and hence control the M6800 microcomputer by available exclusively for the user. An Asynchronous Com- using the hexadecimal keyboard and display module. The munications Interface Adapter (ACIA) is also included to intelligence and diagnostic capability of JBUG is provided interface with your audio cassette tape recorder. in line 1K x 8 ROM. CEMA TOTAL ELECTRONICS MELBOURNE MELBOURNE 96 2891; WANT TO HEAR MORE? 877 5311; SYDNEY SYDNEY 439 6722; 439 4655; CALL MOTOROLA SYDNEY BRISBANE (ELECTRONIC COMP) BRISBANE 229 1633; 371 5677; ADELAIDE 268 2922; —438 1955, 43 4299 ADELAIDE (WOOLLARD & CRABBE) 51 4713; PERTH (ATHOL HILL P/L) 25 7811; CANBERRA (CUSTOM SCIENTIFIC) 47 6179; MELBOURNE-561 3555 WOLLONGONG (MACELEC) NEWCASTLE (DIGITRONICS) 69 2040; 29 1276; PERTH (RESERVE ELECTRONICS) CANBERRA (ELECTRONIC COMP) 95 6811; MOTOROLA DISTRIBUTORS 87 1026; MOTOROLA Microsystems —making it happen in microcomputers ELECTRONICS Australia, May, 1977 73 GETTING INTO MICROPROCESSORS The Motorola 6800 One of the most established microprocessors, the Motorola MC6800 an index register and a stack pointer, all is supported by a continuously expanding "family" of memory and three of which are 16 bits long. The MC6800 implements its stack in external specialised interfacing chips—and also by a great deal of proven soft- RAM. ware and applications experience. In this article we look at the The status register has six active bits, MC6800, its main support chips, and also the recently released one of which is the flag for enabling and MEK6800D2 "Mark II" evaluation kit. disabling the master interrupt input. The remaining status bits are condition code by JAMIESON ROWE flags, representing arithmetic carry and overflow, sign, zero and a bit-3 carry Motorola Semiconductor Products for or "PIA" (MC6820), a programmable used for BCD arithmetic. None of the sta- were only the second major US manu- Asynchronous Communications Inter- tus register bits is accessible directly via facturer to enter the microprocessor face Adaptor or "ACIA" (MC6850), a external device pins. field, in 1974. The MC6800 was their initial programmable Synchronous Serial Data Data and address information pass entry, and the fact that it is still one of Adaptor or "SSDA" (MC6852), and a between the MC6800 and the rest of a the market leaders—and showing no number of more specialised devices system via two separate buses. One is an signs of giving ground—testifies to the including some which are still in 8-bit bidirectional data bus; the other is soundness of the basic design concept. development. There are also various sys- a 16-bit address bus which gives the Needless to say it is now supported by tem housekeeping devices, including a MC6800 the capability of directly a large amount of development and family of hybrid clock oscillators. addressing 65,536 or "65k" bytes of applications software, much of it As the block diagram suggests, the memory space. generated by users. This inevitably basic architecture of the MC6800 micro- The output buffers on both the data increases its appeal for potential new processor chip itself is fairly straight- and address lines are 3-state, and may be users, compared with newer entries to forward. This is perhaps part of the secret disabled for DMA operation. the field. of its success, although there are a num- There is no clock oscillator on the It is strongly supported in another ber of subtle strengths which also MC6800 chip itself. Instead there are two sense, too: along with the basic micro- emerge upon closer inspection. clock input pins, which must be fed with processor chip there are a number of There are only six internal working non-overlapping two-phase clock sig- matching memory and interfacing chips, registers, one of which is a condition nals. Maximum clock frequency is 1MHz, all designed to simplify system design. code or processor status register. Two of and a machine cycle corresponds direc- These include a 1024 x 8-bit ROM the remaining registers are 8-bit tly to a clock period. Fetching and execu- (MCM6830), a 128 x 8-bit RAM accumulators, both full primary accum- tion of an instruction ranges from 2 to 12 (MCM6810), a programmable 16-bit ulators of almost equal status. The other machine cycles depending upon the bidirectional Peripheral Interface Adap- three registers are the program counter, instruction, or from 2 to 12us at the A15 A14 A13 Al2 All A10 A9 A8 A7 A6 A5 A4 A3 A2 Al AO maximum clock rate. 25 24 23 22 20 19 18 17 16 15 14 13 12 11 10 9 A Incidentally the MC6800 is an N- ft' t t t t t I t channel depletion mode MOS device, Output Output made using silicon gate technology. As Buffers Buffers a result it operates from a single +5V supply. Clock, 01 3 ---11. Apart from the normal reset and mas- Clock, 02 37 ter interrupt inputs the MC6800 is also Reset 40 Program Program provided with a non-maskable interrupt Counter H Counter Non-Maskable Interrupt 6 (1. input. There is also a software-interrupt Halt 2 -IP Instruction instruction, for program abortion. Vec- Stack Stack Interrupt Request 4 Decode Pointer Pointer toring is provided only for the different and Three-State Control 39 Control interrupt mechanisms; within each Data Bus Enable 36 0. Index Index mechanism an interrupt source must be Bus Available 7 Register Register identified by polling.