COMPUTER ARCHITECTURE AND SECURITY Information Security Series The Wiley-HEP Information Security Series systematically introduces the fundamentals of information security design and application. The goals of the Series are: to provide fundamental and emerging theories and techniques to stimulate more research in cryptol- ogy, algorithms, protocols, and architectures; to inspire professionals to understand the issues behind important security problems and the ideas behind the solutions; to give references and suggestions for additional reading and further study. The Series is a joint project between Wiley and Higher Education Press (HEP) of China. Publications consist of advanced textbooks for graduate students as well as researcher and practitioner references covering the key areas, including but not limited to: – Modern Cryptography – Cryptographic Protocols and Network Security Protocols – Computer Architecture and Security – Database Security – Multimedia Security – Computer Forensics – Intrusion Detection Lead Editors Songyuan Yan London, UK Moti Yung Columbia University, USA John Rief Duke University, USA Editorial Board Liz Bacon University of Greenwich, UK Kefei Chen Shanghai Jiaotong University, China Matthew Franklin University of California, USA Dieter Gollmann Hamburg University of Technology, Germany Yongfei Han Beijing University of Technology, China ONETS Wireless & Internet Security Tech. Co., Ltd. Singapore Kwangjo Kim KAIST-ICC, Korea David Naccache Ecole Normale Superieure, France Dingyi Pei Guangzhou University, China Peter Wild University of London, UK COMPUTER ARCHITECTURE AND SECURITY FUNDAMENTALS OF DESIGNING SECURE COMPUTER SYSTEMS Shuangbao (Paul) Wang George Mason University, USA Robert S. Ledley Georgetown University, USA This edition first published 2013 # 2013 Higher Education Press. All rights reserved. Published by John Wiley & Sons Singapore Pte. Ltd., 1 Fusionopolis Walk, #07-01 Solaris South Tower, Singapore 138628, under exclusive license by Higher Education Press in all media and all languages throughout the world excluding Mainland China and excluding Simplified and Traditional Chinese languages. For details of our global editorial offices, for customer services and for information about how to apply for permission to reuse th e copyright material in this book please see our website at www.wiley.com. All Rights Reserved. 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All brand names and product names used in this book are trade names, service marks, trademarks or registered trademarks of their respective owners. The Publisher is not associated with any product or vendor mentioned in this book. This publication is designed to provide accurate and authoritative information in regard to the subject matter covered. It is sold on the understanding that the Publisher is not engaged in rendering professional services. If professional advice or other expert assistance is required, the services of a competent professional should be sought. Library of Congress Cataloging-in-Publication Data Computer architecture and security : fundamentals of designing secure computer systems / Shuangbao (Paul) Wang, Robert S. Ledley. p. cm. Includes bibliographical references and index. ISBN 978-1-118-16881-3 (cloth) 1. Computer architecture. 2. Computer security. 3. System design. I. Wang, Shuangbao Paul. II. Ledley, Robert Steven. QA76.9.A73C6293 2012 005.8–dc23 2012027837 ISBN: 9781118168813 Set in 11/13 pt Times by Thomson Digital, Noida, India To our parents who care and educate us throughout our journey. In memory of Dr. Ledley, who pioneered Biomedical Computing. Contents About the Authors xv Preface xvii Acknowledgements xix 1 Introduction to Computer Architecture and Security 1 1.1 History of Computer Systems 3 1.1.1 Timeline of Computer History 5 1.1.2 Timeline of Internet History 15 1.1.3 Timeline of Computer Security History 28 1.2 John von Neumann Computer Architecture 34 1.3 Memory and Storage 36 1.4 Input/Output and Network Interface 37 1.5 Single CPU and Multiple CPU Systems 38 1.6 Overview of Computer Security 41 1.6.1 Confidentiality 41 1.6.2 Integrity 42 1.6.3 Availability 42 1.6.4 Threats 43 1.6.5 Firewalls 43 1.6.6 Hacking and Attacks 44 1.7 Security Problems in Neumann Architecture 46 1.8 Summary 48 Exercises 48 References 50 2 Digital Logic Design 51 2.1 Concept of Logic Unit 51 2.2 Logic Functions and Truth Tables 52 2.3 Boolean Algebra 54 2.4 Logic Circuit Design Process 55 viii Contents 2.5 Gates and Flip-Flops 56 2.6 Hardware Security 58 2.7 FPGA and VLSI 58 2.7.1 Design of an FPGA Biometric Security System 59 2.7.2 A RIFD Student Attendance System 59 2.8 Summary 65 Exercises 67 References 67 3 Computer Memory and Storage 68 3.1 A One Bit Memory Circuit 68 3.2 Register, MAR, MDR and Main Memory 70 3.3 Cache Memory 72 3.4 Virtual Memory 74 3.4.1 Paged Virtual Memoryà 75 3.4.2 Segmented Virtual Memoryà 75 3.5 Non-Volatile Memory 76 3.6 External Memory 77 3.6.1 Hard Disk Drives 78 3.6.2 Tertiary Storage and Off-Line Storageà 78 3.6.3 Serial Advanced Technology Attachment (SATA) 79 3.6.4 Small Computer System Interface (SCSI) 80 3.6.5 Serial Attached SCSI (SAS) 81 3.6.6 Network-Attached Storage (NAS)à 82 3.6.7 Storage Area Network (SAN)à 83 3.6.8 Cloud Storage 85 3.7 Memory Access Security 86 3.8 Summary 88 Exercises 89 References 89 4 Bus and Interconnection 90 4.1 System Bus 90 4.1.1 Address Bus 91 4.1.2 Data Bus 93 4.1.3 Control Bus 93 4.2 Parallel Bus and Serial Bus 95 4.2.1 Parallel Buses and Parallel Communication 95 4.2.2 Serial Bus and Serial Communication 96 4.3 Synchronous Bus and Asynchronous Bus 107 à The star “Ô here means the content is a little bit more advanced. For teaching purpose, this content may be omitted for entry level students. Contents ix 4.4 Single Bus and Multiple Buses 109 4.5 Interconnection Buses 110 4.6 Security Considerations for Computer Buses 111 4.7 A Dual-Bus Interface Design 112 4.7.1 Dual-Channel Architectureà 113 4.7.2 Triple-Channel Architectureà 114 4.7.3 A Dual-Bus Memory Interface 115 4.8 Summary 115 Exercises 117 References 117 5 I/O and Network Interface 118 5.1 Direct Memory Access 118 5.2 Interrupts 120 5.3 Programmed I/O 121 5.4 USB and IEEE 1394 122 5.4.1 USB Advantages 123 5.4.2 USB Architecture 123 5.4.3 USB Version History 124 5.4.4 USB Design and Architectureà 125 5.4.5 USB Mass Storage 127 5.4.6 USB Interface Connectors 128 5.4.7 USB Connector Types 130 5.4.8 USB Power and Charging 133 5.4.9 IEEE 1394 136 5.5 Network Interface Card 136 5.5.1 Basic NIC Architecture 137 5.5.2 Data Transmission 138 5.6 Keyboard, Video and Mouse (KVM) Interfaces 139 5.6.1 Keyboards 140 5.6.2 Video Graphic Card 140 5.6.3 Mouses 140 5.7 Input/Output Security 140 5.7.1 Disable Certain Key Combinations 141 5.7.2 Anti-Glare Displays 141 5.7.3 Adding Password to Printer 141 5.7.4 Bootable USB Ports 141 5.7.5 Encrypting Hard Drives 141 5.8 Summary 141 Exercises 142 References 143 x Contents 6 Central Processing Unit 144 6.1 The Instruction Set 144 6.1.1 Instruction Classifications 144 6.1.2 Logic Instructions 145 6.1.3 Arithmetic Instructions 145 6.1.4 Intel 64/32 Instructionsà 147 6.2 Registers 153 6.2.1 General-Purpose Registers 153 6.2.2 Segment Registers 155 6.2.3 EFLAGS Register 156 6.3 The Program Counter and Flow Control 158 6.3.1 Intel Instruction Pointerà 158 6.3.2 Interrupt and Exceptionà 159 6.4 RISC Processors 161 6.4.1 History 162 6.4.2 Architecture and Programming 162 6.4.3 Performance 163 6.4.4 Advantages and Disadvantages 163 6.4.5 Applications 164 6.5 Pipelining 164 6.5.1 Different Types of Pipelines 164 6.5.2 Pipeline Performance Analysis 165 6.5.3 Data Hazard 166 6.6 CPU Security 166 6.7 Virtual CPU 168 6.8 Summary 169 Exercises 170 References 170 7 Advanced Computer Architecture 172 7.1 Multiprocessors 172 7.1.1 Multiprocessing 172 7.1.2 Cache 173 7.1.3 Hyper-Threading 174 7.1.4 Symmetric Multiprocessing 175 7.1.5 Multiprocessing Operating Systems 175 7.1.6 The Future of Multiprocessing 176 7.2 Parallel Processing 177 7.2.1 History of Parallel Processing 177 7.2.2 Flynn’s Taxonomy 178 7.2.3 Bit-Level Parallelism 178 Contents xi 7.2.4 Instruction-Level Parallelism 179 7.2.5 Data-Level Parallelism 179 7.2.6 Task-Level Parallelism 179 7.2.7 Memory in Parallel Processing 180 7.2.8 Specialized Parallel Computers 181 7.2.9 The Future of Parallel Processing 182 7.3 Ubiquitous Computing 182 7.3.1 Ubiquitous Computing Development 183 7.3.2 Basic forms of Ubiquitous Computing 184 7.3.3 Augmented Reality 185 7.3.4 Mobile Computing 186 7.4 Grid, Distributed and Cloud Computing 187 7.4.1 Characteristics of Grid Computing 187 7.4.2 The Advantages and Disadvantages of Grid Computing 188 7.4.3 Distributed Computing 189 7.4.4 Distributed Systems 189 7.4.5