Front cover IBM z14 (3906) Technical Guide Octavian Lascu Hervey Kamga Esra Ufacik Bo Xu John Troy Frank Packheiser Michal Kordyzon Redbooks International Technical Support Organization IBM z14 (3906) Technical Guide October 2018 SG24-8451-01 Note: Before using this information and the product it supports, read the information in “Notices” on page xiii. Second Edition (October 2018) This edition applies to IBM Z®: IBM z14™, IBM z13™, IBM z13s™, IBM zEnterprise EC12 (zEC12), and IBM zEnterprise BC12 (zBC12). © Copyright International Business Machines Corporation 2017. All rights reserved. Note to U.S. Government Users Restricted Rights -- Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Notices . xiii Trademarks . xiv Preface . .xv Authors. .xv Now you can become a published author, too! . xvii Comments welcome. xvii Stay connected to IBM Redbooks . xviii Chapter 1. Introducing the IBM z14 . 1 1.1 Design considerations for the IBM z14 . 2 1.2 z14 server highlights . 3 1.2.1 Processor and memory. 4 1.2.2 Capacity and performance . 4 1.2.3 Virtualization . 6 1.2.4 I/O subsystem and I/O features . 8 1.2.5 Reliability, availability, and serviceability design. 10 1.3 z14 server technical overview . 11 1.3.1 Models . 11 1.3.2 Model upgrade paths . 12 1.3.3 Frames . 13 1.3.4 CPC drawer . 13 1.3.5 I/O connectivity: PCIe Generation 3 . 17 1.3.6 I/O subsystem . 17 1.3.7 I/O and special purpose features in the PCIe I/O drawer . 18 1.3.8 Storage connectivity . 19 1.3.9 Network connectivity . 20 1.3.10 Coupling and Server Time Protocol connectivity . 22 1.3.11 Cryptography . 26 1.3.12 zEDC Express. 29 1.4 Reliability, availability, and serviceability. 29 1.5 Hardware Management Consoles and Support Elements . 30 1.6 Operating systems . 30 1.6.1 Supported operating systems . 30 © Copyright IBM Corp. 2017. All rights reserved. iii 1.6.2 IBM compilers . 33 Chapter 2. Central processor complex hardware components . 35 2.1 Frames and drawers . 36 2.1.1 The A frame . 37 2.1.2 Z Frame . 38 2.1.3 z14 cover (door) design . 38 2.1.4 Top exit I/O cabling . 38 2.1.5 PCIe I/O drawer . 39 2.2 CPC drawer. 40 2.2.1 CPC drawer interconnect topology . 44 2.2.2 Oscillator . 44 2.2.3 System control . 46 2.2.4 CPC drawer power . 47 2.3 Single chip modules . 47 2.3.1 Processor unit chip . 49 2.3.2 Processor unit (core). 51 2.3.3 PU characterization. 52 2.3.4 System Controller chip . 52 2.3.5 Cache level structure . 53 2.4 Memory . 54 2.4.1 Memory subsystem topology . 55 2.4.2 Redundant array of independent memory. 56 2.4.3 Memory configurations . 57 2.4.4 Memory upgrades . 62 2.4.5 Drawer replacement and memory. 62 2.4.6 Virtual Flash Memory . 62 2.4.7 Flexible Memory Option . 63 2.4.8 Pre-planned memory . 63 2.5 Reliability, availability, and serviceability. 65 2.5.1 RAS in the CPC memory subsystem . 65 2.5.2 General z14 RAS features . 66 2.6 Connectivity. 67 2.6.1 Redundant I/O interconnect . 68 2.6.2 Enhanced drawer availability . 69 2.6.3 CPC drawer upgrade . 70 2.7 Model configurations . 70 2.7.1 Upgrades . ..