Programmer’s Reference SiI9687A Port Processor and SiI9617 MHL 2 Bridge with HDMI Receiver Programmer’s Reference Document # SiI-PR-1078-A SiI9687A Port Processor and SiI9617 MHL 2 Bridge with HDMI Receiver Programmer’s Reference Silicon Image, Inc. December 2012 Copyright Notice Copyright © 2011-2012 Silicon Image, Inc. All rights reserved. The contents of these materials contain proprietary and confidential information (including trade secrets, copyright, and other Intellectual Property interests) of Silicon Image, Inc. or its affiliates. All rights are reserved and contents, (in whole or in part) may not be reproduced, downloaded, disseminated, published, or transferred in any form or by any means, except with the prior written permission of Silicon Image, Inc. or its affiliates. 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SiI-PR-1078-A CONFIDENTIAL SiI9687A Port Processor and SiI9617 MHL 2 Bridge with HDMI Receiver Programmer’s Reference Silicon Image, Inc. Table of Contents Introduction .......................................................................................................................................................................... 1 Register Map .................................................................................................................................................................... 2 Notes and Conventions ..................................................................................................................................................... 3 How to Read a Register Description Table................................................................................................................... 4 Glossary ............................................................................................................................................................................ 5 Register Summary Tables ..................................................................................................................................................... 6 SiI9687A/SiI9617 General Control and Status ................................................................................................................... 17 System Registers............................................................................................................................................................. 17 Device Identification Register Group ......................................................................................................................... 17 System Reset Register Group ..................................................................................................................................... 17 Slave Address Selection ................................................................................................................................................. 19 Slave Address Register Group .................................................................................................................................... 19 External Pin Control ....................................................................................................................................................... 20 General Purpose I/O (GPIO) Register Group ............................................................................................................. 20 GPIO Interrupt Configuration Register Group ........................................................................................................... 22 TPWR Pin Control Register Group ............................................................................................................................ 24 TMDS Pipe Status .......................................................................................................................................................... 25 TMDS Pipe Status Register Group ............................................................................................................................. 25 TMDS Control Register Group .................................................................................................................................. 26 Interrupt Control and Status............................................................................................................................................ 27 Interrupt Control and Group Status Register Group ................................................................................................... 27 General Interrupt Enable and Status Register Group .................................................................................................. 29 InstaPort Switch and HDMI Receiver (SiI9687A Only) .................................................................................................... 30 InstaPort .......................................................................................................................................................................... 30 InstaPort Auto Port Control Enable Register Group ................................................................................................... 30 InstaPort HPE Sequence Timing Control Register Group .......................................................................................... 32 HDMI Input Port Control ............................................................................................................................................... 33 InstaPort Viewing Technology ................................................................................................................................... 33 Port Control with System Off or in Standby ............................................................................................................... 34 Port Control on Exit from Standby ............................................................................................................................. 34 VGA Port Controls ..................................................................................................................................................... 34 Hot Plug Event (HPE) Control Register Group .......................................................................................................... 34 Receiver Termination Value Register Group ............................................................................................................. 38 InstaPort Background Authentication Control Registers ............................................................................................ 39 TMDS Video Sources ................................................................................................................................................. 39 Internal Pattern Generator Video Source .................................................................................................................... 39 Input Port Selection Register Group ..........................................................................................................................