Ms. Suranya G Assistant Professor Department of Electronics & Communication Engineering [email protected] Contact No: 9497328236 B. Tech (Electronics and Communication PHOTO Engineering ), Academic Background: Mahathma Gandhi University, Kerala, 2008 M-Tech (VLSI and Embedded Systems), CUSAT University, Kerala ,2011 Digital Electronics, Microprocessor, Computer Areas of interest: Organisation and Architecture, VLSI B.Tech : Computer Architecture and parallel processing, Neural Networks, Advanced Microprocessors, Advanced Microcontrollers, Microprocessor and Application, VLSI Design and Technology, Solid State Electronics, Basic Subject handled: Electronics and Instrumentation, Logic System Design, Microprocessors and Microcontrollers, Computer Organisation, VLSI, Basics of Electronics Engineering M.Tech:Analog And Data Conversion System Design, Logic System Design Software Proficiency: MS Office, MP lab, Matlab, Modelsim, Xilinx Experience: : 7 years Academics: (7 years) Assistant Professor, Department of ECE August 2011 to till date Ilahia College of Engineering & Technology, Mulavoor, Muvattupuzha. Industry: Nil Professional Association Activities: Member of IEEE 1. Suranya G , „Test pattern generation using LFSR with reseeding scheme for BIST designs‟ IJAREEIE, A unit of S&S Publications,Volume3,December 2014 . 2. Leeba Varghese and Suranya G, „Test pattern generation using LFSR with reseeding scheme for BIST designs‟ International Journal of Software and Web Sciences, Georgia, United States,Volume2,June-August 2014 . 3. Suranya G.„Dump and Deaf Telephone system Publications details : with gesture to voice conversion & Transmission‟, International conference on recent advancements International Journals and challenges in engineering,jai bharath college / Conferences: of management and engineering, perumbavoor, Kerala, March 2017. 4. Suranya G.,„Modified Noc Architecture with fixed priority arbiter‟ , international conference on recent advancements and challenges in engineering , jai bharath college of management and engineering, perumbavoor, kerala, October 2015. 5. Suranya G., Test pattern generation using LFSR with reseeding scheme for BIST designs‟ ,International Conference on Emerging Trends in Electrical Systems, Dept. Of EEE,MA College of Engineering, Kothamangalam,kerala, December 2014. 1. Attended one day workshop on PSPICE conducted by LEONTECH organized by Illahia college of Engineering and Technology Mulavoor Muvattupuzha on 7th November 2017. Workshops: 2. Attended two days workshop on SPSS organized by Illahia college of Engineering and Technology Mulavoor Muvattupuzha on 19th -20th November 2015 1. Department event(OPTERNA) in charge of OBSQURA 2k18 Events Organized/ Conducted 1. Received “ the certificate of Excellence” for Achievements outstanding performance during the academic year 2015-2016 1. Participated in a two days training programme on “Advanced Computer architecture organized by Illahia college of Engineering and Technology Mulavoor Muvattupuzha in assossciation with CSI chapters July 2018 2. Participated in a two days Faculty Development programme on “Matlab and Simulink” organized by Department of Electronics And Communication ,Ilahia College Of Engineering Mulavoor Muvattupuzha ,January 2017 Add-on Courses Attended 3. Participated in a two days Faculty Development programme on “Signal Processing And Research Trends In Biometrics” organized by Electronics Association , Ilahia College Of Engineering Mulavoor Muvattupuzha 12th and 13th January 2016 4. Participated in two days Faculty Development programme on Signal Processing organized by ICET, Mulavoor on 12th -13th January 2013 1. Department Staff secretary 2. Staff Advisor(2018-2022 Batch) 3. PTA Department Co-ordinator Other Responsibilities 4. College library Stock Committee member 5. Discipline Committee Member 6. Mahatma Gandhi university Internal Examination Department Co-ordinator(2015-2018) .