MOS CAPACITOR – MOSFET TRANSISTOR – MOS INVERTERS Prof. Philippe LORENZINI Polytech-Nice Sophia Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 2 Outline • Metal Oxyde Semiconductor Structure • MOS Transistor • MOS Inverters • NMOS • CMOS Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 3 • Two definitions (only 2!) • Work Function (Travail de sortie)eM : this is the energy we have to give to an electron to extract it of metal without kinetic energy. It reaches the "vacuum level". Work function is the energy difference between the vacuum level and the highest occupied energy level, ie the Fermi level. • Electron Affinity (Affinité électronique )e SC : it’s the difference between the vacuum level and the bottom of the conduction band. It’s only defined for SC and not for Metal. • Unity for both of them: eV (electron volt) Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 4 Metal Oxyde Semiconductor Structure Energy band diagram of the three components of a MOS system MOS capacitor E g SC SC 2e fi Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 5 Field Effect Transistor • The field effect is the variation of the conductance of a channel in a semiconductor by the application of an electric field Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 6 Equilibrium of MOS structure dV d 2V (x) Vbi M SC , E , 2 dx dx SC Metal SC(n) Metal SC(n) e SC eSC eVbi e E M C e e M SC e E SC F EC EF E F EF E V EV dx Independant system Equilibrium state Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 7 Ox The five regimes : a function of work function (a) Accumulation (b) Flat band (c) Desertion / depletion (d) Weak inversion (e) Strong inversion Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 8 Energy band diagram for ideal n and p type MOS capacitors under different bias conditions Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 9 Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 10 Field, potential and charges in Silicon We suppose we deal with a p type semiconductor: warning: in few books, e E E 0 absolute value is not Fi F Fi present!!!! V (x ) 0, V (x 0) Vs, Vg Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 11 Field, potential and charges in Silicon d2V (x) Poisson’s Equation: 2 dx SC (x) ep(x) n(x) N D (x) N A (x) Charge density e e Fi Fi p n N N n n exp( ) p0 ni exp( ) 0 0 A D 0 i kT kT eV(x) e(V (x) ) n(x) n exp( ) n exp( Fi ) 0 kT i kT e(V (x) Fi ) eV (x) p(x) ni exp( ) p0 exp kT kT Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 12 Field, potential and charges in Silicon eV ( x) eV ( x) kT kT (x) en0 p0 p0e n0e 2 eV (x) eV (x) d V (x) e kT kT 2 p0 (e 1) n0 (e 1) dx SC d 2V (x) d dV (x) d dV (x) dV (x) dx 2 dx dx dV dx dx eV ( x) eV ( x) dV (x) dV (x) e kT kT d p0 (e 1) n0 (e 1)dV (x) dx dx SC Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 13 Field, potential and charges in Silicon •We compute the integral from bulk to a point x in SC dV ( x ) MO S V(x=« bulk »)=0 et 0 Vg dx bulk eV (x) eV (x) dV (x) V ( x) dx dV (x) dV (x) e kT kT d p0 (e 1) n0 (e 1) dV (x) 0 0 dx dx SC dV (x) And the Electric Field is given by: E(x) dx 2 eV (x) eV (x) 2 dV (x) 2kTp0 eV (x) n0 eV (x) E (x) e kT 1 e kT 1 dx SC kT p0 kT Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 14 Field, potential and charges in Silicon 2 2 eV (x) eV (x) 2 dV (x) kT 2 kT eV (x) n0 kT eV (x) E (x) 2 e 1 e 1 dx e LD kT p0 kT SC kT With the Debye length: LD 2 e po Q If we use the Gauss’s theorem: SC E(x 0) ES SC 1 eV e(V 2 ) 2 S S FI kT SC 2 kT eVS kT n0 eVS QSC e 1 e 1 Qmetal e LD kT p0 kT Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 15 Allways negligible (p type) Field, potential and charges in Silicon 1 eV e(V 2 ) 2 S S FI kT SC 2 kT eVS kT n0 eVS QSC e 1 e 1 Qmetal e LD kT p0 kT For Vs (and so Vg) negative (accumulation) For Vs (and Vg) positive but less than 2fi (depletion – weak inversion) For Vs (and Vg) > 2fi (strong inversion) Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 16 Weak / Strong Inversion 2kT N A VS 2 Fi ln e ni eFI ns=p0=NA This condition will define a very important parameter of the struture: the threshold voltage or the required gate voltage to put the transistor in strong inversion regime Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 17 Measurement of capacitance in Ideal MOS Structure The C-V curve is usually measured with a CV meter: • We apply a DC bias voltage Vg + small sinusoidal signal (100 Hz to 10 MHz) • We measure the capacitive current with an AC meter (90 degree phase shift) => icap/vac =C Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 18 Measurement of capacitance in Ideal MOS Structure When a voltage Vg is applied to the MOS Gate, part of it appears as a potential drop across oxide and the rest of it appears as a band bending Vs in silicon: Q SC SC is grounded, Vg Vox VSC VS so V =VS Cox SC V(X) MO S VOX Vg VG V Vox VSC S Oxide and Silicon have -t 0 X capacitor behavior OX Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 19 Measurement of capacitance in Ideal MOS Structure • Oxide capacitance: as a parallel‐plate capacitor ox 2 Cox F/cm dox • We can also write : QM QM dQM Cox VOX (VG VS ) d(VG VS ) Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 20 Measurement of capacitance in Ideal MOS Structure • Semiconductor (silicon) capacitance (charge in SC) d(QSC ) d(QM ) CSC (voltage across SC) dVS dVS Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 21 Measurement of capacitance in Ideal MOS Structure M O S Vg • Global capacitance of the structure: Vox VSC dQM dQSC CMOS dVG dVG • If we combine the 3 relations above : 1 1 1 2 capacitances connected in series CMOS Cox CSC Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 22 Measurement of capacitance in Ideal MOS Structure • Total charge in SC depends on different regimes 2 types of charges, fixed and mobile/free: QSC free carriers charges fixed charges QS Qdep Semiconductor capacitance can be written as: dQsc (dQS dQdep ) dQS dQdep CSC dVS dVS dVS dVS Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 23 Measurement of capacitance in Ideal MOS Structure • Total charge in SC depends on different regimes 2 types of charges, fixed and mobile/free: QSC free carriers charges fixed charges QS Qdep Semiconductor capacitance can be written as: dQ sc C SC C S C dep dV S Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 24 Measurement of capacitance in Ideal MOS Structure • Summary: MOS capacitor is equivalent : - of 2 capacitors series connected, COX and CSC - CSC is equivalent of two capacitors - the two are variable and be view as 2 capacitors in // C ox Cox Csc Cs Cdep Conclusion: the whole capacitance of MOS structure is function of bias conditions or operating regime through CSC Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 25 Capacitance of MOS structure • Accumulation Regime: VS<0 ie VG<0 1 eV e(V 2 ) 2 S S FI kT SC 2 kT eVS kT n0 eVS QSC e 1 e 1 Qmetal e LD kT p0 kT eV S SC 2 kT 2 kT Q SC e 0 eL D dQSC e e CSC QSC Cox Vg VS dVs 2kT 2kT Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 26 Capacitance of MOS structure • Accumulation Regime: VS<0 ie VG<0 1 eV eV 2 S S kT SC 2 kT eVS n0 kT eVS QSC e 1 e 1 Qmetal e LD kT p0 kT 2kT 1 1 1 1 e C ox CMOS Cox CSC Cox Vg VS Csc 2kT 1 1 1 e C C V V MOS ox g S Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 27 Capacitance of MOS structure • Accumulation Regime: VS<0 ie VG<0 1 eV eV 2 S S kT SC 2 kT eVS n0 kT eVS QSC e 1 e 1 Qmetal e LD kT p0 kT kT=26 meV, in accumulation regime VS is around ‐0,3 V to ‐0,4 V, as soon as VG<‐1 to ‐2 V, so we can simplify to: 2 kT 1 1 1 1 e C C V V C MOS ox g S ox Pr. Ph.Lorenzini From MOS Capacitor to CMOS inverter 28 Capacitance of MOS structure • Flat Band: VS =0 V ie VG=0 V (warning : ideal structure!!!!!) SC Analytical computing: CSC ( fb) LD C ( fb) ox ox MOS ox ox kT SC dox LD d ox SC SC e N A Pr.