See all versions of this document Vivado Design Suite User Guide High-Level Synthesis UG902 (v2020.1) May 4, 2021 Revision History Revision History The following table shows the revision history for this document. Section Revision Summary 05/04/2021 Version 2020.1 C++ Classes and Templates Removed section detailing support for constructors, destructors, and virtual functions. config_export Updated commands in the Options subsection. config_sdx Updated commands in the Options subsection. UG902 (v2020.1) May 4, 2021Send Feedback www.xilinx.com High-Level Synthesis 2 Table of Contents Revision History...............................................................................................................2 Chapter 1: High-Level Synthesis............................................................................ 5 High-Level Synthesis Benefits....................................................................................................5 High-Level Synthesis Basics....................................................................................................... 6 Understanding Vivado HLS...................................................................................................... 12 Using Vivado HLS...................................................................................................................... 19 Data Types for Efficient Hardware.......................................................................................... 71 Managing Interfaces.................................................................................................................77 Optimizing the Design............................................................................................................118 Verifying the RTL..................................................................................................................... 177 Exporting the RTL Design.......................................................................................................191 Chapter 2: High-Level Synthesis C Libraries................................................198 Arbitrary Precision Data Types Library.................................................................................198 HLS Stream Library................................................................................................................. 213 HLS Math Library.....................................................................................................................222 HLS Video Library.................................................................................................................... 232 HLS IP Libraries........................................................................................................................232 HLS Linear Algebra Library.................................................................................................... 264 HLS DSP Library....................................................................................................................... 275 HLS SQL Library....................................................................................................................... 277 Chapter 3: High-Level Synthesis Coding Styles..........................................279 Unsupported C Constructs.....................................................................................................279 C Test Bench.............................................................................................................................283 Functions.................................................................................................................................. 290 RTL Blackbox............................................................................................................................292 Loops........................................................................................................................................ 297 Arrays........................................................................................................................................305 Data Types................................................................................................................................314 C Builtin Functions.................................................................................................................. 339 UG902 (v2020.1) May 4, 2021Send Feedback www.xilinx.com High-Level Synthesis 3 Hardware Efficient C Code..................................................................................................... 340 C++ Classes and Templates....................................................................................................358 Assertions.................................................................................................................................364 SystemC Synthesis.................................................................................................................. 367 Chapter 4: High-Level Synthesis Reference Guide...................................387 Command Reference.............................................................................................................. 387 GUI Reference..........................................................................................................................461 Interface Synthesis Reference............................................................................................... 465 AXI4-Lite Slave C Driver Reference........................................................................................483 HLS Video Functions Library.................................................................................................. 496 HLS Linear Algebra Library Functions.................................................................................. 496 HLS DSP Library Functions..................................................................................................... 505 HLS SQL Library Functions..................................................................................................... 518 C Arbitrary Precision Types.................................................................................................... 521 C++ Arbitrary Precision Types................................................................................................ 535 C++ Arbitrary Precision Fixed-Point Types........................................................................... 555 Comparison of SystemC and Vivado HLS Types..................................................................577 RTL Blackbox JSON File........................................................................................................... 584 Appendix A: Additional Resources and Legal Notices........................... 587 Xilinx Resources.......................................................................................................................587 Documentation Navigator and Design Hubs...................................................................... 587 References................................................................................................................................587 Please Read: Important Legal Notices................................................................................. 588 UG902 (v2020.1) May 4, 2021Send Feedback www.xilinx.com High-Level Synthesis 4 Chapter 1: High-Level Synthesis Chapter 1 High-Level Synthesis The Xilinx® Vivado® High-Level Synthesis (HLS) tool transforms a C specification into a register transfer level (RTL) implementation that you can synthesize into a Xilinx field programmable gate array (FPGA). You can write C specifications in C, C++, or SystemC, and the FPGA provides a massively parallel architecture with benefits in performance, cost, and power over traditional processors. This chapter provides an overview of high-level synthesis. Note: For more information on FPGA architectures and Vivado HLS basic concepts, see the Introduction to FPGA Design Using High-Level Synthesis (UG998). High-Level Synthesis Benefits High-level synthesis bridges hardware and software domains, providing the following primary benefits: • Improved productivity for hardware designers Hardware designers can work at a higher level of abstraction while creating high-performance hardware. • Improved system performance for software designers Software developers can accelerate the computationally intensive parts of their algorithms on a new compilation target, the FPGA. Using a high-level synthesis design methodology allows you to: • Develop algorithms at the C-level Work at a level that is abstract from the implementation details, which consume development time. • Verify at the C-level Validate the functional correctness of the design more quickly than with traditional hardware description languages. • Control the C synthesis process through optimization directives Create specific high-performance hardware implementations. • Create multiple implementations from the C source code using optimization directives UG902 (v2020.1) May 4, 2021Send Feedback www.xilinx.com High-Level Synthesis 5 Chapter 1: High-Level Synthesis Explore the design space, which increases the likelihood of finding an optimal implementation. • Create readable and portable C source code Retarget the C source into different devices as well as incorporate the C source into new projects. High-Level Synthesis Basics High-level synthesis includes the following phases: • Scheduling Determines