EvaluationEvaluation ofof SubstrateSubstrate SurfaceSurface FinishesFinishes forfor PbPb--freefree AssemblyAssembly ProjectProject Chair: Keith Newman, Sun Microsystems Pb-free Surface Finish Project Objective Evaluate the effects of alternative surface finishes for circuit boards and package substrates on Pb-free solder joint reliability during accelerated stress testing. Project Participants Agere, ASE, Cisco, Cookson, Dage, Foxconn, Henkel, HP, IBM, Intel, Lucent, Plexus, Solectron, Sun Microsystems, Texas Instruments, TTM and Vitronics- Soltec Pb-free Surface Finish Project Abstract The transition to the use of Pb-free solder alloys introduces new solder joint reliability concerns. The implementation of alternative surface finishes for circuit boards and package substrates compounds these concerns. This iNEMI project is conducting comparative four-point bend testing, drop testing and board-level thermal cycling of Pb-free components assembled on test boards, as well as comparative solder ball shear/pull testing on BGA and CSP components. The test packages include BGA, CSP and QFP devices, manufactured in a variety of Pb-free surface finishes. OSP and immersion Ag surface finishes are being evaluated for the circuit boards. Sn3Ag0.5Cu solder paste has been selected for the component attachment. Project completion is targeted for March 2007. Pb-free Surface Finish Project Pb-free Surface Finishes PWB Laminate OSP (Entek+ CU106AXHT) Immersion Ag (Alpha Star i-Ag) BGA Substrates Electrolytic Ni/Au ENIG Ni/Pd/Au Cu (SOC, OSP & i-Sn) Lead-frames Matte Sn Matte Sn/Ni Ni/Pd/Au Pb-free Surface Finish Project PWB Laminate Thermal Cycle Test Board Polyclad 370HR 18 metal layers 2.35 mm (0.093 in.) thick 4-Point Monotonic Bend Test Boards Polyclad 370HR 18 metal layers 2.35 mm (0.093 in.) thick Drop Test Boards Polyclad 370HR 8 metal layers 1.55 mm (0.062 in.) thick Pb-free Surface Finish Project Pb-free Components Flip-Chip BGA 1681 FC-BGA, 42.5 mm sq., 1.0 mm pitch (ASE) 1680 FC-BGA, 42.5 mm sq., 1.0 mm pitch (IBM) 479 FC-BGA, 35 mm sq., 1.27 mm pitch (Intel) Wirebond BGA/CSP 676 BGA, 27 mm sq., 1.0 mm pitch (Amkor) 84 CSP, 7 mm sq., 0.5 mm pitch (Amkor) 64 CSP, 8 mm sq., 0.8 mm pitch (Amkor) Wirebond Leadframe 56 MLCC, 7 mm sq., 0.4 mm pitch (Agere) 176 QFP, 20 mm sq., 0.4 mm pitch (Agere) 176 TQFP, 20 mm sq., 0.4 mm pitch (Texas Instruments) Pb-free Surface Finish Project 2 IST Coupons 11.8" x 2.0" 2 ATC Test Boards 11.8“ x 8.2" Bend Test Coupons 10.6“ x 19.5" iNEMI PANEL A LAYOUT [ 24” x 21” PANEL SIZE ] Pb-free Surface Finish Project U361 U321 MLCC 56 U751 Intel Intel IBM FCBGA 479 FCBGA 479 IBM FCBGA 1680 FCBGA 1680 MLCC 56 U741 U231 U221 CSP 64 CSP 84 J3 J1 BOARD LABEL U611 U511 J4 Amkor PBGA 676 Agere Agere TI QFP 176 QFP 176 TQFP 176 U411 U841 U851 U961 R0201 R0603 R2512 ASE ASE ASE FCBGA 1681 FCBGA 1681 Intel FCBGA 1681 FCBGA 479 J2 U131 U111 U3X1 U121 i N E M I L E A D - F R E E S U R F A C E F I N I S H T E S T V E H I C L E [ A T C C O U P O N S ] ATC TEST BOARD LAYOUT ( iNEMI PANEL A ) Pb-free Surface Finish Project ASE Intel IBM FCBGA 1681 FCBGA 479 FCBGA 1680 U312 U112 U222 ASE Intel Amkor FCBGA 1681 FCBGA 479 PBGA 676 U412 U322 U122 ASE Intel IBM FCBGA 1681 FCBGA 479 FCBGA 1680 U332 U132 U232 U612 U742 U752 U512 Amkor Agere Agere Amkor CSP 84 MLCC 56 MLCC 56 CSP 64 i N E M I L E A D - F R E E S U R F A C E F I N I S H T E S T V E H I C L E [ B E N D T E S T C O U P O N S ] BEND TEST BOARD LAYOUT ( iNEMI PANEL A ) Pb-free Surface Finish Project 24.0” x 21.0” 22.5” x 19.5” Intel IBM FCBGA 479 FCBGA 1680 U3Y3 U2Y3 ASE Intel FCBGA 1936 FCBGA 479 DROP TEST PANEL LAYOUT ( iNEMI PANEL B ) Pb-free Surface Finish Project 24.0” x 21.0” 22.5” x 19.5” ASE ASE FCBGA 1681 FCBGA 1681 U1Y3B U1Y3A ASE Intel FCBGA 1936 FCBGA 479 DROP TEST PANEL LAYOUT ( iNEMI PANEL C ) Lead-free Surface Finish Project Project Status During 2005 a comprehensive test plan was developed, and the daisy-chain test packages (BGA, CSP, QFP, etc.) were fabricated and delivered. Time-zero component characterization (cross-section, X-ray, CSAM, coplanarity, etc.) of these components was completed. Extensive low/high speed solder ball shear and pull testing was also completed. Thermal cycle and monotonic bend test board designs were released for fabrication. .