Instruction set define computer Continue A set of abstract symbols, describing the operations of a computer program for the processor, should not be confused with the architecture of industry standards. Machine Code General Concepts Instruction set Opcode Illegal opcode Opcode table Operand Instructions NOP Branch Indirect Branch vte In Computer Sciences, The Architecture Set of Instructions (ISA) is an abstract computer model. It is also called architecture or computer architecture. Implementing an ISA, such as a CPU, is called implementation. In general, the ISA identifies supported data types, registers, hardware support for basic memory management, core functions (such as memory consistency, processing modes, virtual memory) and the ISA implementation family I/O model. IsA determines the behavior of the machine code running on the implementations of this ISA in a way that does not depend on the characteristics of this implementation, providing binary compatibility between implementations. This allows multiple ISA implementations that differ in performance, physical size and cash costs (among other things), but which are capable of running the same machine code, so that lower performance, lower cost machines can be replaced by higher cost, higher machine performance without replacing the software. It also allows the evolution of microarchitectures to implement this ISA, so that new, higher performance ISA implementations can run software that works on previous generations of implementations. If the operating system supports the standard and compatible binary application interface (ABI) for a specific ISA, the machine code for this ISA and operating system will work on future implementations of this ISA and new versions of this operating system. However, if the ISA supports the launch of multiple operating systems, this does not guarantee that the machine code for one operating system will work on another operating system if the first operating system supports the code of a running machine built for another operating system. ISA can be expanded by adding instructions or other features or adding support for larger addresses and data values; implementing an extended ISA will still be able to run machine code for ISA versions without these extensions. The machine code that uses these extensions will only work on implementations that always khlay those extensions. The binary compatibility they provide makes ISAs one of the most fundamental abstractions in computing. The review of the instruction set architecture differs from the microarchitecture, which is a set of processor design methods used in a particular processor to implement a set of instructions. Processors with different may have a common set of instructions. For example, Intel Pentium and Advanced Advanced Athlon devices implement almost identical versions of the x86 set of instructions, but have radically different internal designs. The concept of architecture, unlike the design of a particular machine, was developed by Fred Brooks at IBM during the System/360 design phase. Prior to NPL System/360 the company's computer designers were free to meet cost goals not only by selecting technologies, but also through the fashion of functional and architectural refinements. THE spread compatibility goal, by contrast, postulated a single architecture for a series of five processors covering a wide range of costs and performance. None of the five design teams could expect to be able to make adjustments to architectural specifications as a way of making it easier to achieve cost and productivity goals. Some virtual machines :p, such as Smalltalk, a Java virtual machine, and Microsoft common language, implement this by translating code for common code paths into native machine code. In addition, these virtual machines perform less commonly used code interpreting paths (see: Just in time for compilation). Transmeta implemented a set of x86 instructions on VLIW processors in this way. The ISAs ISA classification can be classified in different ways. General classification by architectural complexity. The Complex Set of Computer Instructions (CISC) has many specialized instructions, some of which can be rarely used in practical programs. A reduced set of computer instructions (RISC) simplifies the processor by effectively implementing only the instructions that are often used in programs, while less common operations are implemented as routines, resulting in additional processor time compensated by rare use. Other types include very long instruction architecture (VLIW), as well as a closely related long instructional word (LIW) and explicitly parallel instructional computational architecture (EPIC). These architectures seek to exploit scheduling parallelism with fewer hardware than RISC and CISC, making the compiler responsible for the instruction and planning problem. Architectures with even less complexity have been studied, such as a minimum set of computer instructions (MISC) and one computer set of instructions (OISC). In theory, these are important types, but they have not been commercialized. The language of the instructions machine is built from discrete statements or instructions. In the processing architecture of this instruction, you can specify: specific registers (for arithmetic, address, or function management) of specific memory sites (or bias to them) of specific address modes (used to interpret operands) More complex operations are built by combining these simple instructions, which are consistently, or otherwise directed instructions on the flow of control. Types of Instructions Examples of Operations common to many sets of instructions include: Data processing and memory operations Set the register to a fixed permanent value. Copying data from memory to register, or vice versa (machine instruction is often referred to as moving; however, the term is misleading). Used to store the contents of the register, the result of the calculation, or to obtain stored data to do the calculation on it later. Often referred to as load and storage operations. Read and write data from hardware devices. Add, subtract, multiply, or divide the values of the two registers by placing the result in the register, perhaps by installing one or more conditions codes in the status registry. increment, decrement in some ISAs, keeping operand fetch in trivial cases. We perform bit operations, such as taking the connection and disconnecting the corresponding bits in a pair of registers, taking the denial of each bit in the register. Compare the two values in registers (for example, to see if one is smaller or if they are equal). Instructions for floating point for arithmetic on floating point numbers. Manage branch flow operations to another location in the program and follow instructions there. Conditional branching to another place, if a certain condition holds. Indirectly a branch to another place. Call another block of code while saving the location of the following instructions as a point for a return. Download/store data in and out of the coprocessor or by exchanging with processor registers. We perform coprocessor operations. Complex instructions processors can include complex instructions in a set of instructions. One tricky instruction does what can take a lot of instructions on other computers. (quote is necessary) These instructions are characterized by instructions that take several steps, control multiple functional units, or otherwise appear on a larger scale than the bulk of the simple instructions implemented by the processor. Some examples of complex instructions include: transferring multiple registers in or out of memory (especially a stack) immediately moving large blocks of memory (such as a string copy or DMA transmission) to a complex integrator and floating point arithmetic (e.g. square root, or transcendental functions such as logarithm, sinus, cosine, etc.) SIMD instructions, a single instruction, performing the operation at many homogeneous values in parallel, perhaps in the dedicated SIMD registers, performing atomic instructions for testing and kit, or other instructions for learning the readable modification that perform ALU operations with an error of memory, rather than with instructions on the register. CISC than in RISC instructions sets, but RISC instructions sets can also include them. RiSC set of instructions, as a rule, not ALU operations with memory opandas or instructions for moving large memory blocks, but most RISC instructions include SIMD or vector instructions that perform the same arithmetic operation on multiple data fragments at the same time. SIMD instructions have the ability to manipulate large vectors and matrixes in minimal time. SIMD instructions make it easy to use algorithms that normally work in sound, image, and video processing. Various SIMD sales have been brought to the market under trade names such as MMX, 3DNow!, and AltiVec. One instruction instruction one instruction can have several fields that define a logical operation, and can also include source and destination addresses and fixed values. This is the INSTRUCTION MIPS Add immediately, which allows the selection of sources and appointment registers and the inclusion of a small permanent. In traditional architectures, the instruction includes an opcode that identifies an operation to perform, such as adding memory content to register and zero or more opera agents that can specify registers, memory locations, or literal data. Operators may have address modes that determine