|||||||||||||| US005103499A United States Patent (19) 11) Patent Number: 5,103,499 Miner et al. 45 Date of Patent: Apr. 7, 1992 54 BEAM SYNCHRONIZED COPROCESSOR 4,180,805 12/1979 Burson ................................ 340/709 4,243,984 1/1981 Ackley et al. ....................... 340/703 (75) Inventors: Jay G. Miner, Mtn. View; Dave 4,420,770 2/1983 Rahman .......... ... 358/183 Dean, Ukiah; Joseph C. Decuir, 4,572,506 2/1986 DiOrio ........ 364/521 X Albany; Ronald H. Nicholson, 4,777,621 10/1988 Miner et al. ......................... 364/900 Sunnyvale; Akio Tanaka, 4,809, 169 2/1989 Sfavti et al. ......................... 364/200 Burlingame, all of Calif. Primary Examiner-Heather R. Herndon (73) Assignee: Commodore-Amiga, Inc., Los Gatos, Attorney, Agent, or Firm-Finnegan, Henderson, Calif. Farabow, Garrett & Dunner (21) Appl. No.: 422,022 (57) ABSTRACT Filed: Oct. 16, 1989 A computer that provides data to a video display using (22) a bitmap display memory organization and bitplane Related U.S. Application Data addressing. Separate control is provided for two bit plane backgrounds and for eight reusable and easily 62) Division of Ser. No. 886,796, Jul. 18, 1986, Pat. No. movable sprites. Additional logic allows for dynamical 4,874,164. ly-controllable interobject priority and collision detec (51) Int. Cl. .............................................. G06F 3/153 tion among data in each of the bitplane backgrounds (52) U.S. C. ..................................... 395/162; 340/750 and sprites. A coprocessor provides for video beam 58) Field of Search ....................... 364/518, 521, 522; synchronized changes to data in registers, freeing the 340/721, 723, 748-750; 273/1 E, DIG. 28; main processor for general purpose computing tasks. A 358/22 block image transferer is provided to rapidly copy data (56) References Cited in large blocks from one memory location to another. In U.S. PATENT DOCUMENTS hold-and-modify mode, color output circuitry holds the values for a previously displayed pixel while bitplane 3,996,585 12/1976 Hogan et al................. 340/324 AD 4,034,983 7/1977 Dash et al. ........................ 373/85 R data modifies those values, allowing for simultaneous 4,053,740 10/1977 Rosenthal ........................... 364/705 display of a greatly increased number of colors. 4,070,710 1/1978 Sukonick et al. ................... 364/900 4,177,462 12/1979 Chung................................. 340/703 34 Claims, 11 Drawing Sheets AABS EEn TESA) E) NNRO U.S. Patent Apr. 7, 1992 Sheet 2 of 11 5,103,499 A/6 2. DATABUS (BLTTER CONTROL) SELECT BITS (8) n FILL CARRY IN FLLENABLE STORE TO DESTINATION DATABUS U.S. Patent Apr. 7, 1992 Sheet 3 of 11 5,103,499 A/6 t. SPRITE VER. POSITION 39 COMPARATOR SYNCH LIGHT PEN VIDEO BEAM CTR. 404 DMA CONTROL ----- J REGISTER ADDRESS - -27 29 f DECODER wentarams GATE NHBT SIGNAL is AUDIO 2 BT BIT MAP PLANE COPROCESSOR 33 U.S. Patent Apr. 7, 1992 Sheet 4 of 11 5,103,499 |||| WW0 31}}}dS 8BITMOHINO0 OZIJ!!! JAWAWOO(-69 ----–—-1------ \----- º9/3/ (9)S18WIW0____j------------; U.S. Patent 5,103,499 Z39/3/ ">?HIM,62 çLI»THWNE U.S. Patent Apr. 7, 1992 Sheet 6 of 11 5,103,499 (TWWU)ISH/1038WW0 (H80)(NWW30S/18 U.S. Patent Apr. 7, 1992 Sheet 8 of 11 5,103,499 ÇǺ O/39/-/ (](9)118[)SI?3Nºld U.S. Patent 5,103,499 (91)03}} U.S. Patent Apr. 7, 1992 Sheet 10 of 11 5,103,499 A/6 A. COLLISION DETECTION LOGC 335 SPRUs III| | H.| | | -DOH 372 || || BIT PLANE BUS 333 -DOH 372 O 372 : H5OH 373 353 6 BTS-LINES 373A COLLISION 375 ---L-- E-iREG. (6) 5 CSIONSTRAGE 5 O BES || |||st DC (6) U.S. Patent Apr. 7, 1992 Sheet 11 of 11 5,103,499 g 53 N S. UM) CO No No S. ZY 1 N (NZY/N r N rf s D 2 - 2 asse a as Caa 3 5,103,499 1. 2 Motorola Inc. 68000 and a 6502. In this system, the first BEAM SYNCHRONIZED COPROCESSOR processor is dedicated to computational operations and the second microprocessor is dedicated to video display This is a division of application Ser. No. 06/886,796, information retrieval. filed July 18, 1986, now U.S. Pat. No. 4,874,164. Other early game circuits, such as Dash et al., U.S. Pat. No. 4,034,983 utilized special purpose control cir BACKGROUND OF THE INVENTION cuits to generate signals to the antenna connection of a This invention relates to the field of microprocessor commercial color television receiver. Such a special powered computers for video games and personal com purpose control circuit could include analog interface puters, incorporating DMA techniques, especially such 10 circuits for processing gamepaddle paddle signals and systems which are implemented in MOS (metal oxide decoding functions, and sync pulse generation could be semiconductor) LSI (large scale integrated) circuitry used to generate horizontal sync and raster scan infor where circuit area is a consideration. The invention nation. further relates to enhanced systems where auxiliary Personal computer and microprocessor driven sys circuitry has been added to the host system; where a 15 tems, such as Chung, U.S. Pat. No. 4,177,462, have used televisiontype display device is used; and where bitmap display generator circuitry driven off of an address bus, mode (at least one bit of video information is stored in data bus and control bus, including raster line genera memory for every element location (pixel) of the pic tion and vertical position counters. ture displayed) is likewise incorporated. Likewise, Sukonick et al., U.S. Pat. No. 4,070,710 The invention also relates to video display drives for 20 incorporates video control circuits and raster memory color video display monitors where color sprites access into a system with data and address bus architec (which are sometimes called background) are operated ture. Sukonicket al. uses a video control circuit which in unison. relies upon a plurality of vertical and horizontal posi Bit mapping, while space and time implementation tion registers, a skip pattern memory and modulo com consuming, has proven to be a straightforward and an 25 parison circuitry for "FIFO" processing of video infor accurate method for video display generation. Complex mation. displays provided by video games and personal comput Sukonick, U.S. Pat. No. 4,070,710, shows a two pro ers require overlay presentations of movable and/or cessor system. Sukonick has added a display system 16 changeable information and offixed information; and of to programmed host computer 10. This video display collisions between movable objects. Bit map implemen 30 system 16 contains an Intel Corporation 8088 micro tation has been the focus of various prior circuits. processor 76 within the micro-control unit 22 of the Prior video game circuits have provided a complex video display system. display format to a television receiver display unit (a Along this line Burson, U.S. Pat. No. 4,180,805, has cathode ray tube), which display unit generates the provided a video display circuit which incorporates a presentation with a plurality of horizontal scans or ras 35 general purpose microprocessor 15, the TMS 1100 mi ter lines. A video game circuit which is capable of dis crocomputer. A character memory is provided separate playing fixed objects as background, as well as moving from a display memory and character generator mem objects, is shown by Rosenthal, U.S. Pat. No. 4,053,740. ory. Each display memory word is partitioned into two Rosenthal has built a special purpose digital computer bytes, with the first of byte being a character memory to generate video game information from a plurality of 40 address and the second being a sub-address to locate a selected, on a mutually exclusive basis, software defined character-word within a set of character words in mem programs. Operator commands are separated into an ory. Each character memory word is likewise parti independent computational section and an independent tioned into two bytes with the first byte determining display section of the circuit for processing. Rosenthal, color and the second byte selecting a particular charac U.S. Pat. No. 4,053,740, utilized arithmetic logic units to 45 ter from a prestored set. drive accumulators to control x and y registers and The use of a second general purpose commercially associated horizontal and vertical beam direction drive available microcomputer to process video display infor circuits for cathode ray tube displays. mation, while increasing the system speed, also in Personal computers, such as the Apple Computer, creases the cost of manufacture for the system, as well have utilized a main microprocessor to perform compu 50 as, the size of the system, i.e., chip "real estate.” tational operations and to process (retrieve) video dis A micro-control unit is also used and is necessary to play information to generate displays to a television the circuitry. The micro-control unit decodes instruc type receiver. tions from a host computer for use by the raster memory The Appie Computer has incorporated a general unit and generates (encodes) control information to purpose microprocessor, the MOS Technology Inc. 55 cause the raster memory to write display information, as Model 6502, to perform both computational operations well as to control the video control circuit to read infor and video display information retrieval. Such a single mation from the raster memory and to translate it into microprocessor driven system has speed limitations, as video signals usable by a CRT drive circuit. Ackley et most microprocessors, including the Model 6502, have al., U.S. Pat. No. 4,243,984, show a video display pro significant processing dead time used for refreshing cessor including general circuit components for overlay registers and resetting and initializing operations.
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