<p>Quiz 0 </p><p>Lecture 2: The Instruction Set Architecture </p><p>COS / ELE 375 <br>Computer Architecture and Organization </p><p>Princeton University <br>Fall 2015 </p><p>Prof. David August </p><p></p><ul style="display: flex;"><li style="flex:1"><strong>1</strong></li><li style="flex:1"><strong>2</strong></li></ul><p></p><p>Quiz 0 </p><p>CD </p><p>3 Miles of Music </p><p></p><ul style="display: flex;"><li style="flex:1"><strong>3</strong></li><li style="flex:1"><strong>4</strong></li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Pits and Lands </li><li style="flex:1">Interpretation </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">0</li><li style="flex:1">1</li><li style="flex:1">1</li><li style="flex:1">1</li><li style="flex:1">0</li><li style="flex:1">1</li><li style="flex:1">0</li><li style="flex:1">1</li></ul><p></p><p>As Music: <br>01110101<sub style="top: 0.2501em;">2 </sub>= 117/256 position of speaker </p><p>As Number: <br>Transition represents a bit state (1/on/red/female/heads) </p><p>No change represents other state (0/off/white/male/tails) <br>01110101<sub style="top: 0.2501em;">2 </sub>= 1&nbsp;+ 4 + 16 + 32 + 64 = 117<sub style="top: 0.2501em;">10 </sub>= 75<sub style="top: 0.2501em;">16 </sub>(Get comfortable with base 2, 8, 10, and 16.) </p><p>As Text: <br>01110101<sub style="top: 0.2501em;">2 </sub>= 117<sup style="top: -0.3001em;">th </sup>character in the ASCII codes = “u” </p><p></p><ul style="display: flex;"><li style="flex:1"><strong>5</strong></li><li style="flex:1"><strong>6</strong></li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Interpretation – ASCII </li><li style="flex:1">Princeton Computer Science Building West Wall </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1"><strong>7</strong></li><li style="flex:1"><strong>8</strong></li></ul><p></p><p>Interpretation </p><p>Binary Code and Data (Hello World!) </p><p>•ꢀ Programs consist of Code and Data •ꢀ Code and Data are Encoded in Bits </p><p>IA-64 Binary (objdump) </p><p>As Music: <br>01110101<sub style="top: 0.2501em;">2 </sub>= 117/256 position of speaker </p><p>As Number: <br>01110101<sub style="top: 0.2501em;">2 </sub>= 1&nbsp;+ 4 + 16 + 32 + 64 = 117<sub style="top: 0.2501em;">10 </sub>= 75<sub style="top: 0.2501em;">16 </sub></p><p>As Text: <br>01110101<sub style="top: 0.2501em;">2 </sub>= 117<sup style="top: -0.3001em;">th </sup>character in the ASCII codes = “u” </p><p>CAN ALSO BE INTERPRETED AS MACHINE INSTRUCTION! </p><p><strong>9</strong></p><p></p><ul style="display: flex;"><li style="flex:1">Interfaces in Computer Systems </li><li style="flex:1">Instructions </li></ul><p></p><p>Sequential Circuit!! </p><p>Software: Produce Bits Instructing Machine to Manipulate State or Produce I/O </p><p>State </p><p>Computers process information </p><p>•ꢀ Input/Output (I/O) </p><p><strong>Applications </strong></p><p>•ꢀ State (memory) </p><p><strong>Operating System </strong></p><p>•ꢀ Computation (processor) </p><p><strong>Compiler </strong><br><strong>Firmware </strong></p><p><strong>Instruction Set Architecture </strong></p><p></p><ul style="display: flex;"><li style="flex:1">Output </li><li style="flex:1">Input </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1"><strong>Instruction Set Processor </strong></li><li style="flex:1"><strong>I/O System </strong></li></ul><p><strong>Datapath &amp; Control Digital Design Circuit Design </strong><br><strong>Layout </strong></p><p>Computation </p><p>•ꢀ Instructions instruct processor to manipulate state •ꢀ Instructions instruct processor to produce I/O in the same way </p><p>Hardware: Read and Obey Instruction Bits </p><p><strong>12 </strong></p><p>State </p><p>State – Main Memory </p><p>Typical modern machine has this architectural state: 1.ꢀ Main Memory <br>Main Memory (AKA: RAM – Random Access Memory) •ꢀ Data can be accessed by address (like a big array) </p><ul style="display: flex;"><li style="flex:1">•ꢀ Large but relatively slow </li><li style="flex:1">2.ꢀ Registers </li></ul><p></p><ul style="display: flex;"><li style="flex:1">3.ꢀ Program Counter </li><li style="flex:1">•ꢀ Decent desktop machine: 1 Gigabyte, 800MHz </li></ul><p></p><p>Address <br>0000 0001 0002 0003 </p><p>…</p><p>Data <br>01011001<sub style="top: 0.2084em;">2 </sub></p><p>F5<sub style="top: 0.2084em;">16 </sub></p><p>Architectural – Part of the assembly programmer’s interface (Implementation has additional microarchitectural state) </p><p>78<sub style="top: 0.2084em;">16 </sub>3A<sub style="top: 0.2084em;">16 </sub></p><p>…</p><ul style="display: flex;"><li style="flex:1">FFFF </li><li style="flex:1">00000000<sub style="top: 0.2084em;">2 </sub></li></ul><p></p><p>Byte Addressable </p><p></p><ul style="display: flex;"><li style="flex:1"><strong>13 </strong></li><li style="flex:1"><strong>14 </strong></li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">State – Main Memory </li><li style="flex:1">State – Main Memory </li></ul><p></p><p>Address <br>0000 0001 0002 0003 </p><p>…</p><p>Data <br>01011001<sub style="top: 0.2084em;">2 </sub></p><p>F5<sub style="top: 0.2084em;">16 </sub></p><p>Address <br>0000 0001 0002 0003 </p><p>…</p><p>Data <br>01011001<sub style="top: 0.2084em;">2 </sub></p><p>F5<sub style="top: 0.2084em;">16 </sub></p><p></p><ul style="display: flex;"><li style="flex:1">Read: </li><li style="flex:1">Write: </li></ul><p>1.ꢀ Indicate WRITE 2.ꢀ Give Address and Data <br>1.ꢀ Indicate READ 2.ꢀ Give Address 3.ꢀ Get Data </p><p></p><ul style="display: flex;"><li style="flex:1">78<sub style="top: 0.2084em;">16 </sub></li><li style="flex:1">78<sub style="top: 0.2084em;">16 </sub></li></ul><p>3A<sub style="top: 0.2084em;">16 </sub></p><p>3A </p><p><strong>12</strong><sub style="top: 0.2084em;"><strong>1</strong></sub><sub style="top: 0.1678em;">1</sub><sub style="top: 0.2084em;"><strong>6</strong></sub><sub style="top: 0.1678em;">6 </sub></p><p></p><ul style="display: flex;"><li style="flex:1">…</li><li style="flex:1">…</li></ul><p></p><ul style="display: flex;"><li style="flex:1">FFFF </li><li style="flex:1">00000000<sub style="top: 0.2084em;">2 </sub></li><li style="flex:1">FFFF </li><li style="flex:1">00000000<sub style="top: 0.2084em;">2 </sub></li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Read/Write </li><li style="flex:1">Read/Write </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">WRITE </li><li style="flex:1">READ </li></ul><p>0002 </p><p>Address <br>Data <br>Address </p><p>0003 </p><p>Data </p><p>12<sub style="top: 0.2501em;">16 </sub></p><p>78<sub style="top: 0.2501em;">16 </sub></p><p></p><ul style="display: flex;"><li style="flex:1"><strong>15 </strong></li><li style="flex:1"><strong>16 </strong></li></ul><p></p><p>State – Registers </p><p>State – Program Counter </p><p>Registers (AKA: Register File) <br>Program Counter (AKA: PC, Instruction Pointer, IP) •ꢀ Instructions change state, but which instruction now? <br>•ꢀ Data can be accessed by register number (address) •ꢀ Small but relatively fast (typically on processor chip) •ꢀ Decent desktop machine: 8 32-bit registers, 3 GHz <br>•ꢀ PC holds memory address of currently executing instruction </p><p></p><ul style="display: flex;"><li style="flex:1">Register </li><li style="flex:1">Data in Reg </li></ul><p>00000000<sub style="top: 0.2084em;">16 </sub>F629D9B5<sub style="top: 0.2084em;">16 </sub>7B2D9D08<sub style="top: 0.2084em;">16 </sub>00000001<sub style="top: 0.2084em;">16 </sub><br>…<br>Address <br>0000 0001 0002 0003 </p><p>…</p><p>Data in Memory <br>01011001<sub style="top: 0.2084em;">2 </sub></p><p>F5<sub style="top: 0.2084em;">16 </sub></p><p>01<br>Program Counter <br>0002 <br>2</p><p>ADD<sub style="top: 0.2084em;">inst </sub></p><p>3<br>SUBTRACT<sub style="top: 0.2084em;">inst </sub></p><p>…</p><p>…</p><p></p><ul style="display: flex;"><li style="flex:1">8</li><li style="flex:1">DEADBEEF<sub style="top: 0.2084em;">16 </sub></li></ul><p></p><ul style="display: flex;"><li style="flex:1">FFFF </li><li style="flex:1">00000000<sub style="top: 0.2084em;">2 </sub></li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1"><strong>17 </strong></li><li style="flex:1"><strong>18 </strong></li></ul><p></p><p>State – Program Counter </p><p>State – Summary </p><p>Program Counter (AKA: PC, Instruction Pointer, IP) •ꢀ Instructions change state, but which instruction now? •ꢀ PC holds address of currently executing instruction </p><p>•ꢀ PC is updated after each instruction </p><p>Typical modern machine has this architectural state: 1.ꢀ Main Memory – Big, Slow 2.ꢀ Registers – Small, Fast (always on processor chip) 3.ꢀ Program Counter – Address of executing instruction </p><p>Address <br>0000 0001 0002 0003 </p><p>…</p><p>Data in Memory <br>01011001<sub style="top: 0.2084em;">2 </sub></p><p>F5<sub style="top: 0.2084em;">16 </sub></p><p>Architectural – Part of the assembly programmer’s </p><p>Program Counter <br>0003 </p><p>interface <br>(implementation has additional microarchitectural state) </p><p>ADD<sub style="top: 0.2084em;">inst </sub></p><p>SUBTRACT<sub style="top: 0.2084em;">inst </sub><br>…</p><ul style="display: flex;"><li style="flex:1">FFFF </li><li style="flex:1">00000000<sub style="top: 0.2084em;">2 </sub></li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1"><strong>19 </strong></li><li style="flex:1"><strong>20 </strong></li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">An Aside: State and The Core Dump </li><li style="flex:1">Interfaces in Computer Systems </li></ul><p></p><p>Software: Produce Bits Instructing Machine to Manipulate State or Produce I/O </p><p>•ꢀ Core Dump: the state of the machine at a given time <br>•ꢀ Typically at program failure </p><p><strong>Applications </strong></p><p><strong>Registers </strong></p><p><strong>Operating System </strong></p><p></p><ul style="display: flex;"><li style="flex:1"><strong>0</strong></li><li style="flex:1"><strong>1</strong></li><li style="flex:1"><strong>2</strong></li><li style="flex:1"><strong>3</strong></li><li style="flex:1"><strong>4</strong></li><li style="flex:1"><strong>5</strong></li><li style="flex:1"><strong>6</strong></li><li style="flex:1"><strong>7</strong></li></ul><p></p><p><strong>0000 0788 B700 0010 0401 0002 0003 00A0 </strong></p><p>•ꢀ Core dump contains: </p><p>•ꢀ Register Contents •ꢀ Memory Contents •ꢀ PC Value </p><p><strong>PC </strong></p><p><strong>10 </strong></p><p></p><ul style="display: flex;"><li style="flex:1"><strong>8</strong></li><li style="flex:1"><strong>9</strong></li><li style="flex:1"><strong>A</strong></li><li style="flex:1"><strong>B</strong></li><li style="flex:1"><strong>C</strong></li><li style="flex:1"><strong>D</strong></li><li style="flex:1"><strong>E</strong></li><li style="flex:1"><strong>F</strong></li></ul><p></p><p><strong>Compiler </strong><br><strong>Firmware </strong></p><p><strong>0000 0788 B700 0010 0401 0002 0003 00A0 </strong></p><p><strong>Instruction Set Architecture </strong></p><p><strong>Main Memory </strong></p><p></p><ul style="display: flex;"><li style="flex:1"><strong>Instruction Set Processor </strong></li><li style="flex:1"><strong>I/O System </strong></li></ul><p></p><p><strong>0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 9222 9120 1121 A120 1121 A121 7211 0000 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F 0000 0000 0000 FE10 FACE CAFE ACED CEDE </strong></p><p><strong>00: </strong></p><p><strong>08: 10: 18: 20: 28: </strong><br><strong>.</strong></p><p><strong>Datapath &amp; Control Digital Design Circuit Design </strong><br><strong>Layout </strong></p><p><strong>.</strong></p><p><strong>1234 5678 9ABC DEF0 0000 0000 F00D 0000 0000 0000 EEEE 1111 EEEE 1111 0000 0000 B1B2 F1F5 0000 0000 0000 0000 0000 0000 </strong></p><p><strong>E8: F0: F8: </strong></p><p>Hardware: Read and Obey Instruction Bits </p><p><strong>21 </strong></p><p>Instructions </p><p>Instructions </p><p></p><ul style="display: flex;"><li style="flex:1">Register </li><li style="flex:1">Data </li></ul><p>0</p><p></p><ul style="display: flex;"><li style="flex:1">An ADD Instruction: </li><li style="flex:1">Instructions: </li></ul><p>“The vocabulary of commands” Specify how to operate on state </p><p>01add r1 = r2 + r3&nbsp;(assembly) <br>15 </p><p></p><ul style="display: flex;"><li style="flex:1">1</li><li style="flex:1">2</li></ul><p></p><ul style="display: flex;"><li style="flex:1">3</li><li style="flex:1">2</li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Opcode </li><li style="flex:1">Operands </li></ul><p></p><p>…</p><p>…0</p><p>Example: </p><p>31 <br>40: add r1 = r2 + r3 </p><p>44: sub r3 = r1 - r0 48: store M[ r3 ] = r1 52: load r2 = M[ 2 ] </p><p>Parts of the Instruction: </p><p></p><ul style="display: flex;"><li style="flex:1">Address </li><li style="flex:1">Data </li></ul><p>0</p><p>•ꢀ Opcode (verb) – what operation to perform •ꢀ Operands (noun) – what to operate upon •ꢀ Source Operands – where values come from •ꢀ Destination Operand – where to deposit data values </p><p>0</p><ul style="display: flex;"><li style="flex:1">1</li><li style="flex:1">25 </li></ul><p></p><ul style="display: flex;"><li style="flex:1">5</li><li style="flex:1">2</li></ul><p>Program Counter </p><p>40 </p><ul style="display: flex;"><li style="flex:1">3</li><li style="flex:1">9</li></ul><p></p><p>…</p><p>…</p><ul style="display: flex;"><li style="flex:1">0</li><li style="flex:1">FFFFFFFF </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Instructions </li><li style="flex:1">Instructions </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Register </li><li style="flex:1">Data </li></ul><p>0</p><ul style="display: flex;"><li style="flex:1">Register </li><li style="flex:1">Data </li></ul><p></p><p>Instructions: </p><p>01<br>01<br>0</p><p>3</p><p>15 </p><p>“The vocabulary of commands” Specify how to operate on state </p><p><strong>1</strong></p><p></p><ul style="display: flex;"><li style="flex:1">1</li><li style="flex:1">2</li><li style="flex:1">2</li><li style="flex:1">1</li></ul><p></p><p><strong>2</strong></p><p></p><ul style="display: flex;"><li style="flex:1">2</li><li style="flex:1">3</li><li style="flex:1">3</li><li style="flex:1">2</li></ul><p></p><p>…</p><p>…0</p><p>…</p><p>…0</p><p></p><ul style="display: flex;"><li style="flex:1">Example: </li><li style="flex:1">Example: </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">31 </li><li style="flex:1">31 </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">40: add r1 = r2 + r3 </li><li style="flex:1">40: add r1 = r2 + r3 </li></ul><p></p><p><strong>3</strong></p><p>44: sub r3 = r1 - r0 48: store M[ r3 ] = r1 52: load r2 = M[ 2 ] <br>44: sub r3 = r1 - r0 48: store M[ r3 ] = r1 52: load r2 = M[ 2 ] </p><ul style="display: flex;"><li style="flex:1">Address </li><li style="flex:1">Data </li></ul><p>0</p><ul style="display: flex;"><li style="flex:1">Address </li><li style="flex:1">Data </li></ul><p></p><ul style="display: flex;"><li style="flex:1">0</li><li style="flex:1">0</li></ul><p>1<br>0</p><ul style="display: flex;"><li style="flex:1">1</li><li style="flex:1">25 </li></ul><p>5<br>25 </p><ul style="display: flex;"><li style="flex:1">5</li><li style="flex:1">2</li><li style="flex:1">2</li></ul><p>Program Counter </p><p>40 </p><p>Program Counter </p><p>40 </p><p></p><ul style="display: flex;"><li style="flex:1">3</li><li style="flex:1">9</li><li style="flex:1">3</li><li style="flex:1">9</li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">…</li><li style="flex:1">…</li></ul><p></p><p>…0<br>…</p><ul style="display: flex;"><li style="flex:1">0</li><li style="flex:1">FFFFFFFF </li><li style="flex:1">FFFFFFFF </li></ul><p></p><p>Instructions </p><p>Instructions </p><p></p><ul style="display: flex;"><li style="flex:1">Register </li><li style="flex:1">Data </li><li style="flex:1">Register </li><li style="flex:1">Data </li></ul><p>0</p><p>Instructions: “The vocabulary of commands” Specify how to operate on state <br>Instructions: “The vocabulary of commands” Specify how to operate on state </p><p>01<br>03<br>01</p><p><strong>3</strong></p><p>3</p><ul style="display: flex;"><li style="flex:1">2</li><li style="flex:1">1</li><li style="flex:1">2</li><li style="flex:1">1</li></ul><p></p><p><strong>3</strong></p><p></p><ul style="display: flex;"><li style="flex:1">3</li><li style="flex:1">3</li><li style="flex:1">2</li><li style="flex:1">3</li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">…</li><li style="flex:1">…</li></ul><p></p><p>…0<br>…0</p><p></p><ul style="display: flex;"><li style="flex:1">Example: </li><li style="flex:1">Example: </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">31 </li><li style="flex:1">31 </li></ul><p></p><ul style="display: flex;"><li style="flex:1">40: add r1 = r2 + r3 </li><li style="flex:1">40: add r1 = r2 + r3 </li></ul><p></p><p><strong>3</strong></p><p>44: sub r3 = r1 - r0 </p><p>44: sub r3 = r1 - r0 </p><p>48: store M[ r3 ] = r1 </p><p>52: load r2 = M[ 2 ] </p><ul style="display: flex;"><li style="flex:1">Address </li><li style="flex:1">Data </li></ul><p>0</p><ul style="display: flex;"><li style="flex:1">Address </li><li style="flex:1">Data </li></ul><p>0<br>48: store M[ r3 ] = r1 52: load r2 = M[ 2 ] </p><p><strong>3</strong></p><p>01<br>0</p><ul style="display: flex;"><li style="flex:1">1</li><li style="flex:1">25 </li></ul><p>5<br>25 </p><ul style="display: flex;"><li style="flex:1">5</li><li style="flex:1">2</li><li style="flex:1">2</li></ul><p>Program Counter </p><p>44 </p><p>Program Counter </p><p>48 </p><p></p><ul style="display: flex;"><li style="flex:1">3</li><li style="flex:1">9</li><li style="flex:1">3</li><li style="flex:1">9</li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">…</li><li style="flex:1">…</li></ul><p></p><p>…0<br>…</p><ul style="display: flex;"><li style="flex:1">0</li><li style="flex:1">FFFFFFFF </li><li style="flex:1">FFFFFFFF </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Instructions </li><li style="flex:1">Instructions </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Register </li><li style="flex:1">Data </li><li style="flex:1">Register </li><li style="flex:1">Data </li></ul><p></p><p>Instructions: “The vocabulary of commands” Specify how to operate on state <br>Instructions: “The vocabulary of commands” Specify how to operate on state </p><p>01<br>03<br>01<br>03</p><ul style="display: flex;"><li style="flex:1">2</li><li style="flex:1">1</li><li style="flex:1">2</li><li style="flex:1">5</li></ul><p></p><ul style="display: flex;"><li style="flex:1">3</li><li style="flex:1">3</li><li style="flex:1">3</li><li style="flex:1">3</li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">…</li><li style="flex:1">…</li></ul><p></p><p>…0<br>…0</p><p></p><ul style="display: flex;"><li style="flex:1">Example: </li><li style="flex:1">Example: </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">31 </li><li style="flex:1">31 </li></ul><p>40: add r1 = r2 + r3 </p><p>44: sub r3 = r1 - r0 48: store M[ r3 ] = r1 <br>40: add r1 = r2 + r3 44: sub r3 = r1 - r0 48: store M[ r3 ] = r1 52: load r2 = M[ 2 ] </p><ul style="display: flex;"><li style="flex:1">Address </li><li style="flex:1">Data </li></ul><p>0</p><ul style="display: flex;"><li style="flex:1">Address </li><li style="flex:1">Data </li></ul><p></p><ul style="display: flex;"><li style="flex:1">0</li><li style="flex:1">0</li></ul><p>1<br>01</p><p>52: load r2 = M[ 2 ] </p><p><strong>5</strong></p><p>25 <br>5<br>25 </p><ul style="display: flex;"><li style="flex:1">5</li><li style="flex:1">2</li><li style="flex:1">2</li></ul><p>Program Counter </p><p>52 </p><p>Program Counter <br>52 </p><ul style="display: flex;"><li style="flex:1">3</li><li style="flex:1">3</li><li style="flex:1">3</li><li style="flex:1">3</li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">…</li><li style="flex:1">…</li></ul><p></p><p>…0<br>…</p><ul style="display: flex;"><li style="flex:1">0</li><li style="flex:1">FFFFFFFF </li><li style="flex:1">FFFFFFFF </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Instructions </li><li style="flex:1">Assembly Instructions and C </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Register </li><li style="flex:1">Data </li></ul><p></p><p><strong>main() { </strong></p><p>Note: </p><p>01<br>03</p><p><strong>int a = 15, b = 1, c = 2; a = b + c;&nbsp;/* a gets 3 */ c = a;&nbsp;/* c gets 3 */ </strong></p><p>1.ꢀ Insts Executed in Order 2.ꢀ Addressing Modes </p><p></p><ul style="display: flex;"><li style="flex:1">2</li><li style="flex:1">5</li></ul><p></p><p><strong>add r1 = r2 + r3 sub r3 = r1 - r0 store M[ r3 ] = r1 </strong></p><p></p><ul style="display: flex;"><li style="flex:1">3</li><li style="flex:1">3</li></ul><p></p><p>…</p><p>…0</p><p>Example: </p><p>31 <br>40: add r1 = r2 + r3 </p><p>44: sub r3 = r1 - r0 48: store M[ r3 ] = r1 52: load r2 = M[ 2 ] </p><p><strong>*(int *)c = a; </strong><br><strong>/* M[c] = a */ </strong></p><p></p><ul style="display: flex;"><li style="flex:1">Address </li><li style="flex:1">Data </li></ul><p></p><ul style="display: flex;"><li style="flex:1">0</li><li style="flex:1">0</li></ul><p></p><ul style="display: flex;"><li style="flex:1">1</li><li style="flex:1">25 </li></ul><p>5</p><p></p><ul style="display: flex;"><li style="flex:1"><strong>load r2 = M[ 2 ] </strong></li><li style="flex:1"><strong>b = *(int *)(2); </strong></li></ul><p><strong>/* b gets M[2] */ </strong></p><p>2<br>Program Counter </p><p>52 </p><ul style="display: flex;"><li style="flex:1">3</li><li style="flex:1">3</li></ul><p></p><p><strong>}</strong></p><p>…</p><p>…</p><ul style="display: flex;"><li style="flex:1">0</li><li style="flex:1">FFFFFFFF </li></ul><p></p><p>Branching </p><p>Suppose we could only execute instructions in sequence. Recall from our example: <br>40: add r1 = r2 + r3 44: sub r3 = r1 - r0 48: store M[ r3 ] = r1 52: load r2 = M[ 2 ] </p><p>•ꢀ In a decent desktop machine, how long would the longest program stored in main memory take? <br>•ꢀ Assume: </p><p>•ꢀ 1 instruction per cycle •ꢀ An instruction is encoded in 4 bytes (32 bits) </p><p></p><ul style="display: flex;"><li style="flex:1"><strong>33 </strong></li><li style="flex:1"><strong>34 </strong></li></ul><p></p><p>Therefore… </p><p>Unconditional Branches </p><p></p><ul style="display: flex;"><li style="flex:1">•ꢀ Some instructions must execute more than once </li><li style="flex:1">•ꢀ Unconditional branches always update the PC </li></ul><p></p><ul style="display: flex;"><li style="flex:1">•ꢀ PC must be updated </li><li style="flex:1">•ꢀ AKA: Jump instructions </li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Example: </li><li style="flex:1">Example: </li></ul><p></p><p>40: add r1 = r2 + r3 44: sub r3 = r1 - r0 48: store M[ r3 ] = r1 52: load r2 = M[ 2 ] 56: PC = 40 <br>40: add r1 = r2 + r3 44: sub r3 = r1 - r0 48: store M[ r3 ] = r1 52: load r2 = M[ 2 ] 56: jump 40 </p><p>•ꢀ How long with the program take? </p><p></p><ul style="display: flex;"><li style="flex:1"><strong>35 </strong></li><li style="flex:1"><strong>36 </strong></li></ul><p></p><p></p><ul style="display: flex;"><li style="flex:1">Conditional Branch </li><li style="flex:1">Conditional Branch </li></ul><p></p><p>•ꢀ What does this look like in C? <br>•ꢀ Conditional Branch sometimes updates PC </p>