eZ80F915050MODG eZ80F91 Module Product Specification PS019312-0907 Copyright ©2007 by Zilog®, Inc. All rights reserved. www.zilog.com Warning: DO NOT USE IN LIFE SUPPORT LIFE SUPPORT POLICY ZILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF ZILOG CORPORATION. As used herein Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Document Disclaimer ©2007 by Zilog, Inc. All rights reserved. Information in this publication concerning the devices, applications, or technology described is intended to suggest possible uses and may be superseded. ZILOG, INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZILOG ALSO DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. The information contained within this document has been verified according to the general principles of electrical and mechanical engineering. Z8, Z8 Encore!, Z8 Encore! XP, Z8 Encore! MC, Crimzon, eZ80, ZNEO, Zdots, and eZ80AcclaimPlus! are trademarks or registered trademarks of Zilog, Inc. All other product or service names are the property of their respective owners. PS019312-0907 eZ80F91 Module Product Specification iii Revision History Each instance in the Revision History reflects a change to this document from its previous revision. For more details, refer to the corresponding pages or appropriate links given in the table below. Revision Date Level Description Page No September 12 Changed eZ80F915050MOD to i 2007 eZ80F915050MODG July 2006 11 Removed PRELIMINARY All July 2004 10 Formatted to current publication standards All Part number change to AMD MII in Ethernet PHY 12 and RJ45 Connector section Part number change to internal crystal at jumper 21 location Y3 in Table 6 March 2004 09 Updated Schematics 24 Dec 2003 08 Updated eZ80F91 Module Bill of Materials 21 PS019312-0907 Revision History eZ80F91 Module Product Specification iv Table of Contents eZ80F91 Module . 1 eZ80F91 Module Features . 1 eZ80F91 Controller Features . 2 Block Diagram . 3 Pin Description . 4 Peripheral Bus Connector . 4 Input/Output Connector . 7 Onboard Component Description . 12 Logic-Level Input/Outputs . 12 Onboard Battery Backup . 12 Ethernet PHY and RJ45 Connector . 12 Ethernet LEDs . 13 Fast Buffer (U10) . 13 Memory . 15 IrDA Transceiver . 15 Reset Generator . 16 Serial Interface Ports . 16 Physical Dimensions . 16 Absolute Maximum Ratings . 19 eZ80F91 Module Bill of Materials . 21 Schematics . 24 Customer Support . 27 PS019312-0907 Table of Contents eZ80F91 Module Product Specification 1 eZ80F91 Module Zilog’s eZ80F91 Module is a compact, high-performance Ethernet module specially designed for the rapid development and deployment of embedded systems requiring control and internet/intranet connectivity. This expandable module is powered by Zilog’s latest power-efficient, high-speed, optimized pipeline architecture eZ80F91 microcontroller, a member of Zilog’s family of eZ80Acclaim! Flash microcontrollers. The eZ80F91 is a high-speed single-cycle instruction-fetch microcontroller, which operates with a clock speed of 50 MHz. It can also operate in Z80®-compatible addressing mode (64 KB) or full 24-bit addressing mode (16 MB). The rich-peripheral set of the eZ80F91 Module makes it suitable for a variety of applications including industrial control, IrDA connectivity, communication, security, automation, point-of-sale terminals, and embedded networking applications. eZ80F91 Module Features Features of eZ89F91 Module include: • Factory-default operating clock frequency at 50 MHz • 10/100 Base-T Ethernet PHY with RJ45 connector • 512 KB fast SRAM • 256 KB on-chip Flash memory • 1 MB OFF-chip NOR Flash memory • Battery-backed Real-time clock • Input/Output connector which provides 32 general-purpose 5 V-tolerant I/O pinouts • Zilog’s industry-leading IrDA transceiver—Zilog ZHX1810 • Onboard connector provides I/O bus for external peripheral connections (IRQ, CS, 24 address, and 8 data) • Low-cost connection to carrier board via two 2 x 30 pin headers • Small footprint 63.5 mm x 78.7 mm • 3.3 V power supply • Standard operating temperature range: 0 ºC to +70 ºC PS019312-0907 eZ80F91 Module eZ80F91 Module Product Specification 2 eZ80F91 Controller Features Features of eZ80F91 Controller include: • The eZ80F91 device contains 256 KB of Flash memory and 8 KB of SRAM • Single-cycle instruction fetch, high-performance, pipelined eZ80 CPU core • 10/100 Mbps Ethernet MAC with 8 KB frame buffer • Low power features including SLEEP mode, HALT mode, and selective peripheral power-down control • Two UARTs with independent baud rate generators and support for 9-bit operation • SPI with independent clock generator • I2C with independent clock generator • Infrared data association (IrDA)-compliant infrared encoder/decoder • New DMA-like eZ80 instructions for efficient block data transfer • External interface with 4 chip selects, individual wait state generators, and an external WAIT input pin—supports Intel- and Motorola-style buses • Flexible-priority vectored interrupts (both internal and external) and interrupt controller • Real-time clock with on-chip 32 kHz oscillator, selectable 50/60 Hz input, and separate VDD pin for battery backup • Four 16-bit Counter/Timers with prescalers and direct input/output drive • Watchdog Timer (WDT) • 32 bits of general-purpose input/output (GPIO) • JTAG and ZDI debug interfaces • 144-pin LQFP package • 3.0–3.6 V supply voltage with 5 V tolerant inputs • Standard operating temperature range: 0 ºC to +70 ºC PS019312-0907 eZ80F91 Module eZ80F91 Module Product Specification 3 Block Diagram Figure 1 illustrates the block diagram of eZ80F91 Module. 32KHz XTAL eZ80F91 GPIO BATTERY (256KB FLASH, Bus (JP2) 8KB SRAM, External GPIO EMAC) CONTROL & ADDRESS BUS 50MHz XTAL (JP1) DATA BUS External Perpheral Bus MII CS0 Ethernet AM79874 FLASH (1 MB, CS0) BUFFER FAST SRAM (512 KB, CS1) IrDA IrDA Figure 1. eZ80F91 Module Functional Block Diagram PS019312-0907 eZ80F91 Module eZ80F91 Module Product Specification 4 Pin Description Peripheral Bus Connector Figure 2 illustrates the pin layout of the 60-pin Peripheral Bus Connector (JP1) of the eZ80F91 Module. The eZ80 development platform, however, features a 50-pin connector. The eZ80F91 Module is designed to interface pin 60 of its JP1 connector to pin 50 of the eZ80 development platform’s JP1 connector so that pins 1–10 of the eZ80F91 Module overlap the edge of the eZ80 development platform. Table 1 on page 5 describes the pins and their functions. Figure 2. eZ80F91 Module Peripheral Bus Connector Pin Configuration—JP1 PS019312-0907 Pin Description eZ80F91 Module Product Specification 5 Note: All signals with an overline are active Low. For example, B/W, for which WORD is active Low, and B/W, for which BYTE is active Low. Table 1. eZ80F91 Module Peripheral Bus Connector Pin Identification* Pull Pin No Symbol Up/Down* Signal Direction Comments 1 Reserved 2 Reserved 3 Reserved 4 Reserved 5TRSTN Input Reset for on-chip instrumentation (OCI). 6 Reserved 7 F91_WE PU 10 kΩ Input A Low enables a Write to on-chip Flash memory. If this pin is unconnected, on-chip Flash memory is write-protected. 8 Reserved 9GND VSS/Ground (0 V). 10 VCC 3.3 V supply input pin. 11 A6 Bidirectional 12 A0 Bidirectional 13 A10 Bidirectional 14 A3 Bidirectional 15 GND VSS/Ground (0 V). 16 VCC 3.3 V supply input pin. 17 A8 Bidirectional 18 A7 Bidirectional 19 A13 Bidirectional 20 A9 Bidirectional 21 A15 Bidirectional 22 A14 Bidirectional 23 A18 Bidirectional 24 A16 Bidirectional PS019312-0907 Pin Description eZ80F91 Module Product Specification 6 Table 1. eZ80F91 Module Peripheral Bus Connector Pin Identification* (Continued) Pull Pin No Symbol Up/Down* Signal Direction Comments 25 A19 Bidirectional 26 GND VSS/Ground (0 V). 27 A2 Bidirectional 28 A1 Bidirectional 29 A11 Bidirectional 30 A12 Bidirectional 31 A4 Bidirectional 32 A20 Bidirectional 33 A5 Bidirectional 34 A17 Bidirectional 35 Reserved 36 DIS_Flash PU 10 kΩ Input A Low disables onboard Flash memory. Flash is enabled if DIS_Flash is not connected; CMOS Input 3.3 V (5 V tolerant). 37 A21 Bidirectional 38 VCC 3.3 V supply input pin. 39 A22 Bidirectional 40 A23 Bidirectional 41 CS0 Output 42 CS1 Output 43 CS2 Output 44 D0 PU 4 kΩ Bidirectional 45 D1 PU 4 kΩ Bidirectional 46 D2 PU 4 kΩ Bidirectional 47 D3 PU 4 kΩ Bidirectional 48 D4 PU 4 kΩ Bidirectional 49 D5 PU 4 kΩ Bidirectional 50 GND VSS/Ground (0 V). 51 D7 PU 4 kΩ Bidirectional PS019312-0907 Pin Description eZ80F91 Module Product Specification 7 Table 1. eZ80F91 Module Peripheral Bus Connector Pin Identification* (Continued) Pull Pin No Symbol Up/Down* Signal Direction Comments 52 D6 Bidirectional 53 MREQ Bidirectional 54 IORQ Bidirectional 55 GND VSS/Ground (0 V). 56 RD Bidirectional 57 WR Bidirectional 58 INSTRD Output 59 BUSACK Output 60 BUSREQ PU 2 kΩ Input *Notes 1.External capacitive loads on RD, WR, IORQ, MREQ, D0–D7, and A0–A23 must be below 10 pF to satisfy timing requirements for the CPU. 2.All unused inputs must be pulled to either VDD or GND, depending on their inactive levels, to reduce power consumption and to reduce noise sensitivity. 3.All inputs are CMOS level 3.3 V (5 V tolerant), except where otherwise noted.